JP3710396B2 - Low melting point glass paste for forming dielectric layer and low melting point glass - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a low-melting glass paste for forming a dielectric layer and a low-melting glass for coating a transparent electrode in a plasma display panel.
[0002]
[Prior art]
2. Description of the Related Art Plasma display panels (hereinafter simply referred to as PDPs) are attracting attention as large-screen full-color display devices. In particular, the three-electrode surface discharge AC type PDP forms a plurality of display electrode pairs for generating surface discharge on a display-side substrate, and addresses electrodes orthogonal to the display electrode pairs on the back-side substrate. A phosphor layer is formed to coat. The driving of the PDP is reset by applying a large voltage to the display electrode pair, discharging between one electrode of the display electrode pair and the address electrode, and utilizing the wall charges generated by the discharge. Basically, a sustain discharge is generated by applying a sustain voltage between the pair.
[0003]
Then, the phosphor layer emits, for example, RGB (red, green, blue) fluorescent colors by the plasma generated by the sustain discharge, whereby full color display is performed. Therefore, a transparent electrode material is used for the display electrode pair formed on the display-side substrate.
[0004]
This transparent electrode material is, for example, a semiconductor typically made of ITO (a mixture of indium oxide In ₂ O ₃ and tin oxide SnO ₂ ), and its conductivity is lower than that of metal or the like. Therefore, a thin metal conductive layer is added on the transparent electrode in order to increase the conductivity.
[0005]
[Problems to be solved by the invention]
However, the dielectric layer covering the transparent electrode is usually formed by forming a dielectric paste layer on a substrate and firing at a high temperature. There is a problem that the resistance of the transparent electrode increases due to the high temperature during the high-temperature firing step or during the subsequent operation. The increase in the resistance of the transparent electrode particularly increases the sustain discharge voltage between the transparent electrode pair, which may make it difficult to drive the PDP.
[0006]
The reason for the increase in the resistance value of the transparent electrode pair is not necessarily certain, but the transparent electrode and the dielectric layer that is in contact with the transparent electrode react with each other at a high temperature to contribute to the conductivity of the transparent electrode. It is assumed that the main component is included in the dielectric layer.
[0007]
In view of the above problems, an object of the present invention is to provide a low-melting glass paste for forming a dielectric layer and a low-melting glass capable of preventing an increase in resistance of a transparent electrode of a plasma display panel. is there.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a PbO—SiO ₂ —B ₂ O ₃ —ZnO-based or PbO— as a dielectric layer forming glass paste covering a transparent electrode pattern disposed on a plasma display panel substrate. It is characterized in that a SiO ₂ —B ₂ O ₃ —ZnO—BaO-based glass contains an oxide that is a main component of a transparent electrode in a range of 0.1 to 10 wt% to form a paste. When the transparent electrode is ITO, the main component is included as indium oxide.
[0009]
Furthermore, in the present invention, the PbO—SiO ₂ —B ₂ O ₃ —ZnO—BaO glass composition contains an oxide that forms the main component of the transparent electrode, particularly indium oxide, in the range of 0.5 to 2 wt%. The low melting point glass for forming a dielectric layer is characterized. By including the main component of the transparent electrode in the form of an oxide in the low melting point glass or paste for forming the dielectric layer, the dielectric material diffuses into the transparent electrode even after a high temperature process, thereby reducing the conductivity. Seems to be prevented.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, examples of embodiments of the present invention will be described with reference to the drawings. However, such an embodiment does not limit the technical scope of the present invention.
[0011]
FIG. 1 is an exploded perspective view of a three-electrode surface discharge AC type PDP to which a low melting point glass paste for forming a dielectric layer according to the present invention is applied. FIG. 2 is a cross-sectional view of the PDP. First, the structure will be described with reference to both drawings. In this example, the display light is emitted in the direction of the glass substrate 10 on the display side (the direction shown in FIG. 2). Reference numeral 20 denotes a glass substrate on the back side. On the glass substrate 10 on the display side, there are formed an X electrode 13X and a Y electrode 13Y comprising a transparent electrode 11 and a bus electrode 12 having a high conductivity formed thereon (lower in the drawing). Is covered with a dielectric layer 14 and a protective layer 15 made of MgO. The bus electrode 12 is provided along opposite ends of the X electrode and the Y electrode in order to supplement the conductivity of the transparent electrode 11.
[0012]
The bus electrode 12 is, for example, a metal electrode having a three-layer structure of chromium, copper, and chromium. The transparent electrode 11 is usually made of ITO (indium tin oxide, a mixture of indium oxide In ₂ O ₃ and tin oxide SnO ₂ ), and the bus electrode 12 is added to ensure sufficient conductivity. Is done. The dielectric layer 14 is usually formed of a low-melting glass material mainly composed of lead oxide, and more specifically, a PbO—SiO ₂ —B ₂ O ₃ —ZnO system or PbO—SiO ₂ —B. _{This is a 2} O ₃ —ZnO—BaO-based glass.
[0013]
On the back glass substrate 20, stripe-shaped address electrodes A 1, A 2, A 3 are provided on an underlying passivation film 21 made of, for example, a silicon oxide film, and covered with a dielectric layer 22. Further, the address electrode A is formed between stripe-shaped partition walls (ribs) 23 formed adjacent to the address electrode A. The barrier ribs 23 have two functions: a function of cutting off the influence on adjacent cells during address discharge and a function of preventing light crosstalk. Red, blue, and green phosphors 24R, 24G, and 24B are separately applied to the adjacent ribs 23 so as to cover the address electrodes and the rib wall surfaces.
[0014]
In addition, as shown in FIG. 2, the display side substrate 10 and the back side substrate 20 are combined with a gap of about 100 μm, and a space 25 between them is filled with Ne + Xe discharge mixed gas.
[0015]
FIG. 3 is a plan view of the panel showing the relationship between the X and Y electrodes and the address electrodes of the above-mentioned three-electrode surface discharge type PDP. The X electrodes X1 to X10 are arranged in parallel in the horizontal direction and commonly connected at the substrate end, and the Y electrodes Y1 to Y10 are respectively provided between the X electrodes and individually led out to the substrate end. These X and Y electrodes are paired to form a display line, and a sustain discharge voltage for display is applied alternately. XD1, XD2 and YD1, YD2 are dummy electrodes provided outside the effective display area, respectively, and are provided to alleviate the non-linear characteristics of the peripheral portion of the panel. The address electrodes A1 to A14 provided on the back substrate 20 are provided orthogonal to the X and Y electrodes.
[0016]
The X and Y electrodes are paired and a sustain discharge voltage is applied alternately, but the Y electrode is also used as a scan electrode when writing information. The address electrode is used when writing information, and plasma discharge for address is generated between the address electrode and the Y electrode to be scanned according to the information.
[0017]
FIG. 4 is an electrode applied voltage waveform diagram for explaining a specific PDP driving method. The voltages applied to the respective electrodes are, for example, Vw = 130V, Vs = 180V, Va = 50V, −Vsc = −50V, −Vy = −150V, and Vaw and Vax are applied to the other electrodes. Is set to an intermediate potential between the two voltages.
[0018]
In driving the three-electrode surface discharge type PDP, one subfield includes a reset period, an address period, and a sustain discharge period (display period).
[0019]
In the reset period, the entire writing pulse is applied to the X electrodes commonly connected at time ab, and a discharge is generated between the XY electrodes on the entire panel surface (W in the figure). Of the charges generated in the space 25 by this discharge, positive charges are drawn to the Y electrode side having a low voltage, and negative charges are drawn to the X electrode side having a high voltage. As a result, at the time point b when the write pulse disappears, a discharge is generated again between the X electrode and the Y electrode due to the high electric field due to the electric charge that has been attracted and accumulated on the dielectric layer 14 (C in the figure). ). As a result, the charges on all the X and Y electrodes are neutralized, and the reset of the entire panel is completed. Period bc is the time required to neutralize the charge.
[0020]
Next, in the address period, −50 V (−Vsc) is applied to the Y electrode, 50 V (Va) is applied to the X electrode, and a scan pulse of −150 V (−Vy) is further applied to the Y electrode in order. An address pulse of 50 V (Va) according to the display information is applied. As a result, a large voltage of 200 V is applied between the address electrode and the scan electrode, and plasma discharge is generated. However, since the entire writing pulse at the time of reset is not as large as the voltage and the pulse width, the opposite discharge due to the accumulated charge does not occur even when the application of the pulse is completed. The space charges generated by the discharge are accumulated on the dielectric layers 14 and 22 as negative charges on the X electrode side and address charge side applied with 50 V and on the Y electrode side applied with −50 V, respectively.
[0021]
Finally, in the sustain discharge period, display discharge corresponding to the display luminance is performed using the wall charges stored in the address period. That is, a sustain pulse Vs is applied between the X and Y electrodes so that discharge is performed in a cell with wall charge but not in a cell without wall charge. As a result, in the cell in which wall charges are accumulated in the address period, the discharge is alternately repeated between the X and Y electrodes. The luminance of the display is expressed according to the number of discharge pulses. Therefore, the multi-gradation display can be performed by repeating this subfield in the sustain discharge period weighted a plurality of times. A full color display can be realized by combining RGB cells.
[0022]
In this sustain discharge period, as indicated by an arrow in FIG. 2, the sustain voltage Vs applied between the pair of transparent electrodes 11 and the surface of the dielectric layer 14 (actually the surface of the protective layer 15) are applied. Plasma discharge for sustain discharge is generated by the voltage due to the accumulated charge. Then, ultraviolet rays generated from the generated plasma are irradiated onto the fluorescent layer 22 to generate light of each color, and the light exits on the display-side substrate 10 as indicated by arrows in FIG.
[0023]
As described above, since the transparent electrode 11 is a semiconductor layer that is not so highly conductive in itself, the metal bus electrodes 12 are provided on both ends thereof. Therefore, the resistance in the longitudinal direction of the X electrode 13X and the Y electrode 13Y can be kept low even if the conductivity of the transparent electrode 11 is somewhat lowered due to some reaction between the transparent electrode 11 and the dielectric layer 14.
[0024]
However, when the conductivity of the transparent electrode 11 decreases, the resistance in the width direction also increases, and it is necessary to increase the sustain discharge voltage Vs necessary for the sustain discharge. That is, the resistance of the transparent electrode 11 is increased, and a substantial sustain discharge is generated between the bus electrodes 12. The distance between the bus electrodes 12 is longer than the distance between the transparent electrodes 11, and a higher discharge voltage is required for the discharge between them.
[0025]
Therefore, in the embodiment of the present invention, in order to prevent the conductivity of the transparent electrode 11 from being lowered, the low-melting glass or the paste for forming the dielectric layer 14 that is in contact with and covers the transparent electrode 11 To contain an oxide as a main component of the transparent electrode. For example, when the transparent electrode 11 is ITO (95% by weight of indium oxide, 5% by weight of tin oxide), particles of indium oxide In ₂ O ₃ are mixed in the low melting point glass paste forming the dielectric layer 14. Alternatively, indium oxide is doped into the glass composition of the low melting point glass that forms the dielectric layer 14. By using such a low-melting glass paste or low-melting glass, chemical reaction between the dielectric layer 14 and the transparent electrode 11 or interdiffusion of substances can be prevented even after a high-temperature firing step.
[0026]
More specifically, according to the present invention, conductive indium oxide (N-type semiconductor) is contained in the low melting point glass material to be the dielectric layer 14, so that the main component of the transparent electrode is oxidized. It is considered that the chemical reaction in which indium enters the dielectric layer 14 and lead oxide in the dielectric layer 14 enters the transparent electrode 11 is suppressed. That is, it is considered that mutual diffusion is suppressed by the chemical equilibrium state.
[0027]
FIG. 5 is a graph showing the relationship between the rate of increase in the resistance value of the transparent electrode 11 made of ITO and the firing temperature when indium oxide is contained in the dielectric layer 14. In this graph, as shown in FIG. 2, a low melting point glass paste for forming a dielectric layer 14 is printed on a substrate on which a transparent electrode 11 made of ITO is formed so as to cover the transparent electrode 11. It is the result of changing the firing temperature and measuring the rate of change of the resistance value of the transparent electrode 11 after firing. As a sample, ITO containing 95 wt% indium oxide In ₂ O ₃ and 5 wt% tin oxide SnO ₂ was used as a transparent electrode, and PbO—SiO ₂ —B ₂ O ₃ —ZnO was used as a low-melting glass for forming a dielectric layer. A -BaO glass composition was used. Then, an example in which 3.0 wt% indium oxide particles or powder is mixed in the glass material (a in the figure), an example in which 2.0 wt% indium oxide is included in the glass composition (b in the figure), An example containing 1.0 wt% indium oxide (c in the figure), an example containing 0.5 wt% indium oxide (d in the figure), and an example not containing indium oxide (e in the figure) The four samples were measured.
[0028]
In addition, in order to mix indium oxide particles into a glass material, for example, indium oxide particles of about 100 angstroms are mixed with glass powder together with an appropriate solvent and binder to form a paste and screen printed on the substrate. Bake. It is necessary to make the particles of indium oxide as small as possible so as not to shield the display light.
[0029]
In order to include indium oxide in the glass composition, for example, indium oxide powder is mixed with glass powder containing lead oxide as a main component and melted at a high temperature of about 1300 ° C. Thereby, indium oxide is incorporated into the glass composition. Then, it cools from the molten state, pulverizes, makes a paste with a solvent and a binder, and performs printing and baking. The firing temperature is usually about 580 ° C. to 600 ° C. and does not melt in this step.
[0030]
As is clear from this measurement result, in the sample e in which the dielectric layer does not contain indium oxide, the resistance of the transparent electrode is rapidly increased when the firing temperature is 580 ° C. or higher. And if it exceeds 600 degreeC, the raise of the resistance will become near infinite, and conductivity will be almost lost. Therefore, when indium oxide is not contained, it is necessary to lower the baking temperature accordingly, and sufficient baking cannot be performed or a long baking process is required.
[0031]
On the other hand, in the sample a in which indium oxide is mixed in the low melting point glass paste for forming the dielectric layer and the samples b, c and d in which indium oxide is included in the low melting point glass composition, the firing temperature is 590 ° C. Even if it exceeds, the increase in resistance of the transparent electrode can be suppressed. In particular, in the case of sample b containing 2 wt% indium oxide in the low-melting glass composition, the resistance of the transparent electrode hardly increases even when the firing temperature exceeds 590 ° C. Sample a mixed with 3 wt% indium oxide particles (powder) and sample c containing 1 wt% indium oxide in the composition showed almost the same characteristics and increased the resistance of the transparent electrode even when the temperature exceeded 600 ° C. There is almost no. The reason why the sample b shows better results than the sample a is that indium oxide is almost uniformly dispersed in the glass.
[0032]
FIG. 6 is a graph showing changes in the surface resistivity of the dielectric layer when indium oxide particles are mixed into the dielectric layer as described above. In this example, indium oxide particles are mixed in the low melting point glass paste mainly composed of lead oxide. Indium oxide is an N-type semiconductor material and is an oxidized conductive material. Therefore, the surface resistance of the dielectric layer is reduced by increasing the amount of the contamination. As is apparent from this graph, when the content of indium oxide is increased to about 10 wt%, the resistance value decreases by two orders of magnitude or more compared to the case of not containing the surface resistance, and about one order of magnitude compared to the case of containing 3 wt%. Resistance value decreases.
[0033]
Since the dielectric layer 14 needs to insulate between the transparent electrodes and accumulate electric charges generated during the address discharge, it is necessary to avoid an excessive decrease in the resistance value. Therefore, the upper limit of the amount of indium oxide particles mixed is about 10 wt%. The lower limit is about 0.1 wt% at which a certain increase in the resistance value of the transparent electrode is suppressed.
[0034]
From the above examination results, PbO—SiO ₂ —B ₂ O ₃ —ZnO-based or PbO—SiO ₂ —B ₂ O _{3 is used} as a low melting point glass paste for forming the dielectric layer 14 that is in contact with and covers the transparent electrode 11. -ZnO-BaO-based oxide forming the main component of glass transparent electrodes, which make a paste with particular moistened with indium oxide in the range of 0.1-10%, or _PbO-SiO 2 _-B 2 _{O 3} By using a low-melting glass paste containing an oxide which is a main component of a transparent electrode, in particular indium oxide in a range of 0.5 to 2.0 wt% in a —ZnO—BaO-based glass composition, etc. It is understood that this is effective in preventing the conductivity of the transparent electrode 11 from being lowered with respect to the high temperature process.
[0035]
That is, according to the present invention, it is effective to include the main component of the transparent electrode in the glass paste when printing the glass paste covering the transparent electrode on the substrate on which the transparent electrode of the plasma display panel is formed. It is. As a method of including the main component of the transparent electrode in the glass paste as the dielectric material, there are a method of mixing the above-described particles and a method of melting the main component and incorporating it into the glass composition. If such a glass paste is used, the conductivity of the transparent electrode does not decrease even after a high-temperature process for firing and a high-temperature process in the subsequent sealing process of two glass substrates.
[0036]
In the above embodiment, the low melting point glass mainly composed of lead oxide has been described as an example of the low melting point glass for forming the dielectric layer. Other materials such as low melting point glass (ZnO—Bi ₂ O ₃ ) mainly composed of bismuth oxide and phosphoric acid type low melting point glass (PO 4) should contain the main component of the transparent electrode. The same effect can be expected.
[0037]
【The invention's effect】
As described above, according to the present invention, the conductivity of the transparent electrode is reduced by including a predetermined amount of the main component of the transparent electrode in the low melting point glass for forming the dielectric layer covering the transparent electrode of the plasma display panel. Can be prevented.
[Brief description of the drawings]
FIG. 1 is an exploded perspective view of a PDP to which the present invention is applied.
FIG. 2 is a cross-sectional view of a PDP.
FIG. 3 is a plan view of a panel showing a relationship between X and Y electrodes and address electrodes of a three-electrode surface discharge type PDP;
FIG. 4 is an electrode applied voltage waveform diagram for explaining a specific PDP driving method;
FIG. 5 is a graph showing the relationship between the rate of increase in the resistance value of a transparent electrode made of ITO and the temperature when indium oxide is contained in a dielectric layer.
FIG. 6 is a graph showing a change in surface resistivity of a dielectric layer when indium oxide particles are mixed in the dielectric layer.
[Explanation of symbols]
10 First substrate 11 Transparent electrode 14 Dielectric layer 20 Second substrate A Address electrode 25 Discharge space

Claims (2)

A low melting point glass paste for forming a dielectric layer on a transparent electrode pattern made of ITO disposed on a plasma display panel substrate,
PbO—SiO ₂ —B ₂ O ₃ —ZnO-based or PbO—SiO ₂ —B ₂ O ₃ —ZnO—BaO-based glass contains 0.1 to 10 wt% of indium oxide as a main component of the transparent electrode. A low-melting-point glass paste for forming a dielectric layer, characterized in that it is contained in a range and formed into a paste. Low melting point glass for forming a dielectric layer on a transparent electrode pattern made of ITO disposed on a plasma display panel substrate,
Indium oxide which is a main component of the transparent electrode is included in a PbO—SiO ₂ —B ₂ O ₃ —ZnO—BaO glass composition in a range of 0.5 to 2.0 wt%. Low melting glass for layer formation.

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