JP3710039B2 - Semiconductor photo detector - Google Patents
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【０００１】
【発明の属する技術分野】
本発明は、半導体受光素子に関するものであり、薄い光吸収層でありながら高受光感度が得られ、又、超高速動作も可能となるように工夫したものである。
【０００２】
【従来の技術】
従来の光受光層を含む半導体多層構造よりなる受光部分と、前記光受光層を入射光が層厚方向に対し斜めに通過するようにした半導体受光素子を代表する屈折型半導体受光素子は、図２に示すような構造をしている。即ち、図２において、２１は光入射面、２２はp-InP 層、２３はInGaAs光受光層、２４はn-InP 層、２５はn-InP 基板、２６はp 電極、２７はn 電極である。
【０００３】
一般に、上層の電極２６は、p 型の場合のAuZnNiやn 型の場合のAuGeNi等の金属を熱処理を施すことにより半導体層と合金化を図り、オーミック電極としている。合金化のため、電極２６と半導体間には微小な凹凸が発生しており、屈折してきた光がここに到達しても、乱反射されたり、又、電極金属自身による光吸収もあって、電極部分での光の反射率は小さい。
【０００４】
【発明が解決しようとする課題】
従って、屈折型半導体受光素子の特徴である屈折光が層厚方向に対し斜めに通過することによる実効吸収長の増大によって受光層厚の低減が図れるものの、十分大きな受光感度を得るためには、受光層２３への屈折光の１回の通過で、光が十分吸収されるようにする必要がある。従って、受光層厚の薄層化には、このことによる制限があった。又、このため、受光層２３を走行するキャリアの走行時間が半導体受光素子の応答速度の制限要因となって超高速でありかつ高受光感度の素子を製作することができないという問題点があった。
【０００５】
本発明の目的は、光受光層を含む半導体多層構造よりなる受光部分と、前記光受光層を入射光が層厚方向に対し斜めに通過するようにした半導体受光素子において、薄い光吸収層でありながら高受光感度が得られ、又、超高速動作も可能となる半導体受光素子を提供することにある。
【０００６】
【課題を解決するための手段】
上記課題を解決する本発明の構成は、光吸収層が前記光吸収層より小さな屈折率を有する第一の半導体層を含む上部半導体層と前記第一の半導体層より屈折率が大きい第二の半導体層を含む下部半導体層で挟まれた積層構造を有し、前記下部半導体層側から入射した入射光が、前記光吸収層を層厚方向に対し斜めに通過し、前記第一の半導体層の前記光吸収層側の界面で全反射し、前記光吸収層を再度斜めに通過することにより、光吸収長が増大することを特徴とする。
【０００７】
また本発明の構成は、下部半導体層の少なくとも一部の側壁は、光吸収層の面となす角が鋭角な傾斜側壁であり、入射光が傾斜側壁で屈折して光吸収層に入射することを特徴とする。
【０００８】
また本発明の構成は、光受光層を含む半導体多層構造よりなる受光部分と、前記光受光層を入射光が層厚方向に対し斜めに通過するようにした半導体受光素子において、光受光層に対し光入射側の半導体層の屈折率が、光受光層に対し光入射側と反対側の半導体層の屈折率より大きい半導体層で構成されており、光受光層に対し光入射側と反対側の半導体層が光受光層より屈折率の小さな半導体層よりなり、その部分で光が全反射し前記光吸収層を再度斜めに通過することにより、光吸収長が増大するように構成されていることを特徴とする。
【０００９】
このため、光受光層に対し光入射側と反対側の半導体層で光が完全に全反射されることにより光が再度光受光層を通過することになり、光吸収効率が増大する。従来技術では、光受光層の上層における屈折した入射光の主たる到達領域が合金化した電極で構成されており、この領域での反射が小さいが、本発明では、光受光層に対し光入射側の半導体層の屈折率が、光受光層に対し光入射側と反対側の半導体層の屈折率より大きい半導体層で構成されており、光受光層に接する光受光層に対し光入射側と反対側の半導体層が、この部分で光が全反射するような光受光層より屈折率の小さな半導体層で構成されていることにより、上層の電極部分まで光が行くことがなく、光受光層の上側界面において光が全反射する点が異なる。
【００１０】
また本発明の構成は、光受光層を含む半導体多層構造よりなる受光部分と端面に表面側から離れるに従い内側に傾斜した光入射端面を設けることにより、該光入射端面で入射光を屈折させて、前記光受光層を入射光が層厚方向に対し斜めに通過するようにした屈折型半導体受光素子において、光受光層に対し光入射側の半導体層の屈折率が、光受光層に対し光入射側と反対側の半導体層の屈折率より大きい半導体層で構成されており、光受光層に対し光入射側と反対側の半導体層が光受光層より屈折率の小さな半導体層よりなり、その部分で光が全反射し前記光吸収層を再度斜めに通過することにより、光吸収長が増大するように構成されていることを特徴とする。
【００１１】
このため、光受光層に対し光入射側と反対側の半導体層で光が完全に全反射されることにより光が再度光受光層を通過することになり、光吸収効率が増大する。従来技術では、光受光層の上層における屈折した入射光の主たる到達領域が合金化した電極で構成されており、この領域での反射が小さいが、本発明では、光受光層に対し光入射側の半導体層の屈折率が、光受光層に対し光入射側と反対側の半導体層の屈折率より大きい半導体層で構成されており、光受光層に接する光受光層に対し光入射側と反対側の半導体層が、この部分で光が全反射するような光受光層より屈折率の小さな半導体層で構成されていることにより、上層の電極部分まで光が行くことがなく、光受光層の上側界面において光が全反射する点が異なる。
【００１２】
また本発明の構成は、光受光層に対し光入射側の半導体層が、光受光層に対し光入射側と反対側の半導体層の屈折率より大きい屈折率を有するInGaAsP 半導体層で構成されていることを特徴とする。
【００１３】
このため、光受光層に対し光入射側と反対側の半導体層で光が完全に全反射されることにより光が再度光受光層を通過することになり、光吸収効率が増大する。従来技術では、光受光層の上層における屈折した入射光の主たる到達領域が合金化した電極で構成されており、この領域での反射が小さいが、本発明では、光受光層に接する光受光層に対し光入射側と反対側の半導体層が、この部分で光が全反射するような光受光層より屈折率の小さな半導体層で構成されており、上層の電極部分まで光が行くことがなく、光受光層の上側界面において光が全反射する点が異なる。
【００１４】
また本発明の構成は、光受光層に対し光入射側の半導体層が、光受光層に対し光入射側と反対側の半導体層の屈折率より大きい屈折率を有するGaAs半導体層で構成されていることを特徴とする。
【００１５】
このため、光受光層に対し光入射側と反対側の半導体層で光が完全に全反射されることにより光が再度光受光層を通過することになり、光吸収効率が増大する。従来技術では、光受光層の上層における屈折した入射光の主たる到達領域が合金化した電極で構成されており、この領域での反射が小さいが、本発明では、光受光層に接する光受光層に対し光入射側と反対側の半導体層が、この部分で光が全反射するような光受光層より屈折率の小さな半導体層で構成されており、上層の電極部分まで光が行くことがなく、光受光層の上側界面において光が全反射する点が異なる。
【００１６】
〔作用〕
このように、本素子は、光受光層に対し光入射側と反対側の半導体層が、その部分で光が全反射するような光受光層より屈折率の小さな半導体層により構成されている。このため、受光層を光が２回通過することになり実効的光吸収長が２倍に増大する。このため、高い受光感度を得るための光吸収層厚の大幅な薄層化が可能となる。光吸収層厚の大幅な薄層化により、高受光感度を維持しながら、素子の超高速動作が可能となる。
【００１７】
【発明の実施の形態】
以下に本発明の実施の形態を図面に基づき詳細に説明する。
【００１８】
〔実施例１〕
図１は本発明の第１の実施例を説明する断面斜視図である。１２は0.２μｍ厚p + -InGaAsP（1.２μｍ組成）層、１３は1.５μｍ厚p-InP 層、１４は0.４μｍ厚InGaAs光受光層、１５は１μｍ厚n-InGaAsP （1.４μｍ組成）層、１６はInGaAsP （1.４μｍ組成）層、１７はp 電極、１８はn 電極である。なお、引出し電極とパッド電極は、説明図が煩雑になり、説明の妨げになるため、この図では省略している。
【００１９】
素子の受光層面積は３０μｍ×５０μｍである。波長1.５５μｍ光は、光受光層１４に対し、７０°の入射角で入射するようにしている。なお、１５、１４、１３層がそれぞれ、請求項中の、光受光層に対し光入射側の主たる半導体層、光受光層、光受光層に対し光入射側と反対側の主たる半導体層に対応する。この例の他に、光受光層１４の片側もしくは両側の界面に薄い半導体層が入っていてもよい。
【００２０】
ここで、１５、１４、１３層のそれぞれの屈折率3.４３９、3.５９、3.１７を考慮すると、この時、InGaAs光受光層１４を光は通過角φ＝２5.８°で通過する。光は光受光層１４に対し光入射側と反対側の半導体層がInGaAs光受光層１４より屈折率の小さなInP 半導体層１３により構成されているため、全反射の条件（φ＜ cos-1（n2／n1）；ただし、n1は光受光層１４の屈折率、n2は光入射側と反対側の半導体層１３の屈折率）を満足し、光はこの部分で全反射するようになる。
【００２１】
これにより、１００％の反射光が再度吸収層１４を通過し、吸収されることにより、印加逆バイアス1.０Ｖで受光感度0.８Ａ／Ｗ以上の大きな値が得られた。また、光の反射が上記界面で起こるため、上層の電極１７の状態などに反射率や光の位相が左右されないので、高効率化や偏波制御等を設計性よく行うことが可能となる。ちなみに、上記界面で全反射しない従来構成で、p 電極が上面のほぼ全面に存在し、ここでの光反射効果のみを利用する場合では、0.６Ａ／Ｗ程度しか得られなかった。
【００２２】
この実施例では、光受光層１４に対し光入射側と反対側の半導体層がInGaAs光受光層１４より屈折率の小さなInP 半導体層１３を用いているが、光受光層１４の屈折率より適当に小さく、全反射の条件を満足できるものであれば、InGaAsP やInGaAlAs等、なんでも良い。また、この実施例は、波長1.５５μｍの入射光に対して述べているが、全反射の条件を満足できれば色々な波長の光に対しても同様の効果が得られる。
【００２３】
この実施例では、表面側のp-InP 層１３は結晶成長によって形成しているが、結晶成長ではアンドープInP 層とし、表面側の主たる部分の半導体の導電形を、Ｚｎの拡散や、イオン注入法とその後のアニールによって決定してもよい。
【００２４】
また、半導体受光素子部分は、第１導電形を有する半導体層上にあって、真性又は第一の導電型の半導体層、超格子半導体層または多重量子井戸半導体層より成る光受光層とショットキー電極との間に、前記光受光層と前記ショットキー電極との間のショットキー障壁よりも高いショットキー障壁を前記ショットキー電極に対して有するショットキーバリアハイトの高い半導体層を介在した多層構造を基板上に構成してなる半導体受光素子や、前記ショットキーバリアハイトの高い半導体層は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）又は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）とその上の薄いIn1-u Gau As1-v Ｐv （０≦ｕ≦１，０≦ｖ≦１）よりなることを特徴とする半導体受光素子で構成してもよい。
【００２５】
また、この実施例は、下側にn-InGaAsP 層１５を用い、上側をp-InP 層１３としているが、上記のp とn を逆にして同様に製作可能であり、また、n-InP やp-InP 基板を用いても同様に製作可能である。
【００２６】
また、ここでは、受光層１４として均一組成のバルクを用いているが、アバランシェフォトダイオードに用いられる Separate-absorption-graded-multiplication（SAGM）構造や Separate absorption and multiplication superlattice（SAM-SL）構造や他の超格子構造の半導体層等を用いてもよいことは言うまでもない。また、InGaAsP ／InP 系以外のInGaAlAs／InGaAsP やAlGaAs／GaAs系などの他の材料系や歪を内在するような材料系でもよいことは言うまでもない。
【００２７】
〔実施例２〕
図３は本発明の第２の実施例を説明する断面斜視図である。３１は光入射面、３２は0.２μｍ厚p + -InGaAsP（1.２μｍ組成）層、３３は1.５μｍ厚p-InP 層、３４は0.４μｍ厚InGaAs光受光層、３５は１μｍ厚n-InGaAsP （1.４５μｍ組成）層、３６はInGaAsP （1.４５μｍ組成）層、３７は半絶縁性InP 基板、３８はp 電極、３９はn 電極である。なお、引出し電極とパッド電極は、説明図が煩雑になり、説明の妨げになるため、この図では省略している。
【００２８】
素子の受光層面積は３０μｍ×５０μｍである。光入射面３１は、表面に対し６０度の逆メサ形状で形成した。逆メサ部の形成は各種のウェットエッチング液やドライエッチング法を用いて形成してもよいし、結晶面を利用したり、エッチングマスクの密着性を利用し角度を制御して形成してもよい。入射面３１には無反射膜を形成している。なお、３５、３４、３３層がそれぞれ、請求項中の、光受光層に対し光入射側の主たる半導体層、光受光層、光受光層に対し光入射側と反対側の主たる半導体層に対応する。この例の他に、光受光層の片側もしくは両側の界面に薄い半導体層が入っていてもよい。
【００２９】
ここで、３５、３４、３３層のそれぞれの屈折率3.４６４、3.５９、3.１７を考慮すると、波長1.５５μｍ光は、光受光層３４に対し、６8.３°の入射角で入射するようになる。この時、InGaAs光受光層３４を光は通過角φ＝２6.３°で通過する。光は光受光層３４に対し光入射側と反対側の半導体層がInGaAs光受光層３４より屈折率の小さなInP 半導体層３３により構成されているため、全反射の条件（φ＜ cos-1（n2／n1）；ただし、n1は光受光層３４の屈折率、n2は光入射側と反対側の半導体層３３の屈折率）を満足し、光はこの部分で全反射するようになる。
【００３０】
シングルモードファイバにより光を導入し、全反射により、１００％の反射光が再度吸収層３４を通過し、吸収されることにより、印加逆バイアス1.０Ｖで受光感度0.８Ａ／Ｗ以上の大きな値が得られた。また、光の反射が上記界面で起こるため、上層の電極３８の状態などに反射率や光の位相が左右されないので、高効率化や偏波制御等を設計性よく行うことが可能となる。ちなみに、上記界面で全反射しない従来構成で、p 電極が上面のほぼ全面に存在し、ここでの光反射効果のみを利用する場合では、0.６Ａ／Ｗ程度しか得られなかった。また、シングルモードファイバの代わりに、先球ファイバを用い、素子の微小化（受光面積を７μｍ×２０μｍ）を図ったもので、受光感度を高く保ちながら、３dB帯域５０ＧＨz の超高速動作が可能であった。
【００３１】
この実施例では、光受光層３４に対し光入射側と反対側の半導体層がInGaAs光受光層３４より屈折率の小さなInP 半導体層３３を用いているが、光受光層３４の屈折率より適当に小さく、全反射の条件を満足できるものであれば、InGaAsP やInGaAlAs等、なんでも良い。また、この実施例は、波長1.５５μｍの入射光に対して述べているが、全反射の条件を満足できれば色々な波長の光に対しても同様の効果が得られる。
【００３２】
この実施例では、表面側のp-InP 層３３は結晶成長によって形成しているが、結晶成長ではアンドープInP 層とし、表面側の主たる部分の半導体の導電形を、Ｚn の拡散や、イオン注入法とその後のアニールによって決定してもよい。
【００３３】
また、半導体受光素子部分は、第１導電形を有する半導体層上にあって、真性又は第一の導電型の半導体層、超格子半導体層または多重量子井戸半導体層より成る光受光層とショットキー電極との間に、前記光受光層と前記ショットキー電極との間のショットキー障壁よりも高いショットキー障壁を前記ショットキー電極に対して有するショットキーバリアハイトの高い半導体層を介在した多層構造を基板上に構成してなる半導体受光素子や、前記ショットキーバリアハイトの高い半導体層は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）又は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）とその上の薄いIn1-u Gau As1-v Ｐv （０≦ｕ≦１，０≦ｖ≦１）よりなることを特徴とする半導体受光素子で構成してもよい。
【００３４】
また、この実施例は、基板として半絶縁性InP ３７を用い、基板側にn-InGaAsP 層３５を用いた例であるが、p-InGaAs層を用いても上記のp とn を逆にして同様に製作可能であり、また、n-InP やp-InP 基板を用いても同様に製作可能である。
【００３５】
また、ここでは、受光層３４として均一組成のバルクを用いているが、アバランシェフォトダイオードに用いられる Separate-absorption-graded-multiplication（SAGM）構造や Separate absorption and multiplication superlattice（SAM-SL）構造や他の超格子構造の半導体層等を用いてもよいことは言うまでもない。また、InGaAsP ／InP 系以外のInGaAlAs／InGaAsP やAlGaAs／GaAs系などの他の材料系や歪を内在するような材料系でもよいことは言うまでもない。
【００３６】
〔実施例３〕
図４は本発明の第３の実施例を説明する断面斜視図である。４２は0.２μｍ厚p + -InGaAsP（1.２μｍ組成）層、４３は1.５μｍ厚p-InP 層、４４は0.４μｍ厚InGaAs光受光層、４５は１μｍ厚n-InGaAsP （1.４μｍ組成）層、４６は半絶縁性GaAs基板、４７はp 電極、４８はn 電極である。なお、引出し電極とパッド電極は、説明図が煩雑になり、説明の妨げになるため、この図では省略している。
【００３７】
素子の受光層面積は３０μｍ×５０μｍである。波長1.５５μｍ光は、光受光層４４に対し、７５°の入射角で入射するようにしている。なお、４６、４４、４３層がそれぞれ、請求項中の、光受光層に対し光入射側の主たる半導体層、光受光層、光受光層に対し光入射側と反対側の主たる半導体層に対応する。この例では、光受光層４４の片側の界面に半導体層４５が入っているが、両側や、反対側に入っていてもよい。
【００３８】
ここで、４６、４５、４４、４３層のそれぞれの屈折率3.３８、3.４３９、3.５９、3.１７を考慮すると、この時、InGaAs光受光層４４を光は通過角φ＝２4.５７°で通過する。光は光受光層４４に対し光入射側と反対側の半導体層がInGaAs光受光層４４より屈折率の小さなInP 半導体層４３により構成されているため、全反射の条件（φ＜ cos-1（n2／n1）；ただし、n1は光受光層４４の屈折率、n2は光入射側と反対側の半導体層４３の屈折率）を満足し、光はこの部分で全反射するようになる。
【００３９】
シングルモードファイバにより光を導入し、全反射により、１００％の反射光が再度吸収層４４を通過し、吸収されることにより、印加逆バイアス1.０Ｖで受光感度0.８Ａ／Ｗ以上の大きな値が得られた。また、光の反射が上記界面で起こるため、上層の電極４７の状態などに反射率や光の位相が左右されないので、高効率化や偏波制御等を設計性よく行うことが可能となる。ちなみに、上記界面で全反射しない従来構成で、p 電極が上面のほぼ全面に存在し、ここでの光反射効果のみを利用する場合では、0.６Ａ／Ｗ程度しか得られなかった。また、シングルモードファイバの代わりに、先球ファイバを用い、素子の微小化（受光面積を７μｍ×２０μｍ）を図ったもので、受光感度を高く保ちながら、３dB帯域５０ＧＨz の超高速動作が可能であった。
【００４０】
この実施例では、光受光層４４に対し光入射側と反対側の半導体層がInGaAs光受光層４４より屈折率の小さなInP 半導体層４３を用いているが、光受光層４４の屈折率より適当に小さく、全反射の条件を満足できるものであれば、InGaAsP やInGaAlAs等、なんでも良い。また、この実施例は、波長1.５５μｍの入射光に対して述べているが、全反射の条件を満足できれば色々な波長の光に対しても同様の効果が得られる。
【００４１】
この実施例では、表面側のp-InP 層４３は結晶成長によって形成しているが、結晶成長ではアンドープInP 層とし、表面側の主たる部分の半導体の導電形を、Ｚn の拡散や、イオン注入法とその後のアニールによって決定してもよい。
【００４２】
また、半導体受光素子部分は、第１導電形を有する半導体層上にあって、真性又は第一の導電型の半導体層、超格子半導体層または多重量子井戸半導体層より成る光受光層とショットキー電極との間に、前記光受光層と前記ショットキー電極との間のショットキー障壁よりも高いショットキー障壁を前記ショットキー電極に対して有するショットキーバリアハイトの高い半導体層を介在した多層構造を基板上に構成してなる半導体受光素子や、前記ショットキーバリアハイトの高い半導体層は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）又は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）とその上の薄いIn1-u Gau As1-v Ｐv （０≦ｕ≦１，０≦ｖ≦１）よりなることを特徴とする半導体受光素子で構成してもよい。
【００４３】
また、この実施例は、基板として半絶縁性GaAs４６を用い、基板側にn-InGaAsP 層４５を用いた例であるが、p-InGaAsP 層を用いても上記のp とn を逆にして同様に製作可能であり、また、n-GaAsやp-GaAs基板を用いても同様に製作可能である。
【００４４】
また、ここでは、受光層４４として均一組成のバルクを用いているが、アバランシェフォトダイオードに用いられる Separate-absorption-graded-multiplication（SAGM）構造や Separate absorption and multiplication superlattice（SAM-SL）構造や他の超格子構造の半導体層等を用いてもよいことは言うまでもない。また、InGaAsP ／InP 系以外のInGaAlAs／InGaAsP やAlGaAs／GaAs系などの他の材料系や歪を内在するような材料系でもよいことは言うまでもない。
【００４５】
〔実施例４〕
図５は本発明の第４の実施例を説明する断面斜視図である。５１は光入射面、５２は0.２μｍ厚p + -InGaAsP（1.２μｍ組成）層、５３は1.５μｍ厚p-InP 層、５４は0.５μｍ厚InGaAs光受光層、５５は１μｍ厚n-InGaAsP （1.４μｍ組成）層、５６は半絶縁性GaAs基板、５７はp 電極、５８はn 電極である。なお、引出し電極とパッド電極は、説明図が煩雑になり、説明の妨げになるため、この図では省略している。
【００４６】
素子の受光層面積は３０μｍ×５０μｍである。光入射面５１は、表面に対し６０度の逆メサ形状で形成した。逆メサ部の形成は各種のウエットエッチング液やドライエッチング法を用いて形成してもよいし、結晶面を利用したり、エッチングマスクの密着性を利用し角度を制御して形成してもよい。入射面５１には無反射膜を形成している。また、本実施例では、光入射端面部分は屈折率1.５のエポキシを充填している。
【００４７】
なお、５６、５４、５３層がそれぞれ、請求項中の、光受光層に対し光入射側の主たる半導体層、光受光層、光受光層に対し光入射側と反対側の主たる半導体層に対応する。この例では、光受光層５４の片側の界面に半導体層５５が入っているが、両側や、反対側に入っていてもよい。
【００４８】
ここで、５６、５５、５４、５３層のそれぞれの屈折率3.３８、3.４３９、3.５９、3.１７を考慮すると、この時、InGaAs光受光層５４を光は通過角φ＝２5.８８°で通過する。光は光受光層５４に対し光入射側と反対側の半導体層がInGaAs光受光層５４より屈折率の小さなInP 半導体層５３により構成されているため、全反射の条件（φ＜ cos-1（n2／n1）；ただし、n1は光受光層５４の屈折率、n2は光入射側と反対側の半導体層５３の屈折率）を満足し、光はこの部分で全反射するようになる。
【００４９】
シングルモードファイバにより光を導入し、全反射により、１００％の反射光が再度吸収層５４を通過し、吸収されることにより、印加逆バイアス1.０Ｖで受光感度0.８Ａ／Ｗ以上の大きな値が得られた。また、光の反射が上記界面で起こるため、上層の電極５７の状態などに反射率や光の位相が左右されないので、高効率化や偏波制御等を設計性よく行うことが可能となる。ちなみに、上記界面で全反射しない従来構成で、p 電極が上面のほぼ全面に存在し、ここでの光反射効果のみを利用する場合では、0.６Ａ／Ｗ程度しか得られなかった。また、シングルモードファイバの代わりに、先球ファイバを用い、素子の微小化（受光面積を７μｍ×２０μｍ）を図ったもので、受光感度を高く保ちながら、３dB帯域５０ＧＨz の超高速動作が可能であった。
【００５０】
この実施例では、光受光層５４に対し光入射側と反対側の半導体層がInGaAs光受光層５４より屈折率の小さなInP 半導体層５３を用いているが、光受光層５４の屈折率より適当に小さく、全反射の条件を満足できるものであれば、InGaAsP やInGaAlAs等、なんでも良い。また、この実施例は、波長1.５５μｍの入射光に対して述べているが、全反射の条件を満足できれば色々な波長の光に対しても同様の効果が得られる。
【００５１】
この実施例では、表面側のp-InP 層５３は結晶成長によって形成しているが、結晶成長ではアンドープInP 層とし、表面側の主たる部分の半導体の導電形を、Ｚn の拡散や、イオン注入法とその後のアニールによって決定してもよい。
【００５２】
また、半導体受光素子部分は、第１導電形を有する半導体層上にあって、真性又は第一の導電型の半導体層、超格子半導体層または多重量子井戸半導体層より成る光受光層とショットキー電極との間に、前記光受光層と前記ショットキー電極との間のショットキー障壁よりも高いショットキー障壁を前記ショットキー電極に対して有するショットキーバリアハイトの高い半導体層を介在した多層構造を基板上に構成してなる半導体受光素子や、前記ショットキーバリアハイトの高い半導体層は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）又は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）とその上の薄いIn1-u Gau As1-v Ｐv （０≦ｕ≦１，０≦ｖ≦１）よりなることを特徴とする半導体受光素子で構成してもよい。
【００５３】
また、この実施例は、基板として半絶縁性GaAs５６を用い、基板側にn-InGaAsP 層５５を用いた例であるが、p-InP 層を用いても上記のp とn を逆にして同様に製作可能であり、また、n-GaAsやp-GaAs基板を用いても同様に製作可能である。
【００５４】
また、ここでは、受光層５４として均一組成のバルクを用いているが、アバランシェフォトダイオードに用いられる Separate-absorption-graded-multiplication（SAGM）構造や Separate absorption and multiplication superlattice（SAM-SL）構造や他の超格子構造の半導体層等を用いてもよいことは言うまでもない。また、InGaAsP ／InP 系以外のInGaAlAs／InGaAsP やAlGaAs／GaAs系などの他の材料系や歪を内在するような材料系でもよいことは言うまでもない。
【００５５】
〔実施例５〕
図６は本発明の第５の実施例を説明する断面斜視図である。６２は0.２μｍ厚p + -InGaAsP（1.２μｍ組成）層、６３は1.５μｍ厚p + -InP層、６４は0.４μｍ厚InGaAs光受光層、６５は0.４μｍ厚n-InGaAsP （1.４μｍ組成）層、６６は半絶縁性InP 基板、６７はp 電極、６８はn 電極である。なお、引出し電極とパッド電極は、説明図が煩雑になり、説明の妨げになるため、この図では省略している。
【００５６】
素子の受光層面積は３０μｍ×１５０μｍである。波長1.５５μｍ光は、光受光層６４に対し、８４°の入射角で入射するようにしている。なお、６６、６４、６３層がそれぞれ、請求項中の、光受光層に対し光入射側の主たる半導体層、光受光層、光受光層に対し光入射側と反対側の主たる半導体層に対応する。この例では、光受光層６４の片側の界面に薄い半導体層６５が入っているが、両側や、反対側に入っていてもよい。
【００５７】
ここで、６６、６４、６３層のそれぞれの屈折率3.１７、3.５９、3.１を考慮すると、この時、InGaAs光受光層６４を光は通過角φ＝２8.８°で通過する。光は光受光層６４に対し光入射側と反対側の半導体層がInGaAs光受光層６４より屈折率の小さなInP 半導体層６３により構成されており、さらに高濃度ドーピングにより、半絶縁性のInP ６６に比べ屈折率が小さくなっているため、全反射の条件（φ＜ cos-1（n2／n1）；ただし、n1は光受光層６４の屈折率、n2は光入射側と反対側の半導体層６３の屈折率）を満足し、光はこの部分で全反射するようになる。
【００５８】
これにより、１００％の反射光が再度吸収層６４を通過し、吸収されることにより、印加逆バイアス1.０Ｖで受光感度0.８Ａ／Ｗ以上の大きな値が得られた。また、光の反射が上記界面で起こるため、上層の電極６７の状態などに反射率や光の位相が左右されないので、高効率化や偏波制御等を設計性よく行うことが可能となる。ちなみに、上記界面で全反射しない従来構成で、p 電極が上面のほぼ全面に存在し、ここでの光反射効果のみを利用する場合では、0.６Ａ／Ｗ程度しか得られなかった。
【００５９】
この実施例では、光受光層６４に対し光入射側と反対側の半導体層がInGaAs光受光層６４より屈折率の小さな高濃度ドープInP 半導体層６３を用いているが、光受光層６４の屈折率より適当に小さく、全反射の条件を満足できるものであれば、AlAsSbや高濃度ドープInGaAsP や高濃度ドープInGaAlAs等なんでも良い。また、この実施例は、波長1.５５μｍの入射光に対して述べているが、全反射の条件を満足できれば色々な波長の光に対しても同様の効果が得られる。
【００６０】
この実施例では、表面側のp-InP 層６３は結晶成長によって形成しているが、結晶成長ではアンドープInP 層とし、表面側の主たる部分の半導体の導電形を、Ｚn の拡散や、イオン注入法とその後のアニールによって決定してもよい。
【００６１】
また、半導体受光素子部分は、第１導電形を有する半導体層上にあって、真性又は第一の導電型の半導体層、超格子半導体層または多重量子井戸半導体層より成る光受光層とショットキー電極との間に、前記光受光層と前記ショットキー電極との間のショットキー障壁よりも高いショットキー障壁を前記ショットキー電極に対して有するショットキーバリアハイトの高い半導体層を介在した多層構造を基板上に構成してなる半導体受光素子や、前記ショットキーバリアハイトの高い半導体層は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）又は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）とその上の薄いIn1-u Gau As1-v Ｐv （０≦ｕ≦１，０≦ｖ≦１）よりなることを特徴とする半導体受光素子で構成してもよい。
【００６２】
また、この実施例は、下側にn-InGaAsP 層６５を用い、上側をp-InP 層６３としているが、上記のp とn を逆にして同様に製作可能であり、また、n-InP やp-InP 基板を用いても同様に製作可能である。
【００６３】
また、ここでは、受光層６４として均一組成のバルクを用いているが、アバランシェフォトダイオードに用いられる Separate-absorption-graded-multiplication（SAGM）構造や Separate absorption and multiplication superlattice（SAM-SL）構造や他の超格子構造の半導体層等を用いてもよいことは言うまでもない。また、InGaAsP ／InP 系以外のInGaAlAs／InGaAsP やAlGaAs／GaAs系などの他の材料系や歪を内在するような材料系でもよいことは言うまでもない。
【００６４】
〔実施例６〕
図７は本発明の第６の実施例を説明する断面斜視図である。７１は光入射面、７２は0.２μｍ厚p + -InGaAsP（1.２μｍ組成）層、７３は1.５μｍ厚p + -InP層、７４は0.４μｍ厚InGaAs光受光層、７５は0.４μｍ厚n-InGaAsP （1.４５μｍ組成）層、７６は半絶縁性InP 基板、７７はp 電極、７８はn 電極である。なお、引出し電極とパッド電極は、説明図が煩雑になり、説明の妨げになるため、この図では省略している。
【００６５】
素子の受光層面積は３０μｍ×１５０μｍである。光入射面７１は、表面に対し８０度の逆メサ形状で形成した。逆メサ部の形成は各種のウエットエッチング液やドライエッチング法を用いて形成してもよいし、結晶面を利用したり、エッチングマスクの密着性を利用し角度を制御して形成してもよい。また、（００１）表面に対し、１０度オフの基板を用いてＰＤ部を製作し、劈開により８０度の入射端面を形成してもよい。入射面７１には無反射膜を形成している。
【００６６】
なお、７６、７４、７３層がそれぞれ、請求項中の、光受光層に対し光入射側の主たる半導体層、光受光層、光受光層に対し光入射側と反対側の主たる半導体層に対応する。この例では、光受光層７４の片側の界面に薄い半導体層７５が入っているが、両側や、反対側に入っていてもよい。
【００６７】
ここで、７６、７４、７３層のそれぞれの屈折率3.１７、3.５９、3.１を考慮すると、波長1.５５μｍ光は、光受光層７４に対し、８3.１４°の入射角で入射するようになる。この時、InGaAs光受光層７４を光は通過角φ＝２8.７５°で通過する。光は光受光層７４に対し光入射側と反対側の半導体層がInGaAs光受光層７４より屈折率の小さなInP 半導体層７３により構成されており、さらに高濃度ドーピングにより、半絶縁性のInP ７６に比べ屈折率が小さくなっているため、全反射の条件（φ＜ cos-1（n2／n1）；ただし、n1は光受光層７４の屈折率、n2は光入射側と反対側の半導体層７３の屈折率）を満足し、光はこの部分で全反射するようになる。
【００６８】
シングルモードファイバにより光を導入し、全反射により、１００％の反射光が再度吸収層７４を通過し、吸収されることにより、印加逆バイアス1.０Ｖで受光感度0.８Ａ／Ｗ以上の大きな値が得られた。また、光の反射が上記界面で起こるため、上層の電極７７の状態などに反射率や光の位相が左右されないので、高効率化や偏波制御等を設計性よく行うことが可能となる。ちなみに、上記界面で全反射しない従来構成で、p 電極が上面のほぼ全面に存在し、ここでの光反射効果のみを利用する場合では、0.６Ａ／Ｗ程度しか得られなかった。また、シングルモードファイバの代わりに、先球ファイバを用い、素子の微小化（受光面積を７μｍ×５０μｍ）を図ったもので、受光感度を高く保ちながら、３dB帯域３０ＧＨz の超高速動作が可能であった。
【００６９】
この実施例では、光受光層７４に対し光入射側と反対側の半導体層がInGaAs光受光層７４より屈折率の小さな高濃度ドープInP 半導体層７３を用いているが、光受光層７４の屈折率より適当に小さく、全反射の条件を満足できるものであれば、AlAsSbや高濃度ドープInGaAsP や高濃度ドープInGaAlAs等なんでも良い。また、この実施例は、波長1.５５μｍの入射光に対して述べているが、全反射の条件を満足できれば色々な波長の光に対しても同様の効果が得られる。
【００７０】
この実施例では、表面側のp-InP 層７３は結晶成長によって形成しているが、結晶成長ではアンドープInP 層とし、表面側の主たる部分の半導体の導電形を、Ｚn の拡散や、イオン注入法とその後のアニールによって決定してもよい。
【００７１】
また、半導体受光素子部分は、第１導電形を有する半導体層上にあって、真性又は第一の導電型の半導体層、超格子半導体層または多重量子井戸半導体層より成る光受光層とショットキー電極との間に、前記光受光層と前記ショットキー電極との間のショットキー障壁よりも高いショットキー障壁を前記ショットキー電極に対して有するショットキーバリアハイトの高い半導体層を介在した多層構造を基板上に構成してなる半導体受光素子や、前記ショットキーバリアハイトの高い半導体層は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）又は、In1-x-y Gax Aly As（０≦ｘ≦１，０≦ｙ≦１）とその上の薄いIn1-u Gau As1-v Ｐv （０≦ｕ≦１，０≦ｖ≦１）よりなることを特徴とする半導体受光素子で構成してもよい。
【００７２】
また、この実施例は、基板として半絶縁性InP ７６を用い、基板側にn-InGaAsP 層７５を用いた例であるが、p-InGaAs層を用いても上記のp とn を逆にして同様に製作可能であり、また、n-InP やp-InP 基板を用いても同様に製作可能である。
【００７３】
また、ここでは、受光層７４として均一組成のバルクを用いているが、アバランシェフォトダイオードに用いられる Separate-absorption-graded-multiplication（SAGM）構造や Separate absorption and multiplication superlattice（SAM-SL）構造や他の超格子構造の半導体層等を用いてもよいことは言うまでもない。また、InGaAsP ／InP 系以外のInGaAlAs／InGaAsP やAlGaAs／GaAs系などの他の材料系や歪を内在するような材料系でもよいことは言うまでもない。
【００７４】
【発明の効果】
以上説明したように、光受光層を含む半導体多層構造よりなる受光部分と、前記光受光層を入射光が層厚方向に対し斜めに通過するようにした半導体受光素子において、光受光層に対し光入射側の半導体層の屈折率が、光受光層に対し光入射側と反対側の半導体層の屈折率より大きい半導体層で構成されており、光受光層に対し光入射側と反対側の半導体層が光受光層より屈折率の小さな半導体層よりなり、その部分で光が全反射するように構成されているため、受光層を１００％反射光が再度通過することになり実効的光吸収長が大きく増大する。このため、高い受光感度を得るための光吸収層厚の大幅な薄層化が可能となる。また、光吸収層厚の大幅な薄層化により、高受光感度を維持しながら、超高速動作の可能な素子が製作可能となる。
【図面の簡単な説明】
【図１】本発明の第１の実施例を説明する断面斜視図である。
【図２】従来の屈折型半導体光受光素子を説明する図である。
【図３】本発明の第２の実施例を説明する断面斜視図である。
【図４】本発明の第３の実施例を説明する断面斜視図である。
【図５】本発明の第４の実施例を説明する断面斜視図である。
【図６】本発明の第５の実施例を説明する断面斜視図である。
【図７】本発明の第６の実施例を説明する断面斜視図である。
【符号の説明】
１２ p + -InGaAsP層
１３ p-InP 層
１４ InGaAs光受光層
１５ n-InGaAsP 層
１６ InGaAsP 層
１７ p 電極
１８ n 電極
２１ 光入射面
２２ p-InP 層
２３ InGaAs光受光層
２４ n-InP 層
２５ n-InP 基板
２６ p 電極
２７ n 電極
３１ 光入射面
３２ p + -InGaAsP層
３３ p-InP 層
３４ InGaAs光受光層
３５ n-InGaAsP 層
３６ InGaAsP 層
３７ 半絶縁性InP 基板
３８ p 電極
３９ n 電極
４２ p + -InGaAsP層
４３ p-InP 層
４４ InGaAs光受光層
４５ n-InGaAsP 層
４６ 半絶縁性GaAs基板
４７ p 電極
４８ n 電極
５１ 光入射面
５２ p + -InGaAsP層
５３ p-InP 層
５４ InGaAs光受光層
５５ n-InGaAsP 層
５６ 半絶縁性GaAs基板
５７ p 電極
５８ n 電極
６２ p + -InGaAsP層
６３ p + -InP層
６４ InGaAs光受光層
６５ n-InGaAsP 層
６６ 半絶縁性InP 基板
６７ p 電極
６８ n 電極
７１ 光入射面
７２ p + -InGaAsP層
７３ p + -InP層
７４ InGaAs光受光層
７５ n-InGaAsP 層
７６ 半絶縁性InP 基板
７７ p 電極
７８ n 電極[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor light receiving element, and is devised so that a high light receiving sensitivity can be obtained while being a thin light absorption layer and an ultra-high speed operation is possible.
[0002]
[Prior art]
A refraction type semiconductor light-receiving element that represents a light-receiving portion having a conventional semiconductor multilayer structure including a light-receiving layer and a semiconductor light-receiving element in which incident light passes through the light-receiving layer obliquely with respect to the layer thickness direction is shown in FIG. The structure is as shown in FIG. That is, in FIG. 2, 21 is a light incident surface, 22 is a p-InP layer, 23 is an InGaAs light receiving layer, 24 is an n-InP layer, 25 is an n-InP substrate, 26 is a p electrode, and 27 is an n electrode. is there.
[0003]
In general, the upper electrode 26 is formed into an ohmic electrode by alloying with a semiconductor layer by heat-treating a metal such as AuZnNi in the case of p-type or AuGeNi in the case of n-type. Due to the alloying, minute irregularities are generated between the electrode 26 and the semiconductor, and even if the refracted light reaches here, it is diffusely reflected, or light is absorbed by the electrode metal itself. The reflectance of light at the part is small.
[0004]
[Problems to be solved by the invention]
Therefore, although the light absorption layer thickness can be reduced by increasing the effective absorption length due to the refracted light that is characteristic of the refractive semiconductor light receiving element passing obliquely with respect to the layer thickness direction, in order to obtain a sufficiently large light receiving sensitivity, It is necessary that light is sufficiently absorbed by one pass of refracted light to the light receiving layer 23. Therefore, there has been a limitation in reducing the thickness of the light receiving layer. For this reason, there is a problem that the traveling time of the carrier that travels in the light receiving layer 23 becomes a limiting factor of the response speed of the semiconductor light receiving element, and it is impossible to manufacture an element having a very high speed and high light receiving sensitivity. .
[0005]
An object of the present invention is to provide a light-receiving portion having a semiconductor multilayer structure including a light-receiving layer and a semiconductor light-receiving element in which incident light passes through the light-receiving layer obliquely with respect to the layer thickness direction. It is an object of the present invention to provide a semiconductor light receiving element that can achieve high light receiving sensitivity and can operate at ultra high speed.
[0006]
[Means for Solving the Problems]
The configuration of the present invention that solves the above problem includes a second semiconductor layer having a refractive index higher than that of the first semiconductor layer and an upper semiconductor layer including a first semiconductor layer having a refractive index smaller than that of the light absorbing layer. The first semiconductor layer has a stacked structure sandwiched between lower semiconductor layers including a semiconductor layer, and incident light incident from the lower semiconductor layer side passes through the light absorption layer obliquely with respect to the layer thickness direction. Is totally reflected at the interface on the side of the light absorption layer, and passes through the light absorption layer again obliquely. This increases the light absorption length It is characterized by that.
[0007]
In the structure of the present invention, at least a part of the side wall of the lower semiconductor layer is an inclined side wall having an acute angle with the surface of the light absorbing layer, and incident light is refracted by the inclined side wall and enters the light absorbing layer. It is characterized by.
[0008]
The structure of the present invention includes a light receiving portion having a semiconductor multilayer structure including a light receiving layer, and a semiconductor light receiving element in which incident light passes through the light receiving layer obliquely with respect to the layer thickness direction. On the other hand, the refractive index of the semiconductor layer on the light incident side is composed of a semiconductor layer larger than the refractive index of the semiconductor layer on the opposite side to the light incident side with respect to the light receiving layer. The semiconductor layer consists of a semiconductor layer with a refractive index smaller than that of the light receiving layer, and light is totally reflected at that part. The light absorption length increases by passing through the light absorption layer again at an angle. It is comprised so that it may do.
[0009]
For this reason, the light is completely totally reflected by the semiconductor layer opposite to the light incident side with respect to the light receiving layer, whereby the light passes through the light receiving layer again, and the light absorption efficiency is increased. In the prior art, the main arrival region of the refracted incident light in the upper layer of the light receiving layer is composed of an alloyed electrode, and the reflection in this region is small. The semiconductor layer has a refractive index greater than that of the semiconductor layer opposite to the light incident side with respect to the light receiving layer, and is opposite to the light incident side with respect to the light receiving layer in contact with the light receiving layer. Since the semiconductor layer on the side is composed of a semiconductor layer having a refractive index smaller than that of the light receiving layer that totally reflects light at this portion, light does not go to the upper electrode portion, and the light receiving layer The difference is that light is totally reflected at the upper interface.
[0010]
Further, according to the present invention, a light receiving portion composed of a semiconductor multilayer structure including a light receiving layer and a light incident end surface inclined inward as the distance from the surface side is provided on the end surface, so that incident light is refracted at the light incident end surface. In the refractive semiconductor light receiving element in which incident light passes through the light receiving layer obliquely with respect to the layer thickness direction, the refractive index of the semiconductor layer on the light incident side with respect to the light receiving layer is light relative to the light receiving layer. The semiconductor layer is composed of a semiconductor layer having a refractive index larger than that of the semiconductor layer on the opposite side to the incident side. Total reflection of light at the part The light absorption length increases by passing through the light absorption layer again at an angle. It is comprised so that it may do.
[0011]
For this reason, the light is completely totally reflected by the semiconductor layer opposite to the light incident side with respect to the light receiving layer, whereby the light passes through the light receiving layer again, and the light absorption efficiency is increased. In the prior art, the main arrival region of the refracted incident light in the upper layer of the light receiving layer is composed of an alloyed electrode, and the reflection in this region is small. The semiconductor layer has a refractive index greater than that of the semiconductor layer opposite to the light incident side with respect to the light receiving layer, and is opposite to the light incident side with respect to the light receiving layer in contact with the light receiving layer. Since the semiconductor layer on the side is composed of a semiconductor layer having a refractive index smaller than that of the light receiving layer that totally reflects light at this portion, light does not go to the upper electrode portion, and the light receiving layer The difference is that light is totally reflected at the upper interface.
[0012]
Further, according to the present invention, the semiconductor layer on the light incident side with respect to the light receiving layer is composed of an InGaAsP semiconductor layer having a refractive index larger than that of the semiconductor layer on the side opposite to the light incident side with respect to the light receiving layer. It is characterized by being.
[0013]
For this reason, the light is completely totally reflected by the semiconductor layer opposite to the light incident side with respect to the light receiving layer, whereby the light passes through the light receiving layer again, and the light absorption efficiency is increased. In the prior art, the main arrival region of the refracted incident light in the upper layer of the light receiving layer is composed of an alloyed electrode, and reflection in this region is small, but in the present invention, the light receiving layer in contact with the light receiving layer On the other hand, the semiconductor layer on the opposite side to the light incident side is composed of a semiconductor layer having a refractive index smaller than that of the light receiving layer that totally reflects light at this portion, and light does not go to the upper electrode portion. The difference is that light is totally reflected at the upper interface of the light receiving layer.
[0014]
Further, according to the present invention, the semiconductor layer on the light incident side with respect to the light receiving layer is formed of a GaAs semiconductor layer having a refractive index larger than the refractive index of the semiconductor layer on the side opposite to the light incident side with respect to the light receiving layer. It is characterized by being.
[0015]
For this reason, the light is completely totally reflected by the semiconductor layer opposite to the light incident side with respect to the light receiving layer, whereby the light passes through the light receiving layer again, and the light absorption efficiency is increased. In the prior art, the main arrival region of the refracted incident light in the upper layer of the light receiving layer is composed of an alloyed electrode, and reflection in this region is small, but in the present invention, the light receiving layer in contact with the light receiving layer On the other hand, the semiconductor layer on the opposite side to the light incident side is composed of a semiconductor layer having a refractive index smaller than that of the light receiving layer that totally reflects light at this portion, and light does not go to the upper electrode portion. The difference is that light is totally reflected at the upper interface of the light receiving layer.
[0016]
[Action]
As described above, in this element, the semiconductor layer opposite to the light incident side with respect to the light receiving layer is constituted by a semiconductor layer having a refractive index smaller than that of the light receiving layer that totally reflects light at that portion. For this reason, light passes through the light receiving layer twice, and the effective light absorption length increases twice. For this reason, it is possible to significantly reduce the thickness of the light absorption layer in order to obtain high light receiving sensitivity. By reducing the thickness of the light absorption layer significantly, it is possible to operate the device at high speed while maintaining high light receiving sensitivity.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below in detail with reference to the drawings.
[0018]
[Example 1]
FIG. 1 is a sectional perspective view for explaining a first embodiment of the present invention. 12 is 0.2μm thick p + -InGaAsP (1.2 μm composition) layer, 13 is a 1.5 μm thick p-InP layer, 14 is a 0.4 μm thick InGaAs light receiving layer, 15 is a 1 μm thick n-InGaAsP (1.4 μm composition) layer, and 16 is an InGaAsP layer. A (1.4 μm composition) layer, 17 is a p-electrode, and 18 is an n-electrode. Note that the drawing electrode and the pad electrode are omitted in this drawing because the drawing is complicated and obstructs the description.
[0019]
The light receiving layer area of the element is 30 μm × 50 μm. The light having a wavelength of 1.55 μm is incident on the light receiving layer 14 at an incident angle of 70 °. The
[0020]
Here, considering the refractive indexes of 3.439, 3.59, and 3.17 of the 15, 14, and 13 layers, the light passes through the InGaAs light receiving layer 14 at a passing angle φ = 25.8 °. To do. Since the semiconductor layer opposite to the light incident side with respect to the light receiving layer 14 is composed of the InP semiconductor layer 13 having a refractive index smaller than that of the InGaAs light receiving layer 14, the light is subjected to a total reflection condition (φ <cos -1 (N 2 / N 1 ); But n 1 Is the refractive index of the light-receiving layer 14, n 2 Satisfies the refractive index of the semiconductor layer 13 opposite to the light incident side, and the light is totally reflected at this portion.
[0021]
As a result, 100% of the reflected light again passes through the absorption layer 14 and is absorbed, whereby a large value of a light receiving sensitivity of 0.8 A / W or more is obtained at an applied reverse bias of 1.0 V. In addition, since light reflection occurs at the interface, the reflectivity and light phase are not affected by the state of the upper electrode 17 and the like, so that high efficiency and polarization control can be performed with good design. Incidentally, in the conventional configuration in which the reflection is not totally reflected at the interface, the p electrode is present on almost the entire upper surface, and when only the light reflection effect is used here, only about 0.6 A / W was obtained.
[0022]
In this embodiment, the InP semiconductor layer 13 having a refractive index smaller than that of the InGaAs light receiving layer 14 is used as the semiconductor layer opposite to the light incident side with respect to the light receiving layer 14. Any material such as InGaAsP or InGaAlAs may be used as long as it is small and can satisfy the conditions of total reflection. Further, although this embodiment has been described with respect to incident light having a wavelength of 1.55 μm, the same effect can be obtained for light of various wavelengths as long as the condition of total reflection can be satisfied.
[0023]
In this embodiment, the p-InP layer 13 on the surface side is formed by crystal growth. However, in the crystal growth, an undoped InP layer is used, and the semiconductor conductivity type of the main portion on the surface side is changed to Zn diffusion or ion implantation. It may be determined by the method and subsequent annealing.
[0024]
The semiconductor light-receiving element portion is on a semiconductor layer having the first conductivity type, and includes a light-receiving layer and a Schottky formed of an intrinsic or first conductivity type semiconductor layer, a superlattice semiconductor layer, or a multiple quantum well semiconductor layer. A multilayer structure in which a semiconductor layer having a high Schottky barrier height having a Schottky barrier higher than the Schottky barrier between the light receiving layer and the Schottky electrode is interposed between the electrode and an electrode. The semiconductor light-receiving element formed on the substrate and the semiconductor layer having a high Schottky barrier height are In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) or In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and thin In on it 1-u Ga u As 1-v P v You may comprise with the semiconductor light receiving element characterized by consisting of (0 <= u <= 1,0 <= v <= 1).
[0025]
In this embodiment, the n-
[0026]
Here, a bulk of uniform composition is used as the light-receiving layer 14, but a separate-absorption-graded-multiplication (SAGM) structure, a separate absorption and multiplication superlattice (SAM-SL) structure, etc. used for avalanche photodiodes, and others. Needless to say, a semiconductor layer having a superlattice structure may be used. It goes without saying that other material systems such as InGaAlAs / InGaAsP and AlGaAs / GaAs systems other than InGaAsP / InP systems and material systems with inherent strain may be used.
[0027]
[Example 2]
FIG. 3 is a cross-sectional perspective view for explaining a second embodiment of the present invention. 31 is a light incident surface, 32 is 0.2 μm thick p + -InGaAsP (1.2 μm composition) layer, 33 is a 1.5 μm thick p-InP layer, 34 is a 0.4 μm thick InGaAs light receiving layer, 35 is a 1 μm thick n-InGaAsP (1.45 μm composition) layer, and 36 is an InGaAsP layer. (1.45 μm composition) layer, 37 is a semi-insulating InP substrate, 38 is a p-electrode, and 39 is an n-electrode. Note that the drawing electrode and the pad electrode are omitted in this drawing because the drawing is complicated and obstructs the description.
[0028]
The light receiving layer area of the element is 30 μm × 50 μm. The light incident surface 31 was formed in an inverted mesa shape of 60 degrees with respect to the surface. The reverse mesa may be formed using various wet etching solutions or dry etching methods, or may be formed using a crystal plane or controlling the angle using the adhesion of an etching mask. . A non-reflective film is formed on the incident surface 31. The 35, 34, and 33 layers correspond to the main semiconductor layer on the light incident side with respect to the light receiving layer, the light receiving layer, and the main semiconductor layer on the opposite side to the light receiving layer in the claims. To do. In addition to this example, a thin semiconductor layer may be included at one or both of the interfaces of the light receiving layer.
[0029]
Here, considering the refractive indexes of 3.464, 3.59, and 3.17 of the 35, 34, and 33 layers, light having a wavelength of 1.55 μm is incident on the light receiving layer at an angle of 68.3 °. It becomes incident. At this time, the light passes through the InGaAs light receiving layer 34 with a passing angle φ = 26.3 °. Since the semiconductor layer opposite to the light incident side with respect to the light receiving layer 34 is composed of the InP semiconductor layer 33 having a refractive index smaller than that of the InGaAs light receiving layer 34, the light has a total reflection condition (φ <cos -1 (N 2 / N 1 ); But n 1 Is the refractive index of the light-receiving layer 34, n 2 Satisfies the refractive index of the semiconductor layer 33 on the side opposite to the light incident side), and the light is totally reflected at this portion.
[0030]
Light is introduced by a single mode fiber, and 100% of the reflected light again passes through the absorption layer 34 due to total reflection, and is absorbed, so that the applied reverse bias is 1.0 V and the light receiving sensitivity is greater than 0.8 A / W. A value was obtained. Further, since light reflection occurs at the interface, the reflectivity and the light phase are not affected by the state of the upper electrode 38 and the like, so that high efficiency and polarization control can be performed with good design. Incidentally, in the conventional configuration in which the reflection is not totally reflected at the interface, the p electrode is present on almost the entire upper surface, and when only the light reflection effect is used here, only about 0.6 A / W was obtained. In addition, instead of a single mode fiber, a pointed fiber is used to reduce the size of the element (light receiving area is 7 μm × 20 μm). Ultrahigh speed operation of 3 dB bandwidth 50 GHz is possible while maintaining high light receiving sensitivity. there were.
[0031]
In this embodiment, the InP semiconductor layer 33 having a refractive index smaller than that of the InGaAs light receiving layer 34 is used as the semiconductor layer opposite to the light incident side with respect to the light receiving layer 34. Any material such as InGaAsP or InGaAlAs may be used as long as it is small and can satisfy the conditions of total reflection. Further, although this embodiment has been described with respect to incident light having a wavelength of 1.55 μm, the same effect can be obtained for light of various wavelengths as long as the condition of total reflection can be satisfied.
[0032]
In this embodiment, the p-InP layer 33 on the surface side is formed by crystal growth. However, in the crystal growth, an undoped InP layer is used, and the main conductivity type of the semiconductor on the surface side is Zn diffusion or ion implantation. It may be determined by the method and subsequent annealing.
[0033]
The semiconductor light-receiving element portion is on a semiconductor layer having the first conductivity type, and includes a light-receiving layer and a Schottky formed of an intrinsic or first conductivity type semiconductor layer, a superlattice semiconductor layer, or a multiple quantum well semiconductor layer. A multilayer structure in which a semiconductor layer having a high Schottky barrier height having a Schottky barrier higher than the Schottky barrier between the light receiving layer and the Schottky electrode is interposed between the electrode and an electrode. The semiconductor light-receiving element formed on the substrate and the semiconductor layer having a high Schottky barrier height are In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) or In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and thin In on it 1-u Ga u As 1-v P v You may comprise with the semiconductor light receiving element characterized by consisting of (0 <= u <= 1,0 <= v <= 1).
[0034]
In this embodiment, a semi-insulating InP 37 is used as a substrate and an n-
[0035]
In addition, here, a bulk of uniform composition is used as the light receiving layer 34, but a separate-absorption-graded-multiplication (SAGM) structure, a separate absorption and multiplication superlattice (SAM-SL) structure, etc. used for avalanche photodiodes, etc. Needless to say, a semiconductor layer having a superlattice structure may be used. It goes without saying that other material systems such as InGaAlAs / InGaAsP and AlGaAs / GaAs systems other than InGaAsP / InP systems and material systems with inherent strain may be used.
[0036]
Example 3
FIG. 4 is a sectional perspective view for explaining a third embodiment of the present invention. 42 is 0.2μm thick p + -InGaAsP (1.2 μm composition) layer, 43 is a 1.5 μm thick p-InP layer, 44 is a 0.4 μm thick InGaAs light receiving layer, 45 is a 1 μm thick n-InGaAsP (1.4 μm composition) layer, and 46 is half An insulating GaAs substrate, 47 is a p-electrode, and 48 is an n-electrode. Note that the drawing electrode and the pad electrode are omitted in this drawing because the drawing is complicated and obstructs the description.
[0037]
The light receiving layer area of the element is 30 μm × 50 μm. The light having a wavelength of 1.55 μm is incident on the light receiving layer 44 at an incident angle of 75 °. The 46, 44, and 43 layers correspond to the main semiconductor layer on the light incident side with respect to the light receiving layer, the light receiving layer, and the main semiconductor layer on the opposite side to the light receiving layer in the claims. To do. In this example, the semiconductor layer 45 is included in the interface on one side of the light receiving layer 44, but may be on both sides or on the opposite side.
[0038]
Here, considering the refractive indexes of 3.38, 3.439, 3.59, and 3.17 of the 46, 45, 44, and 43 layers, light passes through the InGaAs light receiving layer 44 at this time. Pass at 24.57 °. Since the semiconductor layer on the side opposite to the light incident side with respect to the light receiving layer 44 is composed of the InP semiconductor layer 43 having a refractive index smaller than that of the InGaAs light receiving layer 44, the total reflection condition (φ <cos -1 (N 2 / N 1 ); But n 1 Is the refractive index of the light receiving layer 44, n 2 Satisfies the refractive index of the semiconductor layer 43 on the side opposite to the light incident side), and the light is totally reflected at this portion.
[0039]
Light is introduced through a single mode fiber, and 100% of the reflected light again passes through the absorption layer 44 due to total reflection, and is absorbed, resulting in a large light receiving sensitivity of 0.8 A / W or more with an applied reverse bias of 1.0 V. A value was obtained. In addition, since light reflection occurs at the interface, the reflectivity and the light phase are not affected by the state of the upper electrode 47 and the like, so that high efficiency and polarization control can be performed with good design. Incidentally, in the conventional configuration in which the reflection is not totally reflected at the interface, the p electrode is present on almost the entire upper surface, and when only the light reflection effect is used here, only about 0.6 A / W was obtained. In addition, instead of a single mode fiber, a pointed fiber is used to reduce the size of the element (light receiving area is 7 μm × 20 μm). Ultrahigh speed operation of 3 dB bandwidth 50 GHz is possible while maintaining high light receiving sensitivity. there were.
[0040]
In this embodiment, the InP semiconductor layer 43 having a refractive index smaller than that of the InGaAs light receiving layer 44 is used as the semiconductor layer opposite to the light incident side with respect to the light receiving layer 44, but more appropriate than the refractive index of the light receiving layer 44. Any material such as InGaAsP or InGaAlAs may be used as long as it is small and can satisfy the conditions of total reflection. Further, although this embodiment has been described with respect to incident light having a wavelength of 1.55 μm, the same effect can be obtained for light of various wavelengths as long as the condition of total reflection can be satisfied.
[0041]
In this embodiment, the p-InP layer 43 on the surface side is formed by crystal growth. However, in the crystal growth, an undoped InP layer is used, and the main conductivity type of the semiconductor on the surface side is Zn diffusion or ion implantation. It may be determined by the method and subsequent annealing.
[0042]
The semiconductor light-receiving element portion is on a semiconductor layer having the first conductivity type, and includes a light-receiving layer and a Schottky formed of an intrinsic or first conductivity type semiconductor layer, a superlattice semiconductor layer, or a multiple quantum well semiconductor layer. A multilayer structure in which a semiconductor layer having a high Schottky barrier height having a Schottky barrier higher than the Schottky barrier between the light receiving layer and the Schottky electrode is interposed between the electrode and an electrode. The semiconductor light-receiving element formed on the substrate and the semiconductor layer having a high Schottky barrier height are In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) or In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and thin In on it 1-u Ga u As 1-v P v You may comprise with the semiconductor light receiving element characterized by consisting of (0 <= u <= 1,0 <= v <= 1).
[0043]
This embodiment is an example in which a semi-insulating GaAs 46 is used as a substrate and an n-InGaAsP layer 45 is used on the substrate side. However, even if a p-InGaAsP layer is used, the above-described p and n are reversed. It can also be manufactured using an n-GaAs or p-GaAs substrate.
[0044]
Here, a bulk of uniform composition is used as the light-receiving layer 44, but a separate-absorption-graded-multiplication (SAGM) structure, a separate absorption and multiplication superlattice (SAM-SL) structure, etc. used for avalanche photodiodes, etc. Needless to say, a semiconductor layer having a superlattice structure may be used. It goes without saying that other material systems such as InGaAlAs / InGaAsP and AlGaAs / GaAs systems other than InGaAsP / InP systems and material systems with inherent strain may be used.
[0045]
Example 4
FIG. 5 is a sectional perspective view for explaining a fourth embodiment of the present invention. 51 is a light incident surface, 52 is 0.2 μm thick p + -InGaAsP (1.2 μm composition) layer, 53 is a 1.5 μm thick p-InP layer, 54 is a 0.5 μm thick InGaAs light receiving layer, 55 is a 1 μm thick n-InGaAsP (1.4 μm composition) layer, and 56 is a half An insulating GaAs substrate, 57 is a p-electrode, and 58 is an n-electrode. Note that the drawing electrode and the pad electrode are omitted in this drawing because the drawing is complicated and obstructs the description.
[0046]
The light receiving layer area of the element is 30 μm × 50 μm. The light incident surface 51 was formed in an inverted mesa shape of 60 degrees with respect to the surface. The reverse mesa may be formed using various wet etching solutions or dry etching methods, or may be formed using a crystal plane or controlling the angle using the adhesion of an etching mask. . An antireflective film is formed on the incident surface 51. In this embodiment, the light incident end face portion is filled with epoxy having a refractive index of 1.5.
[0047]
The 56, 54, and 53 layers correspond to the main semiconductor layer on the light incident side with respect to the light receiving layer, the light receiving layer, and the main semiconductor layer on the opposite side to the light receiving layer in the claims. To do. In this example, the semiconductor layer 55 is included in the interface on one side of the light receiving layer 54, but may be on both sides or on the opposite side.
[0048]
Here, considering the refractive indexes of 3.38, 3.439, 3.59, and 3.17 of the 56, 55, 54, and 53 layers, light passes through the InGaAs light receiving layer 54 at this time. Pass at 25.88 °. Since the semiconductor layer opposite to the light incident side with respect to the light receiving layer 54 is composed of the InP semiconductor layer 53 having a refractive index smaller than that of the InGaAs light receiving layer 54, the light is subjected to a total reflection condition (φ <cos -1 (N 2 / N 1 ); But n 1 Is the refractive index of the light-receiving layer 54, n 2 Satisfies the refractive index of the semiconductor layer 53 on the side opposite to the light incident side, and the light is totally reflected at this portion.
[0049]
Light is introduced by a single mode fiber, and 100% of the reflected light again passes through the absorption layer 54 and is absorbed by total reflection, so that the applied reverse bias is 1.0 V and the light receiving sensitivity is greater than 0.8 A / W. A value was obtained. Further, since light reflection occurs at the interface, the reflectivity and the light phase are not affected by the state of the
[0050]
In this embodiment, the InP semiconductor layer 53 having a refractive index smaller than that of the InGaAs light receiving layer 54 is used as the semiconductor layer opposite to the light incident side with respect to the light receiving layer 54. Any material such as InGaAsP or InGaAlAs may be used as long as it is small and can satisfy the conditions of total reflection. Further, although this embodiment has been described with respect to incident light having a wavelength of 1.55 μm, the same effect can be obtained for light of various wavelengths as long as the condition of total reflection can be satisfied.
[0051]
In this embodiment, the p-InP layer 53 on the surface side is formed by crystal growth. However, in the crystal growth, an undoped InP layer is used, and the main conductivity type of the semiconductor on the surface side is Zn diffusion or ion implantation. It may be determined by the method and subsequent annealing.
[0052]
The semiconductor light-receiving element portion is on a semiconductor layer having the first conductivity type, and includes a light-receiving layer and a Schottky formed of an intrinsic or first conductivity type semiconductor layer, a superlattice semiconductor layer, or a multiple quantum well semiconductor layer. A multilayer structure in which a semiconductor layer having a high Schottky barrier height having a Schottky barrier higher than the Schottky barrier between the light receiving layer and the Schottky electrode is interposed between the electrode and an electrode. The semiconductor light-receiving element formed on the substrate and the semiconductor layer having a high Schottky barrier height are In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) or In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and thin In on it 1-u Ga u As 1-v P v You may comprise with the semiconductor light receiving element characterized by consisting of (0 <= u <= 1,0 <= v <= 1).
[0053]
This embodiment is an example in which a semi-insulating GaAs 56 is used as a substrate and an n-InGaAsP layer 55 is used on the substrate side. However, even if a p-InP layer is used, the above-described p and n are reversed. It can also be manufactured using n-GaAs or p-GaAs substrates.
[0054]
Here, a bulk of uniform composition is used as the light-receiving layer 54, but a separate-absorption-graded-multiplication (SAGM) structure, a separate absorption and multiplication superlattice (SAM-SL) structure, etc. used for avalanche photodiodes, etc. Needless to say, a semiconductor layer having a superlattice structure may be used. It goes without saying that other material systems such as InGaAlAs / InGaAsP and AlGaAs / GaAs systems other than InGaAsP / InP systems and material systems with inherent strain may be used.
[0055]
Example 5
FIG. 6 is a sectional perspective view for explaining a fifth embodiment of the present invention. 62 is 0.2μm thick p + -InGaAsP (1.2 μm composition) layer, 63 is 1.5 μm thick + -InP layer, 64 is 0.4 μm-thick InGaAs light-receiving layer, 65 is 0.4 μm-thick n-InGaAsP (1.4 μm composition) layer, 66 is a semi-insulating InP substrate, 67 is a p-electrode, and 68 is an n-electrode is there. Note that the drawing electrode and the pad electrode are omitted in this drawing because the drawing is complicated and obstructs the description.
[0056]
The light receiving layer area of the element is 30 μm × 150 μm. Light having a wavelength of 1.55 μm is incident on the light receiving layer 64 at an incident angle of 84 °. The 66, 64, and 63 layers correspond to the main semiconductor layer on the light incident side with respect to the light receiving layer, the light receiving layer, and the main semiconductor layer on the opposite side to the light receiving layer in the claims. To do. In this example, the thin semiconductor layer 65 is contained in the interface on one side of the light receiving layer 64, but may be on both sides or on the opposite side.
[0057]
Here, considering the refractive indexes of 3.17, 3.59, and 3.1 of the 66, 64, and 63 layers, light passes through the InGaAs light receiving layer 64 at a passing angle φ = 28.8 ° at this time. To do. For light, the semiconductor layer opposite to the light incident side with respect to the light receiving layer 64 is composed of an InP semiconductor layer 63 having a refractive index smaller than that of the InGaAs light receiving layer 64, and semi-insulating InP 66 due to high concentration doping. The refractive index is smaller than that of the total reflection condition (φ <cos -1 (N 2 / N 1 ); But n 1 Is the refractive index of the light receiving layer 64, n 2 Satisfies the refractive index of the semiconductor layer 63 on the side opposite to the light incident side), and the light is totally reflected at this portion.
[0058]
As a result, 100% of the reflected light again passes through the absorption layer 64 and is absorbed, whereby a large value of a light receiving sensitivity of 0.8 A / W or more is obtained with an applied reverse bias of 1.0 V. In addition, since light reflection occurs at the interface, the reflectivity and the light phase are not affected by the state of the upper electrode 67 and the like, so that high efficiency and polarization control can be performed with good design. Incidentally, in the conventional configuration in which the reflection is not totally reflected at the interface, the p electrode is present on almost the entire upper surface, and when only the light reflection effect is used here, only about 0.6 A / W was obtained.
[0059]
In this embodiment, the heavily doped InP semiconductor layer 63 having a refractive index smaller than that of the InGaAs light receiving layer 64 is used as the semiconductor layer opposite to the light incident side with respect to the light receiving layer 64. Any material such as AlAsSb, highly doped InGaAsP, or highly doped InGaAlAs may be used as long as it is appropriately smaller than the rate and can satisfy the conditions of total reflection. Further, although this embodiment has been described with respect to incident light having a wavelength of 1.55 μm, the same effect can be obtained for light of various wavelengths as long as the condition of total reflection can be satisfied.
[0060]
In this embodiment, the p-InP layer 63 on the surface side is formed by crystal growth. However, in the crystal growth, an undoped InP layer is used, and the main conductivity type of the semiconductor on the surface side is Zn diffusion or ion implantation. It may be determined by the method and subsequent annealing.
[0061]
The semiconductor light-receiving element portion is on a semiconductor layer having the first conductivity type, and includes a light-receiving layer and a Schottky formed of an intrinsic or first conductivity type semiconductor layer, a superlattice semiconductor layer, or a multiple quantum well semiconductor layer. A multilayer structure in which a semiconductor layer having a high Schottky barrier height having a Schottky barrier higher than the Schottky barrier between the light receiving layer and the Schottky electrode is interposed between the electrode and an electrode. The semiconductor light-receiving element formed on the substrate and the semiconductor layer having a high Schottky barrier height are In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) or In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and thin In on it 1-u Ga u As 1-v P v You may comprise with the semiconductor light receiving element characterized by consisting of (0 <= u <= 1,0 <= v <= 1).
[0062]
In this embodiment, the n-InGaAsP layer 65 is used on the lower side and the p-InP layer 63 is used on the upper side. However, the above-described p and n can be reversed, and the n-InP layer can be manufactured in the same manner. It is possible to manufacture the same using a p-InP substrate.
[0063]
Here, a bulk of uniform composition is used as the light-receiving layer 64, but a separate-absorption-graded-multiplication (SAGM) structure, a separate absorption and multiplication superlattice (SAM-SL) structure, etc., used for avalanche photodiodes, etc. Needless to say, a semiconductor layer having a superlattice structure may be used. It goes without saying that other material systems such as InGaAlAs / InGaAsP and AlGaAs / GaAs systems other than InGaAsP / InP systems and material systems with inherent strain may be used.
[0064]
Example 6
FIG. 7 is a sectional perspective view for explaining a sixth embodiment of the present invention. 71 is a light incident surface, 72 is 0.2 μm thick p + -InGaAsP (1.2 μm composition) layer, 73 is 1.5 μm thick p + -InP layer, 74 is 0.4 μm thick InGaAs light receiving layer, 75 is 0.4 μm thick n-InGaAsP (1.45 μm composition) layer, 76 is a semi-insulating InP substrate, 77 is a p electrode, and 78 is an n electrode. is there. Note that the drawing electrode and the pad electrode are omitted in this drawing because the drawing is complicated and obstructs the description.
[0065]
The light receiving layer area of the element is 30 μm × 150 μm. The
[0066]
The layers 76, 74, and 73 correspond to the main semiconductor layer on the light incident side with respect to the light receiving layer, the light receiving layer, and the main semiconductor layer on the opposite side of the light receiving layer in the claims. To do. In this example, the thin semiconductor layer 75 is included in the interface on one side of the light receiving layer 74, but may be on both sides or on the opposite side.
[0067]
Here, considering the refractive indexes of 3.17, 3.59, and 3.1 of the 76, 74, and 73 layers, the light having a wavelength of 1.55 μm is incident on the light receiving layer 74 at an incident angle of 83.14 °. It becomes incident. At this time, light passes through the InGaAs light receiving layer 74 with a passing angle φ = 28.75 °. For light, the semiconductor layer opposite to the light incident side with respect to the light receiving layer 74 is composed of an InP semiconductor layer 73 having a refractive index smaller than that of the InGaAs light receiving layer 74, and further semi-insulating InP 76 by high concentration doping. The refractive index is smaller than that of the total reflection condition (φ <cos -1 (N 2 / N 1 ); But n 1 Is the refractive index of the light receiving layer 74, n 2 Satisfies the refractive index of the semiconductor layer 73 on the side opposite to the light incident side), and the light is totally reflected at this portion.
[0068]
Light is introduced by a single mode fiber, and 100% of the reflected light again passes through the absorption layer 74 and is absorbed by total reflection, so that the applied reverse bias is 1.0 V and the light receiving sensitivity is greater than 0.8 A / W. A value was obtained. In addition, since light reflection occurs at the interface, the reflectivity and the light phase are not affected by the state of the
[0069]
In this embodiment, a highly doped InP semiconductor layer 73 having a refractive index smaller than that of the InGaAs light receiving layer 74 is used as the semiconductor layer opposite to the light incident side with respect to the light receiving layer 74. Any material such as AlAsSb, highly doped InGaAsP, or highly doped InGaAlAs may be used as long as it is appropriately smaller than the rate and can satisfy the conditions of total reflection. Further, although this embodiment has been described with respect to incident light having a wavelength of 1.55 μm, the same effect can be obtained for light of various wavelengths as long as the condition of total reflection can be satisfied.
[0070]
In this embodiment, the p-InP layer 73 on the surface side is formed by crystal growth. However, in the crystal growth, an undoped InP layer is used, and the main conductivity type of the semiconductor on the surface side is Zn diffusion or ion implantation. It may be determined by the method and subsequent annealing.
[0071]
The semiconductor light-receiving element portion is on a semiconductor layer having the first conductivity type, and includes a light-receiving layer and a Schottky formed of an intrinsic or first conductivity type semiconductor layer, a superlattice semiconductor layer, or a multiple quantum well semiconductor layer. A multilayer structure in which a semiconductor layer having a high Schottky barrier height having a Schottky barrier higher than the Schottky barrier between the light receiving layer and the Schottky electrode is interposed between the electrode and an electrode. The semiconductor light-receiving element formed on the substrate and the semiconductor layer having a high Schottky barrier height are In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) or In 1-xy Ga x Al y As (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) and thin In on it 1-u Ga u As 1-v P v You may comprise with the semiconductor light receiving element characterized by consisting of (0 <= u <= 1,0 <= v <= 1).
[0072]
In this embodiment, a semi-insulating InP 76 is used as a substrate and an n-InGaAsP layer 75 is used on the substrate side. However, even if a p-InGaAs layer is used, the above p and n are reversed. It can be manufactured in the same way, and can also be manufactured using an n-InP or p-InP substrate.
[0073]
Here, a bulk of uniform composition is used as the light-receiving layer 74, but a separate-absorption-graded-multiplication (SAGM) structure, a separate absorption and multiplication superlattice (SAM-SL) structure, etc. used for avalanche photodiodes, etc. Needless to say, a semiconductor layer having a superlattice structure may be used. It goes without saying that other material systems such as InGaAlAs / InGaAsP and AlGaAs / GaAs systems other than InGaAsP / InP systems and material systems with inherent strain may be used.
[0074]
【The invention's effect】
As described above, in a light receiving portion having a semiconductor multilayer structure including a light receiving layer and a semiconductor light receiving element in which incident light passes through the light receiving layer obliquely with respect to the layer thickness direction, The semiconductor layer on the light incident side has a refractive index larger than the refractive index of the semiconductor layer on the opposite side to the light receiving side with respect to the light receiving layer, and is on the side opposite to the light incident side with respect to the light receiving layer. Since the semiconductor layer is made of a semiconductor layer having a refractive index smaller than that of the light receiving layer, and the light is totally reflected at that portion, 100% reflected light passes through the light receiving layer again, and effective light absorption is achieved. The length is greatly increased. For this reason, it is possible to significantly reduce the thickness of the light absorption layer in order to obtain high light receiving sensitivity. In addition, since the light absorption layer is greatly reduced in thickness, it is possible to manufacture an element capable of operating at a high speed while maintaining high light receiving sensitivity.
[Brief description of the drawings]
FIG. 1 is a cross-sectional perspective view illustrating a first embodiment of the present invention.
FIG. 2 is a diagram illustrating a conventional refractive semiconductor light receiving element.
FIG. 3 is a cross-sectional perspective view illustrating a second embodiment of the present invention.
FIG. 4 is a cross-sectional perspective view illustrating a third embodiment of the present invention.
FIG. 5 is a cross-sectional perspective view for explaining a fourth embodiment of the present invention.
FIG. 6 is a cross-sectional perspective view for explaining a fifth embodiment of the present invention.
FIG. 7 is a cross-sectional perspective view for explaining a sixth embodiment of the present invention.
[Explanation of symbols]
12 p + -InGaAsP layer
13 p-InP layer
14 InGaAs light receiving layer
15 n-InGaAsP layer
16 InGaAsP layers
17 p electrode
18 n electrode
21 Light incident surface
22 p-InP layer
23 InGaAs light receiving layer
24 n-InP layer
25 n-InP substrate
26 p electrode
27 n electrode
31 Light incident surface
32 p + -InGaAsP layer
33 p-InP layer
34 InGaAs light receiving layer
35 n-InGaAsP layer
36 InGaAsP layer
37 Semi-insulating InP substrate
38 p electrode
39 n electrode
42 p + -InGaAsP layer
43 p-InP layer
44 InGaAs light receiving layer
45 n-InGaAsP layer
46 Semi-insulating GaAs substrate
47 p electrode
48 n electrode
51 Light incident surface
52 p + -InGaAsP layer
53 p-InP layer
54 InGaAs light receiving layer
55 n-InGaAsP layer
56 Semi-insulating GaAs substrate
57 p electrode
58 n electrode
62 p + -InGaAsP layer
63 p + -InP layer
64 InGaAs light receiving layer
65 n-InGaAsP layer
66 Semi-insulating InP substrate
67p electrode
68 n electrode
71 Light incident surface
72 p + -InGaAsP layer
73 p + -InP layer
74 InGaAs light receiving layer
75 n-InGaAsP layer
76 Semi-insulating InP substrate
77 p electrode
78 n electrode
Claims (6)
光受光層に対し光入射側の主たる半導体層の屈折率が、光受光層に対し光入射側と反対側の主たる半導体層の屈折率より大きい半導体層で構成されており、光受光層に対し光入射側と反対側の主たる半導体層が光受光層より屈折率の小さな半導体層よりなり、その部分で光が全反射し前記光吸収層を再度斜めに通過することにより、光吸収長が増大するように構成されていることを特徴とする半導体受光素子。In a light receiving portion having a semiconductor multilayer structure including a light receiving layer, and a semiconductor light receiving element in which incident light passes through the light receiving layer obliquely with respect to the layer thickness direction,
The refractive index of the main semiconductor layer on the light incident side with respect to the light receiving layer is composed of a semiconductor layer larger than the refractive index of the main semiconductor layer on the side opposite to the light incident side with respect to the light receiving layer. The main semiconductor layer on the side opposite to the light incident side is made of a semiconductor layer having a refractive index smaller than that of the light receiving layer. The light is totally reflected at that portion and passes through the light absorbing layer again obliquely, thereby increasing the light absorption length. It is comprised so that it may do. The semiconductor light receiving element characterized by the above-mentioned.
光受光層に対し光入射側の主たる半導体層の屈折率が、光受光層に対し光入射側と反対側の主たる半導体層の屈折率より大きい半導体層で構成されており、光受光層に対し光入射側と反対側の主たる半導体層が光受光層より屈折率の小さな半導体層よりなり、その部分で光が全反射し前記光吸収層を再度斜めに通過することにより、光吸収長が増大するように構成されていることを特徴とする半導体受光素子。By providing a light receiving portion having a semiconductor multilayer structure including a light receiving layer and a light incident end surface inclined inward as the distance from the surface side increases, the incident light is refracted at the light incident end surface and incident on the light receiving layer. In a refractive semiconductor light receiving element in which light passes obliquely with respect to the layer thickness direction,
The refractive index of the main semiconductor layer on the light incident side with respect to the light receiving layer is composed of a semiconductor layer larger than the refractive index of the main semiconductor layer on the side opposite to the light incident side with respect to the light receiving layer. The main semiconductor layer on the side opposite to the light incident side is made of a semiconductor layer having a refractive index smaller than that of the light receiving layer. The light is totally reflected at that portion and passes through the light absorbing layer again obliquely, thereby increasing the light absorption length. It is comprised so that it may do. The semiconductor light receiving element characterized by the above-mentioned.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22395699A JP3710039B2 (en) | 1999-08-06 | 1999-08-06 | Semiconductor photo detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22395699A JP3710039B2 (en) | 1999-08-06 | 1999-08-06 | Semiconductor photo detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001053328A JP2001053328A (en) | 2001-02-23 |
| JP3710039B2 true JP3710039B2 (en) | 2005-10-26 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22395699A Expired - Fee Related JP3710039B2 (en) | 1999-08-06 | 1999-08-06 | Semiconductor photo detector |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2420941A1 (en) * | 2001-05-07 | 2003-02-27 | Anritsu Corporation | Semiconductor light receiving device for repeatedly propagating incident light in light absorption layer and method for manufacturing the same |
| US6909160B2 (en) | 2002-07-16 | 2005-06-21 | Anritsu Corporation | Semiconductor light-receiving module capable of converting light into current efficiently at light absorbing layer |
| JP5307750B2 (en) * | 2010-03-08 | 2013-10-02 | 日本電信電話株式会社 | Semiconductor photo detector |
| WO2015097764A1 (en) * | 2013-12-25 | 2015-07-02 | 株式会社日立製作所 | Light receiving apparatus and light transmitting/receiving system using same |
| WO2024038897A1 (en) * | 2022-08-18 | 2024-02-22 | 国立大学法人東京大学 | Element, element manufacturing method, and photonic spin register |
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| JP2001053328A (en) | 2001-02-23 |
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