JP3709315B2 - Programmable controller - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a programmable controller, and more particularly to a programmable controller capable of changing a sequence program during execution of a user program, particularly a sequence program.
[0002]
[Prior art]
In recent years, user programs created by users, especially typical sequence programs, have become complex and large-scale due to reasons such as high speed and high performance of programmable controllers (hereinafter referred to as PLC) or complicated control systems. .
[0003]
This increase in scale is a factor that increases the work time required for debugging the sequence program. Many PLCs have a function of changing a user program (hereinafter referred to as RUN change) during operation of the PLC in order to efficiently perform debugging work.
[0004]
Here, with reference to FIG. 5, the arithmetic processing and the RUN change function in the conventional PLC will be described.
[0005]
FIG. 5 is a block diagram of a conventional PLC. In FIG. 5, the PLC 100 performs calculation / control in accordance with a user program based on at least a means for inputting information from a peripheral device and a system program for controlling the entire PLC 100, and contents of the user program during the execution of the calculation A central processing unit (hereinafter referred to as a CPU unit) 10 that can change the data, a data memory 5 that is connected to the CPU unit and stores various data necessary for calculation and control, and is connected to the CPU unit and operates. A user program memory 6A for storing a user program for control, a RUN change memory 6B used for changing the user program during operation of the PLC, a system program memory 7 for storing the system program, CPU unit 10 and interface 8 and peripheral device port A peripheral device 110 connected via an input section 1 having an input contact to be input to the CPU unit 10, and an output unit 4 and having an output coil 3 to be output to the controlled object. The peripheral device 110 is usually a personal computer.
[0006]
The main functions of the PLC CPU 10 are, firstly, having the ability to transfer programs and data, and secondly, performing arithmetic processing according to the contents of the user program coded by the user, and depending on the result For example, output signal control is performed.
[0007]
Here, the program transfer is to store the user program input by the user through the peripheral device 110 in the user program memory 6A via the peripheral port 9 and the peripheral device interface 8.
[0008]
Data transfer refers to reading the contents of the data memory 5 that stores the calculation results inside the CPU unit 10 from the peripheral device 110 via the peripheral port 9 and the peripheral device interface 8, or conversely, transferring data to the data memory 5. Is to write.
[0009]
Further, the CPU unit 10 captures the state of the input contact 1 via the input unit 2, and the CPU unit 10 calculates the captured data according to the user program stored in the user memory 6A. The calculation results are stored in the data memory 5 or output to the output coil 3 via the output unit 4.
[0010]
Next, the RUN change function in the conventional PLC will be described.
[0011]
A request for change during RUN is sent from the peripheral device 110 to the CPU 10, and at the same time, the changed user program is transferred from the peripheral device 110 to the memory for change during RUN 6B. The CPU 10 replaces the changed user program in the RUN change memory 6B with the user program memory 6A while monitoring the execution status of the user program on the user program memory 6A. This replacement means is performed by the CPU 10 in a software manner in accordance with a replacement program stored in the system program.
[0012]
[Problems to be solved by the invention]
In general, the RUN change function is frequently used when the user program is frequently changed, such as during a test operation of the control system, and is not frequently used during normal operation when the control system is operating stably.
[0013]
Nevertheless, as shown in FIG. 5, conventionally, as a hardware configuration of the PLC 100 when the RUN change function is realized, the PLC 100 often has a RUN change memory exclusively.
[0014]
In other words, in the configuration that realizes the conventional RUN change function, a dedicated memory is mounted even when the RUN change in the normal operation state is unnecessary, and valuable hardware resources are wasted. There is a problem.
[0015]
Techniques that improve this problem have been proposed. The program is corrected using an external memory, for example, the memory of the programming console of the peripheral device. When the correction is completed, the corrected program is transferred to the stopped PLC. A related technique is disclosed in Japanese Patent Application Laid-Open No. 5-233014.
However, this simply means that the program can be modified in external memory during program execution. However, when changing the program, the PLC must be stopped and cannot be changed during RUN. In addition, the programming console of the peripheral device and the working memory are integrated, and it is necessary to carry a large programming console. There was a lack of consideration for maintainability.
[0016]
In general, in an electronic device, when devices are connected via a connector or the like, care is often required when mounting and removing the devices. The reason for this is that depending on the timing at which the connector comes into contact, the components inside the device may be damaged due to fluctuations in the power supply voltage or the like.
[0017]
FIG. 6 shows a block diagram of a conventional memory I / F and memory board.
[0018]
In order to take the above measures, in some memory I / F units, conventional devices are provided with measures for attaching and removing connectors after the device is turned off. This is an example in which a switching element 24 and a switch 23 are provided in the power supply unit of the memory I / F in order to protect the components on the memory I / F, the PLC main body side, and the memory board side.
[0019]
Before the memory board 102 is mounted, the switch 23 is opened to turn off the switching element 24 so that power is not supplied to the memory board 102 side. After the memory board 102 is installed, the switch 23 is connected and the switching element 24 is turned on to supply power to the memory board 102. At the same time, the signal 22 for controlling the data bus buffer 25B and the address buffer 25A is live. It becomes. 20A and 20B are data buses, and 21A and 21B are address buses.
[0020]
Before removing the memory board 102, the switch 23 is released to stop the power supply to the memory board 102 and the signal supply to the buffers 25A and 25B. As described above, in the countermeasure means of the conventional configuration, it is necessary to operate the switch before the memory board 102 is attached / removed, and there is a problem with maintainability.
[0021]
The present invention has been made in order to solve such a conventional problem, and stops mounting a dedicated memory when a change during RUN in a normal operation state is unnecessary, thereby wasting valuable hardware resources. It is an object of the present invention to provide a programmable controller with sufficient consideration for maintainability.
[0022]
[Means for Solving the Problems]
In order to achieve the above object, according to the present invention, a user program memory for storing a user program, a system program memory for storing a system program, a sequential calculation and execution in accordance with the user program, and changing the contents of the user program memory In a programmable controller comprising a central processing unit that performs and a memory board interface unit connected to the central processing unit and the user program memory , the programmable controller is energized and the user program is being executed However, it has a receiving-side connector with a hot-swap structure capable of changing the user program, and a memory for changing during RUN, an LED, and an inserting-side connector with the hot-swap structure are mounted via the receiving-side connector. Removable memory board Further, when the hot plugging of the memory board is completed and the central processing unit determines that the user program needs to be changed, the change during RUN is started and the LED is turned on. When the medium change is completed, the LED is turned off to indicate that the hot removal of the memory board is possible .
[0024]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of a programmable controller (hereinafter referred to as PLC) according to the present invention will be described with reference to FIGS.
[0025]
FIG. 1 is a configuration diagram of a PLC according to an embodiment of the present invention.
[0026]
In FIG. 1, a PLC 101 is a CPU 10 that controls the entire PLC 101 according to a system program, a system program memory 7 that is connected to the CPU 10 and stores and stores control contents and procedures including a RUN change program of a user program. A rewritable user program memory 6A that is connected to the CPU 10 and stores a user program, and a rewritable data memory 5 that is connected to the CPU 10 and stores data necessary for calculation, calculation results, and the like. . When the peripheral device 110 is placed near the PLC, the data memory 5 is connected to the peripheral device 110 via the peripheral device interface 8 and the peripheral port 9 so that the contents of the data memory 5 can be rewritten. It is usually connected to.
[0027]
A memory interface 12 (hereinafter referred to as a memory I / F 12) for connecting the RUN change memory 6B to the CPU 10 and the user program memory 6A is provided. By connecting the female connector on the memory I / F 12 side and the male connector 103 on the memory board 102 side, the memory board 102 in which the memory 6B for RUN change is mounted is mounted on the memory I / F 12 Is done.
[0028]
The CPU 10 periodically determines whether the memory board 102 in which the RUN change memory 6B is mounted is in a mounted state or a detached state, for example, depending on whether a power supply terminal is inserted or not inserted. Monitoring. The power LED 105 is provided on the memory board 102, and the power LED 105 is turned on when the CPU 10 recognizes that the memory board 102 is mounted as a result of regular monitoring. Yes. The wiring relationship of the power LED 105 is not shown.
[0029]
Next, refer to FIG. 2 and FIG. 3 for the structure for removing the RUN change memory that is not being used except during the RUN change, and the structure for hot-swapping to protect the memory contents when removed. To explain. FIG. 2 is an explanatory view of a connector structure for hot-swap, and FIG. 3 is an explanatory view of coupling between the memory I / F 12 side and the memory board 102 side.
[0030]
2 and 3, the male connector 103 includes a ground terminal 41, signal terminals 40 a and 40 b, and a power supply terminal 42. The lengths of these terminals are in the relationship of ground terminal 41> signal terminals 40a, 40b> power supply terminal 42. The male connector 103 is incorporated in the memory board 102.
[0031]
A female connector 104 is incorporated in the memory I / F 12 on the memory I / F 12 side. The memory I / F 12 includes a connection line PV5 to the power source 5V, and a ground line SG to the memory I / F 12 and a connection line. PG 5, a one-way address buffer amplifier 25 A for address designation connected to the input data bus 21 A, and a bidirectional transfer of data connected to the output data bus 21 B and the input data bus 20 A. A data buffer amplifier 25B and its output data bus 20B are provided.
[0032]
The PV5 is connected to the terminal hole 62, the PG5 is connected to the terminal hole 61, the output data bus 21B is connected to the terminal hole 60a, and the output data bus 20B is connected to the terminal hole 60b. The signal 22 is a control signal for switching the buffers 25A and 25B between valid and invalid. The input data bus 21A and the input data bus 20A are connected to a bus in the PLC (not shown).
[0033]
The depths of the terminal holes 61, 60a, 60b, 62 connected to the ground terminal 41, the signal terminals 40a, 40b, and the power supply terminal 42 of the male connector 103 are determined by the ground terminal 41, the signal terminal of the male connector 103, respectively. 40a, 40b and the power terminal 42 are configured to be deeper according to the length.
[0034]
The hot wire insertion / extraction using the connector structure having the above configuration will be described.
[0035]
When the memory board 102 is attached to the memory I / F 12, the male connector 103 is connected to the female connector 104. First, the ground terminal 41 of the male connector 103 and the PG5 terminal of the female connector 104 are connected. The hole 61 is connected based on the relationship between the length of the terminal and the depth of the hole. As a result, the reference potential between the memory I / F 12 and the memory board 102 matches.
[0036]
Next, the signals 40a and 40b of the male connector 103 are connected to the terminal hole 60a of the address output data bus 21B of the female connector 104 and the terminal hole 60b of the data output data bus 20B. Here, even if the signals of the address output data bus 21B and the data output data bus 20B fluctuate, the reference potential between the memory I / F 12 and the memory board 102 is the same as described above. A large potential difference does not occur. Therefore, there is no fear that the data and components in the memory word 102 are damaged.
[0037]
Finally, the power supply terminal 42 of the male connector 103 and the PV5 terminal hole 62 connected to the power supply 5V are connected, and data can be transferred between the memory I / F 12 and the memory board 102.
[0038]
In this way, by connecting both terminals with a time difference, it is possible to realize hot-line insertion / extraction without providing special means such as a switch or a switching element.
[0039]
The operation of the PLC having the above configuration will be described with reference to FIG. FIG. 4 is a flowchart of the PLC of FIG.
[0040]
In S1, the PLC power is turned on.
[0041]
In S2, it is determined whether the user program needs to be changed. If necessary, go to S3. If not necessary, the process proceeds to S10, and the normal operation of the PLC is continued.
[0042]
In S3, the memory board 102 mounted with the RUN change working memory 6B storing the necessary user program is coupled to the memory I / F 12, and the working memory 6B is hot-plugged.
[0043]
In S4, when the CPU confirms the installation of the work memory 6B, the power LED 105 is turned on.
[0044]
In S5, the CPU instructs to change the contents of the user program.
[0045]
In S6, the CPU reads the RUN change information table in the working memory 6B. The RUN change information table is a table showing the addresses of user programs that need to be changed and their contents.
[0046]
In S7, the information in the information table for RUN change is determined, and the contents of the user program and the work memory 6B are replaced. At this time, it is performed so as not to hinder the execution of the user program.
[0047]
In S8, the user program is replaced by the information in the RUN change information table, and the completion of the change is confirmed.
[0048]
In S9, the CPU turns off the power LED 105. The working memory for changing during RUN is hot-lined.
[0049]
In S10, normal operation is performed.
[0050]
The contents of the working memory that has been disconnected can be changed as needed. Also, it is possible to prepare many types of work memories in which stored programs are fixed.
[0051]
【The invention's effect】
As described above in detail, according to the configuration of the present invention, the following effects can be obtained by using the removable RUN change memory. Since the number of parts is reduced, an inexpensive PLC can be provided.
[0052]
2. Since the number of parts is reduced, power consumption during normal operation can be suppressed. Moreover, work efficiency can be improved by inventing the system which can attach or detach the working memory for RUN change without stopping PLC.
[0053]
3. It is possible to provide a working memory for change during RUN that is compact and lightweight, easy to carry, and has good maintainability.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of a PLC according to an embodiment of the present invention.
FIG. 2 is an explanatory diagram of a connector structure for hot-swap.
FIG. 3 is an explanatory diagram of coupling between the memory I / F 12 side and the memory board 102 side.
4 is a flowchart of the PLC shown in FIG. 1. FIG.
FIG. 5 is a configuration diagram of a conventional PLC.
FIG. 6 is a block diagram of a conventional memory I / F and a memory board.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Input contact, 2 ... Input part, 3 ... Output coil, 4 ... Output part, 5 ... Data memory,
6A ... User program memory, 6B ... RUN change memory,
7 ... System program memory, 8 ... Peripheral device interface,
DESCRIPTION OF SYMBOLS 9 ... Peripheral port, 10 ... CPU part, 12 ... Memory interface, 20A, 20B ... Data bus, 21A, 21B ... Address bus, 22 ... Buffer control signal, 23 ... Switch, 24 ... Switching element for power supplies,
25A ... address buffer, 25B ... data buffer, 41 ... ground terminal, 40a, 40b ... signal terminal, 42 ... power supply terminal 42,
DESCRIPTION OF SYMBOLS 100 ... Conventional PLC, 101 ... PLC of this invention, 102 ... Memory board, 103 ... Memory port, 110 ... Peripheral device

Claims (1)

A user program memory for storing a user program, a system program memory for storing a system program, a central processing unit for sequentially executing operations according to the user program and changing the contents of the user program memory , and the central processing unit And a programmable controller comprising a memory board interface unit connected to the user program memory ,
A receiving connector having a hot-swap structure that can change the user program even when the programmable controller is energized and the user program is being executed, and a RUN change memory via the receiving connector; The memory board on which the LED and the insertion side connector of the hot-wire insertion / removal structure are mounted can be detachably connected. Further, the hot-plugging of the memory board is completed, and the central processing unit is connected to the user program. When it is determined that a change is necessary, start the change during RUN and turn on the LED. When the change during the RUN is completed, the LED is turned off and the memory board can be hot-lined. The programmable controller characterized by having shown the structure .

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