JP3664989B2 - Adjustable bias gamma correction circuit with centrally symmetric voltage - Google Patents

Description

[0001]
The present invention relates to a gamma correction circuit. More particularly, the present invention relates to the use of a varistor, transistor, or operational amplifier in a gamma correction circuit to obtain an adjustable bias gamma correction circuit having a centrally symmetric voltage.
[0002]
In an active matrix liquid crystal display (AM-LCD) system, the characteristic curve representing the relationship between the liquid crystal transmittance and the applied voltage is a non-linear curve as shown in FIG. In order to obtain a linear characteristic between the transmissivity of the liquid crystal and the code number, that is, a special relationship curve, as shown in FIG. Must be established. A curve in which all code numbers are mapped to a specific drive voltage as shown in FIG. 3 is called a gamma curve.
[0003]
In the AM-LCD system, the main function of the gamma correction circuit is to refer to the gamma curve to convert the code number into the corresponding driving voltage, thereby applying the driving voltage to the liquid crystal of the AM-LCD system. be able to. By using the gamma curve, the brightness, gradation, contrast, and color performance of the LCD can be adjusted. Therefore, the gamma curve defined by the gamma correction circuit is extremely important for the color quality of the LCD.
[0004]
In general, the larger the number of reference drive voltages applied from the gamma correction circuit, the smaller the error in approximating the gamma curve. In order to satisfy the high color quality of the display, 256 code numbers of 8-bit data are required. The 256 code number means that the display can display 256 gradations. Most preferably, the regulation circuit provides 256 reference voltage sources, but this is not possible. Further, since the nematic liquid crystal has AC drive characteristics, a 512 drive voltage of a positive 256 reference voltage and a negative 256 reference voltage needs to be supplied to the gamma correction circuit. FIG. 4 shows a conventional gamma correction circuit. Two types of voltages (V _n , V _n-1 ) are applied to a plurality of resistors (R _{1 to} R _m ) connected in series. By adjusting the resistance value, a driving voltage (V _{r1 to} V _Rm−1 ) between two voltages (V _n , V _{n −1} ) is obtained at each node. As shown in FIG. 1, each node is connected to a buffer, so the output of the buffer is the drive voltage. Thus, the input voltage can be reduced by using the divided voltage of the resistors connected in series.
[0005]
As shown in FIG. 5, in the AC drive circuit, a plurality of symmetrical resistors (R _{1 to} R _m ) connected in series are connected to two input reference voltage terminals (V _cc , V _Gnd ), The open ends of the two resistors (R _m ) are coupled together to form a center voltage node. As described above, the gamma correction circuit has a symmetric driving voltage (+ V ₁ , −V ₁ , + V ₂ , −V ₂ to + V _m− with respect to the center voltage ((V _cc + V _Gnd ) / 2) and the center voltage. ₁ , −V _m−1 ). Even with a conventional gamma correction circuit, it is quite easy to obtain a drive voltage. However, if there is a change in one of the resistors connected in series, all drive voltages are affected and it is quite difficult to obtain a symmetrical drive voltage and a center voltage that require adjustment. Further, the asymmetric drive voltage causes a flickering phenomenon of the image and degrades the image quality.
[0006]
In order to meet the high color quality requirements of the display, it is necessary to obtain an accurate gamma curve. In order to approximate the gamma curve, it is necessary to increase the number of drive reference voltages. Therefore, there is a need for a gamma correction circuit that can generate a drive reference voltage that can be adjusted to the maximum while using a minimum number of voltage sources.
[0007]
Accordingly, it is an object of the present invention to provide an adjustable bias gamma correction circuit having a centrally symmetric voltage. In the present invention, by using a varistor, a transistor, or an operational amplifier in the gamma correction circuit, a plurality of positive and negative symmetrical drive voltages with respect to the center voltage are obtained.
[0008]
Another object of the present invention is to provide an adjustable bias gamma correction circuit having a centrally symmetric voltage. By utilizing the present invention, the gamma correction circuit can generate a maximally adjustable drive voltage with a minimum number of voltage sources.
[0009]
In all aspects of the present invention, the present invention includes a plurality of symmetrical divided voltage units, and in each symmetrical divided voltage unit, the first resistor, the resistance value control circuit, and the second resistor are connected to the first input terminal. The first end of the resistance value control circuit is connected to the input terminal of the first buffer, and the second end of the resistance value control circuit is connected to the input terminal of the second buffer. The output terminal of the first buffer and the output terminal of the second buffer generate a positive drive voltage and a negative drive voltage in pairs, respectively, and the output of the first buffer of each symmetrical divided voltage unit And the output of the second buffer are connected to the first input terminal and the second input terminal of the next-stage symmetrical divided voltage unit connected to the first voltage and the second voltage, respectively. Adjustable bias gamma correction circuit To provide.
[0010]
Further, in all aspects of the present invention, the present invention includes a plurality of symmetrical divided voltage units, wherein each symmetrical divided voltage unit includes a varistor having a drawing terminal connected between the input terminal and the first voltage; A first amplifier having a drawing terminal connected to its own positive input terminal and a negative input terminal connected to its own output terminal, and between the negative input terminal of the first amplifier and its own negative input terminal A second amplifier having a first resistor to be connected and a second resistor connected between its own negative input terminal and output terminal; and a pair of outputs from each output of the first and second amplifiers. And a center voltage connected to the positive input terminal of the second amplifier to generate a positive drive voltage and a negative drive voltage. An adjustable bias gamma correction circuit characterized in that the output of the first amplifier of each symmetrical divided voltage unit is connected to the input terminal of the next stage, and the first input terminal is connected to the second voltage. provide.
[0011]
The aspects of the invention described above and the attendant advantages will become better understood and more readily appreciated by reference to the following detailed description when taken in conjunction with the accompanying drawings.
[0012]
FIG. 6 schematically shows a gamma correction circuit according to the first embodiment of the present invention. The connection relationship of this gamma correction circuit will be described below.
[0013]
The gamma correction circuit includes a plurality of symmetrical divided voltage units 10. In the first symmetrical divided voltage unit 10, a resistor (R ₁ ), a varistor (VR ₁ ), and a resistor (R ₁ ) are respectively connected between two input terminals connected to voltage sources (V _cc , V _Gnd ). Connected in series. Two buffers 20 and 30 are connected to both ends of the varistor (VR ₁ ), respectively, and voltage is output from both ends of the varistor (VR ₁ ). Further, the input terminal of the next-stage symmetrical divided voltage unit is connected to the two output terminals of the preceding-stage buffer. As described above, the gamma correction circuit according to the first embodiment of the present invention is completed by including the first symmetrical divided voltage unit 10, the second symmetrical divided voltage unit,..., The Nth symmetrical divided voltage unit. Is done.
[0014]
As shown in FIG. 6, it is clear that the center voltage of this gamma correction circuit is (V _cc + V _Gnd ) / 2. In the first symmetrical divided voltage unit 10, since the two resistors have the same resistance value, the two buffers 20 and 30 represented by + V ₁ (positive drive voltage) and −V ₁ (negative drive voltage) are used. The output is symmetric with respect to the center voltage, no matter how the varistor (VR ₁ ) is adjusted. Similarly, as described above, other symmetrical divided voltage units may generate a symmetrical sequentially decreasing plus driving voltage (+ V ₂ to + V _N ) and a sequentially increasing minus driving voltage (−V ₂ to −V _N ). it can. By adjusting the resistance value of the varistor of each symmetrical divided voltage unit, all positive drive voltages (+ V ₂ to + V _N ) and negative drive voltages (−V ₂ to −V _N ) can be calibrated and obtained. The pair of positive and negative drive voltages is symmetric with respect to the center voltage. Furthermore, even if the varistor is adjusted, the center voltage does not shift. Furthermore, the drive voltage of the gamma correction circuit can be made closer to the gamma curve by increasing the number of symmetrical division voltage units.
[0015]
FIG. 7 is a diagram schematically showing a gamma correction circuit according to a second embodiment of the present invention. The connection relationship of this gamma correction circuit will be described below.
[0016]
The gamma correction circuit includes a plurality of symmetrical division voltage units 40. In the first symmetric divided voltage unit 40, a resistor (R ₁ ), a source and drain of a field effect transistor (FET) (T ₁ ), and a resistor (R ₁ ) are respectively connected to voltage sources (V _cc , V _Gnd ) is connected in series between the two input terminals connected to _Gnd ). Two buffers 50 and 60 are connected to the source and drain of the FET (T ₁ ), respectively, and voltage is output from the source terminal and the drain terminal. Further, the two input terminals of the next-stage symmetrical division voltage unit are connected to the two output terminals of the preceding-stage buffer. As described above, the gamma correction circuit according to the second embodiment of the present invention includes the first symmetric divided voltage unit 40, the second symmetric divided voltage unit, ..., the Nth symmetric divided voltage unit, Complete.
[0017]
As shown in FIG. 7, each symmetrical divided voltage unit FET can be treated as having an internal resistance between the source terminal and the drain terminal, and the resistance value of the internal resistance adjusts the gate voltage of the FET. Can be controlled. Similar to the first embodiment, all symmetrical divided voltage units generate a symmetrical sequentially decreasing plus driving voltage (+ V ₁ to + V _N ) and a sequentially increasing minus driving voltage (−V ₁ to −V _N ). Can do. By adjusting the gate voltage and obtaining the adjusted internal resistance, all positive drive voltages (+ V ₁ to + V _N ) and negative drive voltages (−V ₁ to −V _N ) can be calibrated and obtained, A pair of positive and negative drive voltages is symmetric with respect to the center voltage.
[0018]
FIG. 8 is a diagram schematically showing a gamma correction circuit according to a third embodiment of the present invention. The connection relationship of this gamma correction circuit will be described below.
[0019]
The gamma correction circuit includes a plurality of symmetrical division voltage units 70. Each symmetric divided voltage unit 70 has the same connection configuration, and includes a varistor having a drawing terminal, two resistors having the same resistance value, and two operational amplifiers. The varistor (VR ₁ ) of the first symmetrical divided voltage unit 70 is connected between the input terminals connected to the voltage sources (V _cc , V _Gnd ). The positive input terminal of the first operational amplifier 80 is connected to the drawing terminal of the varistor (VR ₁ ), and the negative input terminal is connected to the output terminal of the first operational amplifier 80. The center voltage (V _com ) is connected to the positive input terminal of the second operational amplifier 90, the resistor (R ₁ ) is connected between the first operational amplifier 80 and the two negative input terminals of the second operational amplifier 90, Another resistor (R ₁ ) is connected between the negative input terminal and the output terminal of the second operational amplifier 90. Further, the input terminal of the next-stage symmetrical divided voltage unit is connected to the output terminal of the first operational amplifier in the previous stage. As described above, the gamma correction circuit according to the third embodiment of the present invention includes the first symmetric divided voltage unit 70, the second symmetric divided voltage unit,..., And the Nth symmetric divided voltage unit. Complete.
[0020]
As shown in FIG. 8, it is clear that the center voltage of this gamma correction circuit is _Vcom . In the first symmetrical divided voltage unit 70, since the two resistors have the same resistance value, the two operational amplifiers 80 and 90 represented by + V ₁ (positive drive voltage) and −V ₁ (negative drive voltage) are used. The output is symmetric with respect to the center voltage, no matter how the varistor (VR ₁ ) is adjusted. Similarly, as described above, other symmetrical divided voltage units may generate a symmetrical sequentially decreasing plus driving voltage (+ V ₂ to + V _N ) and a sequentially increasing minus driving voltage (−V ₂ to −V _N ). it can. All positive drive voltages (+ V ₂ to + V _N ) and negative drive voltages (−V ₂ to −V _N ) are calibrated and obtained by adjusting the positions of the drawing terminals of the varistors of the respective symmetrical divided voltage units. The pair of positive and negative drive voltages is symmetric with respect to the center voltage (V _com ). Furthermore, even if the varistor is adjusted, the center voltage (V _com ) does not shift. Furthermore, the drive voltage of the gamma correction circuit can be made closer to the gamma curve by increasing the number of symmetrical division voltage units.
[0021]
FIG. 9 is a diagram schematically showing a gamma correction circuit according to a fourth embodiment of the present invention. The connection relationship of this gamma correction circuit will be described below.
[0022]
The difference between the fourth embodiment and the third embodiment is that the varistor of each symmetrical divided voltage unit 100 is connected between the input terminal and the voltage source (V _cc ). In the first symmetrical divided voltage unit 100, the input terminal is grounded. In the fourth embodiment, the output terminals of the two amplifiers 110 and 120 represented by + V ₁ (positive drive voltage) and −V ₁ (negative drive voltage) are based on the center voltage (V _com ). Symmetric. Similarly, other symmetrical divided voltage units can generate a symmetrical sequentially increasing plus driving voltage (+ V ₂ to + V _N ) and a sequentially decreasing minus driving voltage (−V ₂ to −V _N ). Furthermore, the difference in output between the fourth embodiment and the third embodiment is that the positive drive voltage of the symmetrical divided voltage unit is higher than that of the next symmetrical divided voltage unit in the third embodiment. In the fourth embodiment, the positive drive voltage of the symmetrical divided voltage unit is lower than that of the next symmetrical divided voltage unit.
[0023]
As described above, the present invention can provide an adjustable bias gamma correction circuit having a centrally symmetric voltage. In the present invention, by providing a varistor, transistor, or operational amplifier in the gamma correction circuit, it is possible to obtain a plurality of positive and negative symmetrical divided voltages that change sequentially with respect to the center voltage.
[0024]
Furthermore, the present invention has the effect of providing an adjustable bias gamma correction circuit having a centrally symmetric voltage. By using the present invention, the gamma correction circuit can generate a drive voltage that can be adjusted to the maximum while using the minimum number of voltage sources.
[0025]
Those skilled in the art will appreciate that the preferred embodiments of the present invention described above are intended to illustrate the invention rather than to limit the invention. Various changes and similar arrangements may be made within the scope of the appended claims, and in order to make such modifications and similar arrangements, the appended claims are to be interpreted in the broadest scope. Shall be.
[Brief description of the drawings]
FIG. 1 is a diagram showing a transmittance of liquid crystal and an applied drive voltage.
FIG. 2 is a diagram showing a case where the transmittance of liquid crystal and the code number are in a linear relationship.
FIG. 3 is a diagram illustrating a gamma curve of liquid crystal transmittance and code number.
FIG. 4 is a diagram schematically showing a conventional gamma correction circuit having a fixed ratio resistor.
FIG. 5 is a diagram schematically showing a conventional gamma correction circuit used in an AC drive system.
FIG. 6 is a diagram schematically showing a first embodiment of a gamma correction circuit.
FIG. 7 is a diagram schematically showing a second embodiment of a gamma correction circuit.
FIG. 8 is a diagram schematically showing a third embodiment of a gamma correction circuit.
FIG. 9 is a diagram schematically showing a fourth embodiment of a gamma correction circuit.

Claims (1)

An adjustable bias gamma correction circuit for generating a plurality of positive and negative drive voltages referenced to a center voltage,
A plurality of symmetrical division voltage units are provided, and in each symmetrical division voltage unit, a first resistor having a certain resistance value, a varistor, and a second resistor having the resistance value are a first input terminal and a second input terminal. Are connected in series, the first end of the varistor is connected to the input end of the first buffer, the second end of the varistor is connected to the input end of the second buffer, and the first buffer And the output end of the second buffer generate the positive drive voltage and the negative drive voltage in pairs, respectively, and the output of the first buffer and the second output of each symmetrical divided voltage unit. Are respectively connected to the first input terminal and the second input terminal of the subsequent symmetrical divided voltage unit, and the first input terminal and the second input of the first stage of the symmetrical divided voltage unit What is a terminal? It is characterized in that it is connected to a first voltage source and second voltage source, an adjustable bias gamma correction circuit.

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