JP3660474B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device having wirings or electrodes using a refractory metal.
[0002]
[Prior art]
In recent years, demands for higher integration and higher speed of semiconductor devices are increasing. In order to realize these requirements, reduction in the size and miniaturization between elements and element dimensions have been promoted, and reduction in resistance of internal wiring materials has been studied.
[0003]
In particular, in a word line in which RC delay appears remarkably, a reduction in resistance is a major issue. Therefore, recently, in order to reduce the resistance of the word line, a polycide gate having a two-layer structure of a polycrystalline silicon film and a metal silicide film has been widely adopted. A refractory metal silicide film is promising as a material for a low resistance wiring because its resistance is about one digit lower than that of a polycrystalline silicon film. As the refractory metal silicide film, tungsten reside (WSi) is most widely used.
[0004]
However, in order to cope with fine wiring of 0.25 μm or less, it is required to further reduce the resistance by reducing the delay time. In order to realize a gate electrode having a sheet resistance of 1Ω / □ or less using the polycide structure, the thickness of the silicide layer must be increased. When the gate electrode is thickened, it becomes difficult to process and form an interlayer insulating film on the electrode. Therefore, it is required to achieve a low sheet resistance without increasing the aspect ratio of the electrode.
[0005]
For this purpose, it is essential to develop a metal gate electrode that directly forms a refractory metal having a specific resistance lower than that of metal silicide on the gate oxide film.
However, the refractory metal film is very easily oxidized and becomes an oxide at a temperature of about 450 ° C. Therefore, for example, when a silicon oxide film using an oxidizing atmosphere is formed on the refractory metal film when forming the interlayer insulating film, the surface or all of the refractory metal film is oxidized to become an insulator. Further, the oxidation of the refractory metal is accompanied by volume expansion, and the unevenness of the surface of the refractory metal becomes severe. The surface of the silicon oxide film reflects the irregularities on the surface of the metal film and becomes apparent in the form of morphological roughness. Therefore, a silicon nitride film that can be formed in a non-oxidizing atmosphere is often used as the interlayer insulating film on the refractory metal film.
[0006]
However, when an oxide exists on the surface of the refractory metal film before the formation of the interlayer insulating film, surface roughness may occur even when the silicon nitride film is formed in a non-oxidizing atmosphere. Specifically, when an oxide layer is present on the tungsten film, surface roughness occurs after the formation of the silicon nitride film.
[0007]
Tungsten oxide undergoes a phase transition around 600 to 700 ° C. to form needle crystals. Since the silicon nitride film is formed at a substrate temperature of about 700 to 800 ° C., needle crystals are formed on the tungsten surface in the heating stage before film formation, and the surface of the silicon nitride film is roughened by forming a film thereon. Happens. Such surface roughness occurs on the order of a micron of salvation, and is therefore a problem that cannot be ignored in devices of the 0.1 μm generation, and can be said to be a critical issue in the realization of wiring or electrodes using a refractory metal film.
[0008]
In addition, this problem is not limited to the time of film formation, and phase transition occurs when heated to 600 ° C. or higher. Therefore, needle-like oxides in units of several μm are generated during annealing treatment in a nitrogen atmosphere other than film formation.
[0009]
[Problems to be solved by the invention]
As described above, when heating is performed in a state where an oxide is present on the surface of the refractory metal, there is a problem in that the oxide causes a phase transition and the shape of the wiring or the electrode changes.
An object of the present invention is to provide a semiconductor device manufacturing method capable of preventing a change in the shape of a wiring or electrode made of a refractory metal and forming a highly reliable semiconductor device.
[0010]
[Means for Solving the Problems]
[Constitution]
The present invention is configured as follows to achieve the above object.
(1) The present invention (Claim 1) removes the oxide layer formed on the surface of the refractory metal film in a method of manufacturing a semiconductor device including a step of heat-treating the refractory metal film to 600 ° C. or higher. Thereafter, the heat treatment is performed in a non-oxidizing atmosphere.
(2) A method of manufacturing a semiconductor device according to the present invention (Claim 2) includes a removal step of removing an oxide layer formed on a surface of a refractory metal film on a semiconductor substrate, and the semiconductor substrate at 600 ° C. or higher. And heating to form a film on the refractory metal film.
[0011]
Preferred embodiments of the present invention are shown below.
A conductive film such as polysilicon, TiN, Al, or W, or an insulating film such as a silicon nitride film is formed.
[0012]
As the step of removing the oxide, it is immersed in a solution that forms a hydrate of the oxide layer.
The solution is a solution containing hydrosulfuric acid, hydrofluoric acid, hydrochloric acid, ammonia or choline.
[0013]
The step of removing the oxide is performed by a chemical mechanical polishing method using a polishing liquid that reacts with the oxide layer to form a hydrate.
The polishing liquid is a solution containing dilute sulfuric acid, dilute hydrofluoric acid or dilute nitric acid.
[0014]
Further, after removing the oxide layer, a film is formed on the refractory metal film by a chemical vapor deposition method using a non-oxidizing atmosphere as a source gas.
Furthermore, ion implantation is performed to form a diffusion layer, and after removing the oxide layer, annealing for activating the diffusion layer is performed in a non-oxidizing atmosphere.
[0015]
[Action]
The present invention has the following operations and effects by the above configuration.
The refractory metal oxide undergoes a phase transition at 600 to 700 ° C. to form needle crystals. Therefore, the surface of the silicon nitride film is not roughened even by heating by removing the oxide that forms the needle-like crystals before overheating to 600 ° C. or higher.
[0016]
In addition, when the high-melting-point metal oxide is removed using the wet etching method, the inventors have found that the oxide does not directly dissolve in the solution. The refractory metal oxide reacts with the solution to form a hydrate, which is dissolved and removed. Therefore, for removing the oxide, it is preferable to use a solution that reacts with the oxide to form a hydrate, and an aqueous solution of the solution.
[0017]
Also, in the removal of the oxide by a chemical mechanical polishing method, the oxide can be efficiently removed by using a polishing liquid that reacts with the oxide to form a hydrate.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[First Embodiment]
In the present embodiment, a comparison result of the removal effect of tungsten oxide between a hydrosulfuric acid aqueous solution diluted to 20% and hydrosulfuric acid (99%) will be described.
[0019]
The tungsten film was exposed to oxygen plasma for about 90 seconds, and a sample in which about 10 nm of tungsten oxide was formed on the surface thereof was immersed in each solution and etched.
[0020]
FIG. 1 shows the etching effect of the two solutions. As can be seen from the figure, the oxide on the tungsten surface is etched with the treatment time and the film thickness decreases, but it can be seen that sulfuric acid diluted to 20% has a larger etching effect.
[0021]
From this experimental result, it is derived that sulfuric acid itself is not involved in oxide removal. That is, it is considered that the removal of the oxide is carried out by forming a water-soluble tungstic acid hydrate (WO ₃ .H ₂ O) via sulfuric acid and dissolving the tungstic acid hydrate in water. It is done.
[0022]
In addition, it was confirmed that such a removing action occurs not only in the selected hydrosulfuric acid aqueous solution but also in hydrofluoric acid and hydrochloric acid. Further, not only acid chemicals but also alkaline chemicals have the same removal effect, and it has been confirmed that the effect of removing oxides is enhanced by diluting with ammonia, choline (TMAH) or the like. In addition, the preferable dilution rate of a sulfuric acid is 10 to 80% of range.
[0023]
Similarly, it was confirmed that the etching effect was enhanced by diluting the solution with a refractory metal other than tungsten.
[Second Embodiment]
Next, after removing the oxide on the refractory metal film, a silicon nitride film was formed, and the surface roughness of the silicon nitride film was observed.
[0024]
FIG. 2 is a process cross-sectional view showing a wiring manufacturing process according to the second embodiment of the present invention.
First, as shown in FIG. 2A, a thin oxide film 12 (film thickness 5 nm) is formed on a single crystal silicon substrate 11. Next, a tungsten nitride film 13 (film thickness: 5 nm) is deposited on the entire surface by a reactive sputtering method using a tungsten target and a mixed gas of Ar and N ₂ as a sputtering gas, and further a tungsten film 14 (film thickness) by a sputtering method. 100 nm) is deposited on the entire surface.
[0025]
When the tungsten film 14 is deposited and taken out from the reaction vessel to the atmosphere, the tungsten film 14 reacts with oxygen in the atmosphere, and as shown in FIG. 2B, the tungsten oxide layer 15 is formed on the tungsten film 14. It is formed.
[0026]
Next, as shown in FIG. 2C, the oxide layer 15 is selectively removed by immersing in, for example, an aqueous solution of hydrosulfuric acid diluted to 20%.
Then, as shown in FIG. 2D, the silicon substrate 11 is heated to a temperature of 700 to 800 ° C. in a non-oxidizing atmosphere such as hydrogen, and silane and ammonia gas are allowed to flow, and CVD is performed on the tungsten film 14. A silicon nitride film 16 is deposited by the method.
[0027]
As a result of observing the surface of the silicon nitride film 16, it was confirmed that the surface was not rough and was formed uniformly.
[Third Embodiment]
Next, an example in which the present invention is applied to formation of a gate electrode of a MOS transistor will be described.
[0028]
3 to 5 are process cross-sectional views illustrating the manufacturing process of the transistor according to the second embodiment of the present invention.
First, as in the second embodiment, a thin oxide film 11 (film thickness 5 nm), tungsten nitride film 13 (film thickness 5 nm), and tungsten film 14 (film thickness 100 nm) are formed on a substrate 11 made of P-type single crystal silicon. Are sequentially deposited on the entire surface. Then, when taken out from the reaction container and exposed to the atmosphere, as shown in FIG. 3A, the tungsten film 14 on the surface reacts with oxygen in the atmosphere to form a tungsten oxide layer 15 on the tungsten film 14. .
[0029]
Next, after the oxide layer 15 is removed by immersing it in a 10% diluted hydrosulfuric acid aqueous solution, the silicon substrate 11 is 700 700 in a non-oxidizing atmosphere such as hydrogen as shown in FIG. Heating to a temperature of ˜800 ° C., flowing silane and ammonia gas, and depositing a silicon nitride film 16 (film thickness 200 nm) on the tungsten film 14 at a substrate temperature of 700 ° C. to 800 ° C. using a CVD method. Prior to the formation of the silicon nitride film 16, the silicon nitride film 16 is uniformly formed without causing surface roughness by selectively removing the oxide layer.
[0030]
Next, a photoresist is applied on the silicon nitride film 16 to a thickness of about 1 μm by spin coating, and a resist pattern having a width of, for example, 0.15 μm is formed by exposure and development. Next, the silicon nitride film 16 is etched using the resist pattern as a mask, and then the resist pattern is removed using oxygen plasma ashing. Then, using the silicon nitride film as a mask, the tungsten film 14 and the tungsten nitride film 13 are etched to form wiring as shown in FIG.
[0031]
Next, after a predetermined region is covered with a resist mask, As is ion-implanted with an acceleration energy of 30 keV and a dose of about 5 × 10 ¹⁴ cm ⁻² , for example, to form an N ⁻ type diffusion layer 17. Then, the resist pattern is removed using oxygen plasma ashing.
[0032]
Since this oxygen plasma ashing oxidizes tungsten, a tungsten oxide layer 18 is formed on the side surface of the tungsten film as shown in FIG.
[0033]
When annealing is performed to activate the N ⁻ -type diffusion layer 17 in a state where the tungsten oxide layer 18 is formed, a phase transition occurs and needle-like crystals are formed. Therefore, as shown in FIG. 4E, similarly to the removal of the oxide layer 15 on the surface of the tungsten film, the tungsten oxide layer 18 on the side surface of the tungsten film 14 is selectively removed by dipping in dilute sulfuric acid. Then, a short heat treatment (RTP) at 950 ° C. for 30 seconds is performed in a non-oxidizing atmosphere such as nitrogen or hydrogen to activate the N ⁻ -type diffusion layer 17.
[0034]
Next, the silicon substrate 11 is heated to 700 to 800 ° C. in a non-oxidizing atmosphere such as hydrogen, and silane and ammonia gas are flowed to deposit the silicon nitride film 20 on the surface of the silicon substrate 11 including the silicon nitride film 16. Thereafter (FIG. 4F), the silicon nitride film 20 is etched to form a structure in which the gate electrode made of the tungsten film 14 and the tungsten nitride film 13 is surrounded by the silicon nitride films 16 and 20 (FIG. g)).
[0035]
Next, as shown in FIG. 5H, As ions are implanted at an acceleration voltage of 60 KeV and a dose of about 7 × 10 ¹⁶ cm ⁻² to form an N ⁺ -type diffusion layer 21. Finally, annealing is performed to activate the N ⁺ -type region 21, thereby forming an LDD transistor.
[0036]
Next, the silicon substrate 11 is heated to 700 to 800 ° C. in a non-oxidizing atmosphere such as hydrogen, and silane and ammonia gas are flowed to deposit a silicon nitride film 22 on the entire surface. Then, a resist pattern having an opening is formed on the tungsten film 14, and the silicon nitride film 22 is etched using the RIE method, thereby forming a contact hole 23 connected to the tungsten film 14. Then, the resist pattern is removed by plasma ashing. During the plasma ashing, the tungsten film 14 is oxidized, and a tungsten oxide layer 24 is formed on the tungsten film 14 (FIG. 5I).
[0037]
Next, the tungsten oxide layer 24 is removed by dipping in diluted sulfuric acid. Then, the silicon substrate 11 is heated to 700 to 800 ° C. in a non-oxidizing atmosphere such as hydrogen, silane gas is flown, and the polysilicon film 25 is deposited on the entire surface by the CVD method, and then the silicon nitride film is used by the CMP method. The polysilicon film 25 on 22 is removed, and a polysilicon film 25 is embedded in the contact hole 23 (FIG. 5J).
[0038]
As described above, by removing the oxide layer on the surface and side surfaces of the gate electrode and then performing film formation and annealing, no acicular oxide is formed and the shape of the gate electrode does not change.
[0039]
In the present embodiment, RTP is performed immediately after forming the N ⁻ type diffusion layer 17 to be electrically activated. However, activation is not performed immediately after ion implantation, and after the N ⁺ type diffusion layer is formed. Both diffusion layers may be activated. However, since the substrate is heated to 600 ° C. or higher when forming the silicon nitride film on the side wall of the gate electrode after the N ⁻ -type diffusion layer 17 is formed, the oxide layer 18 on the side surface of the tungsten film 14 is also removed in this case. There is a need to.
[0040]
[Fourth Embodiment]
Next, an example in which the present invention is applied to the formation of a complementary MOSFET (CMOSFET) will be described.
[0041]
6 to 10 are process cross-sectional views illustrating a method of manufacturing a CMOSFET according to the fourth embodiment of the present invention.
First, a resist pattern is formed in a predetermined region on the surface of the silicon substrate 30 by using a photolithography technique. Then, B, Ga, or In is ion-implanted into the silicon substrate 30 using the resist pattern as a mask to form a P well region 31. Then, a resist pattern is formed on the surface of the silicon substrate 30 in a predetermined region, and As, P, or Sb is ion-implanted into the silicon substrate 30 using the resist pattern as a mask to form an N well region 32. Thereafter, annealing is performed to activate a P well region 31 and an N well region 32 having a depth of about 1 μm on the surface of the substrate 30 as shown in FIG.
[0042]
Next, as shown in FIG. 6B, an oxide film 33 having a thickness of about 600 nm is formed at the boundary between the P well region 31 and the N well region 32 of the silicon substrate 30 to form an element isolation region.
[0043]
Next, a protective oxide film having a thickness of about 10 nm is formed on the surface of the P well region 31 and the N well region 32. Then, ion implantation for adjusting to the threshold value of the transistor is performed. Next, the protective oxide film is peeled off, and a gate oxide film 34 having a thickness of about several tens of nm is formed on the surfaces of the P well region 31 and the N well region 32 as shown in FIG.
[0044]
Next, as shown in FIG. 7D, a polycrystalline silicon film 35 is formed on the entire surface. Then, a resist pattern is formed on the N well region 32 using a photolithography method, and B, Ga, or In is implanted into the polycrystalline silicon film 35 in the P well region 31 using this resist pattern as a mask. Similarly, a resist pattern is formed on the P well region 31, and As, P, or Sb is ion-implanted into the polycrystalline silicon 35 in the N well region 32.
[0045]
Next, as shown in FIG. 7E, a WSi _x N _y film 36 having a thickness of about 1 nm is deposited on the polycrystalline silicon film 35 by performing reactive sputtering using a WSi _x target and an Ar + N ₂ atmosphere. To do. The WSi _x N _y film 36 has an effect of suppressing diffusion of impurities doped in the P well and N well regions 31 and 32 into a W film to be formed later. Note that the WSi _x N _y film 36 can be formed using a CVD method or the like in addition to the above-described film formation by sputtering.
[0046]
Next, a W film 37 having a thickness of about 100 nm is formed on the WSi _x N _y film 36 by a sputtering method using a W target and an Ar atmosphere, a CVD method, or the like. After the tungsten film 37 is formed, the tungsten film 37 is removed from the film forming apparatus and exposed to the atmosphere, whereby the tungsten film 37 reacts with oxygen in the atmosphere to form a tungsten oxide layer 38 of about 1 nm as shown in FIG. Is done.
[0047]
Next, as shown in FIG. 8G, the tungsten oxide layer 38 is selectively removed using a chemical mechanical polishing method. Here, as the polishing liquid (slurry) used in the chemical mechanical polishing, a polishing liquid containing a chemical liquid that reacts with tungsten oxide to generate tungstic acid hydrate (WO ₃ .H ₂ O) is used. Examples of such chemicals include sulfuric acid and hydrofluoric acid. In addition to the CMP method, the tungsten oxide layer can be removed by etching such as CDE (Chemical Dry Etching) or RIE (Reactive Ion Etching). In addition, as in the first, second, and third embodiments, it is also possible to use wet etching that is removed using dilute sulfuric acid.
[0048]
When left for 24 hours or longer after the removal of the oxide layer 38, a sufficient amount of a natural oxide film is formed on the tungsten film 37 again. Therefore, within a few hours after the removal of the oxide layer 38, as shown in FIG. 8 (h), the silicon substrate 30 is heated to about 800 ° C. in a non-oxidizing atmosphere such as hydrogen, and silane and ammonia gas are allowed to flow. Then, a silicon nitride film 39 having a thickness of about 250 nm is deposited on the tungsten film 37 by the CVD method. The deposition temperature of the silicon nitride film 39 is about 800 ° C., but since the tungsten oxide layer on the tungsten film 37 has been removed, acicular crystals do not grow.
[0049]
Next, as shown in FIG. 8I, a resist pattern 40 is formed in the shape of a desired gate electrode or gate wiring by using a photolithography technique. Next, the silicon nitride film 39 is patterned by RIE using the resist pattern pattern 40 as a mask. Next, the resist pattern 40 is removed using an asher, and the tungsten film 37, the WSi _x N _y film 36 and the polycrystalline silicon film 35 are etched using the RIE method using the silicon nitride film 39 as a mask, and FIG. A gate electrode or wiring as shown in FIG. Here, the natural oxide film 41 exists on the side surface of the tungsten film 37.
[0050]
Next, as shown in FIG. 9K, the natural oxide film 41 is selectively removed by immersing in dilute sulfuric acid. Immediately after removal of the native oxide film, N _2, H _2, H at ₂ O, H ₂ and H polycrystalline silicon film 35 by performing the annealing at about 800 ° C. 60 minutes in an atmosphere having a controlled partial pressure ratio of between ₂ O Is selectively oxidized to form silicon oxide 42. This selective oxidation process is to oxidize only the polycrystalline silicon film 35 without oxidizing the tungsten film 37, thereby relaxing the electric field concentration and damage at the gate end and improving the reliability.
[0051]
Next, a resist pattern is formed on the P-well region 31 using a photolithographic technique, and As is ionized in the N-well region 32 with an acceleration voltage of 20 KeV and a dose of about 5 × 10 ⁻² cm ⁻² using the resist pattern as a mask. Implantation is performed to form a P ⁻ -type diffusion layer 43 as shown in FIG. After removing the resist pattern in the P-well region 31 using an oxygen asher, a resist pattern is similarly formed in the N-well region 32. Using the resist pattern as a mask, an acceleration voltage of 20 KeV and a dose of 5 × 10 ¹⁴ are applied to the P-well region 31. BF ₂ ions are implanted at about cm ⁻² to form the N ⁻ -type region 44. Then, the resist pattern on the N well region 32 is removed using an oxygen asher. When the resist is removed by the oxygen asher, a tungsten oxide layer is formed on the side surface of the tungsten film. Therefore, the tungsten oxide layer is selectively removed by immersing in dilute sulfuric acid.
[0052]
Next, after heating the silicon substrate to 800 ° C. in a non-oxidizing atmosphere such as hydrogen and flowing silane and ammonia gas, a silicon nitride film having a thickness of about 6 nm is deposited on the entire surface of the silicon substrate by the CVD method. Etching is performed using the RIE method to obtain a structure in which a silicon nitride film 45 is formed on the gate sidewall as shown in FIG. Next, as shown in FIG. 10 (n), a resist pattern is formed on the P-well region 31 using a photolithography technique, and an acceleration voltage of 60 KeV and a dose of 7 × 10 are applied to the N-well region 32 using the resist pattern as a mask. As ions are implanted at about ¹⁶ cm ⁻² to form a P ⁺ -type region 46. Similarly, a resist pattern is formed in the N well region 32, and ion implantation of about BF ₂ 60 KeV, 6 × 10 ¹⁵ cm ⁻² is performed in the P well region 31 using the resist pattern as a mask to form an N ⁺ type region 47. Finally, the P ⁻ type region 43, the N ⁻ type region 44, the P ⁺ type region 46 and the N ⁺ type region 47 are activated by annealing.
[0053]
Thereafter, an interlayer insulating film and wiring are formed by a normal method, and a CMOSFET is formed.
As described above, no acicular product is generated during the high-temperature heat treatment, and the gate electrode maintains its original form, so that a CMOSFET having a highly reliable low-resistance gate electrode can be obtained.
[0054]
The present invention is not limited to the above embodiment. For example, as the refractory metal, molybdenum (Mo), titanium (Ti), platinum (Pt), or an alloy of these metals can be used in addition to tungsten. In addition to oxides, these metals can be removed from carbides or borides.
[0055]
It can also be used for metal wiring layers other than the gate electrode.
In addition, the silicon nitride film formed by CVD is exemplified as the film formation on the refractory metal film, but a silicon film, a titanium nitride film, or a tungsten film may be formed.
In addition, the present invention can be variously modified and implemented without departing from the scope of the invention.
[0056]
【The invention's effect】
As described above, according to the present invention, after removing the oxide film formed on the surface of the refractory metal film in advance, the surface morphology is not deteriorated by heating, and a highly reliable semiconductor device is obtained. Can be provided.
[Brief description of the drawings]
FIG. 1 is a characteristic diagram illustrating the effect of etching according to a first embodiment.
FIG. 2 is a process cross-sectional view showing a manufacturing process according to a second embodiment.
FIG. 3 is a process cross-sectional view showing a manufacturing process of a MOS transistor according to a third embodiment.
FIG. 4 is a process cross-sectional view illustrating a manufacturing process of a MOS transistor according to a third embodiment.
FIG. 5 is a process cross-sectional view illustrating a manufacturing process of a MOS transistor according to a third embodiment.
FIG. 6 is a process sectional view showing a manufacturing process of a CMOSFET according to a fourth embodiment.
FIG. 7 is a process cross-sectional view illustrating a manufacturing process of a CMOSFET according to a fourth embodiment.
FIG. 8 is a process sectional view showing a manufacturing process of a CMOSFET according to a fourth embodiment.
FIG. 9 is a process sectional view showing a manufacturing process of the CMOSFET according to the fourth embodiment.
FIG. 10 is a process sectional view showing a manufacturing process of a CMOSFET according to a fourth embodiment.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 11 ... Single crystal silicon substrate 12 ... Oxide film 13 ... Tungsten nitride film 14 ... Tungsten film (refractory metal film)
15 ... tungsten oxide layer 16 ... silicon nitride film 17 ... N ^- -type diffusion layer 18 ... tungsten oxide layer 20 ... silicon nitride film 21 ... N ⁺ -type diffusion layer 22 ... silicon nitride film 23 ... contact hole 24 ... tungsten oxide Layer 25 ... Polysilicon film 30 ... Silicon substrate 31 ... P well region 32 ... N well region 33 ... Oxide film 34 ... Gate oxide film 35 ... Polycrystalline silicon film 36 ... WSi _x N _y film 37 ... Tungsten film 38 ... Tungsten oxide object layer 39 ... silicon nitride film 40 ... resist pattern 41 ... tungsten oxide layer 42 ... silicon oxide 43 ... P ^- -type region 44 ... N ^- -type region 45 ... silicon nitride film 46 ... P ⁺ -type region 47 ... N ⁺ -type region

Claims (7)

In a method for manufacturing a semiconductor device including a step of heat-treating a refractory metal film to 600 ° C. or higher,
A method of manufacturing a semiconductor device, wherein after the oxide layer formed on the surface of the refractory metal film is removed, the heat treatment is performed in a non-oxidizing atmosphere. A removal step of removing the oxide layer formed on the surface of the refractory metal film on the semiconductor substrate;
And heating the semiconductor substrate to 600 ° C. or higher to form a film on the refractory metal film. The method for manufacturing a semiconductor device according to claim 2, wherein a conductive film or an insulating film is formed in the film formation. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the step of removing the oxide is immersed in a solution for forming a hydrate of the oxide layer. 5. The method of manufacturing a semiconductor device according to claim 4, wherein the solution is a solution containing hydrosulfuric acid, hydrofluoric acid, hydrochloric acid, ammonia, or choline. 3. The semiconductor device according to claim 1, wherein the step of removing the oxide is performed by a chemical mechanical polishing method using a polishing liquid that reacts with the oxide layer to form a hydrate. Production method. 7. The method of manufacturing a semiconductor device according to claim 6, wherein the polishing liquid is a solution containing dilute sulfuric acid, dilute hydrofluoric acid, or dilute nitric acid.

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