JP3648551B2 - Superconducting pulse generator - Google Patents

Description

同じＩｏをもつ素子を複数個、直列に接続してインダクタンスを含まない超伝導ループを形成するとき、ループに流れる電流により、各素子の位相差の総和が±2πをこえると、このループ内に永久電流が生じる。永久電流の生じる素子数の理論的限界は前式より４であるが、このときは永久電流値と各素子のＩｏが同じになり、素子のスイッチ条件と重複するため実現不可能である。また、各素子のＩｏが異なるときには最小のＩｏを持つ素子以外の素子は±π／２を越えることができないため素子数は４より大きくなる。そのため、ループ内に含まれるジョセフソン接合素子の総数は５以上となり、それゆえ、Ｊ１とＪ２を除く素子数は３以上となる。
このように、図１の回路は、従来例として示した前記図８のインダクタンスＬの代わりにｎ（任意数）個のジョセフソン素子Ｊ３．１、Ｊ３．２、Ｊ３．３、・・、Ｊ３．ｎを接続した点に特徴がある。
【００１０】
図１における超伝導ループはＪ１とＪ２およびｎ個のジョセフソン素子Ｊ３で構成される。このジョセフソン素子Ｊ３のジョセフソン臨界電流値Ｉｏ３と、ジョセフソン素子Ｊ１およびＪ２のジョセフソン臨界電流値Ｉｏ１、Ｉｏ２の関係は、Ｉｏ３＞Ｉｏ１、Ｉｏ３＞Ｉｏ２の関係に設定する。
次に、この電流の関係において、「＞」が成り立つ理由を説明する。
図１の超伝導ループ内のフラクソイドの量子化条件は、外部からの電流注入が無い条件（Ｉｉｎ＝０， Ｉｂ＝０）で、成立しないことが求められる。これを式で示すと
【式２】

これをループに流れる電流Ieで表記すると
【式３】

となる。
【００１１】
各位相差の値は±π／２までの範囲をとることができるため、ｎが３以上で、各素子のジョセフソン臨界電流値が等しいときには式２を満足しない条件が存在する。この状態は外部注入電流が無い状態でループ内に０，±１、±２、…、のフラクソイドによるモードができることを意味する。本発明の回路では外部注入電流の存在によりフラクソイド量子化が達成され、注入電流の制御によってフラクソイド量子化のリセットを行うことを前提にしているので式２の条件をｎが３以上で達成する必要がある。式２を書き換えた式３を達成するのに素子のジョセフソン臨界電流を異なる値に設定することが有効であることがわかる。超伝導ループに流れる電流は、外部注入電流が無いときには、周回電流のみになり、この電流の最大値はループに含まれるジョセフソン接合素子のなかで最も小さなジョセフソン臨界電流値で制限される。たとえば、Ｉｏ３をＩｏ１、Ｉｏ２の二倍に設定するとＩｅの最大値はＩｏ１（＝Ｉｏ２）となりこのとき式２の左辺は
【式４】

となり、ｎ＝３のとき、３π／２となり、式２の条件を満たす。
本発明ではＳＦＱパルスの発生をＪ１とＪ２のスイッチによって達成するため、これらの素子のジョセフソン臨界電流はＪ３より小さく、かつ、同じ程度の値にあることが望ましい。Ｊ１とＪ２のジョセフソン臨界電流値が異なると動作マージンが低下する。
【００１２】
図１に戻って説明する。図１の回路は、ジョセフソン素子回路中で、スイッチング動作させる素子とこの素子より大きなジョセフソン臨界電流を持つジョセフソン素子を複数個直列に接続したエレメント（ｎ個のジョセフソン素子Ｊ３．１、Ｊ３．２、Ｊ３．３、・・、Ｊ３．ｎ）をインダクタンスとして機能させることを特徴とする。
ジョセフソン接合素子は以下のジョセフソン方程式にしたがって動作する。
【式５】

【式６】

ここで、Ｉは素子に流れる電流、Ｉｏは素子のジョセフソン臨界電流、φは素子の位相差、Ｖは素子に発生する電圧、Φｏは磁束量子（２．０７×１０^−１５Ｗｂ）である。これらの式にインダクタンスによる電圧の発生関係式 Ｖ＝Ｌ・ｄＩ／ｄｔをあてはめて等価的なインダクタンスを求めると、電流が０の条件で
【式７】

が算出される。この値は、ジョセフソン接合素子に流れる電流がＩｏ近傍になると増加するため厳密には一定値のインダクタンスとしては扱えないが、上述の値を目安とすることはできる。
【００１３】
Ｌの値は、例えば、Ｌ＝０．３３〔［ｐＡ・ｍＡ］／ Ｉｏ〕とする。
このように、ジョセフソン臨界電流の異なる複数のジョセフソン素子によりインダクタンスを構成したので、従来の幾何学的形状に依存するインダクタンスを排除し、小型、高速、高信頼性のジョセフソン集積回路とすることができる。
【００１４】
図１および図２の本発明の回路図に基づき、パルス発生動作を以下に説明する。
図２は図１の回路における電流の流れる向きを矢印で示した図である。
この回路では、ジョセフソン素子Ｊ１，Ｊ２およびｎ個のＪ３が一つの超伝導ループを形成し、それぞれのジョセフソン素子に流れる電流をＩ１、Ｉ２、Ｉ３とし、それぞれの電流の符号を矢印方向に正とすると、
【式８】

Ｉｏ１、Ｉｏ２、Ｉｏ３はそれぞれの素子のジョセフソン臨界電流値、θ１、θ２、θ３は素子の位相差を表す。
二つの超伝導体を極めて薄い絶縁層で隔てた構造のジョセフソン接合素子では、これらの超伝導電極間に電圧の発生無し（超伝導対中では電界ガ発生しないので、一般的な電界によるオームの法則は成り立たない）で超伝導電流が流れる。この電流の大きさは二つの超伝導電極のそれぞれが持つ位相の差によって決定される。
【００１５】
また、バイアス電流Ｉｂと入力電流Ｉｉｎの電流はそれぞれ
【式９】

で表記される。各素子のスイッチング条件は位相差がπ／２を越えたときとする。但し、図２の回路では、電流Ｉ１は入力電流Ｉｉｎのうちジョセフソン素子Ｊ１を流れる電流であり、電流Ｉ２は入力電流Ｉｉｎのうちジョセフソン素子Ｊ２を流れる電流であり、電流Ｉ３は入力電流Ｉｉｎのうちジョセフソン素子Ｊ３を流れる電流であり、この回路の場合、Ｉ１＝Ｉ２と設定されている。
また、図２の回路では、バイアス電源から供給されるバイアス電流Ｉｂは、ジョセフソン素子Ｊ１に流れる電流Ｉｂ２と、ジョセフソン素子Ｊ２およびＪ３に流れる電流Ｉｂ１に分流する。
【００１６】
同回路にバイアス電流Ｉｂを流すと図２に示すようにジョセフソン素子Ｊ２、Ｊ３を含むブランチ（分岐回路）とジョセフソン素子Ｊ１のブランチに電流が分流する。また、入力電流Ｉｉｎを増加させていくと、ジョセフソン素子Ｊ１のブランチとジョセフソン素子Ｊ２およびＪ３のブランチに分流し、
入力電流Ｉｉｎとバイアス電流Ｉｂ２が合成されるジョセフソン素子Ｊ１が最初にスイッチする。このとき、入力電流Ｉｉｎとバイアス電流Ｉｂおよび超伝導ループの周回電流Ｉｅによって超伝導ループ内の磁束量子化条件が次式を満たすと、図３（図２に超伝導永久電流Ｉｅを書き足した図）に示すように超伝導永久電流Ｉｅが発生する。
【式１０】

このとき、超伝導ループは磁束を持たない状態（０）から1個の磁束が捕獲された状態（１）に遷移し、ジョセフソン素子Ｊ1の両端に数ピコ秒の超高速磁束量子パルスが発生し、出力端子ＯｕｔにＰ１を出力する。
【００１７】
図４は図１の回路における図３の後の動作を説明する動作説明図である。
超高速磁束量子パルスＰ１を出力した後、入力電流Ｉｉｎを減少させていくと、周回電流Ｉｅとバイアス電流Ｉｂがジョセフソン素子Ｊ２に重畳して流れるようになり、電流がＩｏ２を越えると
ジョセフソン素子Ｊ２がスイッチングする。このとき、捕獲された磁束量子が開放されてジョセフソンＪ２の両端にＪ1のときと同様に超高速磁束量子パルスが発生するが、グランドから孤立しているため、出力端子には大きく影響しない。この結果、外部からゆっくりとした周期で与える入力電流Ｉｉｎパルス信号に対応するピコ秒レベルの超高速磁束量子パルスを発生させることができる。
【００１８】
次に、前記動作をバイアス電流Ｉｂと入力電流Ｉｉｎのしきい値特性から、説明する。
以下に示す具体的な回路パラメータの回路におけるパルス発生条件を図５および図６に示す。Ｉｏ３＝３Ｉｏ１、Ｉｏ１＝Ｉｏ２、ｎ＝６のパルス発生回路のバイアス電流Ｉｂおよび入力電流Ｉｉｎについてのしきい値特性を図５に示す。同図において、点線により略菱形に示されている（１）、（０）、（−１）と表記されている特性は、それぞれ本回路の超伝導ループに磁束量子が＋１個、無し（０）、−１個捕獲されているときのモードを示す。横軸はバイアス電流値ＩｂとジョセフソンＪ１のブランチに流れる入力電流値Ｉｏの比を表し、縦軸は入力電流値ＩｉｎとジョセフソンＪ１のブランチに流れる入力電流値Ｉｏの比を表わす。
図５中、各モードの重なった領域ではＩｂとＩｉｎの電流軌跡の履歴によりどちらかのモードが決定される。たとえば、最初、ＩｂとＩｉｎがともに０（原点）にあり、その後、（０）の略菱形の点線で示された領域内では、どのようにＩｂとＩｉｎによる電流軌跡を描かせても、超伝導ループ内に磁束は捕獲されない。その結果、（１）や（−１）の領域との重なった領域でも（０）のモードになる。しかし、たとえば、（０）の境界をこえて、（１）の略菱形領域に一度入ると、超伝導ループに磁束が捕獲されるため、この後、（０）と重なる領域でも（１）のモードとなる。捕獲された磁束は（１）の略菱形領域から（０）の略菱形領域へ電流軌跡を移動させることでリセットできる。
【００１９】
この回路で一つの入力パルスに対応する一つの磁束量子パルスを発生させる方法を次に示す。
図６において、最初、この回路はモード（０）で、任意の値のバイアス電流Ｉｂ（この実施例の場合、Ｉｂ／Ｉｏが０．５）が流れている状態にある。ここで、入力電流Ｉｉｎをゼロから増加させると、モード（０）のしきい値をＡ点で越えるため、磁束量子パルスを生成してモード（１）に入る。この後、Ｉｉｎを減少させるとＢ点でモード（１）のしきい値を越えてモード（０）に戻る。
図７は計算機シミュレーションで上記図１の回路について動作確認を行った特性図である。図中、横軸Ｔ（ｓ）はナノ秒（ｎｓ）を表し、縦軸はマイクロアンペア（μＡ）を表す。
【００２０】
Ｉｏ１＝Ｉｏ２＝Ｉｏ３／３＝０．２ （ｍＡ）、ｎ＝６の回路条件で、Ｉｂ＝０．１ （ｍＡ）を流した状態で、立ち上がり、立ち下がり時間：３００ （ｐｓ）、周期：２ （ｎｓ）の入力電流パルスを与えた。同図の出力結果から、入力電流の立ち上がり時にピコ秒幅の超高速磁束量子パルスが発生していることがわかる。同図最下段図は入力電流Ｉｉｎの波形を示す。４００μＡの入力電流パルス（立ち上がり、立ち下がり時間：３００（ｐｓ）、周期：２（ｎｓ））が見られる。同図中段図はバイアス電流Ｉｂの電流波形である。最初に１００μＡの電流が１５０（ｐｓ）の立ち上がりで与えられている。同図最上段図は本発明回路の出力電流波形を示す。Ｉｉｎの立ち上がり時に（０）から（１）のモードに遷移したことによる約２００μＡの磁束量子パルスが発生している。また、立ち下がり時には（１）から（０）へのモード遷移に伴うパルスが生じるが、小さくなっていることがわかる。
【００２１】
【発明の効果】
本発明によれば従来のジョセフソン素子回路で用いられていた幾何学的形状依存性を持つインダクタンスを排除できることから、小型、高速、高信頼性のジョセフソン素子集積回路を提供できる。従来のこの種の回路において回路の磁束の捕獲条件にインダクタンス（Ｌ）とジョセフソン臨界電流値（Ｉｏ）の積が磁束量子（２．０７×１０^−１５）をもつことが必須であるため、回路寸法を小さくしようとしてインダクタンスを小さくすると、ジョセフソン接合素子の臨界電流を大きくする必要が生じ、任意性のある回路設計が不可能であった。本発明の回路の磁束の捕獲条件は定義でも明らかなように、ジョセフソン接合素子の臨界電流値の比のみで決定されることから、回路設計時に電流やインダクタンスなどの絶対値を考慮する必要がなくなり、その結果、回路の動作電流値を任意に設定でき、設計に大きな自由度を与えることを可能にする。
【図面の簡単な説明】
【図１】 本発明のパルス発生器の回路図である。
【図２】 図１の回路における最初の状態を説明する動作説明図である。
【図３】 図１の回路における図２の続きを説明する動作説明図である。
【図４】 図１の回路における図３の続きを説明する動作説明図である。
【図５】 本発明の回路のしきい値特性図である。
【図６】 図５の回路の動作説明図である。
【図７】 図１の回路のコンピュータシミュレーションによる回路動作検証図である。
【図８】 従来のパルス発生器の回路図である。
【符号の説明】
Ｊ１、Ｊ２、Ｊ３、Ｊ３．１、Ｊ３．２、Ｊ３．３、・・、Ｊ３．ｎ ジョセフソン素子
Ｉｉｎ 入力電流
Ｉｎ 入力（端子）
Ｏｕｔ 出力（端子）
Ｂｉａｓ バイアス電源
Ｉｂ バイアス電流[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a superconducting logic circuit, and more particularly to a superconducting pulse generation circuit composed of Josephson junction elements.
[0002]
[Prior art]
Superconducting logic gates can be easily switched at ultra-high speeds in the picosecond order with extremely small power consumption in the nanowatt order, and are expected to be applied to next-generation high-performance computers. In recent years, a logic gate (RSFQ: Rapid Single Flux Quantum) that makes a single flux quantum correspond to 1/0 of information has been proposed, and an ultra-high-speed logic operation of 700 GHz has been demonstrated in an integrated circuit using this element. Expectations are growing for applications in the information and communication field. However, this gate circuit has a structure in which a Josephson element and a superconducting loop including an inductance are continuously connected directly. 1) It is difficult to design a broadband circuit because the current flowing through the inductance is frequency-dependent. 2) Inductance requires physical dimensions and is difficult to miniaturize. 3) Since element circuits are connected by inductance, current separation between circuits is difficult, and circuit design is difficult. A lot of research is underway to solve this problem. The present invention has been made to provide a new logic gate configuration method for solving this problem. According to the present invention, it is possible to reduce the size of the circuit because it is possible to eliminate the conventional inductance having a finite size, and it is expected that the frequency dependency based on the inductance can be further increased.
[0003]
Josephson logic circuits are expected to be applied to next-generation ultra-high-speed digital operations because they have the feature that ultra-high-speed logic operations can be performed with low power consumption. This circuit uses a superconducting phenomenon and operates only in a cryogenic environment. However, in such a cryogenic environment, noise caused by thermal fluctuation is reduced and the signal amplitude can be reduced. Electric power can also be reduced.
The ultimate integrated circuit clock frequency is determined by the time that the electrical signal propagates through the circuit. The speed of signal transmission is limited by the speed of light, and is about 1/3 of the speed of light even in a superconducting microstrip line that can form an ideal transmission line. From this, the dimension L of a superconducting digital integrated circuit operating at a clock frequency of F can be approximated by L = C / 3F (where C = light velocity).
At a clock frequency of 100 GHz, this value is about 1 cm, and the critical path of the system (the signal path that causes the maximum delay in a circuit that completes operation in one clock time) needs to be less than this. Therefore, it is extremely important to reduce the size of the circuit in a high-speed digital system.
[0004]
A conventional circuit of this kind consists of an inductance and a Josephson junction element. Therefore, it is necessary to properly match the Josephson critical current and inductance values of the elements as parameters, and the inductance has characteristic values that depend on geometric dimensions, so that miniaturization and reliability can be improved. It was difficult.
FIG. 8 is a schematic diagram of a conventionally proposed magnetic flux quantum direct current / pulse generation circuit (dc / rsfq). In the circuit shown in the figure, a Josephson element J2 is connected between an input terminal In (Iin) and an output terminal Out, and an inductance L made of a superconducting material is connected between the input side of the Josephson element J2 and the ground. A circuit is constructed in which the Josephson element J1 is connected between the output side of the Josephson element J2 and the ground, and a bias power supply (Bias (Ib)) is connected to the output side of the Josephson element J2.
When two Josephson elements J1 and J2 and one inductance L form a superconducting loop and one magnetic flux Φo is generated by superimposing a bias current and an input current in this loop, one magnetic flux quantum pulse is output. Will occur.
[0005]
[Problems to be solved by the invention]
In the conventional example, the superconducting loop of the magnetic flux quantum direct current / pulse generation circuit is composed of a Josephson element and an inductance. The characteristics of the Josephson element do not have dimensional dependence in principle, but since the inductance is a parameter depending on the geometric shape, it is difficult to reduce the characteristic even by fine processing of the integrated circuit technology. In addition, since there are two parameters for determining the circuit characteristics, the Josephson element and the inductance, the two parameters have a problem of reducing the yield of non-defective products in the manufacturing process of the integrated circuit.
In view of the above problems, an object of the present invention is to provide a superconducting pulse generation circuit with improved yield in the manufacture of integrated circuits.
[0006]
[Means for Solving the Problems]
The present invention employs the following solutions in order to achieve the above object.
(1) In a superconducting pulse generation circuit, at least five or more Josephson junction elements are connected in series so as to form one superconducting loop, one earth terminal is provided in the loop, and counted from the earth terminal. An input signal terminal is provided in the loop between the second Josephson junction element (J2) and the remaining Josephson junction elements, and 1 second from the second Josephson junction element (J2) and the ground terminal. A bias power source is connected to the loop between the first Josephson junction elements (J1) and an output terminal is provided.
(2) In the superconducting pulse generation circuit described in (1) above, Josephson critical current values Io1 and Io2 of the first Josephson junction element (J1) and the second Josephson junction element (J2). And the Josephson critical current value Io3 of the other Josephson junction elements excluding the first and second Josephson junction elements of the loop are set in a relationship of Io3 ≧ Io1 and Io3 ≧ Io2. .
[0007]
(3) In the superconducting pulse generation circuit according to (1) or (2), a current source for inputting a pulse current is connected to the input signal terminal.
(4) In the superconducting pulse generation circuit according to any one of (1) to (3), the remaining Josephson junction element functions as an inductance.
According to the present invention, a superconducting pulse generation circuit is configured by only a Josephson element without the conventional inductance.
Thus, since the parameter for determining the circuit characteristics can be only the Josephson element, it is possible to contribute to the high speed and high reliability of the integrated circuit.
In addition, by connecting multiple Josephson elements with different Josephson critical currents in a loop shape to form an inductance, inductance that depends on the conventional geometrical shape is eliminated, and it is super small, fast, and highly reliable. A conduction pulse generation circuit can be provided.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
(Example)
FIG. 1 shows a circuit diagram of the present invention.
In the circuit shown in the figure, a Josephson element J2 is connected between an input terminal In (Iin) and an output terminal Out, and n (an arbitrary number of 3 or more) elements are connected between the input side of the Josephson element J2 and the ground. Josephson elements J3.1, J3.2, J3.3,. n (hereinafter collectively referred to as “J.3”) are connected in series, the Josephson element J1 is connected between the output side of the Josephson element J2 and the ground, and the output of the Josephson element J2 A circuit having a bias power supply (Bias (Ib)) connected to the side is formed.
The reason why the number n of Josephson junction elements provided between the input side of the Josephson element J2 and the ground is an arbitrary number of 3 or more is as follows. In other words, this circuit utilizes the fact that a single flux quantum is captured in a superconducting line loop that does not include inductance and includes only a Josephson junction element (fluxoid), and based on this, a permanent current is generated in the loop. ing. Therefore, the capture condition is determined as follows according to the number of Josephson junction elements included in the superconducting loop.
[0009]
A Josephson junction element having the maximum critical Josephson current (Io) generates a phase difference [θ] due to a current (Is) flowing through the element.
[Formula 1]

When multiple elements with the same Io are connected in series to form a superconducting loop that does not include inductance, if the total phase difference of each element exceeds ± 2π due to the current flowing in the loop, Permanent current is generated. The theoretical limit of the number of elements in which a permanent current is generated is 4 from the previous formula. At this time, the permanent current value and Io of each element become the same, and this is not possible because it overlaps with the switch condition of the element. Further, when the Io of each element is different, the elements other than the element having the minimum Io cannot exceed ± π / 2, and the number of elements becomes larger than four. Therefore, the total number of Josephson junction elements included in the loop is 5 or more, and therefore the number of elements excluding J1 and J2 is 3 or more.
As described above, the circuit of FIG. 1 has n (arbitrary number) Josephson elements J3.1, J3.2, J3.3,..., J3 instead of the inductance L of FIG. . It is characterized in that n is connected.
[0010]
The superconducting loop in FIG. 1 is composed of J1 and J2 and n Josephson elements J3. The relationship between the Josephson critical current value Io3 of the Josephson element J3 and the Josephson critical current values Io1 and Io2 of the Josephson elements J1 and J2 is set to the relationship of Io3> Io1 and Io3> Io2.
Next, the reason why “>” is established in this current relationship will be described.
The quantization condition of the fluxoid in the superconducting loop of FIG. 1 is required not to be satisfied under the condition that there is no external current injection (Iin = 0, Ib = 0). This can be represented by the following formula:

When this is expressed as current Ie flowing in the loop, [Equation 3]

It becomes.
[0011]
Since the value of each phase difference can take a range up to ± π / 2, there is a condition that does not satisfy Expression 2 when n is 3 or more and the Josephson critical current values of the respective elements are equal. This state means that a mode with a fluxoid of 0, ± 1, ± 2,... Can be formed in the loop without any external injection current. In the circuit of the present invention, it is assumed that the fluxoid quantization is achieved by the presence of the external injection current, and the reset of the fluxoid quantization is performed by controlling the injection current. Therefore, it is necessary to satisfy the condition of Equation 2 when n is 3 or more. There is. It can be seen that it is effective to set the Josephson critical current of the element to a different value in order to achieve Equation 3 in which Equation 2 is rewritten. When there is no external injection current, the current flowing in the superconducting loop is only a circular current, and the maximum value of this current is limited by the smallest Josephson critical current value among the Josephson junction elements included in the loop. For example, if Io3 is set to twice Io1 and Io2, the maximum value of Ie is Io1 (= Io2), and the left side of Equation 2 is

Thus, when n = 3, 3π / 2 is satisfied and the condition of Expression 2 is satisfied.
In the present invention, the SFQ pulse is generated by the switches J1 and J2, so that the Josephson critical current of these elements is preferably smaller than J3 and at the same level. When the Josephson critical current values of J1 and J2 are different, the operation margin is lowered.
[0012]
Returning to FIG. The circuit of FIG. 1 is an element in which a switching operation element and a plurality of Josephson elements having a Josephson critical current larger than this element are connected in series (n Josephson elements J3.1, J3.2, J3.3,..., J3.n) function as inductances.
The Josephson junction element operates according to the following Josephson equation.
[Formula 5]

[Formula 6]

Here, I is a current flowing through the element, Io is a Josephson critical current of the element, φ is a phase difference of the element, V is a voltage generated in the element, and Φo is a magnetic flux quantum (2.07 × 10 ⁻¹⁵ Wb). . By applying the equation for voltage generation due to inductance to these equations V = L · dI / dt, the equivalent inductance is obtained.

Is calculated. Strictly speaking, this value cannot be treated as a constant value of inductance because the current flowing in the Josephson junction element increases when it is in the vicinity of Io, but the above value can be used as a guide.
[0013]
The value of L is, for example, L = 0.33 [[pA · mA] / Io].
As described above, since the inductance is constituted by a plurality of Josephson elements having different Josephson critical currents, the inductance dependent on the conventional geometric shape is eliminated, and a small, high-speed and high-reliability Josephson integrated circuit is obtained. be able to.
[0014]
Based on the circuit diagrams of the present invention shown in FIGS. 1 and 2, the pulse generation operation will be described below.
FIG. 2 is a diagram showing the direction of current flow in the circuit of FIG. 1 with arrows.
In this circuit, the Josephson elements J1 and J2 and n J3s form one superconducting loop, the currents flowing through the Josephson elements are I1, I2, and I3, and the signs of the respective currents in the direction of the arrows. If positive,
[Formula 8]

Io1, Io2, and Io3 represent Josephson critical current values of the respective elements, and θ1, θ2, and θ3 represent phase differences of the elements.
In a Josephson junction device with a structure in which two superconductors are separated by a very thin insulating layer, no voltage is generated between these superconducting electrodes (no electric field is generated in the superconducting pair. The superconducting current flows. The magnitude of this current is determined by the phase difference of each of the two superconducting electrodes.
[0015]
Also, the bias current Ib and the input current Iin are respectively

It is written with. The switching condition of each element is when the phase difference exceeds π / 2. However, in the circuit of FIG. 2, the current I1 is the current that flows through the Josephson element J1 in the input current Iin, the current I2 is the current that flows through the Josephson element J2 in the input current Iin, and the current I3 is the input current Iin. Is the current flowing through the Josephson element J3. In this circuit, I1 = I2.
In the circuit of FIG. 2, the bias current Ib supplied from the bias power supply is divided into a current Ib2 flowing through the Josephson element J1 and a current Ib1 flowing through the Josephson elements J2 and J3.
[0016]
When a bias current Ib is supplied to the circuit, the current is divided into a branch (branch circuit) including the Josephson elements J2 and J3 and a branch of the Josephson element J1 as shown in FIG. As the input current Iin is increased, the current is shunted to the branch of the Josephson element J1 and the branches of the Josephson elements J2 and J3.
The Josephson element J1 that combines the input current Iin and the bias current Ib2 is switched first. At this time, when the magnetic flux quantization condition in the superconducting loop satisfies the following expression by the input current Iin, the bias current Ib, and the circulating current Ie of the superconducting loop, the superconducting permanent current Ie is added to FIG. A superconducting permanent current Ie is generated as shown in FIG.
[Formula 10]

At this time, the superconducting loop transits from a state (0) having no magnetic flux to a state (1) in which one magnetic flux is captured, and an ultrafast magnetic flux quantum pulse of several picoseconds is generated at both ends of the Josephson element J1. And P1 is output to the output terminal Out.
[0017]
FIG. 4 is an operation explanatory diagram for explaining the subsequent operation of FIG. 3 in the circuit of FIG.
When the input current Iin is decreased after the ultrafast magnetic flux quantum pulse P1 is output, the circular current Ie and the bias current Ib flow in a superimposed manner on the Josephson element J2, and when the current exceeds Io2, Josephson. Element J2 switches. At this time, the trapped magnetic flux quantum is released and an ultrafast magnetic flux quantum pulse is generated at both ends of Josephson J2 as in the case of J1, but since it is isolated from the ground, it does not greatly affect the output terminal. As a result, it is possible to generate picosecond level ultrafast magnetic flux quantum pulses corresponding to the input current Iin pulse signal given at a slow cycle from the outside.
[0018]
Next, the operation will be described from threshold characteristics of the bias current Ib and the input current Iin.
FIG. 5 and FIG. 6 show pulse generation conditions in the circuit having specific circuit parameters shown below. FIG. 5 shows threshold characteristics of the bias current Ib and the input current Iin of the pulse generation circuit with Io3 = 3Io1, Io1 = Io2, and n = 6. In the figure, the characteristics (1), (0), and (−1) indicated by the rhombuses by dotted lines indicate that the superconducting loop of this circuit has +1 flux quantum and none (0 ), Shows the mode when -1 is captured. The horizontal axis represents the ratio between the bias current value Ib and the input current value Io flowing through the Josephson J1 branch, and the vertical axis represents the ratio between the input current value Iin and the input current value Io flowing through the Josephson J1 branch.
In FIG. 5, in the region where each mode overlaps, either mode is determined by the history of the current locus of Ib and Iin. For example, at first, both Ib and Iin are at 0 (origin), and then, in the region indicated by the substantially rhombic dotted line of (0), no matter how the current locus by Ib and Iin is drawn, No magnetic flux is trapped in the conduction loop. As a result, the mode (0) is set even in the region overlapping with the regions (1) and (-1). However, for example, once entering the approximately rhombic region of (1) across the boundary of (0), the magnetic flux is captured in the superconducting loop, so that in the region overlapping (0), It becomes a mode. The captured magnetic flux can be reset by moving the current locus from the approximately rhombic region (1) to the approximately rhombic region (0).
[0019]
A method for generating one magnetic flux quantum pulse corresponding to one input pulse in this circuit will be described below.
In FIG. 6, initially, this circuit is in a mode (0) and is in a state where a bias current Ib having an arbitrary value (Ib / Io is 0.5 in this embodiment) flows. Here, when the input current Iin is increased from zero, the threshold value of the mode (0) is exceeded at the point A, so that a magnetic flux quantum pulse is generated and the mode (1) is entered. Thereafter, when Iin is decreased, the threshold value of mode (1) is exceeded at point B and the mode (0) is restored.
FIG. 7 is a characteristic diagram in which the operation of the circuit of FIG. 1 is confirmed by computer simulation. In the figure, the horizontal axis T (s) represents nanoseconds (ns), and the vertical axis represents microamperes (μA).
[0020]
With the circuit conditions of Io1 = Io2 = Io3 / 3 = 0.2 (mA) and n = 6, Ib = 0.1 (mA) is applied, and the rise and fall times are 300 (ps), and the cycle is: An input current pulse of 2 (ns) was applied. From the output result of the figure, it can be seen that an ultrafast magnetic flux quantum pulse having a picosecond width is generated when the input current rises. The bottom part of the figure shows the waveform of the input current Iin. An input current pulse of 400 μA (rise and fall time: 300 (ps), cycle: 2 (ns)) is observed. The middle stage of the figure shows the current waveform of the bias current Ib. Initially, a current of 100 μA is applied at the rising edge of 150 (ps). The uppermost diagram in the figure shows the output current waveform of the circuit of the present invention. A magnetic flux quantum pulse of about 200 μA is generated due to the transition from the (0) mode to the (1) mode at the rise of Iin. In addition, at the time of falling, a pulse accompanying the mode transition from (1) to (0) occurs, but it can be seen that the pulse is small.
[0021]
【The invention's effect】
According to the present invention, since the inductance having the geometric shape dependency used in the conventional Josephson element circuit can be eliminated, a small-sized, high-speed and high-reliability Josephson element integrated circuit can be provided. In the conventional circuit of this type, it is essential that the product of the inductance (L) and the Josephson critical current value (Io) has a magnetic flux quantum (2.07 × 10 ⁻¹⁵ ) as the magnetic flux capturing condition of the circuit. When the inductance is reduced in order to reduce the circuit size, it is necessary to increase the critical current of the Josephson junction element, and it is impossible to design an arbitrary circuit. As apparent from the definition, the magnetic flux capturing condition of the circuit of the present invention is determined only by the ratio of the critical current values of the Josephson junction elements, so it is necessary to consider the absolute values of current and inductance when designing the circuit. As a result, the operating current value of the circuit can be arbitrarily set, and a great degree of freedom can be given to the design.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a pulse generator of the present invention.
FIG. 2 is an operation explanatory diagram for explaining an initial state in the circuit of FIG. 1;
FIG. 3 is an operation explanatory diagram for explaining the continuation of FIG. 2 in the circuit of FIG. 1;
4 is an operation explanatory diagram for explaining the continuation of FIG. 3 in the circuit of FIG. 1;
FIG. 5 is a threshold characteristic diagram of the circuit of the present invention.
6 is an operation explanatory diagram of the circuit of FIG. 5. FIG.
7 is a circuit operation verification diagram by computer simulation of the circuit of FIG. 1; FIG.
FIG. 8 is a circuit diagram of a conventional pulse generator.
[Explanation of symbols]
J1, J2, J3, J3.1, J3.2, J3.3,. n Josephson element Iin Input current In Input (terminal)
Out output (terminal)
Bias Bias power supply Ib Bias current

Claims (4)

  At least five or more Josephson junction elements are connected in series so as to constitute one superconducting loop, one ground terminal is provided in the loop, and a second Josephson junction element (J2 counted from the ground terminal) is provided. ) And the remaining Josephson junction element, an input signal terminal is provided, and the second Josephson junction element (J2) and the first Josephson junction element (J1) from the ground terminal are provided. A superconducting pulse generating circuit, wherein a bias power source is connected to the loop between and an output terminal is provided.   Josephson critical current values Io1 and Io2 of the first Josephson junction element (J1) and the second Josephson junction element (J2), and the first and second Josephson elements of the loop 2. The superconducting pulse generation circuit according to claim 1, wherein Josephson critical current values Io3 of other Josephson junction elements excluding the Son junction elements are set to have a relationship of Io3 ≧ Io1 and Io3 ≧ Io2.   3. The superconducting pulse generation circuit according to claim 1, wherein a current source for inputting a pulse current is connected to the input signal terminal. The superconducting pulse generation circuit according to any one of claims 1 to 3, wherein the remaining Josephson junction elements function as inductances.

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