JP3634222B2 - PWM pulse generation method - Google Patents

Description

【００１３】
この場合、タイミングＴ_nにおいて演算された電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*が実際にインバータ等のＰＷＭ電力変換器へ出力されるのは次回のタイミングＴ_n+1すなわち時刻Ｔ_n＋Ｔ（Ｔ：割り込み周期）であり、割り込み周期Ｔの遅れを伴う。
つまり、この場合には、今回の電圧指令ｖ_n ^*が次回のタイミングＴ_n+1で出力されて初めて前回の電圧指令ｖ_n-1 ^*との間を補間するべき電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*が求まるので、これらの電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*がＰＷＭパルスに反映されるのは次回のタイミングＴ_n+1以降になる。このような遅れは、制御から見ると無駄時間要素となって応答限界が低くなる。
【００１４】
請求項１記載の発明は、上記不都合を解消することを目的としており、前回演算された電圧指令と今回演算された電圧指令とを結ぶ直線上に次回の電圧指令が存在すると推定して、１回の演算周期内で４段階に変化する電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算する。
図３において、前回の電圧指令ｖ_n-1 ^*（図示せず）及び今回の電圧指令ｖ_n ^*を一次近似した直線上に次回の電圧指令ｖ_n+1 ^*も存在する（つまり、前回及び今回の電圧指令変化率が同一である）とした場合、今回の割り込みタイミングＴ_nにおける各電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*は、数式３によって演算される。数式３の内容も簡単な比例配分に基づくものであって図３から容易に理解されるため、詳述は省略する。
【００１５】
【数３】

【００１６】
この発明では、今回の電圧指令ｖ_n ^*が演算されて初めて電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*が求められるが、今回の電圧指令ｖ_n ^*は今回の割り込みタイミングＴ_nにおいて出力されているので、今回の電圧指令ｖ_n ^*と次回の電圧指令ｖ_n+1 ^*との間を補間するべき電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を今回のタイミングＴ_n以降にＰＷＭパルスに反映させることが可能であるから、図２に比べて無駄時間が大幅に短縮される。
【００１７】
請求項２記載の発明では、前回及び今回の電圧指令の平均値を求め、前回の電圧指令と今回の電圧指令とを結ぶ直線上に次回の電圧指令が存在するものとして（これによりｖ_4n ^*も補間可能になる）、１回の演算周期内で変化する電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算する。
すなわち図４において、前回の電圧指令ｖ_n-1 ^*、今回の電圧指令ｖ_n ^*及び次回の電圧指令ｖ_n+1 ^*（図示せず）が一直線上にあるとすると、割り込みタイミングＴ_nにおける各電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*は数式４によって求められる。ここで、ｖ_1n ^*は前回及び今回の電圧指令の平均値となっている。この数式４は簡単な比例配分による演算式であり、その内容は図４からも容易に理解することができる。
【００１８】
【数４】

【００１９】
この発明においても、今回の電圧指令ｖ_n ^*が演算されて初めて補間するべき電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*が求められるが、これらの電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*のうちｖ_1n ^*は割り込み周期の中間の位置にあり、今回の割り込みタイミングＴ_nと次回の割り込みタイミングＴ_n+1との中間において出力することが可能であるから、本発明における無駄時間は図２の場合の無駄時間Ｔの１／２となる。また、電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*のうちｖ_4n ^*のみが次回の電圧指令の推定値を使用した一次近似によるものであるから、補間精度が請求項１の発明よりも改善される。
【００２０】
また、請求項３，４の発明の前提として、前回及び今回の回転座標変換（ＰＷＭ電力変換器の出力電圧をｄ−ｑ軸直交回転座標成分に分離して個別に制御し、これらの各成分を静止座標成分へ変換する際の回転座標変換）に用いる角度指令から、１回の演算周期内で４段階に変化する電圧指令を補間することを考える。
すなわち、正弦波インバータ等のＰＷＭ電力変換器では出力電圧指令波形が正弦波と分かっているので、ＰＷＭ電力変換器の回転座標変換に使用する角度指令を複数段階に変化させ、これらの角度指令を用いて回転座標変換することより複数の電圧指令を補間するものである。この結果、電圧指令を一次近似によって補間する場合（請求項１，２）に比べて、一層高精度に電圧指令を補間することができる。
【００２１】
図５において、前回の割り込みタイミングＴ_ｎ−１で演算された電圧指令ｖ_ｎ−１ ^＊に対応する角度指令をθ_ｎ ^＊、今回の割り込みタイミングＴ_ｎで演算された電圧指令ｖ_ｎ ^＊に対応する角度指令をθ_ｎ＋１ ^＊とすると、今回のタイミングＴ_ｎにおける回転座標変換の角度指令θ_１ｎ ^＊，θ_２ｎ ^＊，θ_３ｎ ^＊，θ_４ｎ ^＊は、数式５によって求められる。なお、数式５は、前述した数式２における各電圧指令を角度指令に置き替えたものと考えることができる。
【００２２】
【数５】

【００２３】
数式５によって演算される角度指令θ_１ｎ ^＊，θ_２ｎ ^＊，θ_３ｎ ^＊，θ_４ｎ ^＊は、今回の回転座標変換に用いる角度指令θ_ｎ ^＊と、図５に表れていない前回の回転座標変換に用いた角度指令θ_ｎ−１ ^＊とから求められており、これらの角度指令θ_１ｎ ^＊，θ_２ｎ ^＊，θ_３ｎ ^＊，θ_４ｎ ^＊はθ_ｎ−１ ^＊とθ_ｎ ^＊との間の横軸上に存在する。図５に示した電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊は、上記角度指令θ_１ｎ ^＊，θ_２ｎ ^＊，θ_３ｎ ^＊，θ_４ｎ ^＊を用いて回転座標変換することにより求められる。
【００２４】
この場合、今回の電圧指令ｖ_n ^*が次回のタイミングＴ_n+1で出力されて初めて前回の電圧指令ｖ_n-1 ^*との間を補間するべき電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*が求まり、これらの電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*がＰＷＭパルスに反映されるのは次回のタイミングＴ_n+1以降になるので、割り込み周期Ｔに相当する無駄時間が発生する。
【００２５】
この無駄時間を減らすため、請求項３の発明では、前回の角度指令θ_n-1 ^*から今回の角度指令θ_n ^*までの変化分と、今回の角度指令θ_n ^*から次回の角度指令θ_n+1 ^*までの変化分とが同一であると仮定したうえで、前回及び今回の角度指令θ_n-1 ^*，θ_n ^*を用いて数式６により角度指令θ_1n ^*，θ_2n ^*，θ_3n ^*，θ_4n ^*を求め、これらの角度指令を用いて回転座標変換を行うことにより、今回の電圧指令ｖ_n ^*と次回の電圧指令ｖ_n+1 ^*との間を補間するべき電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を得る。なお、数式６は、前述した数式３における各電圧指令を角度指令に置き替えたものと考えることができる。
【００２６】
【数６】

【００２７】
そして、数式６により求めたそれぞれの角度指令θ_1n ^*，θ_2n ^*，θ_3n ^*，θ_4n ^*に基づいて回転座標変換し、対応する電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を得る。
図６は、本発明によって補間される電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を示している。本発明によれば、請求項１の発明と同様に今回の電圧指令ｖ_n ^*が今回の割り込みタイミングＴ_nで出力され、今回の電圧指令ｖ_n ^*と次回の電圧指令ｖ_n+1 ^*との間を補間するべき電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を今回のタイミングＴ_n以降にＰＷＭパルスに反映させることが可能であるから、無駄時間が大幅に短縮される。
【００２８】
請求項４記載の発明では、前回及び今回の回転座標変換に用いる角度指令の平均値を求め、前回の角度指令θ_n-1 ^*から今回の角度指令θ_n ^*までの変化分と、今回の角度指令θ_n ^*から次回の角度指令θ_n+1 ^*までの変化分とが同一であると仮定したうえで（これによりｖ_4n ^*も補間可能になる）角度指令θ_1n ^*，θ_2n ^*，θ_3n ^*，θ_4n ^*を求め、これらを用いた回転座標変換により電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算する。
すなわち、数式７に示すように、図７における前回の角度指令θ_n-1 ^*及び今回の角度指令θ_n ^*の平均値を求めてθ_1n ^*とし、他の角度指令θ_2n ^*，θ_3n ^*，θ_4n ^*を比例配分により求める。
【００２９】
【数７】

【００３０】
この発明によれば、請求項２の発明と同様に、電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*のうちｖ_1n ^*は割り込み周期の中間の位置にあり、今回の割り込みタイミングＴ_nと次回の割り込みタイミングＴ_n+1との中間において出力することが可能であるから、無駄時間は図５の場合の１／２となる。また、電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*のうち最後のｖ_4n ^*のみが次回の角度指令θ_n+1 ^*の推定値に基づく値であるから、補間精度が請求項３の発明よりも改善される。
【００３１】
請求項５，６の発明の前提として、ＰＷＭ電力変換器の出力電圧をｄ−ｑ軸直交回転座標成分に分離して個別に制御する場合において、電圧指令を直交座標成分に分離してなるｄ軸電圧指令、ｑ軸電圧指令の前回値及び今回値を用いて１回の演算周期内で変化する電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算することを考える。
例えばｑ軸電圧指令について説明すると、図８に示すように、ｑ軸電圧指令の前回値ｖ_1qn-1 ^*と今回値ｖ_1qn ^*とを一次近似し、その間を４等分して割り込みタイミングＴ_nにおけるｑ軸電圧指令ｖ_1q1n ^*，ｖ_1q2n ^*，ｖ_1q3n ^*，ｖ_1q4n ^*を補間する。その演算式は数式８に示すとおりであり、数式２に対応するものである。
【００３２】
【数８】

【００３３】
ｄ軸電圧指令についてもその前回値ｖ_{１ｄｎ−１} ^＊と今回値ｖ_１ｄｎ ^＊とを一次近似することにより、割り込みタイミングＴ_ｎにおけるｄ軸電圧指令ｖ_１ｄ１ｎ ^＊，ｖ_１ｄ２ｎ ^＊，ｖ_１ｄ３ｎ ^＊，ｖ_１ｄ４ｎ ^＊を求める。
そして、これらのｑ軸電圧指令及びｄ軸電圧指令を角度θ_ｎで回転座標変換して電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊を得る。
【００３４】
なお、この場合にも、割り込み周期Ｔに相当する無駄時間が発生する。
そこで、請求項５記載の発明では、上記無駄時間を解消するため、請求項１の発明と同様の原理を用いてｑ軸電圧指令及びｄ軸電圧指令を求め、その後、回転座標変換によって電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算するものである。
すなわち、例えばｑ軸電圧指令については、図９に示すごとく前回のｑ軸電圧指令ｖ_1qn-1 ^*（図示せず）及び今回のｑ軸電圧指令ｖ_1qn ^*を一次近似した直線上に次回のｑ軸電圧指令ｖ_1qn+1 ^*も存在する（つまり、前回及び今回のｑ軸電圧指令変化率が同一である）とした場合、今回の割り込みタイミングＴ_nにおけるｑ軸電圧指令ｖ_1q1n ^*，ｖ_1q2n ^*，ｖ_1q3n ^*，ｖ_1q4n ^*は、数式３に相当する次の数式９によって求められる。
【００３５】
【数９】

【００３６】
ｄ軸電圧指令についても、その前回値ｖ_{１ｄｎ−１} ^＊と今回値ｖ_１ｄｎ ^＊とを一次近似した直線上に次回のｄ軸電圧指令ｖ_{１ｄｎ＋１} ^＊も存在するとして、割り込みタイミングＴ_ｎにおけるｄ軸電圧指令ｖ_１ｄ１ｎ ^＊，ｖ_１ｄ２ｎ ^＊，ｖ_１ｄ３ｎ ^＊，ｖ_１ｄ４ｎ ^＊を求める。
そして、これらのｑ軸電圧指令及びｄ軸電圧指令を角度θ_ｎで回転座標変換して電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊を得る。
【００３７】
この発明においても、今回の電圧指令ｖ_ｎ ^＊と次回の電圧指令ｖ_ｎ＋１ ^＊との間を補間するべき電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊を今回のタイミングＴ_ｎ以降にＰＷＭパルスに反映させることができるため、請求項７の発明に比べて無駄時間が大幅に短縮される。
【００３８】
請求項６記載の発明では、請求項２の発明と同様の原理を用いてｑ軸電圧指令及びｄ軸電圧指令を求め、その後、角度θ_nで回転座標変換して電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算するものである。
すなわち図１０において、前回のｑ軸電圧指令ｖ_1qn-1 ^*、今回のｑ軸電圧指令ｖ_1qn ^*及び次回のｑ軸電圧指令ｖ_1qn+1 ^*（図示せず）が一直線上にあるとすると、割り込みタイミングＴ_nにおける各ｑ軸電圧指令ｖ_1q1n ^*，ｖ_1q2n ^*，ｖ_1q3n ^*，ｖ_1q4n ^*は、数式４に相当する次の数式１０によって求められる。
【００３９】
【数１０】

【００４０】
ｄ軸電圧指令ｖ_1d1n ^*，ｖ_1d2n ^*，ｖ_1d3n ^*，ｖ_1d4n ^*についても同様にして求め、これらのｄ軸電圧指令及びｑ軸電圧指令を角度θ_nで回転座標変換して電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算する。
この発明においても、第１の電圧指令ｖ_1n ^*を今回の割り込みタイミングＴ_nと次回の割り込みタイミングＴ_n+1との中間において出力することが可能であるから、無駄時間が図８の場合の１／２となる。また、最後の電圧指令ｖ_4n ^*のみが次回の電圧指令の推定値を使用した一次近似によるものとなるから、補間精度が請求項５の発明よりも改善される。
【００４１】
次に、請求項３，４の発明の前提技術と請求項５，６の発明の前提技術とを組み合わせることを考える。
まず、回転座標変換に用いる角度指令θ_1n ^*〜θ_4n ^*を数式５により求め、一方、ｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*を数式８にて求めると共に同様にしてｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*を求め、これらのｄ軸電圧指令及びｑ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*，ｖ_1q1n ^*〜ｖ_1q4n ^*をそれぞれ角度θ_1n ^*〜θ_4n ^*により回転座標変換して電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算する。
この結果、演算量は多くなるが、最も精度の高い補間を行うことができる。
【００４２】
請求項７記載の発明は、上記の場合の割り込み周期Ｔ相当の無駄時間を少なくするため、請求項３の発明と請求項５の発明とを組み合わせたものである。
すなわち、回転座標変換に用いる角度指令θ_1n ^*〜θ_4n ^*を数式６により求め、一方、ｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*を数式９にて求めると共に同様にしてｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*を求め、これらのｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*及びｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*をそれぞれ角度θ_1n ^*〜θ_4n ^*により回転座標変換して電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算する。
この発明によれば、今回の電圧指令ｖ_n ^*と次回の電圧指令ｖ_n+1 ^*との間を補間するべき電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を今回のタイミングＴ_n以降にＰＷＭパルスに反映させることが可能なため、無駄時間が大幅に短縮される。
【００４３】
請求項８記載の発明は、段落［００４１］記載の技術における無駄時間を１／２とし、請求項７の発明よりも補間精度を一層向上させるため、請求項４の発明と請求項６の発明とを組み合わせたものである。
すなわち、回転座標変換に用いる角度指令θ_1n ^*〜θ_4n ^*を数式７により求め、一方、ｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*を数式１０にて求めると共に同様にしてｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*を求め、これらのｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*及びｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*をそれぞれ角度θ_1n ^*〜θ_4n ^*により回転座標変換して電圧指令ｖ_1n ^*，ｖ_2n ^*，ｖ_3n ^*，ｖ_4n ^*を演算する。
この発明によれば、第１の電圧指令ｖ_1n ^*を今回の割り込みタイミングＴ_nと次回の割り込みタイミングＴ_n+1との中間において出力することが可能であり、無駄時間が段落［００４１］記載の技術の１／２になると共に、最後の電圧指令ｖ_4n ^*のみが次回の電圧指令の推定値を使用した一次近似によるものとなるから、補間精度が請求項７の発明よりも改善される。
【００４４】
【発明の実施の形態】
以下、本発明の実施形態を説明する。図１１は、請求項１，２に記載した発明の実施形態が適用される機能ブロック図である。
図１１において、マイコンやＤＳＰ等のＣＰＵにより演算された時系列的な二つの基準電圧指令、すなわち前回の電圧指令ｖ_n-1 ^*及び今回の電圧指令ｖ_n ^*は、電圧補間演算手段１１に与えられる。なお、この電圧補間演算手段１１はソフトウェアによって実現される。
【００４５】
電圧補間演算手段１１は、前回電圧指令ｖ_ｎ−１ ^＊及び今回電圧指令ｖ_ｎ ^＊を用いて、前述した数式２または数式３または数式４の一次近似による演算を行い、補間電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊を生成してハードウェア側へ出力する。
そして、上記電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊はレジスタ２１〜２４にそれぞれ書き込まれる。
【００４６】
前記図１を参照しながら説明したように、キャリア発生器５０からのキャリアと比較される電圧指令は、データセレクタ３０によりキャリアに同期してレジスタ２１〜２４から順次選択される。すなわち、キャリアに同期してカウント動作する４進カウンタ等のセレクト信号発生器４０から図１のセレクト信号Ｓ_１，Ｓ_２が出力され、これらのセレクト信号Ｓ_１，Ｓ_２の論理レベルの組み合わせにより、データセレクタ３０を介して電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊が順に選択されて出力されることになる。
比較器６０では、データセレクタ３０から順次出力される電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊とキャリアとを比較し、インバータ等のＰＷＭ電力変換器のスイッチング素子に与えるＰＷＭパルスを出力する。
【００４７】
ここで、電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊は、図２または図３または図４に示すように、前回の電圧指令ｖ_ｎ−１ ^＊及び今回の電圧指令ｖ_ｎ ^＊を結ぶ直線上にあり、特に、図４の場合では更に次回の電圧指令ｖ_ｎ＋１ ^＊も結んだ直線上にある。
これらの電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊を用いてＣＰＵの演算周期内で出力電圧指令をキャリア周期ごとに順次変化させることにより、基準電圧指令のみによる場合に比べて出力電圧指令の時間分解能を高め、出力電圧波形ひいては電流波形を一層正弦波に近付けることができる。つまり、ＣＰＵの一演算周期で４回分の電圧指令を得ることができるから、電圧指令の時間軸方向の分解能は補間前の４倍となる。
このように電圧指令を逐次与える手法は、本実施形態のようにレジスタ及びデータセレクタを用いる方法以外に、いわゆるＦＩＦＯ（ｆｉｒｓｔ−ｉｎ−ｆｉｒｓｔ−ｏｕｔ：先入れ先出し方式）メモリによっても達成可能である。つまり、電圧指令ｖ_１ｎ ^＊，ｖ_２ｎ ^＊，ｖ_３ｎ ^＊，ｖ_４ｎ ^＊を順に求めてＦＩＦＯメモリに格納し、その後、同じ順番で読み出しても良い。
【００４８】
図１２は、請求項３，４に記載した発明の実施形態が適用される機能ブロック図である。
この図１２はソフトウェア部分のみを示しており、２／３相変換手段１４から出力される三相各相の電圧指令ｖ_u1 ^*〜ｖ_u4 ^*，ｖ_v1 ^*〜ｖ_v4 ^*，ｖ_w1 ^*〜ｖ_w4 ^*は、各相ごとに図１１と同一構成のディジタルハードウェアに入力されて各相のＰＷＭパルスに変換される。例えば、Ｕ相について言えば、ＣＰＵの一演算周期内で４段階に変化する電圧指令ｖ_u1 ^*〜ｖ_u4 ^*が、図１１における電圧補間演算手段１１の出力信号に相当する。
【００４９】
本実施形態において、角度補間演算手段１２は、前回角度指令θ_n-1 ^*及び今回角度指令θ_n ^*を用いて数式５または数式６または数式７の補間演算を行い、ｄ−ｑ軸直交回転座標成分から静止座標成分への回転座標変換を行う際の角度指令をθ_1n ^*，θ_2n ^*，θ_3n ^*，θ_4n ^*と４段階に変化させて出力する。
【００５０】
回転座標変換手段１３は、ＰＷＭ電力変換器において正弦波の出力電圧をｄ−ｑ軸直交座標成分に分離して個別に制御する場合に、電圧指令を直交座標成分に分離してなるｄ軸電圧指令ｖ_１ｄ ^＊、ｑ軸電圧指令ｖ_１ｑ ^＊を入力として、角度指令θ_１ｎ ^＊，θ_２ｎ ^＊，θ_３ｎ ^＊，θ_４ｎ ^＊に基づいて回転座標変換を行う。そして、この座標変換後の静止座標成分を次段の２／３相変換手段１４により三相成分に変換し、電圧指令ｖ_ｕ１ ^＊，ｖ_ｖ１ ^＊，ｖ_ｗ１ ^＊，同ｖ_ｕ２ ^＊，ｖ_ｖ２ ^＊，ｖ_ｗ２ ^＊，同ｖ_ｕ３ ^＊，ｖ_ｖ３ ^＊，ｖ_ｗ３ ^＊，同ｖ_ｕ４ ^＊，ｖ_ｖ４ ^＊，ｖ_ｗ４ ^＊を求める。
ここで、補間される角度指令に基づいた回転座標変換及び２／３相変換は、一括して補間される角度指令θ_１ｎ ^＊〜θ_４ｎ ^＊のうち、θ_１ｎ ^＊による座標変換によってｖ_ｕ１ ^＊，ｖ_ｖ１ ^＊，ｖ_ｗ１ ^＊が、θ_２ｎ ^＊による座標変換によってｖ_ｕ２ ^＊，ｖ_ｖ２ ^＊，ｖ_ｗ２ ^＊が、θ_３ｎ ^＊による座標変換によってｖ_ｕ３ ^＊，ｖ_ｖ３ ^＊，ｖ_ｗ３ ^＊が、θ_４ｎ ^＊による座標変換によってｖ_ｕ４ ^＊，ｖ_ｖ４ ^＊，ｖ_ｗ４ ^＊がそれぞれ求められる。
【００５１】
図１３は、請求項５，６に記載した発明の実施形態が適用される機能ブロック図である。
この図も図１１におけるソフトウェア部分のみを示しており、２／３相変換手段１４から出力される三相各相の電圧指令ｖ_u1 ^*〜ｖ_u4 ^*，ｖ_v1 ^*〜ｖ_v4 ^*，ｖ_w1 ^*〜ｖ_w4 ^*は、図１１と同様にディジタルハードウェアによりＰＷＭパルスに変換される。
【００５２】
この実施形態では、ｄ軸電圧指令の今回値ｖ_1dn ^*及び前回値ｖ_1dn-1 ^*、ｑ軸電圧指令の今回値ｖ_1qn ^*及び前回値ｖ_1qn-1 ^*を用いて、請求項５の発明では数式９及びｄ軸成分に関する同様の数式により、請求項６の発明では数式１０及びｄ軸成分に関する同様の数式により、それぞれｄ軸成分、ｑ軸成分ごとに補間演算を行ってｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*及びｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*を求める。
これらのｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*及びｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*は、回転座標変換手段１６において角度指令θ_n ^*により回転座標成分から静止座標成分へ変換され、これらの静止座標成分が次段の２／３相変換手段１４により三相成分に変換されて電圧指令ｖ_u1 ^*，ｖ_v1 ^*，ｖ_w1 ^*，同ｖ_u2 ^*，ｖ_v2 ^*，ｖ_w2 ^*，同ｖ_u3 ^*，ｖ_v3 ^*，ｖ_w3 ^*，同ｖ_u4 ^*，ｖ_v4 ^*，ｖ_w4 ^*が求められる。
【００５３】
ここで、回転座標変換及び２／３相変換は、一括して補間される電圧指令ｖ_１ｄ１ｎ ^＊〜ｖ_１ｄ４ｎ ^＊及びｖ_１ｑ１ｎ ^＊〜ｖ_１ｑ４ｎ ^＊のうち、ｖ_１ｄ１ｎ ^＊，ｖ_１ｑ１ｎ ^＊に基づいてｖ_ｕ１ ^＊，ｖ_ｖ１ ^＊，ｖ_ｗ１ ^＊が、ｖ_１ｄ２ｎ ^＊，ｖ_１ｑ２ｎ ^＊に基づいてｖ_ｕ２ ^＊，ｖ_ｖ２ ^＊，ｖ_ｗ２ ^＊が、ｖ_１ｄ３ｎ ^＊，ｖ_１ｑ３ｎ ^＊に基づいてｖ_ｕ３ ^＊，ｖ_ｖ３ ^＊，ｖ_ｗ３ ^＊が、ｖ_１ｄ４ｎ ^＊，ｖ_１ｑ４ｎ ^＊に基づいてｖ_ｕ４ ^＊，ｖ_ｖ４ ^＊，ｖ_ｗ４ ^＊がそれぞれ求められる。
【００５４】
図１４は、請求項７，８に記載した発明の実施形態が適用される機能ブロック図である。
この図も図１１におけるソフトウェア部分のみを示しており、２／３相変換手段１４から出力される三相各相の電圧指令ｖ_u1 ^*〜ｖ_u4 ^*，ｖ_v1 ^*〜ｖ_v4 ^*，ｖ_w1 ^*〜ｖ_w4 ^*は、図１１と同様にディジタルハードウェアによりＰＷＭパルスに変換される。
【００５５】
この実施形態では、ｄ軸電圧指令の今回値ｖ_1dn ^*及び前回値ｖ_1dn-1 ^*、ｑ軸電圧指令の今回値ｖ_1qn ^*及び前回値ｖ_1qn-1 ^*を用いて、請求項７の発明では数式９及びｄ軸成分に関する同様の数式により、請求項８の発明では数式１０及びｄ軸成分に関する同様の数式により、それぞれｄ軸成分、ｑ軸成分ごとに補間演算を行ってｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*及びｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*を求める。
これらのｄ軸電圧指令ｖ_1d1n ^*〜ｖ_1d4n ^*及びｑ軸電圧指令ｖ_1q1n ^*〜ｖ_1q4n ^*は、回転座標変換手段１６に入力されて回転座標成分から静止座標成分へ座標変換される。その際の角度指令θ_1n ^*〜θ_4n ^*は、請求項７の発明では数式６により、請求項８の発明では数式７により、何れも前回の角度指令θ_n-1 ^*及び今回の角度指令θ_n ^*を用いて演算される。
【００５６】
ここで、回転座標変換及び２／３相変換は、電圧指令ｖ_１ｄ１ｎ ^＊，ｖ_１ｑ１ｎ ^＊及び角度指令θ_１ｎ ^＊に基づいてｖ_ｕ１ ^＊，ｖ_ｖ１ ^＊，ｖ_ｗ１ ^＊が、ｖ_１ｄ２ｎ ^＊，ｖ_１ｑ２ｎ ^＊及びθ_２ｎ ^＊に基づいてｖ_ｕ２ ^＊，ｖ_ｖ２ ^＊，ｖ_ｗ２ ^＊が、ｖ_１ｄ３ｎ ^＊，ｖ_１ｑ３ｎ ^＊及びθ_３ｎ ^＊に基づいてｖ_ｕ３ ^＊，ｖ_ｖ３ ^＊，ｖ_ｗ３ ^＊が、ｖ_１ｄ４ｎ ^＊，ｖ_１ｑ４ｎ ^＊及びθ_４ｎ ^＊に基づいてｖ_ｕ４ ^＊，ｖ_ｖ４ ^＊，ｖ_ｗ４ ^＊がそれぞれ求められる。
【００５７】
【発明の効果】
以上詳述したように、本発明によれば、ＣＰＵの一演算周期内の出力電圧指令を予め複数段階に補間することにより出力電圧の時間軸方向の分解能を高めることができ、高速のＣＰＵを用いる等の方法を採らずにＰＷＭ電力変換器から正弦波状の電圧ひいては電流を出力させることが可能である。これにより、負荷のトルクリプルや回転ムラ、騒音の低減に寄与することができる。
【００５８】
また、請求項１〜８の何れの発明においても、比較的簡単な演算によって出力電圧指令や角度指令についての段階的な補間が可能である。
特に、請求項１の発明では制御上の無駄時間を短くすることができ、請求項２の発明では請求項１の発明よりも高精度に補間を行うことができる。
更に、請求項３〜８の発明についても、同様に無駄時間を短縮すると共に補間精度を高める効果がある。
【図面の簡単な説明】
【図１】本発明の基本となる出力電圧指令の発生パターンの説明図である。
【図２】請求項１，２の発明の前提となる補間方法の説明図である。
【図３】請求項１の発明における補間方法の説明図である。
【図４】請求項２の発明における補間方法の説明図である。
【図５】請求項３，４の発明の前提となる補間方法の説明図である。
【図６】請求項３の発明における補間方法の説明図である。
【図７】請求項４の発明における補間方法の説明図である。
【図８】請求項５，６の発明の前提となる補間方法の説明図である。
【図９】請求項５の発明における補間方法の説明図である。
【図１０】請求項６の発明における補間方法の説明図である。
【図１１】請求項１，２に記載した発明の実施形態が適用される機能ブロック図である。
【図１２】請求項３．４に記載した発明の実施形態が適用される機能ブロック図である。
【図１３】請求項５，６に記載した発明の実施形態が適用される機能ブロック図である。
【図１４】請求項７，８に記載した発明の実施形態が適用される機能ブロック図である。
【図１５】従来技術を説明するための、電圧指令波形の一例を示す図である。
【図１６】従来技術を説明するための、出力電圧指令、ＣＰＵ割り込み信号、キャリアのタイミングを示す図である。
【符号の説明】
１１，１５ 電圧補間演算手段
１２ 角度補間演算手段
１３，１６ 回転座標変換手段
１４ ２／３相変換手段
２１〜２４ レジスタ
３０ データセレクタ
４０ セレクト信号発生器
５０ キャリア発生器
６０ 比較器[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a PWM pulse generation method applicable to a PWM power converter such as an inverter that performs power conversion by generating PWM pulses with digital hardware.
[0002]
[Prior art]
Hereinafter, the conventional technology will be described by taking a three-phase inverter as an example of the PWM power converter.
When an output voltage command for a three-phase inverter is created by a CPU such as a microcomputer or DSP (digital signal processor), the voltage command is computed by software for each interrupt cycle (calculation cycle) of the CPU. The calculated result is written in a register in the digital hardware that generates the PWM pulse. Therefore, the update of the voltage actually output from the inverter depends on the calculation cycle of a CPU such as a microcomputer or a DSP. That is, the inverter has a frequency f_outWhen the sine wave voltage is output, the voltage resolution N in the time axis direction is expressed by Equation 1, assuming that the calculation period of the CPU is T.
[0003]
[Expression 1]
N = 1 / (f_outT)
[0004]
FIG. 15 shows an output voltage command (phase voltage command) for one phase created by the CPU. This figure shows that when one period of the output voltage is divided into 16 (T = 1 / (16f_out)) Is a schematic diagram of a sine wave generated. As is clear from this figure, the larger N, the closer to a sine wave, and the smaller N, the farther away from the sine wave, the greater the waveform distortion.
[0005]
FIG. 16 shows the relationship between the output voltage command, the carrier, and the CPU interrupt signal. Although the carrier is originally a digital value, it is shown in an analog form for easy understanding.
In FIG. 16, the CPU generates a voltage command at a given time after an interrupt signal is received and is written in a register in the digital hardware. Then, the PWM command is generated by comparing the voltage command written in the register with the carrier. Here, the timing at which the output voltage command to be compared with the carrier is actually output is the time when the next interrupt signal is generated.
[0006]
[Problems to be solved by the invention]
Conventionally, there is a limit to shortening the calculation cycle of the output voltage command by the CPU according to the output frequency of the inverter. Accordingly, when the output voltage command has a stepped waveform as shown in FIGS. 15 and 16 even though the output frequency is high, a significant voltage distortion occurs due to a large deviation from the sine wave. Due to this distortion, the current does not have a sinusoidal shape, and torque ripples and rotation unevenness of the load occur, causing noise.
On the other hand, the use of a high-speed CPU to shorten the calculation cycle causes a cost increase, so there is a limit to the solution to the problem due to the high-speed CPU.
[0007]
Therefore, the present invention interpolates the output voltage command obtained by the calculation by various methods to increase the resolution in the time axis direction of the output voltage command to be compared with the carrier, without using a method such as using a high-speed CPU. An object of the present invention is to provide a method for generating a PWM pulse in which a sinusoidal output voltage is obtained.
[0008]
[Means for Solving the Problems]
First, FIG. 1 is a timing explanatory diagram showing the principle of the present invention as a whole. Here, an example is shown in which the output voltage command (interpolation voltage command) is changed four times within one calculation cycle of the CPU in the microcomputer or DSP.
Four interpolation voltage commands v calculated at once for each CPU calculation cycle _1n ^* , V _2n ^* , V _3n ^* , V _4n ^* Is written to a register in the digital hardware. These voltage commands v _1n ^* , V _2n ^* , V _3n ^* , V _4n ^* Is reflected in the PWM pulse when the next interrupt signal comes after being written into the register (for this reason, in FIG. 1, each voltage command v calculated in the previous calculation cycle by the CPU is shown. _1n ^* , V _2n ^* , V _3n ^* , V _4n ^* Are sequentially output within the next calculation cycle).
And for each carrier period, voltage command v _1n ^* , V _2n ^* , V _3n ^* , V _4n ^* Two select signals S ₁ , S ₂ The combination is selected and sequentially compared with the carrier. As a result, the voltage command changes for each carrier period, and the time resolution of the output voltage command is improved.
[0010]
As described below, the present invention provides a plurality of interpolation voltage commands v that change within one calculation cycle of the CPU._1n ^*, V_2n ^*, V_3n ^*, V_4n ^*This calculation method (interpolation method) has a feature.
First, the invention of claim 1As a premise ofVoltage command v that changes within one calculation cycle from previous and current voltage commands obtained by calculation_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.AndVoltage command v previously calculated by CPU as shown in FIG._n-1 ^*And the voltage command v calculated this time_n ^*Are linearly approximated by connecting them with a straight line, and further divided into four equal parts so that the voltage command v changing in four steps_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is generated (interpolated).
[0011]
In FIG. 2, v indicated by a white circle_n-1 ^*, V_n ^*Is the CPU interrupt timing T_n, T_{n + 1}Is the voltage command calculated in step v, indicated by a black circle_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is the current interrupt timing T_nIs a voltage command to be interpolated. Here, the previous timing T_n-1Voltage command v calculated in_n-1 ^*Is the current timing T delayed by one cycle_nIs output at this timing T_nVoltage command v calculated in_n ^*Is the next timing T delayed by one cycle._{n + 1}Is output. Voltage command to be interpolated v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is the voltage command v from the previous calculation_n-1 ^*And voltage command v by this calculation_n ^*And is obtained by Equation 2. Note that Formula 2 is an arithmetic expression based on simple proportional distribution, and the contents thereof can be easily understood from FIG.
[0012]
[Expression 2]

[0013]
In this case, the timing T_nVoltage command v calculated in_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is actually output to the PWM power converter such as an inverter at the next timing T_{n + 1}That is, time T_n+ T (T: interrupt period), with a delay of the interrupt period T.
That meansIn this caseIs the current voltage command v_n ^*Is the next timing T_{n + 1}The previous voltage command v_n-1 ^*Voltage command to be interpolated between_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Therefore, these voltage commands v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is reflected in the PWM pulse at the next timing T_{n + 1}After that. Such a delay becomes a dead time element from the viewpoint of control, and the response limit is lowered.
[0014]
Claim1The described invention aims to eliminate the above inconveniences, and it is estimated that the next voltage command exists on a straight line connecting the voltage command calculated last time and the voltage command calculated this time. Voltage command v that changes in 4 steps within the cycle_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
In FIG. 3, the previous voltage command v_n-1 ^*(Not shown) and current voltage command v_n ^*The next voltage command v on a straight line approximating_{n + 1} ^*Is present (that is, the voltage command change rate of the previous time and this time is the same), the current interrupt timing T_nEach voltage command in_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated by Equation 3. The content of Equation 3 is also based on simple proportional distribution and can be easily understood from FIG.
[0015]
[Equation 3]

[0016]
In this inventionIsThe current voltage command v_n ^*The voltage command v is not calculated until_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is required, but the current voltage command v_n ^*Is the current interrupt timing T_nThe voltage command v for this time_n ^*And next voltage command v_{n + 1} ^*Voltage command to be interpolated between_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*This time T_nSince it can be reflected in the PWM pulse thereafter,FIG.Compared with, dead time is greatly reduced.
[0017]
Claim2In the described invention, the average value of the previous voltage command and the current voltage command is obtained, and the next voltage command exists on the straight line connecting the previous voltage command and the current voltage command (therefore, v_4n ^*Can also be interpolated) Voltage command that changes within one calculation cycle v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
That is, in FIG. 4, the previous voltage command v_n-1 ^*The current voltage command v_n ^*And next voltage command v_{n + 1} ^*(Not shown) is on a straight line, interrupt timing T_nEach voltage command in_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is obtained by Equation 4. Where v_1n ^*Is the average value of the previous and current voltage commands. This mathematical expression 4 is an arithmetic expression based on a simple proportional distribution, and its contents can be easily understood from FIG.
[0018]
[Expression 4]

[0019]
Also in this invention, the current voltage command v_n ^*Voltage command v to be interpolated only after_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*These voltage commands v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*V_1n ^*Is in the middle of the interrupt cycle and this interrupt timing T_nAnd next interrupt timing T_{n + 1}Since it is possible to output in the middle ofIn the case of FIG.½ of the dead time T. In addition, the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*V_4n ^*Is the result of linear approximation using the estimated value of the next voltage command, the interpolation accuracy is claimed.1This is an improvement over the present invention.
[0020]
As a premise of the inventions of claims 3 and 4,Previous and current rotation coordinate conversion (rotational coordinate conversion when the output voltage of the PWM power converter is separated into dq axis orthogonal rotation coordinate components and individually controlled, and each of these components is converted into a stationary coordinate component) Interpolate voltage command that changes in 4 steps within one calculation cycle from angle command used forThink about.
That is, in a PWM power converter such as a sine wave inverter, since the output voltage command waveform is known as a sine wave, the angle command used for the rotational coordinate conversion of the PWM power converter is changed in a plurality of stages, and these angle commands are changed. A plurality of voltage commands are interpolated by using the rotary coordinate conversion. As a result, the voltage command is interpolated by linear approximation., 2), The voltage command can be interpolated with higher accuracy.
[0021]
In FIG. 5, the previous interrupt timing T_n-1Voltage command v calculated by_n-1 ^*The angle command corresponding to_n ^*, This interrupt timing T_nVoltage command v calculated by_n ^*The angle command corresponding to_{n + 1} ^*Then, this time T_nAngle command θ for rotational coordinate conversion in_1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*Is obtained by Equation 5. In addition, Formula 5 can be considered that each voltage command in Formula 2 described above is replaced with an angle command.
[0022]
[Equation 5]

[0023]
Angle command θ calculated by Equation 5_1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*Is the angle command θ used for this rotation coordinate transformation_n ^*And the angle command θ used for the previous rotation coordinate transformation not shown in FIG._n-1 ^*These angle commands θ_1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*Is θ_n-1 ^*And θ_n ^*Exists on the horizontal axis. Voltage command v shown in FIG._1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is the angle command θ_1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*It is calculated | required by carrying out rotational coordinate transformation using.
[0024]
in this case,Current voltage command v_n ^*Is the next timing T_{n + 1}The previous voltage command v_n-1 ^*Voltage command to be interpolated between_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*These voltage commands v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is reflected in the PWM pulse at the next timing T_{n + 1}Since it will be later,A dead time corresponding to the interrupt cycle T occurs.
[0025]
To reduce this wasted time, the claims3In the present invention, the previous angle command θ_n-1 ^*To this angle command θ_n ^*And the current angle command θ_n ^*To the next angle command θ_{n + 1} ^*Assuming that the change up to is the same, the previous and current angle commands θ_n-1 ^*, Θ_n ^*Using the angle formula θ_1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*, And by performing the rotation coordinate conversion using these angle commands, the current voltage command v_n ^*And next voltage command v_{n + 1} ^*Voltage command to be interpolated between_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Get. In addition, Formula 6 can be considered that each voltage command in Formula 3 described above is replaced with an angle command.
[0026]
[Formula 6]

[0027]
Then, each angle command θ obtained by Expression 6 is used._1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*Rotational coordinate conversion based on the corresponding voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Get.
FIG. 6 shows the voltage command v interpolated according to the invention._1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is shown. According to the invention, the claims1This time, the voltage command v_n ^*Is the current interrupt timing T_nThe voltage command v_n ^*And next voltage command v_{n + 1} ^*Voltage command to be interpolated between_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*This time T_nSince it can be reflected in the PWM pulse later,NothingWaste time is greatly reduced.
[0028]
Claim4In the described invention, the average value of the angle command used for the previous and current rotation coordinate conversion is obtained, and the previous angle command θ_n-1 ^*To this angle command θ_n ^*And the current angle command θ_n ^*To the next angle command θ_{n + 1} ^*Assuming that the change up to_4n ^*Angle command θ_1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*The voltage command v is obtained by rotational coordinate conversion using these._1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
That is, as shown in Equation 7, the previous angle command θ in FIG._n-1 ^*And this angle command θ_n ^*Find the average value of θ_1n ^*And other angle command θ_2n ^*, Θ_3n ^*, Θ_4n ^*Is obtained by proportional distribution.
[0029]
[Expression 7]

[0030]
According to the invention, the claims2As in the invention of the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*V_1n ^*Is in the middle of the interrupt cycle and this interrupt timing T_nAnd next interrupt timing T_{n + 1}Since it is possible to output in the middle ofIn the case of FIG.1/2 of this. In addition, the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Last v of_4n ^*Only the next angle command θ_{n + 1} ^*Because it is a value based on the estimated value of3This is an improvement over the present invention.
[0031]
ClaimAs the premise of inventions 5 and 6,In the case where the output voltage of the PWM power converter is separated into dq-axis orthogonal rotation coordinate components and individually controlled, the d-axis voltage command obtained by separating the voltage command into orthogonal coordinate components and the previous value of the q-axis voltage command And the voltage command v that changes within one calculation cycle using the current value_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*CalculateThink about it.
For example, the q-axis voltage command will be described. As shown in FIG._1qn-1 ^*And current value v_1qn ^*, And the interrupt timing T_nQ-axis voltage command at_1q1n ^*, V_1q2n ^*, V_1q3n ^*, V_1q4n ^*Is interpolated. The calculation formula is as shown in Formula 8 and corresponds to Formula 2.
[0032]
[Equation 8]

[0033]
The previous value v for the d-axis voltage command_1dn-1 ^*And current value v_1dn ^*Is first-order approximated to obtain an interrupt timing T_nD-axis voltage command at_1d1n ^*, V_1d2n ^*, V_1d3n ^*, V_1d4n ^*Ask for.
Then, these q-axis voltage command and d-axis voltage command are converted into an angle θ_nRotation coordinate conversion with the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Get.
[0034]
In addition,In this case too,A dead time corresponding to the insertion period T occurs.
Therefore, the claim5In the described invention, in order to eliminate the dead time,1The q-axis voltage command and the d-axis voltage command are obtained using the same principle as that of the present invention, and then the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
That is, for example, for the q-axis voltage command, the previous q-axis voltage command v as shown in FIG._1qn-1 ^*(Not shown) and current q-axis voltage command v_1qn ^*Next q-axis voltage command v on a straight line approximating_{1qn + 1} ^*Is present (that is, the previous and current q-axis voltage command change rates are the same), the current interrupt timing T_nQ-axis voltage command at_1q1n ^*, V_1q2n ^*, V_1q3n ^*, V_1q4n ^*Is obtained by the following equation 9 corresponding to equation 3.
[0035]
[Equation 9]

[0036]
Also for d-axis voltage command, its previous value v_1dn-1 ^*And current value v_1dn ^*Next d-axis voltage command v on a straight line approximating_{1dn + 1} ^*Interrupt timing T_nD-axis voltage command at_1d1n ^*, V_1d2n ^*, V_1d3n ^*, V_1d4n ^*Ask for.
Then, these q-axis voltage command and d-axis voltage command are converted into an angle θ_nRotation coordinate conversion with the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Get.
[0037]
Also in this invention, the current voltage command v_n ^*And next voltage command v_{n + 1} ^*Voltage command to be interpolated between_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*This time T_nSince it can be reflected in the PWM pulse thereafter, the dead time is greatly reduced as compared with the invention of claim 7.
[0038]
Claim6In the described invention, the claims2The q-axis voltage command and the d-axis voltage command are obtained using the same principle as that of the present invention, and then the angle θ_nRotation coordinate conversion with the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
That is, in FIG. 10, the previous q-axis voltage command v_1qn-1 ^*Q-axis voltage command v_1qn ^*And next q-axis voltage command v_{1qn + 1} ^*(Not shown) is on a straight line, interrupt timing T_nQ-axis voltage command v_1q1n ^*, V_1q2n ^*, V_1q3n ^*, V_1q4n ^*Is obtained by the following equation 10 corresponding to equation 4.
[0039]
[Expression 10]

[0040]
d-axis voltage command v_1d1n ^*, V_1d2n ^*, V_1d3n ^*, V_1d4n ^*The d-axis voltage command and the q-axis voltage command are determined in the same manner for angle θ_nRotation coordinate conversion with the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
Also in the present invention, the first voltage command v_1n ^*This interrupt timing T_nAnd next interrupt timing T_{n + 1}Because it is possible to output in the middle ofIn the case of FIG.1/2 of this. The last voltage command v_4n ^*Interpolation accuracy is claimed because only the first approximation using the estimated value of the next voltage command is used.5This is an improvement over the present invention.
[0041]
Next, let us consider combining the prerequisite technology of the inventions of claims 3 and 4 and the prerequisite technology of the inventions of claims 5 and 6.
First, the angle command θ used for rotating coordinate transformation_1n ^*~ Θ_4n ^*On the other hand, q-axis voltage command v_1q1n ^*~ V_1q4n ^*Is obtained by Equation 8 and d-axis voltage command v is similarly obtained._1d1n ^*~ V_1d4n ^*D-axis voltage command and q-axis voltage command v_1d1n ^*~ V_1d4n ^*, V_1q1n ^*~ V_1q4n ^*The angle θ_1n ^*~ Θ_4n ^*Rotation coordinate conversion by the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
As a result, the amount of calculation increases, but the most accurate interpolation can be performed.
[0042]
Claim7The described inventionIn the above caseIn order to reduce the dead time corresponding to the interrupt period T,3Invention and claims5This invention is combined with this invention.
That is, the angle command θ used for rotating coordinate transformation_1n ^*~ Θ_4n ^*On the other hand, q-axis voltage command v_1q1n ^*~ V_1q4n ^*Is obtained by Equation 9 and d-axis voltage command v_1d1n ^*~ V_1d4n ^*These d-axis voltage commands v_1d1n ^*~ V_1d4n ^*And q-axis voltage command v_1q1n ^*~ V_1q4n ^*The angle θ_1n ^*~ Θ_4n ^*Rotation coordinate conversion by the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
According to the present invention, the current voltage command v_n ^*And next voltage command v_{n + 1} ^*Voltage command to be interpolated between_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*This time T_nSince it can be reflected in the PWM pulse later,NothingWaste time is greatly reduced.
[0043]
Claim8The described inventionThe technology described in paragraph [0041]The dead time in the process is halved.7In order to further improve the interpolation accuracy than the present invention,4Invention and claims6This invention is combined with this invention.
That is, the angle command θ used for rotating coordinate transformation_1n ^*~ Θ_4n ^*On the other hand, q-axis voltage command v_1q1n ^*~ V_1q4n ^*Is calculated by Equation 10 and d-axis voltage command v_1d1n ^*~ V_1d4n ^*These d-axis voltage commands v_1d1n ^*~ V_1d4n ^*And q-axis voltage command v_1q1n ^*~ V_1q4n ^*The angle θ_1n ^*~ Θ_4n ^*Rotation coordinate conversion by the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is calculated.
According to the present invention, the first voltage command v_1n ^*This interrupt timing T_nAnd next interrupt timing T_{n + 1}Can be output in the middle ofThe technology described in paragraph [0041]And the last voltage command v_4n ^*Interpolation accuracy is claimed because only the first approximation using the estimated value of the next voltage command is used.7This is an improvement over the present invention.
[0044]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below. FIG. 11 shows claim 1., 2It is a functional block diagram to which the embodiment of the invention described in is applied.
In FIG. 11, two time-series reference voltage commands calculated by a CPU such as a microcomputer or DSP, that is, the previous voltage command v_n-1 ^*And current voltage command v_n ^*Is given to the voltage interpolation calculation means 11. The voltage interpolation calculation means 11 is realized by software.
[0045]
The voltage interpolation calculation means 11 calculates the previous voltage command v_n-1 ^*And current voltage command v_n ^*Is used to perform the first-order approximation of Equation 2, 3 or 4 to obtain the interpolation voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is generated and output to the hardware side.
And the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Are written in the registers 21 to 24, respectively.
[0046]
As described with reference to FIG. 1, the voltage command to be compared with the carrier from the carrier generator 50 is sequentially selected from the registers 21 to 24 by the data selector 30 in synchronization with the carrier. That is, the select signal S shown in FIG. 1 is sent from the select signal generator 40 such as a quaternary counter that counts in synchronization with the carrier.₁, S₂Are output, and these select signals S₁, S₂Depending on the combination of the logic levels of the voltage command v through the data selector 30_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Are sequentially selected and output.
In the comparator 60, the voltage command v sequentially output from the data selector 30._1n ^*, V_2n ^*, V_3n ^*, V_4n ^*And the carrier are compared, and a PWM pulse applied to the switching element of the PWM power converter such as an inverter is output.
[0047]
Here, the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is the previous voltage command v as shown in FIG. 2, FIG. 3 or FIG._n-1 ^*And current voltage command v_n ^*In particular, in the case of FIG._{n + 1} ^*Is on a straight line.
These voltage commands v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*Is used to increase the time resolution of the output voltage command as compared with the case of using only the reference voltage command, and the output voltage waveform and thus the current waveform are further sine. You can get closer to the waves. That is, since the voltage command for four times can be obtained in one calculation cycle of the CPU, the resolution in the time axis direction of the voltage command is four times that before interpolation.
Such a method of sequentially giving voltage commands can be achieved by a so-called FIFO (first-in-first-out) memory in addition to a method using a register and a data selector as in this embodiment. That is, the voltage command v_1n ^*, V_2n ^*, V_3n ^*, V_4n ^*May be obtained in order, stored in the FIFO memory, and then read out in the same order.
[0048]
FIG. 12 claims3, 4It is a functional block diagram to which the embodiment of the invention described in is applied.
FIG. 12 shows only the software part, and the voltage command v for each of the three phases output from the 2/3 phase conversion means 14._u1 ^*~ V_u4 ^*, V_v1 ^*~ V_v4 ^*, V_w1 ^*~ V_w4 ^*Is input to the digital hardware having the same configuration as in FIG. 11 for each phase and converted into PWM pulses for each phase. For example, in the case of the U phase, the voltage command v that changes in four steps within one calculation cycle of the CPU._u1 ^*~ V_u4 ^*Corresponds to the output signal of the voltage interpolation calculation means 11 in FIG.
[0049]
In the present embodiment, the angle interpolation calculation means 12 is operated by the previous angle command θ_n-1 ^*And current angle command θ_n ^*Is used to calculate the angle command when performing rotational coordinate conversion from the dq axis orthogonal rotational coordinate component to the stationary coordinate component._1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*And output in 4 stagesThe
[0050]
The rotating coordinate conversion means 13 is a d-axis voltage obtained by separating the voltage command into orthogonal coordinate components when the PWM power converter controls the output voltage of the sine wave separately to the dq axis orthogonal coordinate components. Command v_1d ^*Q-axis voltage command v_1q ^*Is used as an angle command θ_1n ^*, Θ_2n ^*, Θ_3n ^*, Θ_4n ^*Rotational coordinate transformation is performed based on Then, the static coordinate component after the coordinate conversion is converted into a three-phase component by the 2/3 phase conversion means 14 in the next stage, and the voltage command v_u1 ^*, V_v1 ^*, V_w1 ^*V_u2 ^*, V_v2 ^*, V_w2 ^*V_u3 ^*, V_v3 ^*, V_w3 ^*V_u4 ^*, V_v4 ^*, V_w4 ^*Ask for.
Here, the rotation coordinate conversion and the 2/3 phase conversion based on the angle command to be interpolated are the angle command θ interpolated collectively._1n ^*~ Θ_4n ^*Of which θ_1n ^*V_u1 ^*, V_v1 ^*, V_w1 ^*Is θ_2n ^*V_u2 ^*, V_v2 ^*, V_w2 ^*Is θ_3n ^*V_u3 ^*, V_v3 ^*, V_w3 ^*Is θ_4n ^*V_u4 ^*, V_v4 ^*, V_w4 ^*Is required.
[0051]
FIG. 13 claims5, 6It is a functional block diagram to which the embodiment of the invention described in is applied.
This figure also shows only the software part in FIG. 11, and the voltage command v for each of the three phases output from the 2 / 3-phase conversion means 14._u1 ^*~ V_u4 ^*, V_v1 ^*~ V_v4 ^*, V_w1 ^*~ V_w4 ^*Are converted into PWM pulses by digital hardware as in FIG.
[0052]
In this embodiment, the current value v of the d-axis voltage command_1dn ^*And previous value v_1dn-1 ^*, Q-axis voltage command current value v_1qn ^*And previous value v_1qn-1 ^*Using, ContractClaim5In the invention of the present invention, the following formula 9 and the similar formula concerning the d-axis component are used.6In the present invention, an interpolation calculation is performed for each of the d-axis component and the q-axis component according to Equation 10 and a similar equation relating to the d-axis component, respectively._1d1n ^*~ V_1d4n ^*And q-axis voltage command v_1q1n ^*~ V_1q4n ^*Ask for.
These d-axis voltage commands v_1d1n ^*~ V_1d4n ^*And q-axis voltage command v_1q1n ^*~ V_1q4n ^*Is the angle command θ in the rotary coordinate conversion means 16._n ^*Is converted from a rotating coordinate component to a stationary coordinate component, and these stationary coordinate components are converted into three-phase components by the 2 / 3-phase converting means 14 in the next stage, and the voltage command v_u1 ^*, V_v1 ^*, V_w1 ^*V_u2 ^*, V_v2 ^*, V_w2 ^*V_u3 ^*, V_v3 ^*, V_w3 ^*V_u4 ^*, V_v4 ^*, V_w4 ^*Is required.
[0053]
Here, the rotation coordinate conversion and the 2/3 phase conversion are collectively performed by voltage command v interpolated._1d1n ^*~ V_1d4n ^*And v_1q1n ^*~ V_1q4n ^*Of which v_1d1n ^*, V_1q1n ^*Based on v_u1 ^*, V_v1 ^*, V_w1 ^*But v_1d2n ^*, V_1q2n ^*Based on v_u2 ^*, V_v2 ^*, V_w2 ^*But v_1d3n ^*, V_1q3n ^*Based on v_u3 ^*, V_v3 ^*, V_w3 ^*But v_1d4n ^*, V_1q4n ^*Based on v_u4 ^*, V_v4 ^*, V_w4 ^*Is required.
[0054]
FIG. 14 claims7,8It is a functional block diagram to which the embodiment of the invention described in is applied.
This figure also shows only the software part in FIG. 11, and the voltage command v for each of the three phases output from the 2 / 3-phase conversion means 14._u1 ^*~ V_u4 ^*, V_v1 ^*~ V_v4 ^*, V_w1 ^*~ V_w4 ^*Are converted into PWM pulses by digital hardware as in FIG.
[0055]
In this embodiment, the current value v of the d-axis voltage command_1dn ^*And previous value v_1dn-1 ^*, Q-axis voltage command current value v_1qn ^*And previous value v_1qn-1 ^*UsingThe contractClaim7In the invention of the present invention, the following formula 9 and the similar formula concerning the d-axis component are used.8In the present invention, an interpolation calculation is performed for each of the d-axis component and the q-axis component according to Equation 10 and a similar equation relating to the d-axis component, respectively._1d1n ^*~ V_1d4n ^*And q-axis voltage command v_1q1n ^*~ V_1q4n ^*Ask for.
These d-axis voltage commands v_1d1n ^*~ V_1d4n ^*And q-axis voltage command v_1q1n ^*~ V_1q4n ^*Is input to the rotation coordinate conversion means 16 and converted from the rotation coordinate component to the stationary coordinate component. Angle command θ at that time_1n ^*~ Θ_4n ^*Is, ContractClaim7In the invention of the present invention, the expression8In the present invention, the previous angle command θ_n-1 ^*And this angle command θ_n ^*Is calculated using.
[0056]
Here, the rotation coordinate transformation and the 2/3 phase transformation are the voltage command v_1d1n ^*, V_1q1n ^*And angle command θ_1n ^*Based on v_u1 ^*, V_v1 ^*, V_w1 ^*But v_1d2n ^*, V_1q2n ^*And θ_2n ^*Based on v_u2 ^*, V_v2 ^*, V_w2 ^*But v_1d3n ^*, V_1q3n ^*And θ_3n ^*Based on v_u3 ^*, V_v3 ^*, V_w3 ^*But v_1d4n ^*, V_1q4n ^*And θ_4n ^*Based on v_u4 ^*, V_v4 ^*, V_w4 ^*Is required.
[0057]
【The invention's effect】
As described above in detail, according to the present invention, the output voltage command within one calculation cycle of the CPU is interpolated in a plurality of stages in advance, so that the resolution of the output voltage in the time axis direction can be increased, and a high-speed CPU can be realized. It is possible to output a sinusoidal voltage and thus a current from the PWM power converter without adopting a method such as use. Thereby, it is possible to contribute to the reduction of load torque ripple, rotation unevenness, and noise.
[0058]
Claims 1 to8In any of the inventions, stepwise interpolation of the output voltage command and the angle command can be performed by relatively simple calculation.
In particular, in the invention of claim 1Is a systemYou can reduce the time spent on your request2In the invention ofClaim 1Interpolation can be performed with higher accuracy than in the present invention.
Furthermore,Claims 3-8This invention is also effective in reducing dead time and increasing interpolation accuracy.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of an output voltage command generation pattern that is the basis of the present invention;
FIG. 2, 2 is the premise of the inventionIt is explanatory drawing of the interpolation method.
FIG. 3 Claim1It is explanatory drawing of the interpolation method in this invention.
FIG. 42It is explanatory drawing of the interpolation method in this invention.
FIG. 5It becomes the premise of inventions 3 and 4It is explanatory drawing of the interpolation method.
FIG. 63It is explanatory drawing of the interpolation method in this invention.
FIG. 74It is explanatory drawing of the interpolation method in this invention.
FIG. 8It is the premise of inventions 5 and 6It is explanatory drawing of the interpolation method.
FIG. 9 claims5It is explanatory drawing of the interpolation method in this invention.
FIG. 10 Claim6It is explanatory drawing of the interpolation method in this invention.
FIG. 11, 2It is a functional block diagram to which the embodiment of the invention described in is applied.
FIG. 12 claims3.4It is a functional block diagram to which the embodiment of the invention described in is applied.
FIG. 13 claims5, 6It is a functional block diagram to which the embodiment of the invention described in is applied.
FIG. 14 claims7,8It is a functional block diagram to which the embodiment of the invention described in is applied.
FIG. 15 is a diagram illustrating an example of a voltage command waveform for explaining a conventional technique.
FIG. 16 is a diagram illustrating an output voltage command, a CPU interrupt signal, and a carrier timing for explaining the related art.
[Explanation of symbols]
11, 15 Voltage interpolation calculation means
12 Angle interpolation calculation means
13, 16 Rotating coordinate conversion means
14 2/3 phase conversion means
21-24 registers
30 Data selector
40 Select signal generator
50 Carrier generator
60 comparator

Claims (8)

Interpolate multiple output voltage commands (hereinafter referred to as reference voltage commands) that are calculated at a fixed period by the calculation means using multiple output voltage commands (hereinafter referred to as interpolation voltage commands), and compare these interpolation voltage commands with the carrier. In the PWM pulse generation method for generating the PWM pulse,
Multiple interpolation voltage commands between the reference voltage command calculated this time and the reference voltage command calculated next time by linearly approximating the reference voltage command calculated last time, the reference voltage command calculated this time, and the reference voltage command calculated next time A method for generating PWM pulses, characterized in that: Interpolate multiple output voltage commands (hereinafter referred to as reference voltage commands) that are calculated at a fixed period by the calculation means using multiple output voltage commands (hereinafter referred to as interpolation voltage commands), and compare these interpolation voltage commands with the carrier. In the PWM pulse generation method for generating the PWM pulse,
The previous reference voltage command, current reference voltage command and next reference voltage command are linearly approximated , and the average value of the previous reference voltage command and the current reference voltage command is obtained. A method of generating PWM pulses, wherein a plurality of subsequent interpolation voltage commands are generated using a value as a first interpolation voltage command . Interpolate multiple output voltage commands (hereinafter referred to as reference voltage commands) that are calculated at a fixed period by the calculation means using multiple output voltage commands (hereinafter referred to as interpolation voltage commands), and compare these interpolation voltage commands with the carrier. In the PWM pulse generation method for generating the PWM pulse,
In the case where the output voltage of a sine wave is separated into orthogonal biaxial rotational coordinate components and individually controlled, an angle command for rotational coordinate conversion that converts the rotational coordinate components into stationary coordinate components is introduced and used for rotational coordinate conversion. A plurality of angle commands are generated by the calculation using the previous value and the current value of the angle command, and by rotating coordinate conversion using these angle commands, the reference voltage command calculated this time and the next reference voltage command A method of generating PWM pulses, comprising generating a plurality of interpolation voltage commands between Interpolate multiple output voltage commands (hereinafter referred to as reference voltage commands) that are calculated at a fixed period by the calculation means using multiple output voltage commands (hereinafter referred to as interpolation voltage commands), and compare these interpolation voltage commands with the carrier. In the PWM pulse generation method for generating the PWM pulse,
In the case where the output voltage of a sine wave is separated into orthogonal biaxial rotational coordinate components and individually controlled, an angle command for rotational coordinate conversion that converts the rotational coordinate components into stationary coordinate components is introduced and used for rotational coordinate conversion. By calculating the average value of the previous value and the current value of the angle command, generating multiple angle commands after that, and performing rotational coordinate conversion using these angle commands, the previously calculated reference voltage command and the current value are calculated. A method for generating a PWM pulse, comprising: generating a plurality of interpolation voltage commands between the reference voltage commands performed. Interpolate multiple output voltage commands (hereinafter referred to as reference voltage commands) that are calculated at a fixed period by the calculation means using multiple output voltage commands (hereinafter referred to as interpolation voltage commands), and compare these interpolation voltage commands with the carrier. In the PWM pulse generation method for generating the PWM pulse,
In the case where the output voltage of the sine wave is separated into orthogonal biaxial rotational coordinate components and individually controlled, a d-axis voltage command and a q-axis voltage command are introduced, and the d-axis voltage command and q of the reference voltage command component calculated last time are introduced. The axis voltage command, the d-axis voltage command and the q-axis voltage command of the reference voltage command component calculated this time, and the d-axis voltage command and the q-axis voltage command of the reference voltage command component calculated next time are respectively approximated linearly and calculated this time. Generating a plurality of d-axis voltage commands and q-axis voltage commands between the d-axis voltage command and q-axis voltage command of the reference voltage command component and the d-axis voltage command and q-axis voltage command of the reference voltage command component to be calculated next time And a plurality of interpolated voltage commands between the reference voltage command calculated this time and the reference voltage command calculated next time are generated by converting the d-axis voltage command and the q-axis voltage command into rotation coordinates. PWM pulse How it occurs. Interpolate multiple output voltage commands (hereinafter referred to as reference voltage commands) that are calculated at a fixed period by the calculation means using multiple output voltage commands (hereinafter referred to as interpolation voltage commands), and compare these interpolation voltage commands with the carrier. In the PWM pulse generation method for generating the PWM pulse,
In the case where the output voltage of the sine wave is separated into orthogonal biaxial rotational coordinate components and individually controlled, a d-axis voltage command and a q-axis voltage command are introduced, and the d-axis voltage command and q of the reference voltage command component calculated last time are introduced. The axis voltage command, the d-axis voltage command and the q-axis voltage command of the reference voltage command component calculated this time, and the d-axis voltage command and the q-axis voltage command of the reference voltage command component to be calculated next time are linearly approximated and calculated last time. Average values of the d-axis voltage command and q-axis voltage command of the reference voltage command component and the d-axis voltage command and q-axis voltage command of the reference voltage command component calculated this time are respectively obtained, and the d-axis voltage command after these average values is obtained. And generating a plurality of interpolation voltage commands by performing rotational coordinate conversion using the q-axis voltage command . Interpolate multiple output voltage commands (hereinafter referred to as reference voltage commands) that are calculated at a fixed period by the calculation means using multiple output voltage commands (hereinafter referred to as interpolation voltage commands), and compare these interpolation voltage commands with the carrier. In the PWM pulse generation method for generating the PWM pulse,
Introducing a rotation coordinate conversion angle command to convert the rotation coordinate component into a stationary coordinate component when the sine wave output voltage is separated into orthogonal biaxial rotation coordinate components and controlled individually, and the previously calculated reference voltage command The d-axis voltage command and q-axis voltage command of the component, the d-axis voltage command and q-axis voltage command of the reference voltage command component calculated this time, and the d-axis voltage command and q-axis voltage command of the reference voltage command component calculated next time A plurality of d-axis voltages between the d-axis voltage command and q-axis voltage command of the reference voltage command component calculated this time by approximating each straight line and the d-axis voltage command and q-axis voltage command of the reference voltage command component calculated next time The command and the q-axis voltage command are generated, and the generated d-axis voltage command and the q-axis voltage command are generated by calculation using the previous value and the current value of the angle command used for the rotation coordinate conversion. Times using directives By coordinate transformation method generates a PWM pulse and generating a plurality of interpolated voltage command between the reference voltage command computed the current and next reference voltage command. Interpolate multiple output voltage commands (hereinafter referred to as reference voltage commands) that are calculated at a fixed period by the calculation means using multiple output voltage commands (hereinafter referred to as interpolation voltage commands), and compare these interpolation voltage commands with the carrier. In the PWM pulse generation method for generating the PWM pulse,
Introducing a rotation coordinate conversion angle command to convert the rotation coordinate component into a stationary coordinate component when the sine wave output voltage is separated into orthogonal biaxial rotation coordinate components and controlled individually, and the previously calculated reference voltage command The d-axis voltage command and q-axis voltage command of the component, the d-axis voltage command and q-axis voltage command of the reference voltage command component calculated this time, and the d-axis voltage command and q-axis voltage command of the reference voltage command component calculated next time The respective average values of the d-axis voltage command and q-axis voltage command of the reference voltage command component previously calculated by linear approximation and the d-axis voltage command and q-axis voltage command of the reference voltage command component calculated this time are obtained, respectively. The d-axis voltage command and the q-axis voltage command after the average value are generated, and the average value of the previous value and the current value of the angle command used for the rotation coordinate conversion for each generated d-axis voltage command and q-axis voltage command. Seeking it By rotating the coordinate transformation using a plurality of angle command generated per later, PWM pulses and generating a plurality of interpolated voltage command between the reference voltage command computed reference voltage command and the present the previously computed How it occurs.

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