JP3616261B2 - Pulse accumulator and electronic flow meter - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
In the present invention, an MR element is generated by a pulse accumulator that counts an integrated value of input pulses and a change in a magnetic field generated in response to rotation of an impeller that rotates in proportion to the flow rate of water, gas, or the like. The present invention relates to an electronic flow meter that measures a flow rate using periodic pulses.
[0002]
[Prior art]
When an electronic flow meter using an MR element is applied to a device such as a water meter or a gas meter that is difficult to supply power from the outside, a battery is generally used as a power source. It is necessary to suppress power consumption in order to extend the battery life. For this reason, since the clock frequency of the CPU that controls the electronic flow meter is lowered (usually 32 kHz is used), the arithmetic processing capability of the CPU is delayed.
[0003]
The impeller 1 that receives the fluid under the low-speed clock frequency accurately measures and integrates the excessive flow rate range from the band that measures and integrates the minute flow rate, and directly sends the flow rate signal to the CPU to cope with the high frequency that cannot be processed. There is a method to improve the integration accuracy by counting the number of input pulses once with the counter and processing the integration according to the number of pulses counted by the counter every integration cycle of the CPU. was taken.
[0004]
An example of such a conventional electronic flow meter is disclosed in Japanese Patent Application Laid-Open No. 7-280607.
FIG. 4 is a block diagram of a conventional electronic flow meter disclosed in JP-A-7-280607.
In the figure, 1 is an impeller rotated by a fluid to be measured, 1a is a permanent magnet attached to the rotating shaft of the impeller 1, 2 is a flow signal output means comprising an MR element, and 3 is a control of the electronic flow meter. In addition, a microprocessor (CPU) for performing arithmetic processing, 4 is a clock generator for operating the CPU 3, 5 is a memory, and 6 is a display means for displaying the accumulated measurement value.
Reference numeral 7 denotes a latch circuit that allows the flow rate signal pulse from the flow rate signal output means 2 to pass in response to the latch signal for each integration processing required time of the CPU 3, and 8 denotes a counter that counts the number of flow rate signal pulses from the latch circuit 7.
[0005]
[Problems to be solved by the invention]
The electronic flow meter having the above-described configuration requires the latch circuit 7 that operates in hardware, and the power for operating the latch circuit 7 shortens the battery life. In addition, such a flow meter performs flow integration based on a predetermined instrument constant (relationship between unit measurement value / number of pulses). The processing for calculating the count value of the counter 8 to the measurement value requires multiplication processing of the weight constant corresponding to the instrument constant, and the number of flow rate signal pulses of the counter 8 changes every integration processing. Execute.
Since the multiplication process requires a lot of processing time of the CPU 3, if the flow rate signal pulse is input at an interval shorter than the processing time of the CPU 3, the process cannot catch up and a measurement leak occurs, and the accuracy of integration deteriorates. there were.
[0006]
The present invention has been made in order to solve the problem, and is an electronic type capable of performing high-precision flow rate integration processing with low power consumption without performing miscounting even when the frequency of the flow rate signal is increased. It is an object of the present invention to provide a flow meter and a pulse integrating device that integrates input pulses without miscounting.
[0007]
[Means for Solving the Problems]
(1) An electronic flow meter according to the present invention comprises a counter for counting input pulses and a plurality of predetermined values (N1) according to the count value C of the counter in a pulse accumulator that accumulates input pulses. , N2,..., Where N1 <N2 <... Is set in advance, and the count value C of the counter is read at regular intervals, and a predetermined value (N1, N2) corresponding to the count value C is read. ,...) Is integrated as an integrated value, and the corresponding predetermined value (one of N1, N2,...) Or a value corresponding to the predetermined value is subtracted from the counter. It is equipped with.
[0008]
(2) In the pulse integration device of (1), the setting means sets the predetermined value to 1 when the count value C is less than 1 to N1, and is predetermined when the count value C is N1 or more. The value is set to N1 in two steps.
[0009]
(3) In the pulse integrating device according to (1) or (2), the setting means is a means capable of variably setting predetermined values (N1, N2,...).
[0010]
(4) The electronic flow meter according to the present invention is a flow rate signal generating means for outputting a pulse signal according to a fluid flow rate, and any one of the above (1) to (3) using the pulse signal as an input pulse. When integrating a predetermined value (one of N1, N2,...) By the integration processing means of the integration device, the flow rate value corresponding to the predetermined value is integrated. It is a thing.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1 FIG.
FIG. 1 is a block diagram of an electronic flow meter showing Embodiment 1 of the present invention, and FIG. 2 is a flowchart of processing.
In the figure, 1, 2, 4 to 6 are the same as in the description of the conventional apparatus. Reference numeral 10 denotes a microprocessor (CPU) that controls the electronic flow meter and performs arithmetic processing. Reference numeral 11 denotes a counter that holds a flow signal pulse from the flow signal output means 2. The counter 11 is configured as a chip integrated with the CPU 10.
Reference numeral 12 denotes a setting means including a keyboard, which inputs a change of a setting value or the like from the outside. In addition to the keyboard 12, it is also possible to make a change input such as a setting value using a communication line from a device having another CPU connected to the electronic flow meter.
[0012]
The operation of the electronic flow meter of the first embodiment will be described with reference to the flowchart of FIG.
(1) First, the flow rate signal pulse number C remaining in the counter 11 is determined (steps S1 to S2).
(2) When the number of remaining flow rate signal pulses is 1 to less than a predetermined number n (n> 2), normal integration processing is performed. In the normal integration process, the flow rate w corresponding to one flow rate signal pulse is added to the integrated value K to perform flow rate integration (K = K + w) (step S4),
[0013]
(3) One flow rate signal pulse that has been integrated is subtracted from the remaining pulse number C of the counter 11 (step S5).
(4) Here, step S3 is a determination for bypassing the integration process when the number of remaining flow rate signal pulses is zero.
[0014]
(5) When the number of remaining flow rate signal pulses is equal to or greater than a predetermined number n, a batch integration process is performed. In the summation processing, the flow rate X (= n × w) corresponding to n flow rate signal pulses is added to the cumulative value K to perform flow rate integration (K = K + X) (step S6),
(6) Subtract n flow signal pulses that have been integrated from the remaining pulse number C of the counter 11 (step S7).
(7) After executing main processing such as changing the display of the measured value on the display means 6, the process returns to the determination of the remaining flow rate signal pulse number of the counter 11 in step S1.
[0015]
During this one routine process, the predetermined number n and the second predetermined number m to be described later are appropriately set according to the number of flow signal pulses input from the flow signal output means 2 to the counter 11 so that there is no measurement leakage due to overflow of the counter 11. This setting change is made from the setting means 12 connected to the CPU 10, and the predetermined numbers n and m are recorded in the memory 5 and used during processing.
[0016]
Here, the flow rate integration in step S4 and step S6 can be performed by addition processing of 1 or a constant n, and the processing time can be shortened compared to multiplication processing, and the CPU 10 can have a surplus in the processing capacity.
[0017]
In the electronic flow meter having the above-described configuration, the latch circuit 7 required in the conventional example is only unnecessary program processing, battery power for operating the latch circuit 7 can be reduced, and the battery life can be extended.
In addition, by determining the number of remaining pulses in the summarization process in two stages, it is possible to respond to steep pulse number input without delaying the timing of pulse metering. Long life can be achieved.
[0018]
Embodiment 2. FIG.
FIG. 3 is a flowchart of the process according to the second embodiment of the present invention.
In the figure, S1 to S8 are the same as those described in the first embodiment.
(1) The flow rate signal pulse number C remaining in the counter 11 is determined (steps S1 to S10).
(2) When the remaining flow rate signal pulse number C is less than the first to second predetermined number m (m> n), the same integration process as in the first embodiment is executed (steps S3 to S5).
[0019]
(3) When the remaining flow rate signal pulse number C is equal to or greater than the second predetermined number m, the second summation process is performed. In the second summary integration process, the flow rate X (= n × w) corresponding to m flow rate signal pulses is added to the integrated value K to perform flow rate integration (K = K + X) (step S11),
(4) The flow rate signal pulse m that has been integrated is subtracted from the remaining pulse number C of the counter 11 (step S12).
(5) After executing main processing such as changing the display of the measured value on the display means 6, the process returns to the determination of the remaining flow rate signal pulse number of the counter 11 in step S1.
[0020]
Next, the effect of making the predetermined number of determinations two stages of n and m (m> n) will be described.
For convenience, the description will be made assuming that n = 4 and m = 8, for example. The difference between the number of inflow pulses to the counter 11 and the number of measurement integration processing pulses remains in the counter 11 for one processing routine time. When the constant of the summarization processing is one stage as in the first embodiment and the constant n is a small value of 4 or less, the overflow measurement of the counter 11 is measured when the frequency of the flow signal is a sharp increase in the number of inflow pulses. There is concern about leakage.
[0021]
On the other hand, when n is a large value of 8 or more, an unmeasured pulse remaining number is always generated in the counter 11 and a measurement timing delay occurs. By making the predetermined number of determinations in two stages in this way, a delay in measurement timing can be prevented, and a steep increase in the number of inflow pulses can be dealt with.
[0022]
The improvement in adaptability to a sharp increase in the number of inflow pulses means that the processing routine time for one time can be increased, and the clock frequency can be further reduced for power saving.
[0023]
In the above description, the predetermined number of determinations is two stages, but it may be further multistage.
[0024]
Embodiment 3 FIG.
The third embodiment is a pulse integrating device that integrates input pulses, and can be applied to measuring not only the flow rate but also a measurement object other than the flow rate.
FIG. 4 is a flowchart of the process of the pulse integrating device according to the third embodiment of the present invention.
[0025]
Next, the operation will be described.
(1) A plurality of predetermined values (N1, N2,..., Where N1 <N2 <...) Corresponding to the count value C of the counter are set by the setting means (step T1). .
(2) The input pulse is counted by the counter, and the counter value C is read (step T2).
[0026]
(3) Next, a predetermined value corresponding to the count value C is determined (step T3).
In this determination, first, the size of the count value C is determined, and a predetermined number (one of N1, N2,...) Corresponding to the size is output.
(5) The determined predetermined value or a value corresponding to the predetermined value (predetermined value × k, where k is a constant) is integrated as an integrated value.
(6) A predetermined value (one of N1, N2,...) Determined from the count value C of the counter is subtracted.
[0027]
As described above, the predetermined number (N1, N2,..., Where N1 <N2 <...) Corresponding to the magnitude of the counter value C of the counter can be arbitrarily set. Can be set in multiple stages.
The first embodiment and the second embodiment are also one form of this pulse integrating device. In the first embodiment, the predetermined value is one step (in FIG. 4, 1 is also a predetermined value, so the predetermined value is 1 and N1). In the second embodiment, the predetermined value is in two stages (in FIG. 4, the predetermined values are 1, N1, and N2, so that there are three stages).
[0028]
Further, the predetermined value is not only stepwise, but for example, the predetermined value may be a value proportional to the count value of the counter.
[0029]
【The invention's effect】
As described above, the pulse integrating device and the electronic flow meter of the present invention do not require the use of a latch circuit, so that the operating power of the latch circuit can be reduced and the battery life can be extended. Further, since the predetermined value is integrated according to the count value of the counter, it is possible to cope with a steep pulse number input without delaying the pulse metering timing.
[Brief description of the drawings]
FIG. 1 is a block diagram of an electronic flow meter according to a first embodiment of the present invention.
FIG. 2 is a process flowchart of the electronic flow meter according to the first embodiment of the present invention.
FIG. 3 is a process flowchart of the electronic flow meter according to the second embodiment of the present invention.
FIG. 4 is a process flowchart of a pulse integrating device according to Embodiment 3 of the present invention.
FIG. 5 is a block diagram of a conventional electronic flow meter.
[Explanation of symbols]
1 impeller, 2 flow rate signal output means,
3, 10 CPU 4 clock generator,
5 memory, 6 display means 7 latch circuit, 8, 11 counter,
12 Setting means

Claims (4)

In a pulse integration device that integrates input pulses,
A counter for counting input pulses;
Setting means for presetting a plurality of predetermined values (N1, N2,..., N1 <N2 <...) According to the count value C of the counter;
The count value C of the counter is read at regular intervals, and a predetermined value (one of N1, N2,...) Corresponding to the count value C is integrated as an integrated value, and the corresponding predetermined value ( N1, N2,...) Or an integration processing means for subtracting a value corresponding to the predetermined value. The pulse integration device according to claim 1, wherein
Setting of the predetermined value by the setting means is characterized in that the predetermined value is set to 1 when the count value C is in the range of 1 to less than N1, and the predetermined value is set to N1 when the count value C is N1 or more. Pulse accumulator. In the pulse integration device according to claim 1 or 2,
The pulse integrating device according to claim 1, wherein the setting means is means capable of variably setting predetermined values (N1, N2,...). Flow rate signal generating means for outputting a pulse signal according to the fluid flow rate; and
The pulse integration device according to any one of claims 1 to 3, wherein the pulse signal is an input pulse.
An electronic flow rate characterized in that when a predetermined value (one of N1, N2,...) Is integrated by the integration processing means of the integration device, a flow value corresponding to the predetermined value is integrated. Total.

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