JP3583878B2 - Electroplating method - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an electrolytic plating method for forming a metal thin film by an electrochemical reaction, and more particularly to an electrolytic plating method in which the thickness of a formed metal thin film can be adjusted by a difference in the amount of charge supplied to a portion to be plated.
[0002]
[Prior art]
The plating method includes an electrolytic plating method and an electroless plating method, both of which are methods for reducing metal ions in an aqueous solution, depositing a metal, and forming a metal film. Generally, when a thick metal film is formed in a short time, an electrolytic plating method is employed.
[0003]
In the process of manufacturing a semiconductor device, when connecting a semiconductor element and a lead frame with a gold wire, a thick plating metal is formed on a bonding pad of the semiconductor element in order to reduce damage to the semiconductor element or improve adhesion of the gold wire. May form. In recent years, a method has been adopted in which bumps are formed on a surface of a semiconductor device by a plating method to perform connection.
[0004]
FIG. 3 is a sectional view of a semiconductor device in which a metal film is formed by a conventional plating method. In the figure, 1 is an n-type semiconductor region, 2 is a p-type semiconductor region formed on the surface of the n-type semiconductor region 1, 3 is a first electrode formed on the p-type semiconductor region 2, and 4 is an n-type semiconductor region A second electrode 5 formed on 1 is a plating electrode made of a metal thin film connected to a power supply (not shown), 6 is a photoresist formed on the plating electrode 5 and opening a portion to be plated, 7 Is a plating metal deposited by supplying a charge to the plating electrode 5.
[0005]
The plating electrode 5 connected to the negative terminal of the power supply is disposed so as to face a counter electrode (not shown) connected to the positive terminal of the power supply, immersed in a plating solution, and supplied with current from the power supply. On the surface of the plating electrode 5 exposed at the opening of the photoresist 6, the metal ions dissolved in the plating solution are reduced, and the metal is deposited on the surface of the plating electrode 5. Since there is no metal deposition in the portion covered with the photoresist 6, the plating metal 7 is deposited only on the first and second electrodes 3 and 4 exposed at the openings of the photoresist 6. The electrons supplied from the power supply pass through the plating electrode 5 and are uniformly supplied to the entire surface of the semiconductor device (normally, a semiconductor wafer on which a plurality of semiconductor devices are formed). Therefore, the deposited metal 7 has the same thickness on the first electrode 3 and the second electrode 4.
[0006]
[Problems to be solved by the invention]
Usually, the surface of a semiconductor device has a step due to a multilayer wiring, a mesa structure and the like, and is not flat. When a plating metal is formed on a stepped surface by a conventional electrolytic plating method, since the thickness of the deposited plating metal 7 is uniform, the height of the surface of the plating metal 7 depends on the step of the surface to be plated. Will vary.
[0007]
When bonding a gold wire to the surface of the plating metal 7 having a varied height, the bonding apparatus may have difficulty in recognizing the bonding pad. Further, when a bump electrode formed by a plating method is used to form a surface-mounted structure, the height may vary and a connection may not be established. The present invention solves the above-described problem by, when plating a semiconductor device surface having a step, changing the thickness of the plating metal deposited according to the height of the step, and making the height of the plating metal surface uniform. An object of the present invention is to provide a possible electrolytic plating method.
[0008]
[Means for Solving the Problems]
Since the present invention is to achieve the above object, one to the counter electrode of the power source, it is connected to be plated portion to the other, a method of depositing a metal on the object to be plated portion by electrolytic plating, the to-be-plated portion identical substrate The first and second portions to be plated are at least different in height from each other. The first portion to be plated has a rectifying function between the power supply and the portion to be plated in a direction in which a forward current flows. connect, simultaneously supplying a charge to the first and second to-be-plated portion from the power source, by utilizing the forward rectifying characteristics of the element, the metal to be deposited on the first of the plating part surface The thickness of the metal deposited on the surface of the second plated portion is changed, and the height of the surface of the plated metal deposited on the first and second plated portions is made uniform.
[0009]
In particular, when plating the surface of the semiconductor device, the thickness of the plating metal deposited on the portion to be plated can be easily adjusted by using a diode formed in the semiconductor device as an element having a rectifying action. can do.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 shows an embodiment of the present invention. In the drawing, 1 is an n-type semiconductor region on the surface of which a semiconductor element is formed, 2 is a p-type semiconductor region formed on the surface of the n-type semiconductor region 1, and 3 is a first semiconductor region formed on the p-type semiconductor region 2. The electrodes 4, 4 are second electrodes formed on the n-type semiconductor region 1, 6 is a photoresist for opening a portion to be plated, 7 is plating metal, 8 is connected to a power supply (not shown), 1 is a plating electrode formed on the first electrode.
[0011]
As shown, the heights of the first electrode 3 and the second electrode 4 are not the same. The semiconductor device having such a structure is immersed in a plating solution and subjected to electrolytic plating as follows. (Note that when plating is performed, the plating electrode 8 and the side surface of the n-type semiconductor region 1 are coated with a mask material insoluble in the plating solution so as not to come into contact with the plating solution.) The electrons supplied from the connected plating electrode 8 are supplied to the first electrode 3 via the n-type semiconductor region 1 and the p-type semiconductor region 2. On the other hand, electrons supplied to the second electrode 4 only pass through the n-type semiconductor region 1. At this time, the amount of charge (electrons) supplied to the first electrode 3 and the amount of charge (electrons) supplied to the second electrode 4 differ depending on the setting of the voltage of the power supply.
[0012]
That is, the electrons supplied to the first electrode 3 are supplied according to the current-voltage characteristics of the pn junction diode composed of the n-type semiconductor region 1 and the p-type semiconductor region, whereas the electrons supplied to the second electrode 4 The supplied electrons are supplied according to the current-voltage characteristics of the bulk resistance of the n-type semiconductor region 1.
[0013]
FIG. 2 schematically shows current-voltage characteristics supplied to the first electrode 3 and the second electrode 4. As shown by the curve A, the current supplied to the first electrode 3 shows a rectifying characteristic of a diode in which the current increases exponentially in the forward direction. On the other hand, the current supplied to the second electrode 4 shows a proportional characteristic as shown by a straight line B. Assuming that the current indicated by the curve A is IA and the current indicated by the straight line B is IB, they are expressed as follows.
IA = I0 (exp (qV / kT) -1)
IB = RV
Here, I0 is the saturation current, q is the elementary charge, V is the applied voltage, k is the Boltzmann constant, T is the temperature, and R is the resistance.
[0014]
For simplicity of description, assuming that the area of the plated portion of the first electrode 3 and the second electrode 4 is the same, the thickness of the first electrode 3 and the thickness of the second electrode 4 are proportional to the current values of the curves A and B in FIG. Plated metal will be deposited on the first and second electrodes. If the areas of the plated portions of the first electrode 3 and the second electrode are not the same, a plated metal having a thickness proportional to the current density is formed. By appropriately setting a voltage value (a range satisfying the relationship of IA <IB) that is equal to or less than a voltage value at which B intersects, the thickness of the second electrode 4 is higher than the thickness of the plating metal deposited on the first electrode 3. Can be adjusted so that the thickness of the plating metal deposited on the substrate becomes thicker and the height of the plating metal surface after plating is the same.
[0015]
The case where electrolytic plating is performed on a semiconductor device having a pn junction diode formed of an n-type semiconductor region and a p-type semiconductor region has been described above, but the present invention is not limited to the pn junction diode. For example, it is also possible to adjust the thickness of the deposited plating metal in a semiconductor element having rectification characteristics such as a PIN junction diode or a Schottky junction diode formed on a semiconductor device. In addition, a terminal having rectification characteristics is selected from three-terminal devices formed on the semiconductor device, for example, terminals such as a PNP transistor and a Schottky junction transistor, and a semiconductor device having rectification characteristics is formed. It is also possible to adjust the thickness of the plated metal to be formed.
[0016]
Furthermore, depending on the impurity concentration of the n-type or p-type semiconductor region and the type of semiconductor, a diode having a large bulk resistance and a large forward current may be formed. The present invention can be applied to such a semiconductor device. In this case, unlike the above-described embodiment, the thickness of the plating metal deposited on the electrode to which the bulk resistance is connected is smaller than the thickness of the plating metal deposited on the electrode to which the diode having the rectifying action is connected. Such a combination may be selected for a structure in which an electrode to which a bulk resistor is connected is provided above the step and a diode having a rectifying action is connected below the step.
[0017]
With the various changes described above, the method of forming the plating electrode 8 can be changed without being limited to the method of connecting to the back surface side of the semiconductor region.
[0018]
The plating method may be adjusted to a voltage that causes a difference in the thickness of the deposited plating metal over a predetermined plating time, or may be adjusted to a voltage that causes a difference in the thickness of the deposited plating metal only for a fixed time, and may be adjusted for a fixed time. May be adjusted to a voltage that does not cause a difference in the thickness of the deposited plating metal. When the voltage is set to be high, the difference in the thickness of the deposited plating metal tends to be small, and the quality of the plating metal may be deteriorated. Therefore, it is preferable to supply the current at a relatively low voltage. Similarly, above the voltage at which the straight line A and the straight line B shown in FIG. 2 intersect, the charge amount of the plated portion connected with the element having the rectifying action is larger than that of the plated portion not connected with the element. Even with such a high voltage setting, the quality of the deposited plating metal may be degraded, which may be undesirable.
[0019]
As described above, according to the present invention, the height of the plating metal can be kept constant by adjusting the thickness of the plating metal formed on the semiconductor device. By keeping the height of the plated metal constant, it is possible to solve the problem that it is difficult for the bonding apparatus to recognize the bonding pad when bonding a gold wire to the bonding pad of the semiconductor device. In addition, when surface mounting is performed by using the bump electrode formed by the plating method of the present invention, even if the height of the semiconductor device surface varies, the bump height does not vary, so that the connection can be surely performed.
[0020]
【The invention's effect】
As described above, according to the present invention, it is possible to easily adjust the thickness of the plating metal by adjusting the amount of charge supplied to the portion to be plated by using the rectifying element. When the present invention is applied to the formation of bonding pads and bumps of a semiconductor device, the height of the plated metal can be kept constant even if the height of the surface of the semiconductor device varies. An error or poor connection can be prevented, and a semiconductor device can be manufactured with high yield.
[0021]
Further, the plating method of the present invention merely controls the supplied current and voltage, and is easy to control.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating an embodiment of the present invention.
FIG. 2 is a graph illustrating an embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating a conventional electrolytic plating method.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 n-type semiconductor region 2 p-type semiconductor region 3 first electrode 4 second electrode 5 plating electrode 6 photoresist 7 plating metal 8 plating electrode

Claims (2)

In a method of connecting a counter electrode to one of the power supplies and a plating portion to the other, and depositing metal on the plating portion by electrolytic plating,
The to-be-plated part includes first and second to-be-plated parts having at least different heights on the same substrate, and the first to-be-plated part has an element having a rectifying action between the power supply and the to-be-plated part. Connected in a direction in which a forward current flows , supplying electric charges simultaneously from the power source to the first and second plated portions, and utilizing the forward rectification characteristics of the element to form the first plated portion. and characterized by varying the thickness of the metal deposited on the metal and the second to-be-plated portion surface deposited on the surface, align the heights of the first and second plating a metal surface to be deposited on the plated portion Electrolytic plating method. In the electrolytic plating method according to claim 1,
The electroplating method, wherein the plated portion is formed on a surface of a semiconductor device, and the element is a diode formed in the semiconductor device.

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