JP3581252B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to the production how the semiconductor device, particularly relates to as engineering for separating individually each chip area of a semiconductor wafer fuse element is formed which is controlled blown by a laser beam, for example, a semiconductor memory It is applied to the manufacture of
[0002]
[Prior art]
As an example of a semiconductor chip on which a fuse element controlled to be blown by a laser beam is formed, there is, for example, a semiconductor memory provided with a redundant circuit for replacing a defective memory cell with a spare memory cell.
[0003]
In manufacturing such a semiconductor memory, after forming elements on a wafer, a redundancy process for storing addresses of defective cells in each chip area in a fuse element is performed.
[0004]
FIG. 8 is a flowchart schematically showing an example of a process after forming elements on a wafer in a conventional semiconductor memory manufacturing process.
FIG. 9 schematically shows a fuse element blowing device used in the redundancy process shown in FIG. 8, and a diamond blade 3 and a wafer 1 used in a dicing process for separating each chip region individually thereafter. .
[0005]
FIG. 10 schematically shows a part of the wafer 1 in FIG. 9 and the fuse elements 5 in the chip area 4 and the dicing lines 6 between the chip areas.
In the flowchart shown in FIG. 8, first, probing is performed by a die sorter (not shown), and electrical characteristics of each chip area are measured by a first die sort to detect a defective cell, and an address of the defective cell is determined by a fuse element. To perform the redundancy for memorizing it. At this time, the fuse element group is selectively blown by the laser light 2 emitted from the fuse element blowing device.
[0006]
Next, lapping for shaving the back surface of the semiconductor wafer is performed.
Thereafter, a second die sort is performed in the same manner as in the first die sort, and the result of the above-mentioned redundancy is confirmed.
[0007]
Then, after mounting the back surface of the semiconductor wafer on the adhesive tape in the wafer mounting process, as a dicing process for individually separating each chip region of the wafer, a full cut is performed on the dicing line 6 by the diamond blade 3. Do.
[0008]
Thereafter, a semiconductor device is obtained by performing mounting, die bonding, and resin molding on each chip according to a desired form of the semiconductor package. However, when the dicing line 6 is fully cut by the diamond blade 3 as described above, cracks, distortions, damages due to chips of the substrate (usually silicon), and the like occur on the chip.
[0009]
To alleviate these problems, it is possible to increase the number of revolutions of the diamond blade 3 or to reduce the particle diameter of the diamond, but this can also solve the above-mentioned problems. Did not.
[0010]
On the other hand, in the dicing step, it is conceivable to perform a full cut by fusing the dicing line 6 by irradiating a laser beam from a laser fusing device instead of the diamond blade 3.
[0011]
However, performing full cutting by fusing the dicing line 6 with laser light requires a long time for fusing with the ability of laser light, so that a large number of laser fusing devices are used at the same time in order to reduce the fusing time. Then, since the laser fusing apparatus is generally expensive, it becomes very expensive as a whole.
[0012]
Further, if the number of fuse elements in one chip area of the semiconductor memory is large, it may reach several thousands, and the time of the redundancy process becomes relatively long, and it is desirable to effectively use the time of the redundancy process.
[0013]
In order to solve the problems of the conventional process as described above and to effectively utilize the time of the redundancy process, the redundancy process is performed at the same time as the dicing line is melted and cut by the laser beam used for the redundancy. It is conceivable to make a cut.
[0014]
However, as described above, when the dicing line is blown by the laser beam used in the redundancy process to perform a full cut, the size of the entire wafer expands with the separation of each chip region by the full cut, and after the fuse element is blown. In the die sort (the second die sort), the same automatic probing as the die sort before the fuse element is blown (the first die sort) becomes impossible, and it becomes necessary to perform the manual probing. Also, after separation of each chip region by full cut, it becomes difficult to mount the wafer as described above.
[0015]
[Problems to be solved by the invention]
As described above, when a conventional semiconductor device is manufactured, when a dicing line is fully cut with a diamond blade as a dicing process after forming elements on a wafer, cracks, distortion, damage due to substrate debris However, there is a problem that a chip is generated on the chip.
[0016]
In addition, if the redundancy is performed in the redundancy step and the dicing line is blown by a laser beam used for the redundancy and full cut is performed, the automatic probing becomes impossible in the die sort after the fuse element is blown. there were.
[0017]
The present invention has been made in order to solve the above-mentioned problem. By effectively utilizing the time of a redundancy process and performing half-cutting on a dicing line with a laser beam, automatic probing is performed even in the second die sort. to allow for its object to provide a manufacturing how a semiconductor device capable of suppressing an increase in the number of steps by performing cracking to separate each chip area individually at the same time as the wafer mounting.
[0018]
[Means for Solving the Problems]
A method of manufacturing a semiconductor device according to the present invention includes a step of forming, on a semiconductor wafer, a chip region in which a fuse element controlled to be blown by laser light is formed, and measuring an electrical characteristic of each chip region on the semiconductor wafer. A first die sorting step of detecting a defective portion by means of a first laser beam and replacing the defective portion with a redundant element to relieve a defect and selectively blowing out the fuse element with a first laser beam. A redundancy dicing step of fusing the dicing line to a certain depth with two or more second laser beams different from the first laser beam to be used, a lapping step of shaving the back surface of the semiconductor wafer, A second die sort step to check the result of the defect relief by the sea step, and an adhesive tape with the peripheral edge attached to the ring The semiconductor wafer is mounted on, by applying a physical force, characterized by comprising a wafer mount cracking step of dividing into individual chip regions.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
The semiconductor device according to the present invention is provided with a fuse element which is controlled to be blown by a laser beam and a redundant circuit on a chip for replacing a defective electrical characteristic portion with a redundant element to remedy the defect, and providing the defective circuit in a redundancy step. The fuse element is selectively blown in accordance with the above-mentioned position, and a semiconductor memory is given as an example.
[0022]
This semiconductor memory includes a redundancy circuit for storing the address of a defective memory cell in a fuse element and replacing the defective memory cell with a redundant element to rescue the defect.
[0023]
FIG. 1 is a flowchart schematically showing an example of a process after forming elements on a wafer in a semiconductor memory manufacturing process according to the first embodiment of the semiconductor device manufacturing method of the present invention.
[0024]
FIG. 2 schematically shows an apparatus manufacturing apparatus related to a wafer in the redundancy dicing step in FIG.
In FIG. 2, a fuse element blowing laser oscillator 9 and a fuse element blowing laser optical control system 8 constituting the fuse element blowing apparatus irradiate the semiconductor wafer 1 with a first laser 2 for redundancy. .
[0025]
The laser oscillators 9a, 9b for dicing line fusing and the laser optical control systems 8a, 8b for dicing line fusing that constitute the dicing line fusing device irradiate the wafer 1 with the second laser light 10, 11 for dicing. Things. Reference numeral 7 denotes a power supply commonly used by the laser oscillators 9, 9a, and 9b.
[0026]
FIG. 3 schematically shows a chip region in which a fuse element is formed by taking out a part of the wafer in FIG. 2 and a dicing line between each chip region.
In FIG. 3, 4 is a chip area, 5 is a fuse element for redundancy, and 12 is a dicing line.
[0027]
FIG. 4 schematically shows a part of a manufacturing apparatus related to a part of a wafer in a dicing step using laser light in FIG.
FIG. 5 schematically shows a part of the wafer after the lapping step in FIG.
[0028]
FIG. 6 schematically shows an apparatus related to a wafer in the wafer mounting / cracking step in FIG.
FIG. 7 schematically shows the state of the chip and the pressure-sensitive adhesive tape after cracking as viewed from the side.
[0029]
Hereinafter, the flowchart illustrated in FIG. 1 will be sequentially described with reference to FIGS. 2 to 7.
First, in the first die sorting step, a defective cell is detected by measuring the electrical characteristics of each chip area (4 in FIG. 3) on the wafer 1.
[0030]
Next, in order to replace the defective cell with a redundant cell and relieve the defect, a fuse element is blown by a first laser beam 2 irradiated from a fuse element blowing device as in a redundancy dicing step shown in FIG. 5 out of 3) Fuse groups selectively.
[0031]
At the same time, the dicing line 12 shown in FIG. 3 is blown to a certain depth by two or more second laser beams 10 and 11 different from the first laser beam 2 used in the redundancy.
[0032]
In this case, as shown in FIG. 4, the fusing position of the group of fuse elements 5 by the first laser light 2 and the fusing position of the dicing line 12 by the second laser light 10 and 11 of two or more systems are controlled in parallel. For this purpose, it is assumed that the wafer 1 is fixed and the irradiation position of the laser beam is controlled.
[0033]
In FIG. 4, 12a and 12b are grooves of the dicing line 12 formed by laser processing. If the depth of the grooves 12a and 12b is deep, the fusing time becomes long, so that the depth of the grooves 12a and 12b is It is desirable to set the depth as small as possible without causing any trouble in wafer mounting and cracking in the process (so that cracking can be easily performed and the cut surface is not adversely affected by cracking).
[0034]
Here, in the case where two systems of the second laser beams 10 and 11 are used in the dicing step, as shown in FIG. 2, the laser beam 11 for fusing the X-axis dicing line on the wafer is used. Are irradiated from an X-axis dicing line fusing device, and a laser beam 10 for fusing the Y-axis dicing line is irradiated from a Y-axis dicing line fusing device.
[0035]
At this time, the first laser beam 1 emitted from the fuse element fusing device and the laser beam 11 emitted from the X-axis dicing line fusing device or the laser beam 10 emitted from the Y-axis dicing line fusing device are used. Are arranged side by side. The distance between these two laser beams is determined by the distance between the fuse element 5 and the center position of the dicing line, and may be arbitrarily adjusted according to the type of wafer product. Can be.
[0036]
Further, the laser beam 11 emitted from the X-axis dicing line fusing device is blown in a direction orthogonal to the fusing direction by the laser beam 10 emitted from the Y-axis dicing line fusing device. The laser beams 11, 10 output from 8a, 8b can be scanned according to the size of the wafer product.
[0037]
In this case, the first laser beam 2 and the second laser beams 10 and 11 may be of different laser types or may be combined. The power and beam diameter of the laser light are also adjusted by the laser oscillators 9, 9a, 9b of each fusing device, so that the first laser light and the second laser light of two or more systems are generated under different conditions. Can be done.
[0038]
Further, in the redundancy process, the alignment of the wafer 1 necessary for fusing the group of fuse elements 5 by the first laser light 2 and fusing the dicing line 12 by the second laser light 10 and 11 of two or more systems is as follows. A redundancy alignment mark and a dicing alignment mark are formed in each chip area 4, and any one of the alignment marks can be used.
[0039]
Next, as shown in FIG. 5, the back surface of the wafer 1 is shaved by performing a lapping process, and further, in a second die sort process, the result of the defect relief by the redundancy process is confirmed.
[0040]
Next, as shown in FIG. 6A, after the wafer 1 is placed on the adhesive tape 16 whose peripheral portion is attached to the ring 15 in the wafer mounting apparatus, as shown in FIG. As in the cracking step shown in FIG. 7, the roller 14 is brought into contact with the back surface of the adhesive tape 16 to travel (scan) while rotating.
[0041]
The roller 14 has a shape that becomes gradually thicker (thicker) toward the center. By bringing the roller 14 into contact with the back surface of the adhesive tape 16 and scanning the roller 14 sequentially in the X direction and the Y direction, each chip area is formed. By applying a physical force to separate the individual chip regions, the individual chip regions 4 can be divided as shown in FIG.
[0042]
The state of the chips and the adhesive tape after cracking has been completed is such that the chips are separated so as not to hinder the subsequent mounting process. Thereafter, a semiconductor device is obtained by performing mounting, die bonding, and resin molding on each chip.
[0043]
When the wafer 1 is mounted on the adhesive tape 16 whose peripheral portion is affixed to the ring 15 instead of the wafer mounting / cracking step shown in FIGS. When the wafer is closed, the wafer may be pressed upward from below and pasted on the adhesive tape 16 and divided into individual chip regions 4 at the same time.
[0044]
According to the above-described process, in the redundancy process, the redundancy is performed, and at the same time, the dicing line is blown and cut by a second laser beam different from the first laser beam used in the redundancy, so that the half-cut is performed. Time can be used effectively.
[0045]
Since the dicing line is blown off by the second laser beam and the half cut is performed in this manner, the expansion of the wafer size does not occur, and the subsequent second die sort is the same as the first die sort before the redundancy. Automatic probing is possible.
[0046]
In the case of performing the half-cut as described above, it is necessary to perform division (cracking) by a physical force in order to separate each chip region thereafter, but the cracking is performed simultaneously with the wafer mounting process. Therefore, it is possible to suppress the total number of steps.
[0047]
Further, by adjusting the beam diameter of the second laser beam, the fusing width of the dicing line can be narrowed as compared with the conventional diamond blade, and the gross per wafer is improved.
[0048]
In addition, since dicing is performed using laser light, the original characteristics of laser light can be used, and chip cracking and distortion, which were problems when dicing using a conventional diamond blade, It is possible to prevent damage to the chip due to silicon dust.
[0049]
【The invention's effect】
As described above, according to the present invention, the probing can be automatically performed even in the second die sort by performing the half-cut on the dicing line by the laser beam by effectively utilizing the time of the redundancy process. simultaneously it is possible to provide a manufacturing how a semiconductor device capable of suppressing an increase in the number of steps by performing cracking to separate each chip area individually.
[Brief description of the drawings]
FIG. 1 is a flowchart schematically showing an example of a process after forming elements on a wafer in a semiconductor memory manufacturing process according to a first embodiment of a semiconductor device manufacturing method of the present invention.
FIG. 2 is a diagram schematically showing an apparatus related to a wafer in a redundancy step in FIG. 1;
FIG. 3 is a view schematically showing a chip region in which a fuse element is formed by taking out a part of the wafer in FIG. 2 and a dicing line between the chip regions;
FIG. 4 is a diagram schematically showing a part of a manufacturing apparatus related to a part of a wafer in a dicing step using laser light in FIG.
FIG. 5 is a view schematically showing a part of the wafer after a lapping step in FIG. 1;
FIG. 6 is a diagram schematically showing a manufacturing apparatus related to a wafer in a wafer mounting / cracking step in FIG. 1;
FIG. 7 is a diagram schematically showing the state of the chip and the adhesive tape after cracking as viewed from the side.
FIG. 8 is a flowchart schematically showing an example of a process after forming elements on a wafer in a conventional semiconductor memory manufacturing process.
9 is a diagram schematically showing an apparatus for fusing a fuse element used in a redundancy process in FIG. 8, a diamond blade and a wafer used in a dicing process.
FIG. 10 is a view schematically showing a part of the wafer in FIG. 9 and showing fuse elements in a chip area and a dicing line between the chip areas.
[Explanation of symbols]
1 .... semiconductor wafer,
2. First laser beam,
4 ... chip area,
5 ... Fuse element,
7 ... power supply,
8. Laser optical control system for fusing fuse element
8a, 8b: laser optical control system for fusing the dicing line,
9 laser oscillator for fusing fuse element,
9a, 9b ... laser oscillator for fusing dicing line,
10, 11 ... second laser light,
12 ... Dicing line,
12a, 12b ... dicing line grooves processed by laser light,
16 ... adhesive tape,
14 ... Laura.

Claims (3)

Forming, on a semiconductor wafer, a chip region in which a fuse element controlled by fusing by a laser beam is formed;
A first die sorting step of measuring electrical characteristics of each chip area on the semiconductor wafer to detect a defective portion;
The fuse element is selectively blown by a first laser beam in order to replace the defective portion with a redundant element to relieve the defect, and at the same time, at least two systems different from the first laser beam used in the redundancy. A redundancy dicing step of fusing the dicing line to a certain depth by the second laser beam;
A lapping step of shaving the back surface of the semiconductor wafer,
And the second round of die sort step of confirming the results of the defect relief by the redundancy Sea process,
A wafer mounting cracking step of mounting the semiconductor wafer on an adhesive tape having a peripheral portion attached to a ring and applying a physical force to divide the chip into individual chip regions. Production method. The method for manufacturing a semiconductor device according to claim 1,
When dividing into individual chip areas in the wafer mounting / cracking step, a roller having a shape that becomes thicker toward the center is brought into contact with the back surface of the adhesive tape, and is run while rotating the roller separately in the X direction and the Y direction. A method for applying a physical force for individually separating each chip region. The method for manufacturing a semiconductor device according to claim 1, wherein
The semiconductor device according to claim 1, wherein the chip area is a memory chip area including a redundant circuit that replaces a defective memory cell with a spare memory cell, and wherein the fuse element stores an address of the defective cell. Production method.

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