JP3563664B2 - Laminated electronic circuit component and method of manufacturing laminated electronic circuit component - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
SUMMARY OF THE INVENTION The present invention provides a multilayered electronic device in which the equivalent series resistance (ESR) is prevented from becoming extremely small while reducing the equivalent series inductance (ESL).circuitParts and multilayer electronicscircuitThe present invention relates to a method for manufacturing a component, and is particularly suitable for a multi-terminal multilayer capacitor and a method for manufacturing the same.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, capacitors as one type of electronic components have been widely used, and multilayer ceramic chip capacitors have also been used in LSI power supply circuits.
On the other hand, in a power supply circuit of an LSI such as a CPU in which a capacitor is arranged as shown in FIG. 8, a sudden current fluctuation may occur during the operation of the LSI as shown in FIG. L and R, and the ESL and ESR of the capacitor, the voltage of the power supply circuit may fluctuate greatly (indicated by an arrow A), which may hinder the operation of the LSI. In FIG. 8, C represents the capacitance of the capacitor, ESL represents the equivalent series inductance in the capacitor, and ESR represents the equivalent series resistance.
[0003]
As described above, conventionally, in the power supply circuit of the LSI, a capacitor having a low equivalent series inductance represented by ESL has been used to suppress the voltage fluctuation due to the rapid current fluctuation, and to take measures for stabilizing the power supply circuit.
In particular, in recent CPUs, the operation frequency has been increased and the current has been increased with the increase in the operation speed, so that a further lower ESL is required. For this reason, in a multi-terminal type capacitor which is an example of a multilayer ceramic chip capacitor, the directions of flowing currents indicated by arrows B and C in FIG. 10 are controlled so as to be opposite to each other between adjacent terminal electrodes. ing. As a result, the magnetic flux is canceled out and the inductance is reduced, so that the ESL of the capacitor is further reduced.
[0004]
Here, a conventional capacitor will be described below based on the conventional low-ESL multi-terminal capacitor shown in FIGS.
As shown in FIGS. 11 and 12, the main body of the conventional multi-terminal capacitor 110 with a reduced ESL is formed of a rectangular parallelepiped laminate 112, and the capacitance of the ceramic forming the laminate 112 is small. The structure is such that the two internal electrodes 114 and 116 overlap with each other via the ceramic base so as to be obtained by the base.
[0005]
Further, the internal electrode 114 has two lead-out portions 114A that are respectively drawn out on two mutually facing two side surfaces of the four side surfaces of the stacked body 112, and the internal electrode 116 has the lead-out portion 114A. Has two drawer portions 116A which are respectively drawn on the same two side surfaces from which are drawn. That is, there are a total of four drawers 114A and four drawers 116A.
A terminal electrode 118 connected to the lead portion 114A and a terminal electrode 120 connected to the lead portion 116A are provided on these two side surfaces, respectively. At this time, as shown in FIGS. 11 and 12, the lead portions 114A and 116A are arranged so that the polarities of the terminal electrodes 118 and 120 adjacent to each other on the side surface of the stacked body 112 are alternately reversed.
[0006]
Therefore, since the adjacent lead portions 114A and 116A have different polarities, the magnetic flux generated by the high-frequency current flowing from the terminal electrodes 118 and 120 is canceled out by the adjacent lead portions 114A and 116A, thereby reducing the ESL. It has become so.
Japanese Patent Application Laid-Open No. 9-17693 and US Patent No. US Pat. No. 5,880,925 are known as publications which disclose the technology relating to these multi-terminal multilayer capacitors.
[0007]
[Problems to be solved by the invention]
On the other hand, the stabilization of the power supply circuit largely depends on the equivalent series resistance represented by the ESR of the capacitor. However, in a conventional low ESL capacitor, a plurality of the lead portions 114A and 116A exist as described above. As a result, the electrical resistance of the lead portions 114A and 116A decreases, and as a result, the ESR becomes extremely low. Therefore, the power supply circuit using such a capacitor lacks stability.
That is, since the conventional ESL-reduced capacitor has an extremely low ESR, when a resonance phenomenon is caused by the inductance of the peripheral circuit, the voltage is largely dropped or damping oscillation such as ringing is easily caused.
[0008]
On the other hand, in the case of capacitors for power supply circuits and the like, a structure having a large number of internal electrodes in one capacitor is required as the circuit is highly integrated. If an attempt is made to manufacture internal electrodes having different patterns of the lead-out portions in accordance with the number of electrodes, the manufacturing process may be complicated and the manufacturing cost may increase.
In view of the above facts, the present invention provides a multilayered electronic device capable of not only preventing the ESR from becoming extremely small while reducing the ESL, but also reducing the manufacturing cost.circuitParts and multilayer electronicscircuitAn object of the present invention is to provide a method for manufacturing a component.
[0009]
[Means for Solving the Problems]
A stacked electronic device according to claim 1.circuitParts were drawn with different drawers from each other4 sheetsStacked electrodes in which the internal electrodes are arranged in a dielectric body formed in a hexahedral shape by laminating dielectric layers while being separated by a dielectric layercircuitParts
Dielectric layerOne internal electrode is arranged in the same plane, and one extraction part is drawn out from this one internal electrode.DoAlong with the4 sheetsInternal electrodes as one blockTeNumber formed,
A plurality of blocks are stacked in a state where they are rotated around an axis orthogonal to a plane formed by the internal electrodes and at mutually different rotational positions,
On each of the four sides of the hexahedral dielectric bodyFourTerminal electrodes are arranged.FourSo that adjacent ones of the terminal electrodes have different polarities from each other,4 sheetsOf these to the internal electrodesFourTerminal electrodes are connected to each otherTo reduce voltage fluctuations in the power supply circuit.It is characterized by having.
[0010]
The stacked electronic device according to claim 1.circuitAccording to the components, while being separated by a dielectric layer4 sheetsAre arranged in a dielectric body formed in a hexahedral shape by laminating dielectric layers. these4 sheetsFrom the internal electrodes, the extraction parts are drawn out in different patterns,Dielectric layerOne internal electrode is arranged in the same plane, and each of the lead portions drawn out from the one internal electrode is one. In addition, these4 sheetsA plurality of blocks are formed using the internal electrodes as one block, and the blocks are stacked around an axis orthogonal to a plane formed by the internal electrodes and rotated to different rotational positions from each other.
On the other hand, each of the four sides of the dielectric bodyFourTerminal electrodes are arranged.FourSo that adjacent ones of the terminal electrodes have different polarities from each other,4 sheetsOf these to the internal electrodesFourTerminal electrodes are connected to each.
As a result, the laminated electronic device according to the present inventioncircuitWhen a component is energized, a plurality of internal electrodes of each block connected to an external circuit via a lead-out portion serve as electrodes of capacitors arranged in parallel while facing each other.
[0011]
From the above, in this claim,4 sheetsEach of the four side surfaces of the dielectric element is so drawn that one extraction part is respectively drawn out from the internal electrode in a different pattern, and that adjacent ones have different polarities.FourSince the terminal electrodes are arranged in the same direction, positive and negative currents flow in opposite directions between adjacent extraction parts of different internal electrodes to cancel out the magnetic flux, so that the stackedcircuitThe parasitic inductance of the component itself is reduced, and the equivalent series inductance is reduced.
[0012]
On the other hand, by connecting each of the internal electrodes from which the capacitance is obtained to one of the extraction portions to, for example, a terminal electrode, current flows intensively in this one extraction portion, and the electric current in the extraction portion is increased. It is possible to increase the resistance. As a result of the increase in the electrical resistance in the lead-out section, the ESR is considered to be too small even if a low-ESL technology for canceling magnetic flux by flowing positive and negative currents in opposite directions between adjacent lead-out sections is used. Is prevented.
[0013]
Further, in the claims,4 sheetsAre formed as one block, and the blocks are rotated around an axis orthogonal to a plane formed by the internal electrodes, and a plurality of blocks are stacked in different rotational positions. For this reason, a stacked electron with a structure having a large number of internal electrodescircuitEven if it is a component, by laminating a plurality of blocks having the same structure, it is not necessary to manufacture internal electrodes having different patterns of the lead portions according to the number of internal electrodes, so that the manufacturing process is simplified. Manufacturing costs are reduced.
[0015]
Furthermore, since four terminal electrodes are provided on each of the four side surfaces of the hexahedron-shaped dielectric element, when a high-frequency current is applied to the terminal electrodes so that the terminal electrodes on each side are alternately positive and negative, the adjacent terminal electrodes are adjacent to each other. The effect that positive and negative currents flow in opposite directions between the matching lead portions and cancel the magnetic flux occurs on each of the four side surfaces, and the equivalent series inductance is further reduced..
[0016]
Claim2Multilayer type electroncircuitClaims according to parts1Stacked electroncircuitIn addition to the same configuration as the component, a configuration in which a plurality of terminal electrodes are provided on the same side surface of the dielectric element body and adjacent terminal electrodes on the same side surface are connected to mutually different internal electrodes. Have.
Therefore, adjacent terminal electrodes are connected to mutually different internal electrodes on the same side surface of the dielectric body, so that current flows so that adjacent terminal electrodes have mutually different polarities. The magnetic fluxes generated in the parts cancel each other out due to the currents flowing in the drawer parts in opposite directions, and the effect of reducing the equivalent series inductance according to claim 1 is more reliably produced.
[0017]
Claim3Stack-type electroncircuitThe method of manufacturing a component is to place one internal electrode from one lead out on the dielectric layer.4patternformAnd
Next, a plurality of blocks having the same structure are formed by laminating dielectric layers in which internal electrodes having mutually different patterns are arranged one by one in the same plane,
Thereafter, a plurality of blocks are stacked in a state of being rotated about an axis orthogonal to a plane formed by the internal electrodes and at mutually different rotational positions, and a dielectric element body is formed in a hexahedral shape,
In addition, through the drawer,4 sheetsSo that adjacent terminal electrodes are connected to each other with different polarities, respectively, on the four side surfaces of the hexahedron-shaped dielectric body.FourPlace the terminal electrodes ofTo reduce power circuit voltage fluctuations.It is characterized by having.
[0018]
Claim3Multilayer type electroncircuitAccording to the component manufacturing method, one internal electrode from which one lead-out portion is drawn is placed on the dielectric layer.4patternformAfter the formation, a plurality of blocks having the same structure are formed by laminating dielectric layers in which internal electrodes having mutually different patterns are arranged one by one in the same plane. The plurality of blocks are stacked to form a dielectric body in a hexahedral shape while being rotated about an axis orthogonal to a plane formed by the internal electrodes and at mutually different rotational positions.
In addition, through the drawer,4 sheetsOn the four side surfaces of the dielectric body so that adjacent terminal electrodes are connected to the internal electrodes of different polarities.FourTerminal electrodes were arranged.
That is, similar to claim 1,4 sheetsSince one extraction part is respectively drawn out from the internal electrode in a different pattern from each other, the magnetic flux is canceled out in the same manner as in claim 1, so that the stacked typecircuitThe parasitic inductance of the component itself is reduced, and the equivalent series inductance is reduced.
[0019]
On the other hand, by providing only one extraction portion from the portion of the internal electrode from which the capacitance is obtained, current flows intensively into this one extraction portion. As the resistance increases, the ESR is prevented from becoming too small even if the low ESL technology is adopted.
Further, in the claims,4 sheetsIs a block, and the blocks are rotated around an axis perpendicular to the plane formed by the internal electrodes, and a plurality of blocks are stacked in different rotational positions. Type electron with structure withcircuitEven for components, the manufacturing process is simplified and the manufacturing cost is reduced.
[0022]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the laminated electron according to the present inventioncircuitParts and multilayer electronicscircuitAn embodiment of a method for manufacturing a component will be described with reference to the drawings.
Stacked electron according to one embodiment of the present inventioncircuit1 to 4 show an array type multi-terminal multilayer capacitor 10 as a component. As shown in these figures, a dielectric element body 12, which is a rectangular parallelepiped sintered body obtained by firing a laminate in which a plurality of ceramic green sheets serving as dielectric layers are laminated, as a main part, A multi-terminal multilayer capacitor 10 is configured.
[0023]
A planar first internal electrode 14 is disposed at a predetermined height position in the dielectric element 12, and the first internal electrode 14 is separated from the ceramic layer 12 </ b> A in the dielectric element 12. Below, a second planar internal electrode 16 is also arranged.
Similarly, below the second internal electrode 16 with the ceramic layer 12A interposed in the dielectric element body 12, a third internal electrode 18 also having a planar shape is arranged. Below the third internal electrode 18, a fourth internal electrode 20 also having a planar shape is disposed.
[0024]
Therefore, the first internal electrode 14 to the fourth internal electrode 20 are arranged in the dielectric body 12 so as to be opposed to each other while being separated via the ceramic layer 12A. The center from the first internal electrode 14 to the fourth internal electrode 20 is arranged at substantially the same position as the center of the dielectric element 12, and the center from the first internal electrode 14 The vertical and horizontal dimensions up to the internal electrode 20 are smaller than the length of the side of the corresponding dielectric element body 12.
[0025]
Furthermore, as shown in FIG. 4, one extraction portion 14 </ b> A is formed in the first internal electrode 14 by extracting one electrode from the left end of the first internal electrode 14 toward the near side. ing. In addition, one extraction portion 16 </ b> A is formed in the second internal electrode 16 by extracting one portion of the electrode from the portion on the left side of the second internal electrode 16 toward the near side.
[0026]
On the other hand, one extraction portion 18 </ b> A is formed in the third internal electrode 18 by extracting one electrode from the right side portion of the third internal electrode 18 toward the near side. In addition, one extraction portion 20 </ b> A is formed in the fourth internal electrode 20 by extracting one electrode from the right end of the fourth internal electrode 20 toward the near side.
As described above, a total of four extraction portions up to the extraction portions 14A to 20A are extracted from the internal electrodes 14 to 20 at positions where they do not overlap with each other.
[0027]
The four internal electrodes 14 to 20 having the lead portions 14 </ b> A to 20 </ b> A which are respectively drawn in the front direction are defined as a first block 22, and a plurality of blocks having the same structure as the first block 22 are provided as follows. Have.
In other words, in a state where the blocks are rotated by 90 ° around an axis Z orthogonal to the plane formed by the internal electrodes 14 to 20 and the lead portions 14A to 20A are drawn rightward in FIG. The second block 24 is stacked below. Further, in a state where the blocks are rotated by 180 ° around an axis Z orthogonal to a plane formed by the internal electrodes 14 to 20 and the lead portions 14A to 20A are drawn toward the depth direction in FIG. A third block 26 is laminated below, and the block is rotated by 270 ° about an axis Z orthogonal to the plane formed by the internal electrodes 14 to 20 so that the lead portions 14A to 20A move toward the left in FIG. The fourth block 28 is stacked below the third block 26 in the pulled-out state.
[0028]
Further, as in the conventional multi-terminal multilayer capacitor 110 having terminal electrodes disposed on the side surfaces, as shown in FIGS. 1 to 3, the first block 22 is connected to the lead portion 14A of the internal electrode 14 in the first block 22. A terminal electrode 31, a second terminal electrode 32 also connected to a lead portion 16A of the internal electrode 16, a third terminal electrode 33 also connected to a lead portion 18A of the internal electrode 18, and a lead portion of the internal electrode 20. Fourth terminal electrodes 34 connected to 20 </ b> A are arranged on the front side surface 12 </ b> C of the dielectric body 12.
[0029]
That is, the portion from the lead portion 14A of the first internal electrode 14 to the lead portion 20A of the fourth internal electrode 20 in the first block 22 is positioned so as not to overlap with each other on the side surface 12C on the near side of FIG. Therefore, adjacent terminal electrodes 31 to 34 are sequentially connected to mutually different internal electrodes 14, 16, 18, and 20 via the lead portions 14A to 20A. Can be used with opposite polarities.
[0030]
Then, similarly to the first block 22, these terminal electrodes 31 to 34 are arranged on the right side surface 12B of the dielectric element body 12 corresponding to the second block 24, and these terminal electrodes are also corresponding to the third block 26. The electrodes 31 to 34 are arranged on the rear side surface 12C of the dielectric body 12, and the terminal electrodes 31 to 34 are arranged on the left side surface 12B of the dielectric body 12 corresponding to the fourth block 28. I have.
As described above, in the present embodiment, the terminal electrodes 31 to 34 are respectively arranged on the four side surfaces 12B and 12C of the dielectric element body 12 having a hexahedral shape which is a rectangular parallelepiped of the multi-terminal multilayer capacitor 10. .
[0031]
Next, a method for manufacturing the multi-terminal multilayer capacitor 10 according to the present embodiment will be described with reference to FIG.
First, when manufacturing the multi-terminal multilayer capacitor 10, a plurality of ceramic green sheets 30A, 30B, 30C, 30D made of a dielectric material functioning as a capacitor are prepared.
[0032]
In order to form the internal electrodes 14, 16, 18, and 20 from which the respective lead portions 14 A, 16 A, 18 A, and 20 A are drawn, for example, a conductive paste is formed on the upper surfaces of the ceramic green sheets 30 A, 30 B, 30 C, and 30 D, respectively. An electrode portion having a pattern corresponding to the internal electrodes 14, 16, 18, and 20 is provided by printing or sputtering. Thereafter, ceramic green sheets 30A to 30D each having a square planar shape are laminated in the order shown in the drawing to form at least four blocks having the same structure.
[0033]
Next, this block is referred to as a first block 22 by rotating and arranging the block so that one drawer portion 14A, 16A, 18A, 20A is pulled out in the front direction in FIG.
Thereafter, the first block 22 is rotated around an axis Z orthogonal to the plane formed by the internal electrodes 14 to 20 so that each of the lead portions 14A, 16A, 18A, and 20A is pulled out to the right in FIG. The block having the same structure is arranged below the first block 22 while being rotated by 90 °. The block disposed below the first block 22 is referred to as a second block 24.
[0034]
Similarly, each of the lead portions 14A, 16A, 18A, and 20A is pulled out in the depth direction in FIG. 4 so that the first block 22 is rotated 180 degrees around the axis Z orthogonal to the plane formed by the internal electrodes 14 to 20. The block having the same structure is arranged below the second block 24 in the rotated state. Then, a block disposed below the second block 24 is referred to as a third block 26.
Similarly, 270 with respect to the first block 22 around the axis Z orthogonal to the plane formed by the internal electrodes 14 to 20 so that each of the lead portions 14A, 16A, 18A, and 20A is pulled out to the left in FIG. The block having the same structure is arranged below the third block 26 while being rotated. Then, a block disposed below the third block 26 is referred to as a fourth block 28.
[0035]
Thereafter, the plurality of blocks 22 to 28 are stacked in the mutually different rotational positions as described above to form a hexahedral dielectric body.
Then, the first terminal electrode 31 connected to the lead portion 14A of the internal electrode 14, the second terminal electrode 32 connected to the lead portion 16A of the internal electrode 16, and the first terminal electrode 32 connected to the lead portion 18A of the internal electrode 18. The third terminal electrode 33 and the fourth terminal electrode 34 connected to the lead portion 20A of the internal electrode 20 are arranged around these stacked ceramic green sheets.
[0036]
Furthermore, the upper surface of the first internal electrode 14 and the portion between the terminal electrodes 31 to 34 are covered with the same material as the ceramic green sheets, and are integrally fired. As a result, these ceramic green sheets become ceramic layers 12A, and a multi-terminal laminate in which four terminal electrodes 31 to 34 are respectively arranged on all four side surfaces 12B and 12C of the hexahedral dielectric body 12. The capacitor 10 can be obtained. When mass-producing the multi-terminal multilayer capacitor 10, a large number of the above blocks may be prepared in advance, and a large number of products may be manufactured in the above steps.
[0037]
Next, the operation of the present embodiment will be described.
Four internal electrodes 14 to 20 which are separated from each other with the ceramic layer 12A interposed therebetween are arranged in a hexahedral dielectric element body 12 formed by stacking the ceramic layers 12A. One lead portion 14A to 20A is drawn out from each of the internal electrodes 14 to 20 in a mutually different pattern. Further, a plurality of blocks are formed with these four internal electrodes 14 to 20 as one block, and these blocks are rotated around an axis Z orthogonal to a plane formed by the internal electrodes 14 to 20 to have different rotational positions. In this state, the four blocks 22 to 28 are stacked.
[0038]
Then, four terminal electrodes 31 to 34 are disposed on four side surfaces of the hexahedral dielectric element body 12, respectively, and the terminal electrodes 31 to 34 are connected to any of the internal electrodes 14 to 20 via the lead-out portions 14A to 20A. 34 are connected respectively.
As a result, when the multi-terminal multilayer capacitor 10 according to the present embodiment is energized, the four internal electrodes 14 to 20 of each block connected to external circuits via the lead-out portions 14A to 20A are connected. , And serve as electrodes of capacitors arranged in parallel while facing each other.
[0039]
Further, in the present embodiment, as described above, the four internal electrodes 14 to 20 are formed as one block, and the four blocks 22 to 28 are stacked in different rotational positions. For this reason, even in the multi-terminal multilayer capacitor 10 having the structure having 16 internal electrodes 14 to 20 as in the present embodiment, the internal electrodes 14 to Since there is no need to manufacture the internal electrodes 14 to 20 in which the patterns of the lead portions 14A to 20A are different according to the number of 20, the manufacturing process is simplified and the manufacturing cost is reduced.
[0040]
In the present embodiment, not only is the dielectric element body 12 formed in a hexahedral shape that is most easily manufactured as the multi-terminal multilayer capacitor 10, but also the terminal electrodes 31 to 34 are arranged on the four side surfaces of the hexahedral shape, respectively. Have been. Therefore, a block having four internal electrodes 14 to 20 can be arranged in four blocks. This also simplifies the manufacturing process and allows a multi-terminal laminate having a large number of internal electrodes 14 to 20. The capacitor 10 can now be obtained.
[0041]
Further, in the present embodiment, four terminal electrodes 31 to 34 are disposed on four side surfaces 12B and 12C of the hexahedral dielectric element body 12, respectively. The terminal electrodes 31 to 34 adjacent to each other in the same side surfaces 12B and 12C are connected to the internal electrodes 14 to 20 different from each other through the respective lead-out portions 14A to 20A drawn in different patterns. It is a structure that is done.
[0042]
Therefore, in the multi-terminal multilayer capacitor 10 having such a structure, high-frequency currents, which are alternately positive and negative so that the polarities between the adjacent terminal electrodes 31 to 34 are mutually different, are passed through the terminal electrodes 31 to 34, respectively. In this case, current flows between the adjacent lead portions 14A to 20A in opposite directions, so that the effect of canceling out magnetic flux is generated on each of the four side surfaces 12B and 12C, and the parasitic capacitance of the multi-terminal multilayer capacitor 10 itself is obtained. The inductance is reduced and the equivalent series inductance is reduced.
[0043]
On the other hand, by providing the lead portions 14A to 20A that are drawn from the internal electrodes 14 to 20 at which the capacitance is obtained and connected to the terminal electrodes 31 to 34 one by one, a current flows through this one lead portion. It flows intensively, and it is possible to increase the electrical resistance in the drawers 14A to 20A. As a result of the increase in the electrical resistance in the lead-out portions 14A to 20A, even if a low ESL technology is adopted in which positive and negative currents flow in opposite directions between adjacent lead-out portions to cancel out magnetic flux, It is prevented that the ESR becomes too small.
[0044]
On the other hand, in the present embodiment, since four capacitors are substantially incorporated in one multi-terminal multilayer capacitor 10 as described above, the number of multi-terminal multilayer capacitors 10 is reduced. As a result, the manufacturing cost can be further reduced, and the space saving required as the circuit is highly integrated is also achieved.
[0045]
Next, a result of a test for comparing the equivalent series inductance value and the equivalent series resistance value between the multi-terminal multilayer capacitor 10 according to the present embodiment and another capacitor is shown below. It should be noted that the other capacitors to be compared here are multi-terminal type multilayer capacitors having a low ESL by having four lead-out portions on one internal electrode, and the multi-terminal type capacitor of the present embodiment. It has 16 internal electrodes like the multilayer capacitor 10. The capacitance of each capacitor used in the test is 1 μF.
[0046]
As a result of this test, the equivalent series inductance of the conventional low-ESL multi-terminal multilayer capacitor was 126 pH, and the equivalent series resistance was 2.4 mΩ. On the other hand, the equivalent series inductance of the multi-terminal multilayer capacitor 10 according to the present embodiment was 30 pH, and the equivalent series resistance was 9.8 mΩ.
That is, not only does the equivalent series inductance of the multi-terminal multilayer capacitor 10 of the present embodiment become smaller than that of the conventional multi-terminal multilayer capacitor, but also the equivalent series resistance of the multi-terminal multilayer capacitor 10 of the present embodiment. The value was about four times as large as that of the conventional multi-terminal multilayer capacitor.
[0047]
This is because the equivalent series resistance value of the conventional capacitor is approximately R / 16 from the equivalent series resistance model shown in FIG. 5A, while the equivalent series resistance model shown in FIG. It is estimated that the equivalent series resistance value of the multi-terminal multilayer capacitor 10 of the embodiment is approximately R / 4. Note that, in FIG. 5, R represents the electric resistance at each drawer.
[0048]
FIG. 6 shows a comparison of the voltage fluctuation of the power supply circuit due to the rapid current fluctuation. In other words, while the conventional capacitor shown in FIG. 6A causes a large voltage fluctuation, the multi-terminal multilayer capacitor of the present embodiment shown in FIG. The voltage fluctuation of No. 10 became much smaller, and the power supply circuit was stabilized.
[0049]
Next, a usage example of the multi-terminal multilayer capacitor 10 according to the present embodiment will be described with reference to FIG.
As shown in FIG. 7, between the ground terminal GND and the terminal V having a predetermined potential, the multi-terminal multilayer capacitor 10 of the present embodiment is arranged in parallel with the LSI chip. Then, among the terminal electrodes 31 to 34 respectively arranged on the four side surfaces of the multi-terminal multilayer capacitor 10, the mutually adjacent terminal electrodes are connected to have opposite polarities as described above. Each of the four layers of internal electrodes 14 to 20 constitutes one capacitor.
[0050]
However, in FIG. 7, terminal capacitors 31 to 34 located on one side surface of the multi-terminal multilayer capacitor 10 and internal electrodes 14 to 20 connected to the terminal electrodes 31 to 34 constitute one capacitor. In this case, since four capacitors are respectively formed on the four side surfaces, wiring can be performed so that substantially four capacitors are individually connected in parallel with the LSI chip.
[0051]
Although the multi-terminal multilayer capacitor 10 according to the present embodiment has a structure in which four internal electrodes 14 to 20 are laminated four times and has 16 internal electrodes, the internal electrode of each block is The number is not limited to fourMaThe total number of internal electrodes is not limited to 16 but may be increased by increasing the number of blocks. With such a structure having a large number of internal electrodes, it is possible to cope with a large number of circuits.
[0052]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, not only preventing ESR from becoming extremely small while attaining low ESL, but also a laminated electronic device of the structure whose manufacturing cost was reduced.circuitParts can be provided.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a multi-terminal multilayer capacitor according to an embodiment of the present invention, and is a view corresponding to a cross section taken along line 1-1 of FIG.
FIG. 2 is a cross-sectional view showing the multi-terminal multilayer capacitor according to one embodiment of the present invention, and is a view corresponding to a cross section taken along line 2-2 of FIG.
FIG. 3 is a perspective view showing a multi-terminal multilayer capacitor according to one embodiment of the present invention.
FIG. 4 is an exploded perspective view showing a plurality of ceramic green sheets and electrode shapes used in a manufacturing process of the multi-terminal multilayer capacitor according to one embodiment.
5A and 5B are diagrams showing a model of an equivalent series resistance, wherein FIG. 5A shows a model of an equivalent series resistance of a conventional capacitor, and FIG. 5B shows an equivalent series resistance of a multi-terminal multilayer capacitor of the present embodiment. Is shown.
6A and 6B are graphs showing a relationship between a current and a voltage in a model of an LSI power supply circuit, wherein FIG. 6A is a diagram showing a graph showing a relationship between a current and a voltage of a conventional capacitor, and FIG. 3) is a graph showing a relationship between current and voltage of the multi-terminal multilayer capacitor of the present embodiment.
FIG. 7 is a diagram showing a use state of the multi-terminal multilayer capacitor according to one embodiment.
FIG. 8 is a circuit diagram illustrating a model of an LSI power supply circuit.
FIG. 9 is a graph showing a relationship between current and voltage in a model of a power supply circuit of an LSI.
FIG. 10 is a diagram showing the direction of current in a multi-terminal capacitor.
FIG. 11 is a perspective view showing a conventional multi-terminal multilayer capacitor.
FIG. 12 is an exploded perspective view showing a ceramic green sheet and electrode shapes used in a manufacturing process of a conventional multi-terminal multilayer capacitor.
[Explanation of symbols]
10 Multi-terminal multilayer capacitors
12 Dielectric body
12A ceramic layer
14 First internal electrode
16 Second internal electrode
18 Third internal electrode
20 Fourth internal electrode
22 First block
24 Second block
26 Third block
28 4th block
31 1st terminal electrode
32 Second terminal electrode
33 third terminal electrode
34 fourth terminal electrode

Claims (3)

Four internal electrodes from which the extraction portions are extracted in different patterns are arranged in a dielectric body formed in a hexahedral shape by stacking dielectric layers while being separated by a dielectric layer. A multilayer electronic circuit component,
Dielectric layer is disposed one internal electrode in the same plane of, the lead portion led out from the one internal electrode and one respectively, several forming internal electrodes of the four as a single block And
A plurality of blocks are stacked in a state where they are rotated around an axis orthogonal to a plane formed by the internal electrodes and at mutually different rotational positions,
Is arranged each of the four terminal electrodes on four sides of the dielectric body of the hexahedral shape, these four as adjacent groups of the terminal electrodes is different polarities, four through said lead portions multilayer electronic circuit component to the internal electrodes of these four terminal electrodes is characterized in that to reduce the variation in the voltage of the power supply circuit connected to each. The lamination according to claim 1 , wherein four terminal electrodes are provided on the same side surface of the dielectric body, and adjacent terminal electrodes on the same side surface are connected to mutually different internal electrodes. Type electronic circuit parts. A single internal electrode drawn out one lead-out portion on the dielectric layer forms the four patterns shape,
Next, a plurality of blocks having the same structure are formed by laminating dielectric layers in which internal electrodes having mutually different patterns are arranged one by one in the same plane,
Thereafter, a plurality of blocks are stacked in a state of being rotated about an axis orthogonal to a plane formed by the internal electrodes and at mutually different rotational positions, and a dielectric element body is formed in a hexahedral shape,
Furthermore, the four side electrodes of the hexahedral-shaped dielectric element are connected to the four internal electrodes in the same block via the lead-out portions so that the adjacent terminal electrodes are connected to each other with different polarities. A method of manufacturing a laminated electronic circuit component, wherein four terminal electrodes are arranged to reduce fluctuations in voltage of a power supply circuit .

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