JP3563538B2 - Power storage device - Google Patents
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- JP3563538B2 JP3563538B2 JP22173196A JP22173196A JP3563538B2 JP 3563538 B2 JP3563538 B2 JP 3563538B2 JP 22173196 A JP22173196 A JP 22173196A JP 22173196 A JP22173196 A JP 22173196A JP 3563538 B2 JP3563538 B2 JP 3563538B2
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/13—Energy storage using capacitors
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- Charge And Discharge Circuits For Batteries Or The Like (AREA)
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Abstract
Description
【０００１】
【発明の属する技術分野】
本発明は、電気自動車の蓄電装置などに利用される直並列接続された多数の直流蓄電用コンデンサから構成される蓄電装置に関するものである。
【０００２】
【従来の技術】
従来、電気自動車用蓄電装置は、鉛蓄電池やニッケルカドミウム電池などの二次電池（蓄電池）を主体とするものが開発されてきた。この二次電池による蓄電装置の開発と並行して、電気二重層コンデンサと称される極めて大容量のコンデンサ（蓄電器）を電気自動車用の蓄電装置として利用する研究も進められてきている。
【０００３】
この電気二重層コンデンサは、特開昭６０ー１５１３８ 号公報や、ＵＳＰ３，５３６，９６３号などに開示されているように、活性炭や活性炭繊維と、水系電解液や有機系電解液とを組合せることにより、極めて大きな静電容量を実現している。典型的には、十円硬貨とほぼ同一の直径とほぼ３倍の厚みのもとで５Ｆ（ファラッド）〜１０Ｆもの大容量の電気二重層コンデンサが実現され、市販されている。このような大容量の電気二重層コンデンサは、単位体積、単位容量当たりの蓄電量が既に鉛蓄電池などのそれを凌ぎつつあり、電気自動車用の蓄電装置として極めて有望視されている。この電気二重層コンデンサは、蓄電池とは異なり充放電可能な回数に実質的な制限がないという点で、極めて経済的であるという利点も備えている。
【０００４】
従来、コンデンサ（蓄電器）は、単体で、あるいはコイルや抵抗器などの回路素子と組合せられて、サージの吸収、平滑化、濾波、同調など各種の交流電気特性の実現に利用さてきているが、その静電容量は高々数百μＦであり、蓄電器とはいってもその蓄積エネルギーは極めて小さい。
【０００５】
従って、数ファラッドもの超大容量を有するコンデンサは、極めて特殊な用途を除き、概ね直流電力の蓄積のための用途を有するものとして、従来の小容量の交流特性を実現するためのコンデンサと区別することができる。従って、本明細書では、そのような直流電力の蓄積を目的とする電気二重層コンデンサなどの数ファラッド以上の静電容量を有する大容量のコンデンサを「蓄電用コンデンサ」と総称する。
【０００６】
このような直流蓄電用コンデンサの一つである電気二重層コンデンサの場合、典型的な耐圧は数ボルトの程度の低い値に留まる。このため、数百ＫＷＨもの蓄電量と、数千ボルトもの出力電圧を有する電気自動車用蓄電装置を実現するには、数百個の直流蓄電用コンデンサについて、直列接続と並列接続とが混在するような接続（直並列接続）が行われる。
【０００７】
直列接続された各電気二重層コンデンサには同一の放電電流が流れるが、それぞれの端子電圧の低下の様子が同一になるとは限らない。例えば、図２に示すように、直列接続された３個の電気二重層コンデンサＣ１，Ｃ２及びＣ３の個々の端子間電圧は、一般に、放電の進行（時間の経過）と共に異なる割合で低下してゆく。この例では、電気二重層コンデンサＣ３の端子間電圧が負の値になると、直列接続回路の端子間電圧がかえって低下するという不都合が生じる。
【０００８】
上記不都合を回避するために、図３に示すように、電気二重層コンデンサＣ１，Ｃ２及びＣ３のそれぞれに、予めダイオードＤ１，Ｄ２及びＤ３を並列接続しておき、端子間電圧の極性が反転したものについては、放電電流を対応の並列接続ダイオード内をバイパスさせることにより、端子Ｏ１，Ｏ２間の電圧の低下を回避する対策が考えられる。
【０００９】
あるいは、図４に示すように、電気二重層コンデンサＣ１，Ｃ２及びＣ３のそれぞれを、予めスイッチＳ１，Ｓ２及びＳ３を介在させながら直列接続し、端子間電圧の極性が反転したものについては、スイッチを切替えて直列接続回路から切り離すことにより、端子Ｏ１，Ｏ２間の電圧の低下を回避する対策も考えられる。
【００１０】
【発明が解決しようとする課題】
図３に例示したダイオードを並列する構成では、各ダイオードの抵抗値をＲオーム、放電電流をＩアンペアとした場合、バイパス状態となった各ダイオードあたりＲＩ２ ワットというかなり大きな電力損失が生じるという問題がある。また図４に例示した切替えスイッチを使用する構成では、大きな放電電流を切替えるために高価な大容量のスイッチが必要になり、不経済であるという問題がある。
【００１１】
さらに、図３，図４のいずれの構成でも、装置全体としての端子間電圧の変動が大きいという問題がある。
従って、本発明の目的は、電力の利用効率が高く、安価で、端子間電圧の変動が小さな蓄電装置を提供することにある。
【００１２】
【課題を解決するための手段】
本発明の蓄電装置は、主電路に沿って直列接続された複数の蓄電用コンデンサと、これら各蓄電用コンデンサのそれぞれに並列接続されたスイッチング・レギュレータと、これら各スイッチング・レギュレータの出力端子を前記主電路に接続する副電路と、前記各蓄電用コンデンサの端子間電圧を監視し、この監視中の端子間電圧が高いものほど大きな導通時間率となるように前記並列接続されたスイッチング・レギュレータのスイッチング動作を個別に制御する監視・制御回路とを備えている。
【００１３】
【発明の実施の形態】
本発明の好適な実施の形態によれば、前記副電路を流れる電流は、前記主電路を流れる電流の高々１０％前後の値になるように設定されることにより、各スイッチング・レギュレータを低い定格値の安価な素子で構成可能としている。本発明の他の実施の形態によれば、直列接続される各蓄電用コンデンサは電気二重層コンデンサであり、前記監視・制御回路はＩＣチップ上に形成されている。
以下、本発明の詳細を実施例と共に詳細に説明する。
【００１４】
【実施例】
図１は、本発明の一実施例の蓄電装置の構成を示す回路図である。複数の電気二重層コンデンサＣ１，Ｃ２，Ｃ３・・・Ｃｎが出力端子Ｏ１とＯ２間の主電路Ｍに沿って直列接続されている。各電気二重層コンデンサＣ１，Ｃ２，Ｃ３・・・Ｃｎのそれぞれには、スイッチング・レギュレータＳＲ１，ＳＲ２，ＳＲ３・・・ＳＲｎが並列接続されている。
【００１５】
スイッチング・レギュレータＳＲ１，ＳＲ２，ＳＲ３・・・ＳＲｎのそれぞれは、変成器Ｔ、電界効果トランジスタ（ＦＥＴ）から成るスイッチング素子Ｑ、整流用ダイオードＤ及び平滑用コンデンサＣから構成されている。スイッチング・レギュレータＳＲ１，ＳＲ２，ＳＲ３・・・ＳＲｎのそれぞれの出力端子は副電路Ｓを通して主電路Ｍに接続されている。
【００１６】
監視・制御回路ＳＣはＩＣチップ上に形成されている。この監視・制御回路ＳＣは、電気二重層コンデンサＣ１の低圧側端子の電圧値Ｖ０と、各電気二重層コンデンサＣ１〜Ｃｎの高圧側端子の電圧値Ｖ１，Ｖ２，Ｖ３・・・・Ｖｎのそれぞれを、端子電圧監視用電線Ｓ０，Ｓ１，Ｓ２，Ｓ３・・・・Ｓｎを介して検出し、Ｖ１−Ｖ０，Ｖ２−Ｖ１，Ｖ３−Ｖ２・・・・Ｖｎ−Ｖｎー１を算出することより、各電気二重層コンデンサの端子電圧を検出する。
【００１７】
監視・制御回路ＳＣは、各電気二重層コンデンサに並列接続されているスイッチング・レギュレータＳＲ１〜ＳＲｎ内のスイッチング素子Ｑに制御信号線ａ１〜ａｎを介してパルス電圧を供給して間欠的に導通状態にすることにより、各スイッチング・レギュレータのスイッチング動作を制御する。このスイッチング動作の制御は、対応の電気二重層コンデンサＣ１〜Ｃｎの端子電圧が高いスイッチング・レギュレータほど導通の時間率（導通角）が増大するように、パルスのデューティ比が変更される。
【００１８】
すなわち、直列接続された電気二重層コンデンサＣ１〜Ｃｎのうち最も高い端子間電圧を有するものについては、対応のスイッチング・レギュレータから副電路Ｓに最も大きな直流電流が出力される。また、電気二重層コンデンサＣ１〜Ｃｎのうち最も低い端子間電圧を有するものについては、対応のスイッチング・レギュレータから副電路Ｓに最小の又はゼロの直流電流が出力される。そして、電気二重層コンデンサＣ１〜Ｃｎのうち中間的な端子間電圧を有するものについては、対応のスイッチング・レギュレータから副電路Ｓに中間的な大きさの直流電流が出力される。
【００１９】
電気二重層コンデンサＣ１〜Ｃｎのうち高い端子間電圧を有するものについては、対応のスイッチング・レギュレータから大きな電流が副電路Ｓを通して主電路Ｍに出力されるため、端子間電圧の下降の速度が高まる。逆に、電気二重層コンデンサＣ１〜Ｃｎのうち低い端子間電圧を有するものについては、対応のスイッチング・レギュレータから小さな電流が副電路Ｓを通して主電路Ｍに出力されるため、端子間電圧の下降の速度が低下する。この結果、各電気二重層コンデンサの端子電圧は、互いに接近状態を保ちながら下降することになる。
【００２０】
好適には、副電路Ｓを通して主電路に流れる電流が、直列接続された各電気二重層コンデンサＣ１〜Ｃｎを通して主電路Ｍに流れる電流の高々１０％前後になるように、スイッチング・レギュレータを構成する素子の定数が選択され、監視・制御回路ＳＣによる制御が決定される。
【００２１】
すなわち、各電気二重層コンデンサに並列接続されるスイッチング・レギュレータの出力電力は、各電気二重層コンデンサの端子間電圧のバラツキを解消できる程度の大きさの供給電力のバラツキを生じさせる程度でよく、その値は直列接続された電気二重層コンデンサから直接供給される電力の高々１０％程度で足りる。このように、スイッチング・レギュレータを介する供給電力の割合を小さな値に留めることにより、各スイッチング・レギュレータを低い定格値の安価な回路素子で構成でき、蓄電装置全体の製造費用を低減できる。
【００２２】
以上、蓄電用コンデンサとして電気二重層コンデンサを使用する構成を例示したが、電気二重層コンデンサ以外の適宜な蓄電用コンデンサを利用することもできる。
【００２３】
以上詳細に説明したように、本発明の蓄電装置は、直列接続された各蓄電用コンデンサのそれぞれにスイッチング・レギュレータを並列接続し、それぞれの端子間電圧を均一化するように各スイッチング・レギュレータを介する供給電力を制御する構成であるから、電力の利用効率が高く、安価で、端子間電圧の変動が小さな蓄電装置を実現できる。
【００２４】
特に、スイッチング・レギュレータを介する供給電力を全体の高々１０％前後の値になるように設定することにより、各スイッチング・レギュレータを低い定格値の安価な素子で構成可能とし、装置全体の製造費用を低減できる。
【図面の簡単な説明】
【図１】本発明の一実施例の蓄電装置の構成を示す回路図である。
【図２】直列接続された３個の蓄電用コンデンサＣ１〜Ｃ３の端子間電圧が放電の進行と共に不揃いに変化する様子とその弊害を説明するための概念図である。
【図３】直列接続された３個の蓄電用コンデンサＣ１〜Ｃ３の端子間電圧が放電の進行と共に不揃いに変化することにより弊害を回避するために各蓄電用コンデンサにダイオードを並列接続した蓄電装置の構成を示す回路図である。
【図４】直列接続された３個の蓄電用コンデンサＣ１〜Ｃ３の端子間電圧が放電の進行と共に不揃いに変化することを防止するために、各蓄電用コンデンサに切替えスイッチを付加した蓄電装置の構成を示す回路図である。
【符号の説明】
Ｃ１〜Ｃｎ 電気二重層コンデンサ
ＳＲ１ 〜ＳＲｎ スイッチング・レギュレータ
Ｍ 主電路
Ｓ 副電路
ＳＣ 監視・制御回路
Ｏ１，Ｏ２ 出力端子
Ｓ１〜Ｓｎ 電圧監視用電線
ａ１〜ａｎ 制御信号線
Ｔ 変成器
Ｑ スイッチング素子[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a power storage device including a large number of DC storage capacitors connected in series and parallel and used for a power storage device of an electric vehicle.
[0002]
[Prior art]
Conventionally, as a power storage device for an electric vehicle, a device mainly including a secondary battery (storage battery) such as a lead storage battery or a nickel cadmium battery has been developed. Developed in parallel with the power storage device according to the secondary battery, it has been studied also underway to use the electric double layer capacitor called very large capacity of the capacitor (capacitor) as an electric storage device for an electric vehicle.
[0003]
This electric double layer capacitor combines an activated carbon or an activated carbon fiber with an aqueous electrolyte or an organic electrolyte as disclosed in JP-A-60-15138 or US Pat. No. 3,536,963. Thereby, an extremely large capacitance is realized. Typically, an electric double layer capacitor having a large capacity of 5F (farad) to 10F is realized under the same diameter and almost three times the thickness of a ten-yen coin, and is commercially available. Such large-capacity electric double-layer capacitors have already exceeded those of lead storage batteries and the like in terms of unit volume and storage capacity per unit capacity, and have been regarded as extremely promising as power storage devices for electric vehicles. This electric double-layer capacitor also has the advantage of being extremely economical in that, unlike a storage battery, there is no substantial restriction on the number of times that it can be charged and discharged.
[0004]
Conventionally, capacitors (capacitors) have been used alone or in combination with circuit elements such as coils and resistors to realize various AC electrical characteristics such as surge absorption, smoothing, filtering, and tuning. , Its capacitance is at most several hundred μF, and its stored energy is extremely small even though it is a capacitor.
[0005]
Therefore, a capacitor with a very large capacity of several farads is generally used for storing DC power, except for very special applications, and should be distinguished from conventional capacitors for realizing small-capacity AC characteristics. Can be. Therefore, in this specification, a large-capacity capacitor having a capacitance of several farads or more, such as an electric double-layer capacitor for storing DC power, is generically referred to as a "storage capacitor".
[0006]
In the case of an electric double layer capacitor which is one of such DC storage capacitors, a typical withstand voltage is as low as several volts. For this reason, in order to realize a power storage device for an electric vehicle having a storage amount of several hundred KWH and an output voltage of several thousand volts, a series connection and a parallel connection of several hundred DC storage capacitors must be mixed. Connection (series-parallel connection) is performed.
[0007]
Although the same discharge current flows through the electric double layer capacitors connected in series, the terminal voltage does not always decrease in the same manner. For example, as shown in FIG. 2, the voltage between the individual terminals of the three series-connected electric double layer capacitors C1, C2 and C3 generally decreases at different rates with the progress of discharge (elapse of time). go. In this example, when the voltage between the terminals of the electric double layer capacitor C3 has a negative value, there is a disadvantage that the voltage between the terminals of the series connection circuit is rather reduced.
[0008]
In order to avoid the above inconvenience, as shown in FIG. 3, diodes D1, D2 and D3 were previously connected in parallel to the electric double layer capacitors C1, C2 and C3, respectively, and the polarity of the voltage between the terminals was inverted. For such a device, it is conceivable to take measures to avoid a drop in the voltage between the terminals O1 and O2 by making the discharge current bypass the corresponding parallel-connected diodes.
[0009]
Alternatively, as shown in FIG. 4 , each of the electric double layer capacitors C1, C2 and C3 is connected in series with the switches S1, S2 and S3 interposed therebetween in advance, and when the polarity of the inter-terminal voltage is reversed, And disconnecting it from the series connection circuit to avoid a drop in the voltage between the terminals O1 and O2.
[0010]
[Problems to be solved by the invention]
In the configuration in which the diodes illustrated in FIG. 3 are arranged in parallel, when the resistance value of each diode is R ohm and the discharge current is I ampere, a considerably large power loss of 2 W RI is generated for each diode in the bypass state. There is. Further, the configuration using the changeover switch illustrated in FIG. 4 requires an expensive large-capacity switch to switch a large discharge current, which is uneconomical.
[0011]
Further, in each of the configurations shown in FIGS. 3 and 4, there is a problem that the inter-terminal voltage of the device as a whole varies greatly.
Therefore, an object of the present invention is to provide a power storage device that has high power use efficiency, is inexpensive, and has small fluctuation in terminal voltage.
[0012]
[Means for Solving the Problems]
The power storage device of the present invention includes a plurality of storage capacitors connected in series along a main power path, a switching regulator connected in parallel to each of the storage capacitors, and an output terminal of each of the switching regulators. The sub-circuit connected to the main circuit and the voltage between the terminals of the respective storage capacitors are monitored, and the higher the voltage between the terminals being monitored is, the larger the conduction time ratio becomes. A monitoring / control circuit for individually controlling the switching operation.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
According to a preferred embodiment of the present invention, the current flowing through the sub-circuit is set to be at most about 10% of the current flowing through the main circuit, so that each switching regulator has a lower rated current. It can be configured with inexpensive elements. According to another embodiment of the present invention, each storage capacitor connected in series is an electric double layer capacitor, and the monitoring / control circuit is formed on an IC chip.
Hereinafter, the present invention will be described in detail with examples.
[0014]
【Example】
FIG. 1 is a circuit diagram illustrating a configuration of a power storage device according to one embodiment of the present invention. A plurality of electric double layer capacitors C1, C2, C3... Cn are connected in series along a main electric path M between output terminals O1 and O2. The switching regulators SR1, SR2, SR3,... SRn are connected in parallel to each of the electric double layer capacitors C1, C2, C3,.
[0015]
Each of the switching regulators SR1, SR2, SR3,... SRn includes a transformer T, a switching element Q composed of a field effect transistor (FET), a rectifying diode D, and a smoothing capacitor C. The output terminals of the switching regulators SR1, SR2, SR3,... SRn are connected to the main circuit M through the sub circuit S.
[0016]
The monitoring / control circuit SC is formed on an IC chip. The monitoring / control circuit SC includes the voltage value V0 of the low voltage side terminal of the electric double layer capacitor C1 and the voltage values V1, V2, V3,... Vn of the high voltage side terminals of the electric double layer capacitors C1 to Cn. and from that detection through an electric wire S0, S1, S2, S3 ···· Sn terminal voltage monitoring, calculates the V1-V0, V2-V1, V3-V2 ···· Vn-Vn -1 Then, the terminal voltage of each electric double layer capacitor is detected.
[0017]
The monitoring / control circuit SC supplies a pulse voltage to the switching elements Q in the switching regulators SR1 to SRn connected in parallel to the respective electric double-layer capacitors via the control signal lines a1 to an to intermittently conduct. Thus, the switching operation of each switching regulator is controlled. This switching operation is controlled by changing the pulse duty ratio such that the higher the terminal voltage of the corresponding electric double layer capacitors C1 to Cn, the greater the conduction time rate (conduction angle).
[0018]
That is, with respect to the series-connected electric double layer capacitors C1 to Cn having the highest inter-terminal voltage, the corresponding switching regulator outputs the largest DC current to the sub-circuit S. In addition, among the electric double layer capacitors C1 to Cn, those having the lowest inter-terminal voltage output the minimum or zero direct current to the sub-circuit S from the corresponding switching regulator. Then, among the electric double layer capacitors C1 to Cn, those having an intermediate voltage between the terminals, a DC current having an intermediate magnitude is output to the sub-circuit S from the corresponding switching regulator.
[0019]
Among the electric double-layer capacitors C1 to Cn, those having a high inter-terminal voltage output a large current from the corresponding switching regulator to the main electric circuit M through the auxiliary electric circuit S, so that the rate of drop of the inter-terminal voltage increases. . Conversely, among the electric double layer capacitors C1 to Cn, those having a low inter-terminal voltage, a small current is output from the corresponding switching regulator to the main electric circuit M through the auxiliary electric circuit S. Speed decreases. As a result, the terminal voltages of the electric double-layer capacitors fall while keeping close to each other.
[0020]
Preferably, the switching regulator is configured such that the current flowing to the main circuit through the sub-circuit S is at most about 10% of the current flowing to the main circuit M through the electric double layer capacitors C1 to Cn connected in series. The element constant is selected, and the control by the monitoring / control circuit SC is determined.
[0021]
In other words, the output power of the switching regulators connected in parallel to each electric double layer capacitor may be of such a level as to cause a variation in the supply power of a magnitude that can eliminate the variation in the voltage between the terminals of each electric double layer capacitor, Its value is sufficient at most about 10% of the power directly supplied from the electric double layer capacitors connected in series. As described above, by keeping the ratio of the power supplied via the switching regulators to a small value, each switching regulator can be configured with an inexpensive circuit element having a low rated value, and the manufacturing cost of the entire power storage device can be reduced.
[0022]
As described above, the configuration using the electric double layer capacitor as the electric storage capacitor has been exemplified, but an appropriate electric storage capacitor other than the electric double layer capacitor can be used.
[0023]
As described in detail above, in the power storage device of the present invention, a switching regulator is connected in parallel to each of the storage capacitors connected in series, and each switching regulator is connected so as to equalize the voltage between the terminals. Since the configuration is such that power supplied through the power storage device is controlled, a power storage device with high power utilization efficiency, low cost, and small fluctuation in terminal voltage can be realized.
[0024]
In particular, by setting the power supplied via the switching regulators to a value of at most about 10% of the whole, each switching regulator can be configured with inexpensive elements having a low rated value, and the manufacturing cost of the entire apparatus is reduced. Can be reduced.
[Brief description of the drawings]
FIG. 1 is a circuit diagram illustrating a configuration of a power storage device according to one embodiment of the present invention.
FIG. 2 is a conceptual diagram for explaining a state in which voltages between terminals of three storage capacitors C1 to C3 connected in series change irregularly with the progress of discharge, and the adverse effects thereof.
FIG. 3 is a power storage device in which a diode is connected in parallel to each of the storage capacitors in order to avoid adverse effects due to irregular changes in voltage between terminals of three storage capacitors C1 to C3 connected in series with the progress of discharge. FIG. 2 is a circuit diagram showing the configuration of FIG.
FIG. 4 shows a power storage device in which a changeover switch is added to each of the storage capacitors in order to prevent the voltage between terminals of three storage capacitors C1 to C3 connected in series from changing irregularly with the progress of discharge. FIG. 3 is a circuit diagram illustrating a configuration.
[Explanation of symbols]
C1 to Cn Electric double layer capacitors SR1 to SRn Switching regulator M Main circuit S Subcircuit SC Monitoring / control circuit O1, O2 Output terminals S1 to Sn Voltage monitoring wires a1 to an Control signal line T Transformer Q Switching element
Claims (4)
これら各蓄電用コンデンサのそれぞれに並列接続されたスイッチング・レギュレータと、
これらスイッチング・レギュレータのそれぞれの出力端子を前記主電路に接続する副電路と、
前記各蓄電用コンデンサの端子間電圧を監視し、この監視中の端子間電圧が高いものほど大きな導通時間率となるようにそれぞれに並列接続された前記スイッチング・レギュレータのスイッチング動作を個別に制御する監視・制御回路と
を備えたことを特徴とする蓄電装置。A plurality of storage capacitors connected in series along the main circuit,
A switching regulator connected in parallel to each of these storage capacitors;
A sub-circuit connecting each output terminal of these switching regulators to the main circuit;
The inter-terminal voltage of each of the storage capacitors is monitored, and the switching operation of the switching regulators connected in parallel with each other is individually controlled such that the higher the inter-terminal voltage being monitored, the higher the conduction time ratio. A power storage device comprising a monitoring / control circuit.
前記副電路を流れる電流は、前記主電路を流れる電流の高々１０％前後になるように設定されたことを特徴とする蓄電装置。In claim 1,
A power storage device, wherein a current flowing through the sub-circuit is set to be at most about 10% of a current flowing through the main circuit.
前記蓄電用コンデンサは、電気二重層コンデンサであることを特徴とする蓄電装置。In claim 1 or 2,
The power storage device, wherein the power storage capacitor is an electric double layer capacitor.
前記監視・制御回路はＩＣチップ上に形成されたことを特徴とする蓄電装置。In claims 1 to 3,
The power storage device, wherein the monitoring / control circuit is formed on an IC chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22173196A JP3563538B2 (en) | 1996-08-05 | 1996-08-05 | Power storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22173196A JP3563538B2 (en) | 1996-08-05 | 1996-08-05 | Power storage device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1052042A JPH1052042A (en) | 1998-02-20 |
| JP3563538B2 true JP3563538B2 (en) | 2004-09-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22173196A Expired - Fee Related JP3563538B2 (en) | 1996-08-05 | 1996-08-05 | Power storage device |
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| JP (1) | JP3563538B2 (en) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3212963B2 (en) | 1999-03-16 | 2001-09-25 | 松下電器産業株式会社 | Secondary battery control circuit |
| JP3280635B2 (en) * | 1999-04-21 | 2002-05-13 | 長野日本無線株式会社 | Energy transfer device and power storage system |
| JP3280641B2 (en) * | 1999-09-08 | 2002-05-13 | 長野日本無線株式会社 | Energy transfer device |
| JP3280642B2 (en) * | 1999-09-08 | 2002-05-13 | 長野日本無線株式会社 | Power storage module |
| JP2007244055A (en) * | 2006-03-07 | 2007-09-20 | Kyocera Mita Corp | Power supply device, fixing device and image forming device |
| KR101188944B1 (en) * | 2006-06-15 | 2012-10-08 | 한국과학기술원 | Charge equalization apparatus with parallel connection of secondary windings of multiple transformers |
| KR101124803B1 (en) * | 2006-06-15 | 2012-03-23 | 한국과학기술원 | Charge Equalization Apparatus and Method |
| JP2013051857A (en) * | 2011-08-31 | 2013-03-14 | Sony Corp | Power storage device, electronic apparatus, electric vehicle, and electric power system |
| JP2013051856A (en) * | 2011-08-31 | 2013-03-14 | Sony Corp | Power storage device, electronic apparatus, electric vehicle, and electric power system |
| EP2587614A2 (en) | 2011-08-31 | 2013-05-01 | Sony Corporation | Electric storage apparatus, electronic device, electric vehicle, and electric power system |
| US9281696B2 (en) * | 2013-02-27 | 2016-03-08 | Fu-Sheng Tsai | Current steering circuit and current steering method for controlling branch current flowing through branch |
| JP5815010B2 (en) * | 2013-11-19 | 2015-11-17 | 蔡富生 | Balancing circuit for battery unit balancing |
| JP2019017215A (en) * | 2017-07-10 | 2019-01-31 | 田淵電機株式会社 | Power storage device and equalization method therefor |
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1996
- 1996-08-05 JP JP22173196A patent/JP3563538B2/en not_active Expired - Fee Related
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| JPH1052042A (en) | 1998-02-20 |
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