JP3558151B2 - Data search circuit - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
According to the present invention, a data group including a matching item is searched from a data table including a plurality of data groups stored in advance in a data storage unit using an item input from the outside as a key. More particularly, the present invention relates to a data search circuit suitable for a circuit that performs high-speed best match processing used in routing processing for the Internet Protocol (IP) or the like.
[0002]
[Prior art]
To perform an IP routing process using an IP routing processing device (router) having a plurality of input / output ports, a 32-bit “partner IP address” is detected from header information of a packet arriving at an input port, and the “partner IP address” is detected. It is necessary to send the packet to an output port corresponding to the “IP address”.
[0003]
At this time, it is necessary to determine to which output port the packet is to be sent, but this is done by searching the routing table in the router using the “partner IP address” as a key, and setting it in the matched data group. This is done by selecting an output port.
[0004]
This search process employs a best match method. In this best match process, first, a part (for example, lower) bits of the "partner IP address" is matched by an IP address in the routing table and netmask information separately prepared for each IP address on a one-to-one basis. Is compared with the contents excluded from the target (contents subjected to the masking processing). At this time, when a plurality of candidates match, the one with the shortest mask length (bit width) is adopted as the highest priority candidate.
[0005]
[Problems to be solved by the invention]
However, although this best match process is a main part of the routing process, it has conventionally been processed by software using a CPU, which is a problem in improving the throughput of the router itself. That is, conventionally, when there is no IP address that matches the previous data group obtained in the previous search, it is necessary to obtain, by software calculation, a pointer (next address) specifying another data group to be searched next. There was a long time.
[0006]
An object of the present invention is to enable high-speed data search processing such as the above-described best match processing, in which a part of a search key needs to be masked with separate information for each search. A data search circuit is provided.
[0007]
(Delete)
[0008]
(Delete)
[0009]
[Means for Solving the Problems]
The data search circuit according to the present invention includes a mask data, a search IP address , a first pointer, a second pointer, and data output when a result of comparison between the search IP address and the input “partner IP address” matches. a set of certain information data as one data group, a plurality of data tables stored data storage means comprising the data groups (1 to 4), the temporarily holding the input "destination IP address" A first register (6), a second register (5) for holding an address indicating a data group currently accessed in the data storage means (1 to 4), and a current register in the data storage means (1 to 4). the search IP address of the data group being accessed, the holding said first pointer, the second pointer, and the information data in each temporary To a sixth register (8 to 11) and a mask processor (7) which receives the "partner IP address" from the first register (6) and performs a mask process in accordance with the mask data of the data group being accessed. ) And a comparator (12) for judging the magnitude and coincidence of the masked “partner IP address” output from the mask processor (7) and the contents of the third register (8). If the comparator (12) determines that one is greater than the other, the content of the fourth register (9) is replaced by the content of the fifth register (10). A selector (13) for outputting to the register (5) and updating an address for accessing the data storage means (1 to 4), and the comparison result of the comparator (12) is determined to be coincident. If the said And configured to output the contents of register (11) as the search data.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a diagram showing a configuration of a data search circuit according to one embodiment of the present invention, which is a circuit for performing a best match process in an IP routing process. Reference numerals 1 to 4 denote SRAM circuits, each of which is a memory circuit (data storage means) in which a search target is stored as a table (routing table). These are all addressed by an address register 5.
[0011]
First, the mask data for the “partner IP address” input to the memory circuit 1 and the IP address to be compared with the “partner IP address” (masked) input to the memory circuit 2 are stored in the memory circuit 3. Indicates a pointer indicating the address of the data group to be searched next when the result of the comparison does not match, and information to be read when the result of the comparison matches (for example, the packet should be sent next). Router IP address, etc.).
[0012]
The mask data, the IP address, the pointer, and the information constitute a data group having one address as a set, and a plurality of the data groups are routed to the memory circuits 1 to 4 with individually different addresses. Stored as a table. Note that the pointer stored in the memory circuit 3 is two address data, “left” and “right”.
[0013]
Reference numeral 6 denotes a register for storing the input “partner IP address”, 7 denotes a mask processor for performing a mask process on a specific bit of the “partner IP address” using the mask data read from the memory circuit 1, and 8 denotes a memory circuit. 2, a register storing the pointer "left" read from the memory circuit 3, a register storing the pointer "right" read from the memory circuit 3, and a register 11 storing the pointer "right" read from the memory circuit 3. This is a register for storing information read from the memory circuit 4.
[0014]
Reference numeral 12 denotes a comparator for comparing the “other party IP address” masked by the mask processor 7 with the “search IP address” stored in the register 8. The comparator 12 determines a match / mismatch. The two data are regarded as integers equal to or greater than 0, and "0" is output when the "partner IP address" is larger than the "search IP address", and "1" is output when the opposite is true.
[0015]
A selector 13 selects and outputs the data of the register 9 or the data of the register 10 according to the content of the mismatch when the comparison result of the comparator 12 does not match. "Address", and thereafter, a selector for selecting the output data of the selector 13. Reference numeral 15 denotes an end determiner for outputting a signal of "no matching data" when the pointer output from the selector 13 indicates "address 0". .
[0016]
Next, the operation will be described. First, the “partner IP address” is stored in the register 6, and the “input head address” corresponding to the “partner IP address” is stored in the register 5 via the selector 14. The selector 14 is set to input data (pointer) from the selector 13 for the next processing after the storage in the register 5 is completed.
[0017]
Next, the mask data, the IP address, the pointer “left, right” and the information of the memory circuits 1 to 4 are read out by the “input head address” stored in the register 5, and the mask processor 7, the register 8, 9, 10, and 11. Here, the “partner IP address” of the register 6 is subjected to mask processing in the mask processor 7 and becomes one input of the comparator 12.
[0018]
In the comparator 12, when the output from the mask processor 7 as "Destination IP Address" is output from the register 8 is compared with the "search IP address", they are the same, the register 11, there Instructs to output the stored information as a search result.
[0019]
However, when the “partner IP address” is larger than the “search IP address”, the selector 13 selects the register 9 and stores the pointer “left” stored therein in the register 5 via the selector 14. New addressing is performed on the memory circuits 1 to 4 with the contents of the pointer "left", and the search is performed again. Conversely, when the “partner IP address” is smaller than the “search IP address”, the selector 13 selects the register 10 and stores the pointer “right” stored therein in the register 5 via the selector 14. Then, new addressing is performed using the content of the pointer "right" and the search is performed again.
[0020]
In this way, the comparison process and the search are repeated until a match signal is output from the comparator 12. However, when the pointers “left” and “right” output from the selector 13 indicate “address 0”, the end determination unit 15 outputs a signal indicating “no match data” to the outside and interrupts the processing.
[0021]
As described above, since the pointer is registered in the memory circuit 3 in advance, there is no need for a means for generating the pointer by software calculation or the like as in the related art, and the speed of the search process can be increased. Also, if a pointer generation circuit is provided in hardware, a circuit for lowering the overall processing speed such as an adder is usually required, but the processing speed is further improved since it is not necessary.
[0022]
FIG. 2 is a diagram showing one form of storing data in the memory circuits 1 to 4 in FIG. This is a schematic representation of a data storage format for storing data in a binary tree format as shown in the upper part of FIG. By storing nine data from A to I in the table as shown in the lower part of FIG. 2, the binary tree search processing in the circuit of FIG. 1 can be realized. At this time, A, B, C,. . . . , I are stored in this order, the comparison process is performed in that order, so that the best match process can be realized using the circuit of FIG.
[0023]
FIG. 3 is a diagram showing another format of storing data in the memory circuits 1 to 4 of FIG. When the pointers of the same value are stored in “left” and “right” as shown on the right side of FIG. 3, a data search structure as shown on the left side is obtained. When this is applied to the circuit of FIG. A linear search can be performed sequentially.
[0024]
As described above, in the present embodiment, the binary tree search or the linear search can be realized by appropriately setting / changing the value of the pointer stored in the memory circuit 3, and the search of other methods can be realized. And the search circuit need not be changed.
[0025]
【The invention's effect】
As described above, according to the present invention, when there is no item that matches the previous data group obtained in the previous search, a pointer designating another data group to be searched next is held in the previous data group. Therefore, a pointer for the next search can be obtained by referring to it without calculating a pointer for the next search, and even if the process is applied to the best match process of the IP routing process, the process is performed. The speed can be increased, and the throughput can be improved.
[0026]
Further, since the data search order can be substantially changed only by changing the data structure of the pointer stored in the data storage means, even if the circuit is once constructed, the circuit characteristics can be changed without changing the circuit. There is an advantage that it is possible to easily realize a search of a suitable method.
[0027]
Furthermore, only by using a simple circuit configuration such as a register and data storage means, a data search process that requires a part of a search key to be masked with separate information for each search, including a best match process. There is also an advantage that a data search circuit can be realized.
[Brief description of the drawings]
FIG. 1 is a functional block diagram showing a configuration of a data search circuit according to one embodiment of the present invention.
FIG. 2 is an explanatory diagram of the configuration of a data table when implementing a binary tree search.
FIG. 3 is an explanatory diagram of a configuration of a data table when realizing a linear search.

Claims (1)

One set of information data, which is data output when the result of comparison between the mask data, the search IP address , the first pointer, the second pointer, and the input IP address of the partner matches the search IP address, is defined as one A data storage means (1 to 4) in which a data group is stored as a data group and a data table including a plurality of the data groups;
First register for temporarily holding the input "destination IP address" and (6),
A second register (5) for holding an address indicating a data group currently being accessed in the data storage means (1-4);
Third to sixth registers for temporarily storing the search IP address , the first pointer, the second pointer, and the information data of the data group currently accessed in the data storage means (1 to 4), respectively (8-11),
A mask processor (7) for receiving the “partner IP address” from the first register (6) and performing a mask process according to mask data of the accessed data group;
A comparator (12) for judging a magnitude and a coincidence between the masked “partner IP address” output from the mask processor (7) and the content of the third register (8);
If the comparator (12) determines that one is greater than the other, the content of the fourth register (9) is replaced by the content of the fifth register (10). A selector (13) for outputting to a register (5) and updating an address for accessing the data storage means (1 to 4);
A data search circuit that outputs the contents of the sixth register (11) as search data when the comparison result of the comparator (12) is determined to be a match.

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