JP3554424B2 - Facsimile machine - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a facsimile apparatus, and more particularly to a technique for generating a beep sound of a somewhat complicated tone with a frequency modulation by a simple microprocessor.
[0002]
[Prior art]
Facsimile machines are widely used in offices and homes. The operation panel section of the facsimile apparatus includes a keyboard for a user to input various information by operating the same, and a display and a buzzer for notifying the user of various device information. LCD panels and LED lamps are commonly used as indicators. A so-called electronic buzzer using a piezoelectric element is commonly used as the buzzer, and several types of beeps having different timbres and sound patterns are properly used, and each beep sounds gives meaning to information.
[0003]
In the case of a general facsimile machine, a low-performance microprocessor is provided in the operation panel unit to handle input / output processing related to the operation panel unit (this is called a sub-processor for user interface control). ). The sub-processor and a main processor of a central control unit for performing main processing and control of facsimile communication are connected by a serial interface. A facsimile machine system has been made by such a multiprocessor system.
[0004]
The process of driving the buzzer of the operation panel unit to generate a beep sound is performed by the above-described user interface control sub-processor as follows.
[0005]
That is, the clock signal from the clock generator is taken into the sub-processor, the clock signal is counted by a predetermined counter, and the count value A is successively compared with the division ratio command value B set in a predetermined register. , A coincides with B, the counter is cleared and the counting of the clock signal is restarted. In this process, a signal obtained by dividing the frequency of the clock signal by 1 / B can be generated, and the buzzer is driven by the divided signal to generate a beep sound.
[0006]
By appropriately variably setting the dividing ratio command value B, the frequency of the beep sound changes. By appropriately combining the frequency modulation of this beep sound and the temporal intermittent pattern of the beep sound, several types of beeps with different audibility, such as "beep! Beep!", "Beep!" Generate a sound.
[0007]
[Problems to be solved by the invention]
In the above-described beep sound generation processing, when performing frequency modulation while continuously sounding a buzzer, the frequency division ratio command value B set in the register is appropriately changed. For example, by setting two frequency division ratio command values b1 and b2 having different magnitudes alternately at appropriate time intervals in the register, a beep sound such as "peaky peak" is generated. Here, conventionally, there has been a problem that noise is generated when the sound frequency of the buzzer is switched.
[0008]
The noise was found to be caused by the following reasons. It is assumed that the buzzer is driven by setting b1 as the division ratio command value in the register, and the value of the register is switched to b2 smaller than b1 at a certain timing. The count value of the counter (counting the clock signal) at this time is A as described above. If the count value A at the time when the frequency division ratio command value is switched from the large b1 to the small b2 is smaller than b2, A coincides with b2 when the count-up proceeds to some extent. In this case, there is no disturbance in the waveform at the frequency switching point of the buzzer drive signal, and there is no problem at all.
[0009]
However, when the count value A at the time when the frequency division ratio command value is switched from the large value b1 to the small value b2 exceeds b2 (A increases toward b1 and b1 is greater than b2, At that point, A ≧ b2 occurs), the counter continues to count up to the maximum value, reaches the maximum value and carries back to zero, from which the counting of the clock signal is restarted from zero, and A = b2. When this occurs, a coincidence signal serving as a basis for the buzzer drive signal is generated. After this, a frequency-divided signal obtained by normally dividing the clock signal by 1 / b2 continues, but immediately before that, there is a time during which the buzzer drive signal does not invert abnormally long, and this waveform disturbance causes noise and abnormal noise. It was.
[0010]
By the way, the frequency of the clock generator attached to the user interface control sub-processor is different depending on the type of the facsimile apparatus, but the programmed sub-processor may be used as a common component even in such different models (exclusively for the price). To lower). When the beep sound is generated by the above-described processing by the sub-processor, if the frequency of the clock signal is different, the frequency of the buzzer drive signal, which is a frequency-divided signal thereof, changes, and the frequency of the beep sound changes. Also, the drive time of the beep is controlled by the timer processing by the sub-processor, but since the clock signal is used as the time reference for the timer processing, if the clock frequency is different, the buzzer sounding time and the intermittent pattern change. Would. This was also one of the design problems of the facsimile machine.
[0011]
SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-described conventional problems, and has as its object to provide a facsimile apparatus in which noise and abnormal noise are not generated even at a frequency switching point of a buzzer drive signal. Another object of the present invention is to prevent a beep sound generation mode from being changed even when a different clock frequency is used.
[0012]
[Means for Solving the Problems]
Therefore, in the present invention, the clock signal from the clock generator is taken into the microprocessor, the clock signal is counted by a predetermined counter, and the count value A and the dividing ratio command value B set in the predetermined register are obtained. By successively comparing and repeating the process of clearing the counter and restarting counting of the clock signal when A matches B, a signal is generated by dividing the frequency of the clock signal by 1 / B. In a signal processing system that drives a buzzer with the frequency division signal to generate a beep sound, b1 is set as the frequency division ratio command value, and the frequency division ratio command value is set during driving the buzzer. When switching to b2 which is smaller than b1, the count value A of the counter is compared with a new frequency division ratio command value b2. And so as to slightly presetting a smaller predetermined value than 2.
[0013]
In the microprocessor, the frequency division ratio command value is set in proportion to the frequency of the clock signal, and a parameter of a timer process that defines the time of occurrence of the beep sound is varied according to the frequency of the clock signal. By setting, the generation mode of the beep sound can be kept unchanged even if the clock frequency is different.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 shows a schematic configuration of a beep sound generator in a facsimile apparatus according to one embodiment of the present invention. The operation panel unit 1 of the facsimile machine includes a keyboard 2 for a user to input various information by operating, a display 3 and a buzzer 4 for notifying the user of various device information. The display 3 includes an LCD panel 3a for displaying characters and pictograms, and several LED lamps 3b. The buzzer 4 is a so-called electronic buzzer using a piezoelectric element.
[0015]
The operation panel unit 1 is provided with a low-function microprocessor 5 and is responsible for input / output processing related to the operation panel unit 1 (this is called a user interface control sub-processor 5). The sub-processor 5 and a main processor 6 of a central control unit for performing main processing and control of facsimile communication are connected by a serial interface, and necessary information is exchanged. Although not described in detail, the entire system of the facsimile apparatus is made by such a multiprocessor system. Thus, the overall configuration is basically the same as the conventional one.
[0016]
The process of driving the buzzer 4 of the operation panel unit 1 to generate a beep sound is performed by the user interface control sub-processor 5 as described below.
[0017]
That is, the clock signal from the clock generator 7 is taken into the sub-processor 5, the clock signal is counted by the counter 51, and the count value A and the dividing ratio command value B set in the register 52 are sequentially outputted by the comparator 53. The comparison is repeated, and the process of clearing the counter 51 with the coincidence signal from the comparator 53 when A coincides with B and restarting the counting of the clock signal is repeated. In this process, a signal obtained by dividing the frequency of the clock signal by 1 / B is obtained from the comparator 53. The divided signal directly or indirectly drives the buzzer 4 to generate a beep sound.
[0018]
By appropriately varying the frequency division ratio command value B set in the register 52 by the program processing in the sub-processor 5, the frequency of the beep sound changes. By appropriately combining the frequency modulation of this beep sound and the temporal intermittent pattern of the beep sound, several types of beeps with different audibility, such as "beep! Beep!", "Beep!" Generate a sound.
[0019]
When frequency modulation is performed while the buzzer 4 is sounded continuously, the frequency division ratio command value B set in the register 52 is appropriately changed. For example, by setting two division ratio command values b1 and b2 of different magnitudes in the register 52 alternately at appropriate time intervals, a beep sound such as "Peep-P-P-P" is generated.
[0020]
A feature of the present invention is that when the value of the register 52 is switched to b2 smaller than b1 while the buzzer 4 is being driven by setting b1 in the register 52 as the dividing ratio command value, the count value A of the counter 51 Is compared with the new dividing ratio command value b2, and if A is equal to or greater than b2, a predetermined value slightly smaller than b2 is preset in the counter 51. As a result, noise and abnormal noise do not occur even at the frequency switching point of the buzzer drive signal.
[0021]
For example, FIG. 2 is a flowchart showing a process in which two division ratio command values b1 and b2 having different sizes are alternately set in the register 52 at appropriate time intervals. First, it is determined whether the current value of the register 52 is a large value b1 or a small value b2 (step 101). If the small value b2 is set in the register 52, the process proceeds to step 102, and waits for the timing of switching the division ratio command value. This timing is controlled by a separate timer process. When the switching timing comes, a large value b1 is set in the register 52 (step 103). At the switching point from the small value b2 to the large value b1, there is no fear that noise occurs.
[0022]
If the current value of the register 52 is a large value b1, the process proceeds to step 104, and waits for the timing of switching the division ratio command value. If the switching timing has come, the routine proceeds to step 105, where the count value A of the counter 51 is compared with the value b2. If the count value A is equal to or more than the value b2, the process proceeds to step 105, where a predetermined value (b2-Δ) slightly smaller than b2 is preset in the counter 51, and then the value b2 is set in the register 52 in step 107. In step 105, if the count value A is smaller than b2, step 106 is skipped, and in step 107, the value b2 is set in the register 52.
[0023]
Therefore, when the division ratio command value is switched from the large value b1 to the small value b2, the situation that the count value A of the counter 51 exceeds b2 does not completely occur. In other words, even after the frequency division ratio command value is switched to b2 as in the prior art, the counter 51 continues to count up until it reaches the maximum value, carries up to zero, and restarts counting the clock signal from zero. Then, it is possible to avoid a situation where a coincidence signal is output when A = b2, which causes noise and abnormal noise.
[0024]
Incidentally, the sub-processor 5 programmed as described above may be incorporated as a common component into facsimile machines of different models, and a clock generator 7 having a different frequency may be used depending on the model. In this embodiment, either the clock generator 7 of the frequency F1 or the clock generator 7 of the frequency F2 is combined with the sub-processor 5 according to the type of the facsimile machine.
[0025]
Then, a 1-bit signal (referred to as a clock frequency identification signal) or a main processor 6 discriminates a specific input port Pin of the sub-processor 5 to discriminate whether the frequency of the clock generator 7 is F1 or F2. I'm giving information. The sub-processor 5 reads the clock frequency identification signal applied to the input port Pin as initial processing, or recognizes whether the frequency of the clock generator 7 is F1 or F2 based on the identification information from the main processor 6. The parameters of the beep generation process and other various timer processes are selected and set according to the clock frequency used. That is, a parameter for the clock frequency F1 and a parameter for the clock frequency F2 are programmed in advance as parameters relating to time control, and either parameter is adopted in accordance with the clock frequency when executing the actual processing. With this function, even in a facsimile machine having a different clock frequency, (1) the same beep sound frequency, (2) the same beep sound time, and (3) the same intermittent beep sound temporal pattern. And (4) making the input sampling intervals of the keyboard 2 the same, and (5) making the same temporal control conditions such as the blinking cycle of the display element on the display 3.
[0026]
【The invention's effect】
According to the present invention, noise and abnormal noise do not occur even at the frequency switching point of the buzzer drive signal. Further, even if the clock frequency used is different, the generation mode of the beep sound does not change.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram of a beep sound generator in a facsimile apparatus according to one embodiment of the present invention; FIG. 2 is a flowchart showing an outline of frequency switching control of a beep sound signal of a sub-processor in the beep sound generator; Description】
1 operation panel unit 2 keyboard 3 display 3a LCD panel 3b LED lamp 4 buzzer 5 sub processor 51 counter 52 register 53 comparator 6 main processor 7 clock generator

Claims (4)

A clock signal from a clock generator is taken into a microprocessor, the clock signal is counted by a predetermined counter, and the count value A is successively compared with a division ratio command value B set in a predetermined register. When the value of the clock signal coincides with B, the process of clearing the counter and restarting the counting of the clock signal is repeated, thereby generating a signal obtained by dividing the frequency of the clock signal by 1 / B, and generating the divided signal. In the signal processing system that drives the buzzer to generate a beep sound, b1 is set as the division ratio command value, and the division ratio command value is set to b2 smaller than b1 while the buzzer is driven. At the time of switching, the count value A of the counter is compared with the new frequency division ratio command value b2. Facsimile apparatus characterized by presetting a predetermined value. 2. The facsimile apparatus according to claim 1, wherein the microprocessor sets the division ratio command value in proportion to the frequency of the clock signal. 3. The facsimile apparatus according to claim 1, wherein the microprocessor variably sets a parameter of a timer process that defines an occurrence time of the beep according to a frequency of the clock signal. The microprocessor according to any one of claims 1 to 3, further comprising a keyboard for operating a user to input various information, a display for notifying the user of various device information, and the buzzer. A sub-processor for user interface control that handles input / output processing related to the operation panel unit, including the main processor of the central control unit that performs the main processing and control of facsimile communication via a serial interface. Facsimile machine characterized by being performed.

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