JP3526189B2 - Reference voltage generation circuit and reference current generation circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reference voltage generating circuit and a reference current generating circuit used in electronic equipment and electronic circuits.

[0002]

2. Description of the Related Art Conventionally, a reference voltage generating circuit used in electronic devices and electronic circuits is disclosed in Japanese Patent Application Laid-Open No. 6-309051. FIG. 3 is a block diagram of a conventional reference voltage generating circuit. In FIG. 3, Q1 and Q2 are transistors and R1 and R2 are resistors, which generate a reference current. M2 and M3 are MOS transistors forming a current source. The transistors Q1 and Q2 and the resistor R1 form a Widler current mirror, and the resistor R1 converts a voltage difference between the base and emitter of the transistor Q1 and between the base and emitter of the transistor Q2 into a current. The current is folded back by the MOS transistors M2 and M3 and the resistance R
Convert to voltage at 2. The sum of the voltage between the base and emitter of the transistor Q1 and the voltage generated by the resistor R2 is generated as a bandgap voltage at the output terminal VBG.

Further, a conventional reference voltage generating circuit used in electronic equipment and electronic circuits is disclosed in Japanese Patent Laid-Open No. 5-17365.
No. 9 publication. FIG. 4 is a block diagram of a conventional reference voltage generating circuit. In FIG. 4, D1 and D2 are diodes and R3 is a resistor, which generate a reference voltage. R4 and R5 are resistors that amplify the reference voltage.
OP is an operational amplifier that compares reference voltages and feeds back to the junction point of the resistors R4 and R5. The voltage generated by the diode D1 and the voltage generated by the diode D2 and the resistor R3 are compared by the operational amplifier OP, and the output result is compared with the resistors R4 and R4.
It is configured to return to the junction point of 5. As a result, a bandgap voltage is generated at the output terminal VBG of the operational amplifier OP.

Further, a conventional reference voltage generating circuit used in electronic equipment and electronic circuits is disclosed in Japanese Patent Laid-Open No. 12320/1993.
No. 9 publication. FIG. 5 is a block diagram of a conventional reference voltage generating circuit. In FIG. 5, Q3 and Q4 are transistors and R6 is a resistor, which generate a reference current. R7 and R8 are resistors that amplify the reference voltage. OP is an operational amplifier that compares the voltages generated in the resistors R7 and R8 and feeds back to the junction point of the bases of the transistors Q3 and Q4. The resistor R8 converts the emitter current generated by the transistor Q3 into a received voltage. A current generated by the transistor Q4 and the resistor R6 is received by the resistor R7 and converted into a voltage. The voltages generated by the resistors R7 and R8 are compared by the operational amplifier OP, and the output result is fed back to the junction point of the bases of the transistors Q3 and Q4. As a result, a bandgap voltage is generated at the output terminal VBG of the operational amplifier OP.

[0005]

Conventionally, in a reference voltage generating circuit used in an electronic device or an electronic circuit, when the reference voltage is generated, stable operation with a simple structure has been a problem. For example, in the conventional example (FIG. 3) disclosed in Japanese Patent Application Laid-Open No. 6-309051, the feedback gain is about 10 times at most, and the current difference generated in the current mirrors M2 and M3 cannot be absorbed.

A conventional example (FIG. 4) disclosed in Japanese Unexamined Patent Publication No. 5-173659 and Japanese Unexamined Patent Publication No. 3-123209.
In the conventional example (FIG. 5) disclosed in the publication, the feedback gain can be set large by using the operational amplifier OP, but the use of the operational amplifier OP is unavoidable and the circuit scale becomes large. have. For example, a concrete circuit of a simple operational amplifier is shown in FIG. In FIG. 6, M5 to M13 are MOS transistors, C1
Is a capacitor, VDD is a power supply voltage, GND is ground, − is an inverting input terminal, + is a non-inverting input terminal, and OUT is an output terminal.

The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide a reference voltage generating circuit and a reference current generating circuit which can operate stably with a simple structure.

[0008]

A reference voltage generating circuit according to claim 1 is a first transformer having a base and a collector connected to each other.
The base to the transistor and the base of the first transistor
The connected second transistor and the first transistor
Between the emitter of the second transistor and the emitter of the second transistor
The first resistor connected to the
A second resistor having one end connected to the source and the collector;
The source is connected to the other end of the second resistor, and the second transistor
The first MOS transistor with the gate connected to the collector of the star
And the drain of the first MOS transistor.
Second MOS transistor with in and gate connected
And the gate and the front of the second MOS transistor
The drain to the gate, the second transistor of the
Third MOS transistor with drain connected to collector
And the second MOS transistor and the third MOS transistor.
And the source of the MOS transistor, said second transistor
Connect the power between said emitter of data, the first M
The source side of the OS transistor is connected to the output terminal .

According to the reference voltage generating circuit of the first aspect, the output voltage obtained by connecting the output of each of the current mirror for generating the bandgap voltage and the current mirror for inverting the reference current to the bandgap voltage via the MOS transistor is used. It is possible to obtain a reference voltage that operates stably with a simple configuration of returning to. The reference current generating circuit according to claim 2 is the reference voltage generating circuit according to claim 1.
And a resistor that can set the current value with a resistor connected to the source.
And a MOS transistor forming a follower,
The gate of the MOS transistor is used to generate the reference voltage.
Connected to the gate of the first MOS transistor of the circuit,
The drain of the MOS transistor is on the output side .

According to the reference current generating circuit of the second aspect, in addition to the same effect as the first aspect, a stable reference current corresponding to the bandgap voltage can be obtained.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION A first embodiment of the present invention will be described below with reference to FIG. FIG. 1 shows an example of the circuit configuration of the reference voltage generating circuit in the first embodiment. In FIG. 1, Q1 and Q2 compose a current mirror, which is a transistor pair that generates a voltage difference between its base and emitter. One of the emitters, that is, the emitter of the transistor Q1 is connected to the ground, On the other hand, the emitter of the transistor Q2 is connected to the ground via the resistor R1 connected in series to it. R1 is a resistor that converts the voltage difference generated in the transistors Q1 and Q2 into a current. R2 is a resistor that is connected in series to one of the collectors, that is, the collector of the transistor Q2 to convert the current flowing in the transistor Q2 into a voltage, and the output terminal VBG is connected to the side opposite to the collector connection side. M2 and M3 form a current mirror, and include transistors Q1 and Q2 and a resistor R.
1 and R2 is a MOS transistor pair that inverts the current generated in R2. The drain of the MOS transistor M3 is connected to the collector side of the transistor Q1. The MOS transistor M1 is the MOS transistor M2
Is inserted between the drain and the resistor R2, and the gate is MO
It is connected to the connection point of the drain of the S-transistor M3 and the collector of the transistor Q1, and the voltage of the source is connected to the resistor R2.
Have returned to. That is, the output of each current mirror is connected, and the MOS transistor M is connected from the connection point.
The voltage is fed back to the point where the bandgap voltage is generated (resistor R2) via 1.

The operation of the reference voltage generating circuit of the embodiment configured as described above will be described below. By making a difference in the design size or current value of the transistors Q1 and Q2, a voltage difference occurs between the base and emitter voltages of the transistors Q1 and Q2. This voltage difference is applied to the resistor R1.
Is converted into electric current. When this converted current is amplified by the resistor R2 and the sum of the voltages generated in the transistor Q2 and the resistors R1 and R2 is calculated, a voltage known as a band gap voltage, about 1.2 V, is generated. In FIG. 1, a bandgap voltage is generated at the output terminal VBG. The current flowing through the transistor Q2 and the resistors R1 and R2 is reflected in the transistor Q1 as a current mirror.
Further, it is also reflected in the MOS transistors M2 and M3 forming the current mirror via the MOS transistor M1. When the output points of the respective current mirrors are connected, the connection point becomes stable at a voltage at which the current difference becomes zero. When the voltage is fed back to the bandgap voltage output terminal VBG via the MOS transistor M1, the current value flowing through the resistors R1 and R2 and the transistor Q2 is automatically adjusted by the feedback loop, and stable operation is possible. Considering the gate of the MOS transistor M3 as an input, since it operates as a current source load inverter, it is 100 times (40d
B) degree can be easily obtained.

According to the first embodiment, an output voltage obtained by connecting a current mirror for generating a bandgap voltage, a current mirror for inverting its reference current, and respective outputs is fed back to a bandgap voltage via a MOS transistor. With such a configuration, it is possible to obtain a reference voltage that operates stably with a simple configuration. In this embodiment, the current mirror that generates the bandgap voltage is a transistor pair, but this transistor pair may be a MOS transistor pair.

A second embodiment of the present invention is shown in FIG. This reference current generating circuit is the same as the MOS transistor M4 constituting the source follower in the first embodiment.
And a resistor R9 for converting the voltage generated at the source into a current is added. That is, at the connection point between the collector of the transistor Q1 and the drain of the MOS transistor M3, the MOS
The gate of the transistor M4 is connected, the source of the MOS transistor M4 is connected to the ground via the resistor R9,
The output terminal IOUT is connected to the drain. Other configurations are similar to those of the first embodiment.

Thus, when the voltage at the junction between the collector of the transistor Q1 and the drain of the MOS transistor M3 is output as the source follower by the MOS transistor M4, the source of the MOS transistor M4, that is, the terminal V
A voltage equal to the band gap appears in BGO. If this voltage is used and converted into a current by the resistor R9, a stable reference current determined by the bandgap voltage and the characteristic of the resistor can be obtained at the drain of the MOS transistor M4.

According to the second embodiment, a stable reference current can be obtained by providing the source follower in the first embodiment. In addition, the same effect as the first embodiment is obtained.

[0017]

According to the reference voltage generating circuit of the first aspect of the present invention, the output voltage connecting the output of each of the current mirror for generating the bandgap voltage and the current mirror for inverting the reference current to each output is passed through the MOS transistor. It is possible to obtain a reference voltage that operates stably with a simple configuration of returning to the band gap voltage.

According to the reference current generating circuit of the second aspect, in addition to the effect similar to that of the first aspect, a stable reference current corresponding to the bandgap voltage can be obtained.

[Brief description of drawings]

FIG. 1 is a reference voltage generation circuit diagram in a first embodiment of the present invention.

FIG. 2 is a reference current generation circuit diagram according to a second embodiment.

FIG. 3 is a reference voltage generation circuit diagram of a conventional example.

FIG. 4 is a reference voltage generating circuit diagram of another conventional example.

FIG. 5 is a reference voltage generation circuit diagram of still another conventional example.

FIG. 6 is a specific circuit diagram of an operational amplifier circuit.

[Explanation of symbols]

Q1-Q4 transistors R1 to R8 resistance D1, D2 diode M1 to M13 MOS transistors C1 capacitor OP operational amplifier

Claims (2)

(57) [Claims] 1. A first tiger connecting a base and a collector.
Transistor and the base of the first transistor
A second transistor connected to the first transistor and the first transistor
Of the emitter of the second transistor and the emitter of the second transistor
A first resistor connected between the first resistor and the first resistor
A second resistor having one end connected to the base and the collector;
The source is connected to the other end of the second resistor, and the second transformer is connected.
First MOS Tran was a gate connected to the collector of the register
Transistor and the drain of the first MOS transistor.
Second MOS transistor with rain and gate connected
And the gate and the front of the second MOS transistor
The drain to the gate, the second transistor of the
Third MOS transistor with drain connected to collector
With the door, said second MOS transistor and the third MOS tiger
The source of the transistor and the source of the second transistor.
Connect the power supply to the Mitter, and connect the first MOS transistor.
Reference voltage generation circuit that connects the source side of the star to the output terminal . 2. A reference voltage generating circuit according to claim 1;
A source source whose current value can be set by a resistor connected to the source
A MOS transistor forming a follower,
The gate of the OS transistor is connected to the gate of the reference voltage generating circuit.
Is connected to the gate of the first MOS transistor,
Reference current generation circuit with the drain of the transistor as the output side .