JP3514969B2 - Semiconductor device manufacturing method and semiconductor manufacturing apparatus - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an insulating film such as a capacitor and a transistor used in a semiconductor device and a semiconductor manufacturing apparatus for forming this insulating film.

[0002]

2. Description of the Related Art Conventionally, a magnetic disk device has been widely used as a storage device of an information processing device. However, the magnetic disk device has drawbacks such as being vulnerable to impact because it has a highly precise mechanical drive mechanism, and cannot access at high speed because it mechanically accesses the storage medium. Therefore, in recent years, a semiconductor memory device has been developed as a memory device of an information processing device. Since the semiconductor memory device does not have a mechanical driving part, it is resistant to impact and can be accessed at high speed. From this point of view, the demand for semiconductor memory devices is increasing. The semiconductor technology has advanced remarkably including the above-mentioned circumstances. Advances in the manufacturing technology of semiconductor devices, particularly advances in microfabrication technology, have led to the miniaturization of memory cells, and along with this, the dielectric films of capacitors and the gate oxide films of transistors forming the memory cells have also been made thinner. The thinning of the dielectric film and the gate oxide film has brought about a problem of reliability of the semiconductor device.

For example, even in a non-volatile memory in which a memory cell is composed of a transistor having a tunnel insulating film, the tunnel insulating film is becoming thinner along with the high integration of semiconductor devices. Therefore, it is a big problem that low electric field leakage current (stress leakage current) gradually increases due to application of high electric field stress. In addition, application of high electric field stress increases the number of electron traps and decreases the amount of charge that can flow in the insulating film (Qb
Deterioration of d characteristics) is also a concern. In order to improve such a point, an oxynitride film is currently used as a tunnel insulating film instead of a silicon oxide film.
The oxynitride film is formed by forming a silicon oxide film on a silicon semiconductor substrate, then nitriding with ammonia,
It has a process such as annealing with oxygen. This oxynitride film is effective in suppressing electron traps and reducing stress leak current due to high electric field stress by modifying the weak Si—O bond in the silicon oxide film with nitrogen.

[0004]

However, in ammonia nitridation, which is one of the formation processes, hydrogen is introduced at the same time as the introduction of nitrogen into the film. Most of this hydrogen is desorbed by oxygen annealing, but some remains in the film, causing dielectric breakdown of the tunnel insulating film. For this reason, a hydrogen-free nitriding process, which is an alternative to the ammonia nitriding process, has been required. However, at present, nitriding with N ₂ O and NO is accompanied by an oxidative reaction, so that a sufficient nitrogen concentration in the film cannot be obtained even if it is called a hydrogen-free nitriding process. Further, the nitriding process using nitrogen molecules requires a high process temperature (about 1200 ° C.) and a long nitriding time in order to obtain a sufficient nitrogen concentration in the film. Such a process is difficult to use in an actual process because the thermal load on the wafer is large. There is no hydrogen-free nitriding process that forms an oxynitride film and a nitride film that can be used in the actual process. The present invention has been made in view of the above circumstances, and provides a method for manufacturing a semiconductor device that forms a nitride film used as a dielectric film of a capacitor or a tunnel insulating film of a transistor, and a semiconductor manufacturing apparatus that forms the nitride film. provide.

[0005]

The present invention is characterized by performing the following nitriding process. By sufficiently heating the nitrogen filled in the process chamber at a high temperature (for example, 1400 ° C. or higher), chemically active nitrogen is produced.
The wafer is quickly inserted into the process chamber filled with the activated nitrogen to nitride the wafer. Due to the chemically active nitrogen, the nitriding reaction starts even while the wafer temperature is increasing. Then, a desired nitrogen concentration in the film is obtained before the wafer temperature reaches a thermal equilibrium state (1400 ° C.), at which point the wafer is taken out of the process chamber. By forming a nitride film using chemically activated nitrogen, the thermal jet increase that is a practical problem in the N ₂ nitriding process is solved (reduction of wafer processing temperature, reduction of heat treatment time). Can be changed).

The semiconductor manufacturing apparatus of the present invention has an outer tube surrounded by a heating device on the outer side, an inner tube used as a process chamber for accommodating semiconductor wafers on the inner side, and an inner tube inserted into the outer tube, and the inner tube. A process gas passage formed in the space between the pipe and the outer pipe; and a gate formed in the process chamber for introducing a process gas containing nitrogen gas into the process chamber through the process gas passage. The chamber is characterized in that the semiconductor wafer is placed and heat-treated while being filled with an active nitrogen atmosphere. This semiconductor manufacturing apparatus can produce chemically active nitrogen by sufficiently heating the nitrogen filled in the process chamber at a high temperature. A wafer can be quickly inserted and nitrided in the process chamber filled with activated nitrogen.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. First, FIG. 1 is a sectional view of a semiconductor manufacturing apparatus for performing the nitriding process of the present invention. The upper part of the sectional view shown in the figure is the upper part of the semiconductor manufacturing apparatus, and the lower part of the semiconductor manufacturing apparatus is partially omitted. A process chamber 10 of this apparatus is formed inside an inner tube 1 made of a heat resistant insulating tube such as SiC (silicon carbide). An opening 2 is formed in the upper part of the inner tube 1 and is used as a gate into which the chemically active nitrogen enters the process chamber 10. An outer tube 4 made of a heat-resistant insulating tube such as SiC is arranged so as to cover the inner tube 1. A process gas passage 20 is provided between the inner pipe 1 and the outer pipe 4. Nitrogen gas, which is a process gas, is introduced into the process gas passage 20 from outside the semiconductor manufacturing apparatus. The nitrogen gas is heated in the process gas passage 20 to become chemically active nitrogen, and is introduced into the process chamber 10 through the opening 2 which is a gate. The outer tube 4 is covered with a heat equalizing tube 5 made of a heat-resistant insulating tube such as SiC, and the heat equalizing tube 5 has a heater 6 around its periphery.
It is wound in. The heater 6 heats the nitrogen gas in the process gas passage 20 to chemically activate it.

Next, referring to FIG. 1, FIG. 2 and FIG.
An example will be described. In this embodiment, a process of changing an oxide film on a semiconductor substrate (in this case, a silicon wafer) into an oxynitride film is performed. Nitrogen as a process gas is introduced into the process chamber 10 from the gate 2. Then process room 1
Nitrogen is heated to 1400 ° C. by the heater 6 covering 0. At this time, the nitrogen in the process chamber 10 heated to a high temperature by the heater 6 changes into chemically active nitrogen (FIG. 1). Then, when the gas temperature reaches a steady state, a wafer 30 such as a silicon semiconductor is inserted into the process chamber 10. The wafer 30 is supported by the support 7. The support 7 supports the back surface of the wafer at three points. A carrier tool (not shown) places the wafer 30 together with the support tool 7 in a predetermined position in the process chamber 10, and immediately performs a nitriding process on the wafer 30 (FIG. 2).
The transport tool is moved and operated by using a driving means such as a servo motor. At this time, a silicon oxide film having a predetermined pattern and a thickness of 8.2 nm is formed on the wafer 30 in advance at a predetermined position.

Wafer 30 placed in process chamber 10
The nitriding reaction starts before the wafer temperature reaches 1400 ° C. This is because, as described above, nitrogen, which is the process gas, changes into a chemically active gas, so that the nitriding reaction starts even if the wafer temperature is low. Since the desired nitrogen concentration is obtained in the silicon oxide film when the wafer temperature reaches 1050 ° C., the wafer 30 is pulled out of the process chamber 10 at this point, and the process is completed (FIG. 3). A high quality oxynitride film can be obtained by performing the above process.

Next, a second embodiment will be described with reference to FIGS. In this embodiment, the silicon surface of the wafer is directly nitrided. Nitrogen, which is a process gas, is introduced into the process chamber 10 and heated to 1400 ° C. by the heater 6 covering the process chamber 10. At this time, the heater 6
Nitrogen heated to a high temperature by is converted into chemically active nitrogen (Fig. 1). Then, when the gas temperature reaches a steady state, the wafer 30 is inserted into the process chamber 10 to perform a nitriding process (FIG. 2). At this time, the native oxide film on the wafer 30 is removed by pretreatment. The nitriding reaction of the wafer 30 placed in the process chamber 10 starts before the wafer temperature reaches 1400 ° C. As described above, nitrogen, which is a process gas, is changed to a chemically active gas as described above, so that the nitriding reaction starts even though the wafer temperature is low. Wafer temperature is 1050 ℃
Since a desired nitride film thickness is obtained on the silicon at the time of reaching, the wafer 30 is withdrawn from the process chamber 10 at this time, and the process is completed (FIG. 3). With the above process, a high quality and extremely thin silicon nitride film can be formed. In particular, a tunnel insulating film having a thickness of 10 nm or less can be formed.

Next, a third embodiment will be described with reference to FIGS. 4 and 5. In this embodiment, the method of forming the nitride film shown in the first or second embodiment is applied to 256M.
The DRAM will be described. FIG. 4 is a sectional view of a semiconductor substrate on which a 256 MDRAM is formed, and FIG. 5 is a cell circuit diagram of this DRAM. This memory cell has a one-transistor one-capacitor structure, and a plurality of memory cells are arranged in a matrix to form a cell array. One of source and drain of the transistor is a bit line (data line)
, The other is connected to one electrode of the capacitor, and the gate is connected to the word line. One of the electrodes of the capacitor is connected to the other of the source / drain of the transistor, and the other electrode is grounded.

First, the peripheral circuit portion shown on the right side of FIG. 5 will be described. An element isolation trench is formed in a p-type semiconductor substrate 11 such as a silicon semiconductor, and a silicon oxide film 12 is embedded therein. The silicon oxide film 12 is formed by thermally decomposing organic oxysilane (Si (O ₂ C ₅ H ₄ )) (hereinafter, this film is referred to as TEOS film). An SiO ₂ / Si ₃ N ₄ film 121 is formed between the silicon oxide film (TEOS film) 12 and the side wall of the trench. An n well 13 is formed in the semiconductor substrate 11, and a p type impurity diffusion region 14 used as a source or a drain is formed therein. A thermal oxide film (SiO ₂ ) 15 is formed on the surface of the semiconductor substrate 11, on which a gate structure 16 of a transistor is formed on an n well 13 and a silicon oxide film (TEOS film) 12. The gate structure 16 is composed of a polysilicon film 161, a WSi film 162, a Si ₃ N ₄ film 163 on the thermal oxide film 15, and a Si ₃ N ₄ coating film 164 that covers these laminated bodies. BPSG to cover the gate structure 16
An interlayer insulating film 17 made of (Boron-doped Phospho Silicate Glass) or the like is formed. Interlayer insulating films (TEOS films) 18 and 19 are sequentially stacked on this. TE
Metal wires 21 and 29 are formed on the OS film 19.

The metal wirings 21 and 29 are made of an Al--Cu film,
T, which is a barrier metal layer formed on the upper and lower layers thereof
It is composed of an i / TiN film. Metal wiring 21, 29
So as to cover the interlayer insulating film (TEOS film) 22, the interlayer insulating film (SAUSG film) 23, and the interlayer insulating film (TEO).
S film) 24 is sequentially formed. A metal wiring 25 is formed on the TEOS film 24. Metal wiring 25
Is composed of an Al—Cu film, a Ti / TiN film which is a barrier metal layer formed below the Al—Cu film, and a TiN film which is a barrier metal layer formed above the Al / Cu film. The metal wiring 25 is electrically connected to the metal wiring 21 through the contact holes formed in the interlayer insulating films 22, 23 and 24. The TEOS film 24 is formed so as to cover the metal wiring 25.
TEOS film 26, nitride film (Si ₃ N ₄ ) 2
7 and the polyimide film 28 are laminated.

The metal wiring 21 is electrically connected to the gate on the silicon oxide film 12 by the connection wiring 31.
The connection wiring 31 is composed of the BPSG film 17, the TEOS film 18, and 1.
9 through the TEOS film 18 and BPSG.
The film 17 and the Si ₃ N ₄ film 163 are made up of a barrier layer made of a Ti film and a W film thereon, and the TEOS film 19 region is made up of a barrier layer made of a TiN film and a W film formed thereon.
The metal wiring 29 is connected to the p-type impurity diffusion region 14 and the connection wiring 3
2 electrically connected. The connection wiring 32 includes the thermal oxide film 15, the Si ₃ N ₄ coating film 164, the BPSG film 1
7. TEO formed by penetrating the TEOS films 18 and 19
S film 18 to BPSG film 17, Si ₃ N ₄ coating film 16
4. The thermal oxide film 15 is composed of a barrier layer made of a Ti film and a W film thereon, and the TEOS film 19 is composed of a barrier layer made of a TiN film and a W film thereon.

Next, the cell portion shown on the left side of FIG. 5 will be described. The cell portion uses the same transistors, wirings, and interlayer insulating films as those used in the peripheral circuit portion. N of the semiconductor substrate 11
The connection wiring 33 made of polysilicon and connected to the type impurity diffusion region is the metal wiring 3 connected to the bit line (BL).
Connected to 5. The gate structure 16 of one of the transistors forming the cell is connected to the word line (WL). The other capacitor 34 is formed inside the semiconductor substrate 11 in a trench structure. Three layers of polysilicon film are filled inside the capacitor trench,
A laminated film (NO film) of an oxide film and a nitride film is formed on the surface thereof. Since the NO film is used as a capacitor dielectric, a thin film of good quality is required. Therefore,
It is most suitable for using the semiconductor manufacturing apparatus of the present invention. Also,
For the NO film for the capacitor, the method for forming the nitride film described in the second embodiment is applied.

Next, a fourth embodiment will be described with reference to FIGS. 6 and 7. In this embodiment, a NAND to which the method for forming a nitride film shown in the first or second embodiment is applied
The nonvolatile memory will be described. FIG. 6 is a cross-sectional view of a semiconductor substrate on which a NAND type nonvolatile memory is formed, and FIG. 7 is a cell circuit diagram of this nonvolatile memory. As shown in FIG. 7, a first select transistor having a drain connected to a bit line (BL) and having a select gate (SG1) and a second select transistor having a source grounded and having a select gate (SG2). , A source and a drain are connected to each other, and memory transistors (M1, M2, ... M8) each having a control gate (CG1, CG2, ... CG8) are connected. The NAND type non-volatile memory is a semiconductor memory in which a new operation method is introduced by arranging memory cells having the same structure as the conventional one in a NAND type, and the memory cell occupied area per bit can be reduced.

FIG. 6 shows a NAND formed on a semiconductor substrate.
FIG. 3 is a cross-sectional view showing a part of the nonvolatile memory. Impurity diffusion regions 41, 42, 43 to be the source / drain of the transistor are formed on the p-type silicon semiconductor substrate 40, and the n-type impurity diffusion regions 41, 42 are used as the source / drain, with the gate insulating film interposed therebetween. A first select transistor having a select gate (SG1) 36 formed of a polysilicon film or the like is formed. First
Of the n-type impurity diffusion regions 42 and 43 as the source / drain adjacent to the select transistor of FIG.
G1) a first memory transistor (M1) having 37
Are formed. A second memory transistor (M2) having a control gate (CG2) is formed adjacent to the first memory transistor. There is a very thin silicon oxide film or nitride film between the floating gate 38 and the semiconductor substrate 40, and this is called a tunnel insulating film 39. This memory is accessed via F-
An N (Fowlor-Nourdheim) current is passed to inject electrons into the floating gate 38 or emit electrons from the floating gate 38.

The manufacturing apparatus of the present invention is applied to manufacture of this non-volatile memory. For example, when a silicon nitride film or a silicon oxynitride film is used as the tunnel insulating film, when the silicon nitride film is partially formed in the interlayer insulating film formed between the control gate 37 and the floating gate 38, The semiconductor manufacturing apparatus of the invention can be applied. The tunnel insulating film (SiO ₂ ) 39 is
By changing a part of the semiconductor manufacturing apparatus and introducing oxygen as a process gas into the process chamber, a dense and high-quality silicon oxide film can be formed.

[0019]

By using the nitriding method according to the present invention, hydrogen-free nitriding can be realized without applying an excessive thermal load to the wafer. By this method, an insulating film with low leak current and high reliability can be obtained. Also,
The nitride film (oxynitride) film formed by using the method for forming an insulating film for a transistor according to the present invention has a low hydrogen concentration in the film and thus has high electrical reliability. Further, the nitride film formed by using the method for forming an insulating film for a capacitor according to the present invention has a low hydrogen concentration in the film and thus a low leak current.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor manufacturing apparatus that performs a nitriding treatment according to the present invention.

FIG. 2 is a sectional view of the semiconductor manufacturing apparatus of FIG. 1 on which a semiconductor wafer is mounted.

FIG. 3 is a sectional view of the semiconductor manufacturing apparatus of FIG. 1 on which a semiconductor wafer is mounted.

FIG. 4 is a 256 MDRAM cell circuit diagram illustrating the present invention.

FIG. 5 is a semiconductor device (256 MDR) to which the present invention is applied.
AM) partial sectional view.

FIG. 6 is a circuit diagram of a NAND-type nonvolatile memory cell for explaining the present invention.

FIG. 7 is a partial cross-sectional view of a cell structure of a semiconductor device (NAND type nonvolatile memory) to which the present invention is applied.

[Explanation of symbols]

1 ... Inner tube, 2 ... Opening part, 4 ... Outer tube, 5 ... Soaking tube, 6 ... Heater, 10.
..Process chambers, 11, 40 ... Semiconductor substrates, 12.
..Silicon oxide film (TEOS film), 13 ... N well, 14 ... P-type impurity diffusion region, 15 ... Thermal oxide film, 16 ... Gate structure, 17 ... Interlayer insulating film ( BPSG film), 18, 19, 22, 24, 26 ...
-Interlayer insulating film (TEOS film), 20 ... Process gas passage, 21, 29, 25, 35 ... Metal wiring, 23
... Interlayer insulating film (SiO ₂ ; SAUSG), 27 ...
・ Nitride film (Si ₃ N ₄ ), 28 ... Polyimide film, 30 ... Wafer, 31, 32, 33 ...
Connection wiring, 34 ... Capacitor, 36 ... Select gate, 37 ... Control gate, 38
... Floating gate, 39 ... Tunnel insulating film, 41, 42, 43 ... Impurity diffusion region, 12
1 ... SiO ₂ / Si ₃ N ₄ film, 161 ... Polysilicon film, 162 ... WSi film, 163, 1
64 ... Si ₃ N ₄ film.

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP 10-22290 (JP, A) JP 9-260364 (JP, A) JP 11-16900 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H01L 21/31 H01L 21/312 H01L 21/314 H01L 21/316 H01L 21/318 H01L 21/822 H01L 27/04

Claims (6)

(57) [Claims] 1. A step of arranging a semiconductor wafer in an active nitrogen atmosphere at a gas temperature for dissociating nitrogen molecules, a step of forming a nitride film on the surface of the semiconductor wafer by the active nitrogen atmosphere, A method of manufacturing a semiconductor device, wherein the wafer is taken out from the nitrogen atmosphere before the wafer temperature and the gas temperature are in a thermal equilibrium state. 2. The semiconductor film according to claim 1, wherein the nitride film is an oxynitride film formed by forming an oxide film on the semiconductor wafer and nitriding the oxide film. Device manufacturing method. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the nitride film is formed by nitriding a semiconductor on the surface of the semiconductor wafer. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the nitride film is used as a dielectric film of a capacitor or a gate insulating film of a transistor. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the gas temperature is 1400 ° C. or higher. 6. An outer tube whose outer side is surrounded by a heating device, an inner tube which is used as a process chamber for housing a semiconductor wafer inside, and is inserted into the outer tube, and the inner tube and the outer tube. A process gas passage formed in the space; and a gate formed in the process chamber for introducing a process gas containing nitrogen gas into the process chamber through the process gas passage, wherein the process chamber has an active nitrogen atmosphere. A semiconductor manufacturing apparatus for forming an insulating film, characterized in that a semiconductor wafer is placed and processed in a state filled with.