JP3504190B2 - Semiconductor device, line interface device and information processing device using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and particularly to an electrical signal while electrically insulating an input side and an output side by using a high withstand voltage coupling capacitor which is a high withstand voltage capacitor formed on a semiconductor wafer. For transmitting a signal (or an isolator or an isolation amplifier; hereinafter referred to as an isolator), semiconductor devices including the isolator, circuits using these semiconductor devices, particularly semiconductor devices for line interface circuits such as modem devices, and the like. The present invention relates to a communication device using.

[0002]

2. Description of the Related Art In the field of communications, in order to protect highly public network equipment, terminals and operators, high insulation is required at the boundary between the network and the terminal (hereinafter referred to as "line interface"). Since then, small transformers for communication with high insulation have been used.

In applications such as measurement and medical treatment, it is sometimes necessary to insulate a signal detecting portion from a signal processing portion such as a sensor and a signal processing circuit. In such a case, the isolator is an insulation separating means. Known as.

Isolation transformers and isolators are provided to protect operators and equipment from electric shock accidents, and are supposed to be in contact with distribution lines due to accidents, induced voltage from transmission lines, lightning surges, etc. , For example, 10 mV to 100 mV
The common mode voltage of the commercial power supply voltage reaching 100V to several thousand V is applied when transmitting the signal of 1., but the isolator can transmit the signal while blocking these commercial voltages.

Since the insulating transformer uses a winding insulated from the magnetic core, there is a limit to miniaturization and weight reduction. In recent years, isolators have been used for compact applications.

The isolator includes a transformer type using a small pulse transformer, an opto-isolator type using a light emitting element and a light receiving element, and a capacitive isolator type using a high withstand voltage capacitor. The module has the appearance of the integrated circuit device used.

Among them, the capacitive isolator has been used since the 1970s in a system suitable for downsizing, high reliability and low price because of its simple structure.

In the capacitive isolator, there are an analog system and a digital system as a transmission system for transmitting a signal through a high withstand voltage capacitor, and various systems have been proposed and put into practical use. .

[0009]

With the spread and development of personal terminals, portable terminals are required to be further downsized and reduced in price, and semiconductor devices used as parts for these are downsized and reduced in price. Although miniaturization is also required, the above-mentioned isolator has already been formed into a monolithic IC, and new technology is required for further miniaturization.

An object of the present invention is to further advance the technique proposed by the inventor and provide a technique for forming an isolator using a high breakdown voltage coupling capacitor on a semiconductor substrate having a smaller area, and a semiconductor device mounting the isolator. To do.

Another object of the present invention is to realize an applied circuit using the above isolator and a semiconductor device equipped with the above isolator, particularly a line interface circuit, and to use the isolator to provide a modem device and a communication device. It is about miniaturization and economy.

[0012]

In order to achieve the above object, a semiconductor device of the present invention has a substrate, an insulating layer formed on the substrate, and a plurality of regions formed on the insulating layer by an insulator. , The active layer having a passive element or an active element formed in each region, and the wiring formed via an insulator so as to extend over a plurality of regions formed in the active layer, and the substrate potential is a floating potential And transmitting signals between regions.

In order to achieve the above-mentioned object, the semiconductor device of the present invention has a first circuit region in which a drive circuit for outputting a first pulse signal corresponding to an input signal is formed,
A differential circuit that generates a differential waveform signal corresponding to the transition timing of the first pulse signal, and a pulse reproducing circuit that reproduces and outputs the pulse signal corresponding to the first pulse signal from the timing of the edge of the differential waveform signal. A second circuit region formed, the first circuit region and the second circuit region are coupled by a high breakdown voltage capacitance, and the first and second circuit regions and the substrate are coupled by a stray capacitance. Are formed on the same semiconductor substrate.

In order to achieve the above object, the interface device of the present invention is a first circuit in which a drive circuit for outputting a first pulse signal corresponding to a signal input from an analog input / output circuit is formed. A region, a differentiation circuit that generates a differential waveform signal corresponding to the transition timing of the first pulse signal, and a pulse reproduction that reproduces and outputs the pulse signal corresponding to the first pulse signal from the edge timing of the differential waveform signal. And a second circuit region for outputting a signal to the digital input / output circuit, the first circuit region and the second circuit region being coupled by a high withstand voltage capacitance,
It is characterized in that the first and second circuit regions and the substrate are formed on the same semiconductor substrate so as to be coupled by a stray capacitance.

In order to achieve the above object, the modem device of the present invention connects a line connection unit, a signal processing unit that processes a signal from the line connection unit, and the line connection unit and the signal processing unit. A modem device having an interface section, wherein the interface section includes a first circuit area formed with a drive circuit that outputs a first pulse signal corresponding to a signal input from the line connection section, and a first circuit area. A differentiation circuit that generates a differential waveform signal corresponding to the transition timing of the pulse signal and a pulse reproduction circuit that reproduces and outputs the pulse signal corresponding to the first pulse signal from the timing of the edge of the differential waveform signal are formed. A second circuit region for outputting a signal to the signal processing unit, the first circuit region and the second circuit region are coupled by a high withstand voltage capacitance, and the first and second circuit regions and the substrate are connected to each other. Characterized in that it is formed on the same semiconductor substrate to be bonded by 遊容 amount.

The inventors of the present invention have proposed a method for forming a capacitive isolator by a monolithic semiconductor using an SOI substrate. Structurally, a plurality of circuit regions are formed by strip-shaped insulating bands reaching the buried insulating layer in the active silicon on the SOI substrate, and further, a high withstand voltage coupling capacitance is formed to bridge the circuit regions, and the surface is further covered. The semiconductor device is covered with an insulating protective layer, mounted on a lead frame having a dielectric strength structure, and resin-molded together with the lead frame. As a semiconductor device, the semiconductor device is formed on the same wafer. Needless to say, a driver and a receiver having a high withstand voltage coupling capacitance are formed in each circuit region as needed. The signal transmission method is that the transmission waveform is a rectangular wave (pulse), the transmission waveform is transmitted as a differential waveform using a high withstand voltage coupling capacitance of about 0.1 picofarads and a load resistance of several kilo-ohms, and the differential waveform is converted into a rectangular waveform. It is a method of playing waves. It also proposes application to line interface circuits such as modems and communication devices.

As described above, only a pair of high withstand voltage coupling capacitors are used as the signal transmission path of the isolator, whereas in the present invention, a large value of stray capacitance is formed between the substrate and the circuit region, Signal transmission is realized by using the stray capacitance and the high breakdown voltage coupling capacitance described above. For this reason, when the isolator and the application circuit are mounted on one chip, this stray capacitance becomes a value much larger than the high withstand voltage coupling capacitance. By using this stray capacitance, the isolator is apparently used. Signal transmission is possible even with one high withstand voltage coupling capacitor. Depending on the application circuit, since a plurality of isolators are mounted, the high withstand voltage coupling capacitance is halved compared to the conventional method, and there is a feature that the semiconductor device can be made extremely small when formed on the same wafer.

Note that it also includes a technique for preventing a DC voltage that cannot be controlled from being applied to the buried insulating layer when the substrate has a floating potential. This is because when the chip is mounted on the lead frame, the lead frame shape is processed and high resistance is connected between the board and the input side terminals, and between the board and the output side terminals.
It is to mold together. Unnecessary DC charge can be discharged.

The present invention will be additionally described below.

According to the present invention, a capacitive driver circuit and a receiver circuit required for an isolator are formed on a wafer consisting of a substrate, a buried insulating layer and an active layer by transistors, resistors, capacitors, wirings, etc. formed on the active layer or the surface of the active layer. Forming a plurality of circuit regions by surrounding these circuits with an insulating band, and forming a high withstand voltage coupling capacitor so as to bridge these circuit regions, a high withstand voltage isolator, an isolator application circuit, In particular, it forms a line interface circuit. An interlayer insulating film is formed on the upper surface of the circuit to insulate the circuit region from the high withstand voltage coupling capacitor and the wiring connecting them, and a protective layer also serving as insulation is formed to form a semiconductor chip and a semiconductor chip. To do. Further, the chip is mounted on a lead frame having a structure in which terminals corresponding to the input and output of the isolator are insulated, and the lead frame is resin-molded.

The insulating band is a band-shaped insulating pattern having a width extending from the surface of the semiconductor layer to the insulating layer. The insulating band is formed by forming a groove having a predetermined pattern from the semiconductor surface to the insulating inner layer and filling the groove with an insulating material, or by an ion implantation method in which oxygen ions are implanted in the semiconductor layer to create an insulating region,
It is possible to form it by a method of adding a step of ensuring flatness after filling the trench with an insulator and thereafter forming a circuit, or another method. Hereinafter, a portion surrounded by an insulating band is referred to as an “electrode region”, a circuit region, etc. with “region”.

The high withstand voltage coupling capacitance is formed between the active layer, the interlayer insulating film, and the upper electrode in the electrode region formed by the insulating band closed in the circuit region, and is connected in series if necessary. . The multiple trenches formed in the thicker active layer may be connected in series to form a capacitor. Further, the embedded insulating layer has a thickness having insulating performance corresponding to the width of the insulating band.

In the isolator, the input circuit including the high withstand voltage coupling capacitor and the driver and the output circuit including the high withstand voltage coupling capacitor and the receiver are multiplexed by the number of insulation bands capable of ensuring the necessary withstand voltage. To place.

When the application circuit is formed on the same wafer, the application circuit is divided into the input side and the output side of the isolator and placed in this multiplexed insulating band so as to insulate the other circuit portion. To do. The high breakdown voltage coupling capacitor is arranged at the boundary between the input circuit area including the driver and the output circuit area including the receiver.

Conventionally, as a signal transmission path of an isolator, only a pair of high withstand voltage coupling capacitors have been focused on.
In the present invention, a stray capacitance is formed between the substrate and the circuit region, and this stray capacitance is used in combination with the above-mentioned high breakdown voltage coupling capacitance. For this reason, the impedance of the signal return path between the circuit regions is reduced, which has the effect of contributing to the stabilization of signal transmission. In addition, when the area of the circuit (application circuit) other than the isolator is sufficiently larger than the area of the isolator circuit on the active layer, the above stray capacitance enters the return path. The transmission signal can be detected in the high withstand voltage coupling capacitor, which has a high impedance even if it is single. For this reason, the high withstand voltage coupling capacitance is halved as compared with the conventional method, and the semiconductor device can be extremely miniaturized because it is formed on the same wafer.

In the output pulse reproduction with one high withstand voltage coupling capacitance, since there is one differentiating circuit and one differentiating waveform, the positive wave transition and the negative wave transition are distinguished. Then, by setting and resetting the flip-flop by these two signals, the rising and falling edges of the input pulse signal can be correctly reproduced.

Not only differential transmission but also PAM (Pu
Waveform transmission such as lse Amplitude Modulation) can also be used.

Further, by providing a protection circuit to the input and output terminals of the high withstand voltage coupling capacitor, like the external connection terminal,
It is possible to prevent device destruction due to surge noise.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below with reference to Examples.

An isolator according to an embodiment of the present invention will be described with reference to FIGS. 1 to 5.

FIG. 1 is a structural view of an isolator chip according to one embodiment of the present invention, in which the upper side is a plan view of the chip seen from the upper side and the lower side is a sectional view of the chip. In FIG. 1, reference numeral 1 is a chip, 2 is a silicon substrate having a thickness of 0.2 mm to 0.5 mm, 3 is a buried insulating layer having a thickness of 1.0 micrometer or more, and 4 is 0.1 micrometer or more. Two
A silicon active layer having a thickness of 0 μm, 5 is a wiring layer, and 6 is a protective layer. The active layer is an active element such as a transistor formed on the active layer, a passive element such as a resistor or a capacitor, or an isolator by wiring. The necessary capacitance driver circuit and receiver circuit are formed. Reference numeral 7 denotes an insulating band, which is, for example, a band-shaped insulating pattern having a width reaching the insulating layer from the surface of the semiconductor layer which is the active layer 4 (the thickness is equal to the thickness of the semiconductor layer). The insulating band 7 is formed by forming a trench having a predetermined pattern from the semiconductor surface to the insulating layer 3 and filling the trench with an insulator, or by ion implantation for implanting oxygen ions into the semiconductor layer to form an insulating region. It depends on the method. The insulating band 7 surrounds the active layer 4 and divides it into a plurality of regions 8. The regions 8-1 to 8-5 are provided with input circuit regions 8-1, electrode regions 8-2, 8
3, the output circuit area 8-4, the terminal area 8-5 of the chip, etc. are referred to as "areas". Numerals 9-1 to 9-5 schematically show wiring, 10 is a hole of an input side pad, 11 is a hole of an output side pad, and 12-1 and 12-2 are typically transistors. It is a thing. The wiring 9-1 is a wiring connecting the input pad and the input gate of the transistor 12-1 of the input circuit, 9-2 is a wiring connecting the output of the input side transistor 12-1 and the electrode region 8-2, and 9-4 is an electrode region. 8-3 and a wiring connecting the input gate of the output transistor 12-2, 9
A wiring -5 connects the output of the output transistor 12-2 and the hole 11 of the output pad. As a result of insulation between the wiring 9-3 and the electrode regions 8-2 and 8-3 by a wiring interlayer film, two high breakdown voltage capacitors connected by the wiring 9-3 are formed and used as high breakdown voltage coupling capacitors. . That is, the high breakdown voltage coupling capacitance is formed so as to bridge the input circuit region and the output circuit region. In this way, an interlayer insulating film is formed on the upper surface of the active layer so as to insulate the circuit region, the high withstand voltage coupling capacitance, and the wiring connecting them, and a protective layer also serving as insulation is formed. To make a semiconductor chip.

In the present invention, as the signal transmission path of the isolator, a stray capacitance is formed between the substrate and the circuit region, and this stray capacitance is used in combination with the above-mentioned high withstand voltage coupling capacitance. The substrate of the wafer is generally used by being grounded, but by setting the substrate to a floating potential, a double embedded insulating layer is inserted between the input circuit including the driver and the output circuit including the receiver, A higher breakdown voltage can be obtained. In addition, stray capacitance enters between the circuit area and the substrate, which reduces the impedance of the signal return path between the circuit areas, which has the effect of stabilizing signal transmission. In addition, when the area of the circuit (application circuit) other than the isolator is sufficiently larger than the area of the isolator circuit on the active layer, the above stray capacitance enters the return path. The transmission signal can be detected in the high withstand voltage coupling capacitor, which has a high impedance even if it is single. For this reason, the high withstand voltage coupling capacitance is halved as compared with the conventional method, and the semiconductor device can be extremely miniaturized because it is formed on the same wafer.

The circuit of the first embodiment will be described with reference to the circuit diagram of FIG. In FIG. 2, 21 is an input terminal, 22 is an output side terminal, 23 is a driver circuit arranged on the input side, 24-
1, 24-2 is a high withstand voltage coupling capacitance of about 0.1 picofarad, 25 is a receiver circuit arranged on the output side, and 26-1 and 26-2 are load resistances of about 3 k ohms.
28-1, 28-2 has a capacity of about 2 picofarads, 27-
1, 27-2 is a resistance of about 100 kilohms, 29-1,
29-2 is a comparator, 30 is a flip-flop, 3
1-1 and 31-2 are equivalent representations of the stray capacitance between the circuit region and the substrate. The symbol attached to the wiring connecting each element is the name of the signal passing through the wiring. The protection circuit is omitted.

Referring to FIG. 2 using the timing chart of FIG.
The operation of the circuit will be described. FIG. 3 shows the waveforms of the operation signals of the respective parts of the circuit diagram of FIG. 2, where IN is the input I of the terminal 21.
With the input signal added to N, the driver 23 outputs the complementary waveforms P 1 and P 2 corresponding to the input signal to output the high withstand voltage coupling capacitance 2
4-1 and 44-2 are driven. High breakdown voltage coupling capacitance 24-
1, 24-2 and the load resistors 26-1 and 26-2 form a differentiating circuit, and the midpoint between them is the capacitances 28-1 and 28.
-2, connected to the midpoint between the resistors 27-1 and 27-2 to give a bias potential. By doing so, complementary differential waveforms such as the signals D and D are obtained across the resistor 26. The two comparators 29-1 and 29-2 are provided with dead zones in the sensitivity so that the comparator does not invert when the difference between the + input and the − input is 100 millivolts or less. The signal on the opposite side is connected to the + input of the. By connecting in this way, the differential signal can be emphasized for comparison while canceling the common mode noise. As a result, comparator 2
As shown in FIG. 3, the output of 9 has a leading edge corresponding to the transition timing of the input pulse as shown by S in the transition from 0 to 1 of the input pulse and R in the transition from 1 to 0 of the input signal. Since two pulses are obtained, the pulse signal corresponding to the transition of the input signal can be regenerated by setting and resetting the RS flip-flop 30 by these. As described above, the input signal can be transmitted to the output side while being insulated by the high withstand voltage coupling capacitance. It should be noted that although manufacturing variations in capacitance and resistance values occur when actually manufactured, high withstand voltage coupling is achieved by coupling the input side circuit and the output side circuit with a relatively large capacitance due to stray capacitances 31-1 and 31-2 between the substrates. Not only the return path of the signal that drives the capacity, but also the common mode signal serves as a bypass path for the high withstand voltage capacity, which contributes to stabilization of signal transmission. If a surge voltage is applied to the input of the capacitive isolator,
A protection circuit is installed outside the circuit shown in FIG. 2. The normal surge is short-circuited on the input side, and the common mode surge is bypassed to the frame ground connected to the output ground by capacitance.

Next, referring to the plan view and sectional view of FIG.
The mounting of the isolator chip of FIG. 1 on the lead frame will be described. In FIG. 4, the upper side is a plan view showing the lead frame mounting, the lower side is a sectional view, 31 is one lead frame, 32 is the other lead frame, 33-
1, 33-2 are tab leads, 34-1 to 34-4 are bypass resistors, 35 is a tab for mounting a chip, and 36 is a molding resin. As shown in FIG. 4, one lead 31 and the other lead 32 are arranged to face each other with a sufficient distance. Further, the distance between the tab 35 and the tab 35 is set so that the dielectric strength can be ensured after the molding. Further, in this state, 100 between the tab 35 and the power lead and ground lead of the input circuit, and between the tab 35 and the power lead and ground lead of the output side.
A high resistance of over megohm is connected. Tab lead 3
Reference numerals 3-1 and 33-2 are supports at the time of mounting and molding the chip, and a sufficient insulation distance is provided from the leads on both sides. By performing the molding after the connection as described above, the withstand voltage between the one terminal 31 and the other terminal 32 can be secured. Further, by arranging the bypass resistance in this way, there is an effect that even if a charge is applied to the substrate having a floating potential for some reason, it can be released. In addition, by disposing the bypass resistor outside the chip, it is possible to easily achieve high resistance and high withstand voltage insulation. The bypass resistor can be omitted if the chip has a sufficiently high breakdown voltage or if it can be protected by an external protection circuit.

Next, the appearance of the isolator of FIG. 4 after being molded is shown in the external view of FIG. By resin-molding the lead frame together, the insulation between the input terminal and the output terminal can be secured by the molding resin, and the insulation distance such as the creepage distance and the space distance can be secured by the shape and the dimension.

The above is one embodiment, and the high withstand voltage coupling capacitors can be used by connecting them in series as needed. Further, the high breakdown voltage coupling capacitance may be formed by connecting multiple trenches formed in a thicker active layer in series to form a capacitor. Note that the embedded insulating layer has a thickness having insulating performance corresponding to the width of the insulating band. Further, the isolator is configured such that an input circuit including the high withstand voltage coupling capacitor and the driver and an output circuit including the high withstand voltage coupling capacitor and the receiver are multiplexed by the number of insulation bands capable of ensuring a necessary withstand voltage. Deploy. Depending on the purpose, a common multiple insulation band can be used when mounting a plurality of isolators. When the application circuit is formed on the same wafer, the application circuit is divided into the input side and the output side of the isolator and placed in this multiplexed insulating band to insulate the other circuit portion. The high breakdown voltage coupling capacitor is arranged at the boundary between the input circuit area including the driver and the output circuit area including the receiver.

FIG. 6 is a circuit diagram of another embodiment of the isolator, and this figure shows the correspondence when the differential output is small. In FIG. 6, 21 is an input terminal, 22 is an output side terminal, 23 is a driver arranged on the input side, 24-
1, 24-2 is a high withstand voltage coupling capacitance of about 0.1 picofarad, 25 is a receiver circuit arranged on the output side, and 26-1 and 26-2 are load resistances of about 3 k ohms.
28-1, 28-2 has a capacity of about 2 picofarads, 27-
1, 27-2 is a resistance of about 100 kilohms, 29-1,
29-2 is a comparator, 30 is a flip-flop, 3
Reference numerals 1-1 and 31-2 equivalently show stray capacitances between the circuit region and the substrate, and 32-1 and 32-2 are differential amplifiers. The symbol attached to the wiring connecting the elements is the name of the signal passing through the wiring. The protection circuit is omitted.

Using the timing chart of FIG. 7, FIG.
The operation of the circuit will be described. FIG. 7 shows the waveforms of the operation signals of the respective parts of the circuit diagram of FIG. 6, where IN is the input I of the terminal 21.
With the input signal added to N, the driver 23 outputs the complementary waveforms P 1 and P 2 corresponding to the input signal to output the high withstand voltage coupling capacitance 2
4-1 and 44-2 are driven. High breakdown voltage coupling capacitance 24-
1, 24-2 and the load resistors 26-1 and 26-2 form a differentiating circuit, and the midpoint between them is the capacitances 28-1 and 28.
-2, connected to the midpoint between the resistors 27-1 and 27-2 to give a bias potential. By doing so, complementary differential waveforms such as the signals D and D are obtained across the resistor 26. However, since this differential output is small, the differential amplifier 32-
1, 32-2 are connected so as to input complementary signals as shown in the figure, and are amplified while canceling common mode noise.
E and E output. This output is input to the two comparators 29-1 and 29-2 as in the case of FIG. Similarly, the characteristics of the comparator are such that a dead zone is provided in the sensitivity. As shown in FIG. 6, complementary signals are connected to the respective + inputs and signals on the opposite side are connected to the − inputs. By connecting in this way, the differential signal is emphasized and the comparison is performed while canceling the common mode noise. As a result, the comparators 29-1,
As shown in FIG. 8, the output of 29-2 is S at the transition of the input pulse from 0 to 1 and R at the transition of the input signal from 1 to 0. The leading edge is at the transition timing of the input pulse. Since two corresponding pulses are obtained, the pulse corresponding to the transition of the input signal can be reproduced by setting and resetting the RS flip-flop 30 by these, as in the case of FIG.

As described above, even when the output signal of the high withstand voltage coupling capacitance is small, the input signal can be transmitted to the output side while being insulated by amplifying the common mode signal and inputting it to the comparator. In this case as well, the stray capacitances 31-1 and 31-2 between the substrates couple the input side circuit and the output side circuit with a relatively large capacitance, so that not only the return path of the signal that drives the high withstand voltage coupling capacitance but also the common circuit. The mode signal also bypasses the high voltage capacity and contributes to the stabilization of signal transmission. The concept of the protection circuit is the same as that of the first embodiment.

FIG. 8 is a circuit diagram of still another embodiment of the isolator. In FIG. 8, 21 is an input terminal and 22 is an input terminal.
Is an output terminal, 23 is a driver arranged on the input side, 24
Is a high withstand voltage coupling capacitor of about 0.1 picofarad, 25 is a receiver circuit arranged on the output side, and 26-1,
26-2 is a load resistance of about 3 kilo ohms, 28-1, 28
-2 is a capacity of about 2 picofarads, 27-1 and 27-2 are resistances of about 10 to 100 kilohms, 29-1 and 29-2.
Is a comparator, 30 is a flip-flop, 31-1,
Reference numeral 31-2 shows equivalently a stray capacitance between the circuit region and the substrate, which has a capacitance 100 to 1000 times the coupling capacitance. The symbol attached to the wiring connecting the elements is the name of the signal passing through the wiring. The protection circuit is omitted.

Referring to FIG. 8 using the timing chart of FIG.
The operation of the circuit will be described. FIG. 9 shows the waveform of the operation signal of each part of the circuit diagram of FIG. 8, where IN is the input I of the terminal 21.
With the input signal added to N, the driver 23 outputs the waveform P corresponding to the input signal to drive the high breakdown voltage coupling capacitor 24. The return path of the drive current in this case is stray capacitance 31-1, 3
It is 1-2. High breakdown voltage coupling capacitance 24 and load resistance 26-
1, 26-2 form a differentiating circuit, and the middle points of these are capacitors 28-1, 28-2 and resistors 27-1, 27-.
2, 27-3 connected to the comparator threshold Vth
^{+ And} Vth ^- are given. By doing this, the resistance 2
Differential waveforms such as the signal D are obtained at 6-1 and 26-2. This output is input to the + inputs of the two comparators 29-1 and the − inputs of 29-2, as in the case of FIG.
Vth ⁺ is connected to the − input of the comparator 29-1, and Vth ⁻ is connected to the + input of the comparator 29-2. By connecting in this way, the output of the comparator 29 has a leading edge as shown by S at the transition of the input pulse from 0 to 1 and by R at the transition of the input signal from 1 to 0 as shown in FIG. Since two pulses corresponding to the transition timing of the input pulse can be obtained, R can be obtained by these as in the case of FIG.
By setting and resetting the S flip-flop 30, it is possible to reproduce the pulse corresponding to the transition of the input signal. Even if the differential waveform is made to be one in this way, the transition in the plus direction and the transition in the minus direction of the differential wave can be discriminated and taken out. Therefore, by using these two signals, Similar to the example of
The pulse signal corresponding to the rising and falling of the input pulse signal can be correctly reproduced. As described above, the input signal can be transmitted to the output side while being insulated, but in this case, the stray capacitance 31-1, between the substrates,
Since the input side circuit and the output side circuit are coupled with a large capacitance by 31-2, the return path of the signal to be driven becomes unnecessary, and the single high withstand voltage coupling capacitance per isolator can be obtained. Further, common mode noise also bypasses the high withstand voltage capacitance, which contributes to stabilization of signal transmission.
The concept of the protection circuit is the same as that of the first embodiment.

Next, an embodiment of the application circuit will be described with reference to FIGS.

FIG. 10 is a circuit block diagram of a line interface IC of an embodiment for a modulation / demodulation device (hereinafter referred to as a modem) using an analog telephone line. In FIG.
51 is a terminal on the telephone line side, 52 is a terminal on the signal processing side, 5
3 to 56 are isolators, 57 is a control circuit on the signal processing side, 58 is a control circuit on the line side, 59 is a low-pass filter for digital signal processing, 60 is a delta sigma demodulation circuit, 61 is a post filter, and 62 is a pre-filter. Reference numeral 63 is a delta-sigma modulation circuit, and 64 is a low-pass filter for digital signal processing. When configuring a modem device, from the viewpoint of facility safety, a high breakdown voltage insulation is required at the demarcation point between the network: telephone line and terminal, and this function is achieved by an isolator. The circuit excluding the isolator has a well-known configuration as an analog front-end circuit, and a low-pass filter 5 for digital signal processing for converting a digital signal of a path for transmitting a modulation signal into an analog signal and outputting the analog signal.
9. DAC (Digital to Analog Conv) that converts the digital signal digitally modulated by the external signal processing circuit by the delta sigma demodulation circuit 60 and the post filter 61 into an analog signal.
ersion) function, an ADC (Analog to Digital Conversion) function consisting of receiving paths 62, 63 and 64, and a control circuit 57 for controlling the timing and functional operation thereof.
And 58. In this embodiment, an isolator is placed in the digital signal portion for isolation. The circuit configuration of the entire modem will be described later.

Next, the schematic structure of this chip will be described with reference to FIG. In FIG. 11, the upper side is a plan view of this chip and the lower side is a sectional view. In FIG. 11, 50 is a chip, 2 is a substrate, 3 is a buried insulating layer, 4 is an active layer, 5 is a wiring layer, 6 is a protective layer, and the active layer 4 or a transistor formed on the active layer 4, A capacitor driver circuit and a receiver circuit required for the isolator are formed by resistors, capacitors, wirings, and the like. 7-1 to 7-5 are the insulating bands already described. The formation of the insulating band is the same as in FIG. The area 8 is an input circuit area 8-1, depending on the functional elements contained therein.
The electrode regions 8-2 and 8-3, the output circuit region 8-4, and the termination region 8-5 of the chip are referred to. In the case of this embodiment, the application circuit areas 8-6 and 8-7 are added, and the chip size is as shown in FIG.
It is 10 times more than in the case of. Reference numeral 9 is a wiring diagram schematically, 10 is a pad hole on the input side, 11 is a pad hole on the output side, and 12 is a transistor. Wirings 9-2 to 9-4 have the same names and functions as those in FIG. 1, 9-6 is a wiring connecting between the line side input / output pad and the application circuit area 8-6, and 9-7 is inside the application circuit. Wiring to connect, 9-8 is wiring to connect the application circuit on the signal processing side, 9-
Reference numeral 9 is a wiring connecting the application circuit and the input / output pad 10 on the signal processing side. The formation of the high withstand voltage coupling capacitance is similar to that of FIG. 1, but in this embodiment, since the stray capacitance is large,
There is only one high withstand voltage coupling capacitor per isolator.
Further, an interlayer insulating film is formed on the upper surface of the active layer to insulate the circuit region from the high withstand voltage coupling capacitance and the wiring connecting them, and a protective layer also serving as insulation is formed to form a semiconductor. The same can be said for a chip.

Conventionally, a pair of high withstand voltage coupling capacitors were used as the signal transmission path of the isolator, but in the present embodiment, a stray capacitance is formed between the substrate and the circuit region, and this stray capacitance is used. In order to use together with the above-mentioned high withstand voltage coupling capacitance, the signal return path between the circuit areas,
Since the floating capacitance is used as described above, the transmission signal can be detected at the high withstand voltage coupling capacitance having a high impedance even if the single high withstand voltage coupling capacitance is used. For this reason, the high withstand voltage coupling capacitance is halved as compared with the conventional method, and the semiconductor device can be extremely miniaturized because it is formed on the same wafer. In this embodiment, the application circuit is realized by arranging the application circuit in the input / output circuit area of the isolator or in the area surrounded by the insulating band separately from the isolator. The plurality of isolators may be arranged in a line along the multiple insulating bands that are the boundaries of the high breakdown voltage coupling capacitance. When operating a plurality of isolators, the carrier clocks are synchronized as necessary. Further, when the circuit area includes a CMOS circuit, the PM for further connecting the CMOS circuit area to the power supply line
The OS group and the NMOS group connected to the ground line may be divided and separated by an insulating band. The power wiring is laid out between multiple isolators. A power supply line and a ground line may surround each isolator. For example, C
The MOS circuit has an advantage that voltage control that does not require a control current and high off-resistance can be obtained, but a penetration phenomenon between PMOS and NMOS including a parasitic transistor, that is, latch-up tends to occur. There is an advantage that it can be made difficult to occur by separating.

By forming a capacitance between the active layer and the upper wiring layer via the interlayer film in each region, and connecting them in series, a higher withstand voltage coupling capacitance can be realized, and Due to the above restriction, even when one insulation band cannot be widened or the multiplicity cannot be increased, a higher withstand voltage can be realized. Further, the floating voltage of the intermediate electrode at the time of arranging the series capacitance can reduce the withstand voltage of the straddling wiring in the strong electric field portion. In the case of application using a plurality of isolators, the insulation performance can be made uniform by arranging the arrangement of the high withstand voltage coupling capacitors such as electrodes and insulating bands.

By providing a protection circuit at each terminal of the high withstand voltage coupling capacitor similarly to the external connection terminal, device breakdown due to surge noise can be prevented.

In recent years, the Internet has become widespread, and the Internet can be easily performed by connecting a personal computer to a line. In addition, information processing terminals in which the functions of personal computers are simplified have also become widespread.

FIG. 12 shows the configuration when the modem device using the line interface IC shown in FIG. 10 is applied to an information processing device such as a personal computer. In FIG. 12, 100 is an information processing device such as a personal computer, 50 is the line interface IC shown in FIG. 10, 71 is a modular connector for connection with a telephone line, 72 is a normal mode surge protection element,
73 is a common mode surge protection element, 74 is a power-on switch for turning on / off the power supply to the line side circuit, and 75
Is a diode bridge for supplying a DC voltage of the correct polarity to the line side circuit regardless of the power supply polarity at the modular connector 71, 76 is a DC blocking capacity, and 77 is an IC50.
Resistor network for 2-wire to 4-wire conversion together with the input / output amplifier of the device, 78 is a power receiving and DC closed circuit, and 79 is RISC.
(Reduced Instruction Set CPU) or DSP (Digit
A signal processing circuit including a processor such as an al signal processor), a memory, and other circuits, and 80 is a frame ground. The portion formed by the discrete circuit elements 71 to 78 is a DAA (Digital Access).
In the part called "Arrangement", the function notifies the exchange of the logical connection of the modem, the telephone number of the other party of the communication, the continuation and termination of the connection through the telephone line when transmitting by the instruction from the processor, and when receiving it. Detects the call from the station, connects the line, maintains the connection,
In addition to the function of notifying the end, it has the function of isolating each other as a demarcation point between the network: telephone line and the terminal: modem device. In this embodiment, this mutual insulation is achieved by the isolator built into the AFE 50. AFE
By 50, the expensive and large-sized insulating transformer that was in the DAA in the past was deleted, and the number of photocouplers was reduced.
Contributes to downsizing of equipment and economic efficiency. Although the isolator is built in the AFE, it may be integrated by being combined with other parts, for example, a signal processing circuit, if necessary.

The application of the isolator to the modem device and the application to the information processing device have been described above. According to the present embodiment, as described above, the isolator has four ICs.
Despite the individual use, there is an effect that the mounting area of the modem circuit including DAA can be reduced. Of course, the number of isolators to be used may be reduced by operating the isolators at a high speed that is a multiple of the parallel number, or by performing transmission / reception time division operations. In any case, the effect of significantly reducing the size is the same as in the case of using an insulating transformer or an isolator using an external high breakdown voltage capacitor. Therefore, it can be applied to a notebook type personal computer and a simpler information processing apparatus such as an Internet terminal.
Since this integrated circuit is suitable for mass production, it is also characterized by economic efficiency. In particular, recent high-speed modems require high performance for transformers, and therefore expensive materials such as permalloy are used for the core material. Parts costs. In this sense, the application of the present embodiment has an effect of directly contributing to not only the economicalization due to the miniaturization but also the economicization directly in the high-speed modem field.
As described above, according to this embodiment, an extremely small on-chip high withstand voltage coupling capacitor and an extremely small monolithic isolator can be realized, and by using this, a small AFE can be realized. The use of is effective in realizing a compact and economical modem device.

In terms of standardizing the boundary between the modem section and the PC section, a parallel bus such as PCI standard, IEEE1394,
There is a serial bus such as USB, and it is effective to expand the application of the present invention to adopt a configuration compatible with these, and it is effective in miniaturization and economy. As described above, by using a wafer having a buried insulating layer, a high withstand voltage in the thickness direction is realized, and by forming multiple electrode regions on the same wafer by multiple insulating bands, extremely small high withstand voltage coupling is achieved. It is possible to realize an extremely small isolator by realizing a capacitance and forming a plurality of circuit regions of an input circuit including the high withstand voltage coupling capacitance and the driver and an output circuit including a receiver on the same wafer. Further, as a signal transmission path of the isolator, a pair of high withstand voltage coupling capacitors have conventionally been used, but in the present invention, a large value of stray capacitance is formed between the substrate and the circuit region, and this stray capacitance is formed. Since the above-mentioned high withstand voltage coupling capacitance is used in combination, the impedance of the signal return path between the circuit regions becomes small, which has the effect of contributing to the stabilization of signal transmission. Further, when the scale of the application circuit is larger than that of the isolator circuit, the high withstand voltage coupling capacitance is halved as compared with the conventional method, and there is a feature that the semiconductor device can be made extremely small because it is formed on the same wafer. .

Further, according to the present invention, there is an effect that a compact and high performance isolator and line interface means and a compact and economical modem device can be realized.

[0054]

According to the present invention , the signal transmission is small and the signal transmission is stable.
It is possible to realize an isolated isolator. Also the signal
A compact and economical modem device with stable transmission can be realized.

[Brief description of drawings]

FIG. 1 is a diagram showing a structure of a semiconductor chip according to a first embodiment.

FIG. 2 is a diagram showing a circuit configuration of the first embodiment.

FIG. 3 is a diagram showing operating waveforms of the circuit of the first embodiment.

FIG. 4 is a diagram showing a mounting structure of the first embodiment.

FIG. 5 is a diagram showing the external appearance of the semiconductor device of Example 1;

FIG. 6 is a diagram showing a circuit configuration of another embodiment.

FIG. 7 is a diagram showing operation waveforms of a circuit of another embodiment.

FIG. 8 is a diagram showing a circuit configuration of still another embodiment.

FIG. 9 is a diagram showing operation waveforms of a circuit of still another embodiment.

FIG. 10 is a diagram showing functional blocks of an interface circuit.

FIG. 11 is a diagram showing a structure of an interface circuit.

FIG. 12 is a diagram showing application to an information processing device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Isolator chip, 2 ... Substrate, 3 ... Embedded insulating layer, 4 ... Active layer, 5 ... Wiring layer, 6 ... Protective layer, 7 ... Insulating band, 8 ... Circuit area, 8-1 ... One circuit area, 8 -2 ...
One electrode region, 8-3 ... The other electrode region, 8-4 ... The other circuit region, 8-5 ... Termination region, 9 ... Wiring, 10 ... Input side pad hole, 11 ... Output side pad Hole, 12 ...
Transistor, 50 ... Line interface circuit, 53
~ 56 ... Isolator.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI H03K 19/003 H01L 27/04 U // H04L 25/02 (72) Inventor Takayuki Iwasaki 7-1, Omika-cho, Hitachi-shi, Ibaraki No. 1 Hitachi Ltd. in Hitachi Research Laboratory (72) Inventor Nobuyasu Kanagawa 7-1 1-1 Omika-cho, Hitachi-shi, Ibaraki Hitachi Ltd. In Hitachi Research Laboratory (72) Inventor Yusuke Takeuchi 6-16 Shinmachi, Ome-shi, Tokyo 3 share companies in the address Hitachi Device Development Center (56) Reference JP-A-11-136293 (JP, A) JP-A-4-283958 (JP, A) JP-A-7-235638 (JP, A ) International publication 98/44687 (WO, A1) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/822 H01L 27/04 H01L 27/12 H03K 5/08 H04L 25/02 H01L 21 / 76

Claims (11)

(57) [Claims] 1. A substrate, an insulating layer formed on the substrate, and a plurality of regions made of an insulating material on the insulating layer,
An active layer in which a passive element or an active element is formed for each region, and a wiring formed via an insulator so as to extend over the plurality of regions formed in the active layer, the wiring and the A first capacitor formed between the active layer and the substrate, and the substrate and the passive element or the active element are formed.
A semiconductor device that transmits a signal between the regions via a plurality of insulating layers by using a second capacitor formed between the regions. 2. The substrate according to claim 1, wherein the substrate and the region are formed with respect to the first capacitor formed between the region and a wiring formed on the region via an insulator. A semiconductor device in which the value of the second capacitance is increased and the number of the first capacitance per signal transmission path is one. 3. The semiconductor device according to claim 1, wherein a plurality of capacitors are formed between the region and a wiring formed on the region via an insulator. 4. The amplifier according to claim 1, wherein the at least one region formed in the active layer is an amplifier that amplifies a signal sent from the wiring through the insulator, and a signal amplified by the amplifier. A semiconductor device having a detection circuit for detecting the. 5. The active layer according to claim 1, wherein the active layer has an area of an input circuit including a driver and an area of an output circuit including a receiver, and the area of the input circuit and the area of the output circuit are the same. A semiconductor device having a protection circuit formed of a non-linear element on a signal transmission path from a driver to a receiver, in which a signal is propagated through a wiring. 6. The method of claim 1, a first circuit region driving circuit for outputting a first pulse signal corresponding to the input signal is formed, corresponding to the transition timing of the first pulse signal differential A second circuit area formed with a differentiating circuit for generating a waveform signal and a pulse reproducing circuit for reproducing and outputting a pulse signal corresponding to the first pulse signal from the timing of the edge of the differentiated waveform signal. The first circuit region and the second circuit region are coupled by a high withstand voltage capacitance, and the first and second circuit regions and the substrate are coupled by a capacitance formed on the substrate. Device formed on the semiconductor substrate of. 7. The semiconductor device according to claim 6, wherein the differentiating circuit is composed of a resistance element connected between the high withstand voltage coupling capacitor and a power source and a ground arranged in the second circuit region. 8. The semiconductor device according to claim 6, wherein the drive circuit and the pulse reproduction circuit are composed of CMOS. 9. The semiconductor device according to claim 6, wherein the substrate is connected to a power supply or a ground via a high breakdown voltage resistor or a high breakdown voltage coupling capacitor. 10. A first circuit area in which a drive circuit that outputs a first pulse signal corresponding to a signal input from an analog input / output circuit is formed, and a transition timing of the first pulse signal is provided. A differential circuit that generates a differential waveform signal and a pulse reproduction circuit that reproduces and outputs a pulse signal corresponding to the first pulse signal from the timing of the edge of the differential waveform signal are formed. And a second circuit region for outputting the first circuit region, the first circuit region and the second circuit region are coupled by a high breakdown voltage capacitance, and the first and second circuit regions and the substrate are on the substrate. 2. The semiconductor device according to claim 1, which is formed on the same semiconductor substrate so as to be coupled by the capacitance formed in
The line interface device that was on . 11. A line connection unit, a signal processing unit that processes a signal from the line connection unit, and the line connection unit and the signal processing unit are connected to each other,
An information processing apparatus having an interface section using the semiconductor device according to claim 1, wherein the interface section is provided with a drive circuit that outputs a first pulse signal corresponding to a signal input from the line connection section. No. 1 circuit area, a differentiating circuit for generating a differential waveform signal corresponding to the transition timing of the first pulse signal, and a pulse signal corresponding to the first pulse signal from the edge timing of the differential waveform signal. And a second circuit region for outputting a signal to the signal processing unit, wherein the first circuit region and the second circuit region are formed by a high withstand voltage capacity. Combined, said first and second
An information processing device formed on the same semiconductor substrate so that the circuit region and the substrate are coupled by a capacitance formed on the substrate.