JP3497023B2 - Filter circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a filter circuit for selecting a signal having a desired frequency component from input signals having various frequency components and outputting the selected signal. More specifically, the present invention relates to a MOS integrated circuit of the filter circuit. 2. Description of the Related Art Conventionally, as a method of simply configuring a filter circuit having a high selectivity Q, M.I. E. FIG. VAN VANK
ENBURG, "Analog Filter Des
ign ", Holt, Rinehart and Wi
nston, NEW YORK, 1982, P217
For example, a Q enhancement circuit (Q multiplication circuit) is known. The Q-multiplier circuit improves the Q by applying a feedback of multiplying the output of a so-called second-order transfer function filter circuit by a coefficient k and adding the input to the input. [0003] The Q using the individual parts
When a multiplier circuit is configured, the coefficient k is often realized by a so-called adder circuit using an operational amplifier and a resistor. However, a circuit using a resistor and an operational amplifier is referred to as M
If an OS integrated circuit is used, the DC offset voltage of the operational amplifier is amplified because the circuit has a DC gain, and the DC operating point is shifted.
It is also well known that a steeper filter characteristic is obtained by combining a bandpass filter whose gain increases at a specific frequency and a band reject filter whose gain decreases near a specific frequency. . In order to obtain a steeper filter characteristic, it is preferable to further improve the Q of the combined bandpass filter and band reject filter by using a Q multiplier circuit. [0004] However, there has been a problem or problem that adding a Q multiplying circuit to each of a band-pass filter and a band-reject filter which are combined and paired increases the circuit scale. [0005] In order to solve the above-mentioned problems of the prior art, according to the present invention, a pair of a band-pass filter and a band-reject filter is provided by an adder circuit suitable for MOS integrated circuit. It is an object of the present invention to provide a circuit that improves each Q at a time. In order to achieve the above object, in the present invention, the adder circuit is configured as a capacitively coupled adder circuit, and the DC gain is set to 0 so as not to amplify the DC offset voltage of the operational amplifier. Further, the circuit configuration is such that a first addition circuit is provided in the first stage, a band reject filter is provided in the second stage, a second addition circuit is provided in the third stage, and a band-pass filter is provided in the fourth stage.
The output of the band-pass filter is fed back by multiplying the input of the first-stage first adder circuit and the input of the third-stage adder circuit by respective different coefficients, and the output of the second-stage adder circuit is obtained as follows. The input of the first adder circuit is multiplied by a coefficient and is fed back. According to the present invention, a capacitively coupled addition circuit comprises:
Since no DC is passed, the DC offset voltage of the operational amplifier is not amplified. From the output of the bandpass filter, two feedback loops to the input of the first stage first adder, the input of the third stage second adder, and the output of the third stage second adder, Another feedback loop to the input of the first adder circuit of the first stage, that is, the feedback coefficients of a total of three feedback loops can be adjusted by setting the capacitance ratio of the capacitively coupled adder circuit. By adjusting the feedback coefficient, the Q of the band reject filter and the Q of the bandpass filter can be respectively improved. Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a circuit diagram showing one embodiment of a filter circuit according to the present invention. FIG. 2 shows an AC small signal equivalent circuit of the circuit of FIG. The capacitor 7 is connected between the signal input terminal 24 and the inverting input terminal of the operational amplifier 21. The non-inverting input terminal of the operational amplifier 21 is connected to the ground potential. The capacitor 6 and the resistor 13 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier 21. Resistance 1
Numeral 3 is for setting a DC operating point, and when there is no AC signal input, the voltage at the output terminal of the operational amplifier 21 is equal to the voltage at the inverting input terminal, and is also equal to the voltage at the non-inverting input terminal. The output terminal of the operational amplifier 21 and the operational amplifier 22
Between the non-inverting input terminal of
A so-called twin T band reject filter composed of capacitors 8, 9, and 10 is connected. Between the non-inverting input terminal of the operational amplifier 22 and the ground potential,
The capacity 3 is connected. The capacitor 4 and the resistor 14 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier 22.
The resistor 14 is used to set a DC operating point similarly to the resistor 13 described above. When there is no AC signal input, the voltage at the output terminal of the operational amplifier 22 becomes equal to the voltage at the inverting input terminal, and the voltage at the non-inverting input terminal. Is equal to The capacitor 5 is connected between the output terminal of the operational amplifier 22 and the non-inverting input terminal of the operational amplifier 21. Resistors 15, 19, 2 are connected between the output terminal of the operational amplifier 22 and the signal output terminal 25.
A so-called multi-feedback type band pass filter composed of 0, capacitors 11, 12 and an operational amplifier 23 is connected.
The capacitor 1 is connected between the signal input terminal 25 and the inverting input terminal of the operational amplifier 22. Signal input terminal 25
And an inverting input terminal of the operational amplifier 21.
Is connected. The transfer function of the band reject filter is G
(S), assuming that the transfer function of the bandpass filter is F (s), the small signal equivalent circuit of FIG. 1 is as shown in FIG. G
(S) shows that the Q of the band reject filter is Qt and the resonance angular frequency is ωt. F (s) represents the Q of the bandpass filter as Q
b, where ωb is the resonance angular frequency K1, k2, k3, and k4 are coefficients according to the capacitance ratio of the capacitive coupling amplifier circuit shown in FIG.
C1, C2, C3, C
4, C5 and C6. ## EQU1 ## The capacitance 7 can change only the gain of the entire circuit in proportion to the capacitance 6, but does not affect the frequency characteristics and is not reflected in FIG. When the transfer function of the equivalent circuit of FIG. 2 is obtained by using Expressions 1 to 3, the following expression is obtained. ## EQU1 ## Here, k1 = kb, k2 · k5
When ka and kb satisfying = ka · kb and k5 · k6 = ka are determined, Expression 4 can be rewritten as Expression 5 below. (Equation 5) Further, G (s) and F (s) in Expression 5 are replaced by Expression 1
Substituting into Equation 2 yields: Comparing the right side of Equation 6 with Equations 1 and 2, the gain (coefficient term) has changed, and the transfer function inside the transfer function has Qt
Is (1 + ka) times, and for the band-pass filter, Qb is 1 / (1-kb) times. That is, using the circuit of FIG. 1 and the equivalent circuit of FIG.
If the capacitance ratio is set to be kb, the Qt of the band reject filter and the Qb of the bandpass filter can be improved simultaneously. It should be noted that the equivalent circuit of FIG.
The effect of 14 is ignored. As mentioned above,
Reference numerals 3 and 14 are used to set the DC operating points of the operational amplifiers 21 and 22. In the frequency band in which the filter is used, the impedance of the resistors 13 and 14 is set to be sufficiently higher than the capacitances 1 to 7 so that the influence can be ignored. However, in the embodiment shown in FIG.
The outputs of the operational amplifiers 21, 22, and 23 oscillate up and down with respect to the ground potential (0 V) as a reference (center). Therefore, the operational amplifiers used need to operate with two positive and negative power supplies. The circuit shown in FIG. 3 is obtained by operating the circuit shown in FIG. 1 with a single power supply voltage, and is further adapted to a MOS integrated circuit. 1 and 3 are assigned the same reference numerals to facilitate understanding. The outline of the difference between FIG. 3 and FIG.
The non-inverting input terminals of 1, 22, 23 are set to 0 from the ground potential.
That is, the reference potential is set to be larger than v, and the resistors 13 and 14 are realized by MOS transistors. The source electrodes of P-channel MOS transistors (hereinafter, PMOS Tr) 26, 32, 35 and 37 are connected to the power supply terminal. The gate electrode and the drain electrode of the PMOS Tr 37 are commonly connected to one end of a constant current source 38, and the other end of the constant current source 38 is connected to the ground potential. The gate electrodes of the PMOS Trs 26, 32 and 35 are PM
Since it is commonly connected to the gate electrode of OSTr37,
The voltages between the gate and source electrodes of the PMOS Trs 26, 32, 35 and 37 are equal, and the PMOS Trs 26, 32, 35 and
The current flowing through 37 is proportional to the size of each transistor. The drain electrode of the PMOS Tr 26 has N
A gate electrode and a drain electrode of a channel MOS Tr (hereinafter, NMOS Tr) 27 and a gate electrode of the NMOS Tr 13 are commonly connected. The source electrode of the NMOS Tr 27 is commonly connected to the gate and drain electrodes of the NMOS Tr 28 and the non-inverting input terminal of the operational amplifier 21. The source electrode of the NMOS Tr28 is connected to the ground potential. Since a constant current flows through the NMOS Trs 27 and 28, each transistor is turned on, and a voltage of a so-called threshold voltage (hereinafter referred to as Vth) of the NMOS Tr is generated between the gate and source electrodes. ing. Similarly, since a constant current also flows through the NMOS Trs 33 and 34, each transistor is on and the gate
A voltage of approximately Vth is generated between the source electrodes.
Further, since a constant current also flows through the NMOS Tr 36, the transistor is on and a voltage of approximately Vth is generated between the gate and source electrodes. The non-inverting input terminal of the operational amplifier 21 is NM
Since it is connected to the gate electrode of the OSTr 28, the voltage is almost Vth. If the input signal amplitude is 0,
The output terminal and the inverted input terminal of the operational amplifier 21 are NMOST
r13, the inverting input terminal, the non-inverting input terminal and the output terminal of the operational amplifier 21 have the same voltage, that is, V
The voltage is slightly higher than th. Since the source electrode and the drain electrode of the NMOS Tr 13 are connected to the non-inverting input terminal and the inverting input terminal of the operational amplifier 21, respectively, they have a voltage of approximately Vth. On the other hand, since the gate electrode of the NMOS Tr13 is connected to the gate electrode and the drain electrode of the NMOS Tr27, the voltage is approximately 2 × Vth. A voltage of approximately Vth is applied between the gate and source electrodes of the NMOS Tr13, and the NMOS Tr13 is always on. The output of the operational amplifier 21 is connected to resistors 16 and 17
, The voltage at the non-inverting input terminal of the operational amplifier 22 is
It becomes almost Vth. Since the output terminal and the inverting input terminal of the operational amplifier 22 are short-circuited by the NMOS Tr 14, the non-inverting input terminal, the inverting input terminal, and the output terminal of the operational amplifier 22 are almost at Vth. On the other hand, NMOS Tr14
Is connected to the gate electrode and the drain electrode of the NMOS Tr 33, and therefore has a voltage of approximately 2 × Vth. A voltage of approximately Vth is applied between the gate and source electrodes of the NMOS Tr14.
Is always on. Since the inverting input terminal of the operational amplifier 23 constituting the band-pass filter also applies a voltage from the gate electrode and the drain electrode of the NMOS Tr 36,
The voltage is almost Vth. Since the non-inverting input terminal and the output terminal of the operational amplifier 23 are short-circuited by the resistor 15 constituting the band-pass filter, the non-inverting input terminal, the inverting input terminal, and the output terminal of the operational amplifier 23 are substantially equal to Vth. Has become. The circuit of FIG. 3 can be expressed in terms of alternating current by the small signal equivalent circuit of FIG. 2, just like FIG. The output of each of the operational amplifiers 21, 22, and 23 swings up and down with Vth as a reference (center), so that they can be used with a single power supply. FIG. 4 shows an embodiment in which the circuit of FIG. 3 is further modified. Corresponding parts in FIGS. 1, 3, and 4 are given the same reference numerals to facilitate understanding. The difference between the circuit of FIG. 4 and the circuit of FIG. 3 is that the voltage of the non-inverting input terminal of the operational
The gate voltage of the NMOS Tr 13 is generated by the combination of the MOS Tr 29 and the NMOS Trs 30 and 31, and the gate voltage of the NMOS Tr 13 is generated by the PMOS Tr 26 and the NMOS Trs 27 and 28.
Is caused by the combination of The source electrode of the newly added PMOS Tr 29 is connected to the power supply terminal, and the gate electrode is
Since they are commonly connected to the gate electrodes of the STr 26, 32, 35, 37, the PMOS Trs 26, 29, 32, 3
The voltage between the gate and source electrodes is equal, and PM
The current flowing through the OSTrs 26, 29, 32, 35, 37 is proportional to the size of each transistor. A constant current flows through the NMOS Trs 30 and 31 to turn them on. Since the drain and source electrodes of both NMOS Trs 30 and 31 are connected, the voltage between each gate and source electrode becomes substantially Vth. MO
Connection of STr 26,27,28 and MOSTr 29,3
Since the connections of 0 and 31 are the same, if the size is the same,
The same voltage can be generated. The reason for using a plurality of circuits that generate the same voltage is to prevent interference between the circuits. Especially NMOS Tr13 and NMOS
Tr14 has no potential difference between the drain electrode and the source electrode when there is no input signal, and the MOSTr operates in a so-called unsaturated state. In a non-saturated MOSTr, particularly, the capacitance between the gate and drain electrodes is larger than that during the saturation operation, so that a voltage change between the source and drain electrodes due to a signal input causes the change in the voltage of the gate electrode through the capacitance between the gate and drain electrodes. Change the voltage. The change in the voltage of the gate electrode changes the voltage of the voltage generating portion, that is, the voltage between the gate and source electrodes of the NMOS Trs 27 and 28 or the NMOS Trs 33 and 34 in FIG. In FIG. 4, the non-inverting input terminal of the operational amplifier 21 receives the voltage from the gate electrode of the NMOS Tr 31 provided separately, and is not affected by the above-mentioned voltage fluctuation. In the embodiment shown in FIG. 4, the resistor 15 constituting the band-pass filter is divided and the resistors 15 and 3 are divided.
It is expressed by three of 9, 40. The voltage at the non-inverting input terminal of the operational amplifier 23 for the band-pass filter is
The current is set by the product of the current flowing through the STr 35 and the resistance value of the resistor 41. Assuming that the resistance values of the resistors 15, 39, and 40 are R15, R39, and R40, respectively, the resistor 15 in FIG. 3 is equivalent to the following equation. Thus, although the number of resistors increases, the resistance value can be doubled, so that the sum of the resistance values can be reduced. Generally, in an integrated circuit, not the number of resistors but the sum of the resistance values is a factor in determining the chip size. Therefore, the circuit in FIG. 4 is particularly suitable for an integrated circuit. The output of the operational amplifier 23 for the band-pass filter when there is no signal input, that is, the DC operating point is determined by the operational amplifier 2
Assuming that the voltage of the non-inverting input terminal of No. 3 is Vb, Vb is, as described above, the NMOS Tr35
And the resistance of the resistor 41 can be easily set. FIG. 5 shows an example in which the filter circuit according to the present invention is applied as a filter circuit 48 in a remote control receiving circuit 45. The infrared light 52 having an emission cycle of several tens kHz is
The signal is converted into an electric signal by a photoelectric conversion element 42 such as a photodiode, and is input to a remote control receiving circuit 45 through an input terminal 43. The remote control receiving circuit 45 detects whether infrared light having a light emission period of 10 kHz is incident or not incident at all. In general, the signal at the input terminal 43 is as weak as 50 μV or less at the minimum. In the remote control receiving circuit 45, the input signal is amplified by the low noise amplifier 46, the amplitude is limited to a constant value by the limiter 47, and only the signal component is extracted by the band pass filter 48 tuned to the light emission cycle. , A detection circuit 49 performs detection, and compares the DC level after detection with a certain threshold to determine whether the DC level is High or Low.
An output terminal 51 is output through a comparison circuit 50 that outputs a level.
Output to If there is a DC input such as under sunlight, the DC level setting circuit 44 operates and the input terminal 43
DC level fluctuation is suppressed. The remote control receiving circuit 45 requires a high-Q bandpass filter 48 tuned to the input light emission period so that only the input signal passes. As described above, the bandpass filter 48 according to the present invention can improve the Q of the bandpass filter by setting the capacitance ratio. As one of the techniques for realizing a filter with higher selectivity, a method of setting the resonance frequency of a band reject filter having a high Q near the resonance frequency of the bandpass filter is well known. As described above, the circuit also includes a band reject filter whose Q is improved by setting the capacitance ratio. The bandpass filter Q and the band reject filter Q
Can be improved, so that the filter circuit 48 having extremely high selectivity can be configured. In addition, since it can be easily realized by a CMOS process, it is particularly suitable for a remote control receiving circuit 45 formed as a CMOS integrated circuit. As described above, according to the present invention,
Since a capacitive coupling addition circuit that does not amplify DC is used, the DC offset voltage of the operational amplifier used internally is not amplified. Therefore, without changing the DC operating point,
Q can be improved by changing the capacitance ratio. In the present invention, since the adder circuit is shared, the present invention uses a smaller circuit scale than a case where a Q multiplying circuit is separately added to each of the band-pass filter and the band-reject filter. Equivalent performance can be obtained.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram showing an embodiment of the present invention. FIG. 2 is an equivalent circuit of the embodiment of the present invention. FIG. 3 is a circuit diagram showing an embodiment of the present invention. FIG. 4 is a circuit diagram showing an embodiment of the present invention. FIG. 5 is a circuit diagram showing an embodiment of the present invention. [Description of Signs] 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 1
2 Capacitance 13,14 Resistance element 15,16,17,18,19,20,39,40,4
DESCRIPTION OF SYMBOLS 1 Resistance 21,22,23 Operational amplifier 24 Signal input terminal 25 Signal output terminal 26,29,32,35,37 P channel MOS transistor 27,28,30,31 N channel MOS transistor 33,34,36 N channel MOS transistor 38 Constant current source 42 Photoelectric conversion element 43 Input terminal of remote control receiving circuit 44 DC level setting circuit 45 Remote control receiving circuit 46 Low noise amplifier 47 Limiter 48 Filter 49 Detection circuit 50 Comparison circuit 51 Output terminal 52 of remote control receiving circuit 52 Red Outside light

Claims (1)

(57) [Claim 1] A first circuit in which a non-inverting input terminal is connected to a reference potential.
An operational amplifier, a second operational amplifier separately provided, a first capacitor disposed between a signal input terminal and an inverting input terminal of the first operational amplifier, and an inverting input of the first operational amplifier. A second capacitor disposed between the terminal and an output terminal of the first operational amplifier; and a second capacitor disposed between an inverting input terminal of the first operational amplifier and an output terminal of the first operational amplifier. 1
, A third capacitor disposed between the inverting input terminal of the first operational amplifier and the output terminal of the second operational amplifier, and the inverting input terminal of the second operational amplifier and the third A second capacitor disposed between the output terminal of the second operational amplifier and a fourth resistor disposed between the inverted input terminal of the second operational amplifier and the output terminal of the second operational amplifier. A fifth capacitor disposed between the inverting input terminal of the second operational amplifier and the reference potential; and a sixth capacitor disposed between the signal output terminal and the inverting input terminal of the first operational amplifier. A capacitor, a seventh capacitor disposed between the signal output terminal and the inverting input terminal of the second operational amplifier, an output terminal of the first operational amplifier, and a non-inverting input terminal of the second operational amplifier. And the denominator of the input / output transfer function is composed of the second-order term, the first-order term, and the constant term. And a first-order filter circuit composed of a second-order term and a constant term, and a denominator of the input / output transfer function, which is disposed between an output terminal and a signal output terminal of the second operational amplifier, and a second-order term. A second filter circuit comprising a first-order term and a constant term and a numerator comprising only the first-order term.