JP3489538B2 - Information recording method and information recording device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for recording information on a medium, and particularly to a reproduction signal level generated when an encoding rule having no DC free property is used for an optical disc medium. How to record information effectively to reduce fluctuations
Law and equipment .

[0002]

2. Description of the Related Art In an optical disk file, it is effective to improve the signal-to-noise ratio of the reproduced signal and increase the data detection window to improve the reliability of the data, that is, to reduce the error rate.

The method of binarizing the reproduced signal is described in the following two methods.
Two methods are given as examples. The first method is
There is a method of directly binarizing a detection signal of the presence or absence of a recording mark recorded on an optical disk by an optical head at a certain slice level (hereinafter referred to as an original waveform detection method). A second method is to detect the position corresponding to the code word by differentiating the detection signal (hereinafter referred to as a differential detection method).

In the system in which the code word is made to correspond to the center of the recording mark (hereinafter referred to as the mark position recording system), the detection signal from the optical head is first differentiated, and the zero crossing of the first differential signal. It is common to detect points before performing the process. Also,
In the method in which the code word is made to correspond to both ends of the recording mark (hereinafter, referred to as mark edge recording method), the detection signal from the optical head is second-order differentiated, and the zero cross point of the second-order differential signal is detected. It is common practice.

The reduction in the signal-to-noise ratio that occurs when the reproduced signal is binarized is smaller in the original waveform detection. In the case of the differential detection method, since the frequency band near the differential constant (cutoff frequency) increases, the original signal-to-noise ratio must be sufficiently secured.

On the other hand, DC freeness, self-clocking, and detection window width are items that characterize the modulation method (coding rule).

The DC free property means that the recording pattern on the medium after modulation and the average level of the reproduction signal obtained from the recording pattern do not depend on the data pattern before modulation.
It has the property that it is always constant within a certain data length range (for example, one byte period).

Cumulative charge may be used as a method of evaluating the degree of DC-free property. The accumulated charge is the recording mark.
The polarity corresponding to the mark side of the reproduced waveform obtained from the mark or the recording mark is + (plus), and the polarity corresponding to the unrecorded portion between the marks, that is, the gap side is − (minus). Means the cumulative value of the above code in a certain data period. When the DC free property is completely satisfied, this accumulated charge is always 0. Generally, if the accumulated charge is 0 within an appropriate division of the data length, for example, 1 byte, it is judged to have the DC free property. The accumulated charge is also called DSV (digital summation).

When such a coding rule having the DC free property is used, the level fluctuation of the reproduced signal does not occur even when the reproduced signal system is connected by a coupling capacitor or the like. In the above-mentioned differential detection method, the same number of amplitude signals are always generated on the upper side and the lower side due to the nature of the differential waveform, so that the average level of the differential signal is kept substantially constant even if the modulation method itself has no DC free property. .

Regarding the data detection window width, the wider the data
When the fluctuation of the data detection position occurs, the error occurrence rate becomes low. In NRZ (non-return to zero) modulation, the detection window width is the same as 1 bit of data before modulation, and the detection window width is the widest. However, it does not have the self-clocking property which is one of the characteristics of the modulation method. The self-clocking property is a characteristic that a clock for reproduction can be generated from the data itself recorded on the medium, but the NRZ modulation is performed when "1" or "0" is continuous as data.
Since there is no change point between 1 "and" 0 ", the reproduced clock cannot be generated.

As a modification of NRZ modulation, NRZI (non-return to zero inverter) for forcibly inserting a change point is used.
However, there are still problems with the over head and DC freeness.

In the data format of the optical disk,
In addition to the user data, address information indicating the position on the disc, a pattern for pulling in a PLL (Phase Lock Loop) for generating a reproduction clock, and insertion at a certain interval in the data Specific data such as the resynchronization pattern to be recorded is recorded. Of these, the address information is generally preliminarily formed as pits (holes) when the disc is produced. An example of a disk format is 130m
It is defined by the ISO (International Standardization) standard for a continuous servo type disc of m diameter.

Here, the ISO standard will be described as an example.
As a modulation method, a mark position recording method of 2-7 RLL (run length limit) modulation is used, and a resynchronization mark of 1 byte is inserted for every 20 bytes of data. The resynchronization mark (RESSYNC) is a function to correct by the resynchronization mark when the phase relationship between the reproduction clock generated by the PLL and the reproduction data is deviated by 1 bit or more due to a defect on the disk. have. The number of data bytes between resynchronization marks is set within an error-correctable range by an ECC (error correction code).

In this ISO format, the resynchronization format is used.
There is only one type, and no changes have been made by data pattern. Since the mark position recording method is used in the format and the mark position is usually detected by the differential detection, the necessity of the DC free property is not so strong. Further, the function of the resynchronization mark is limited to only the correction of the data bit shift.

[0015]

DISCLOSURE OF THE INVENTION Conventional disk format
In the mat, there is only one type of resynchronization mark.

The 2-7RLL modulation system is used as the data modulation system, and no particular consideration is given to the DC free property. A recording marker is used to increase the density of optical disks.
A mark edge recording method in which code words are associated with both ends of the clock is effective. According to the mark edge recording method, the linear recording density can be expected to be improved about twice as much as the mark edge recording method with respect to the mark of the same size.

A differential detection method is generally used to detect an edge position in the mark edge recording method. Regarding the DC free property, DSV can be brought close to 0 regardless of the modulation method. However, considering the decrease in the signal-to-noise ratio in the reproduction system, the original waveform detection method is more advantageous than the differential detection method in which the level increases in the high frequency range.

In the case of the original waveform detection method, unless an amplifier capable of passing a direct current is used, a reproduction signal level fluctuates due to a data pattern except for a modulation method having a DC free property, which causes an edge position change. Accurate detection becomes difficult. DC amplifiers are more difficult to handle than AC amplifiers because they require a large dynamic range and are offset and drift due to temperature changes and power supply fluctuations.
When a method without a DC free property is used as a modulation method and an original waveform detection method which is advantageous in terms of a signal-to-noise ratio is used, the above level fluctuation becomes a problem for stable data detection.

[0019]

As a means for solving the above problems, a resynchronization mark existing in the format defined by the ISO standard is considered to positively contribute to the reduction of the reproduction level fluctuation. It can be considered to be used as a pattern. That is, here, it is effective to select by the sign of the accumulated charge of the resynchronization pattern train and the data train of the resynchronization pattern that makes the accumulated charge as close to zero as possible.

At the time of data recording, the accumulated charge is obtained from the distance between the changing points in the code word data string (mark mark length and gap length in mark edge recording method). , A plurality of prepared resynchronization patterns depending on whether the sign of the accumulated charge is positive or negative.
It can be realized by selecting the one of which the accumulated charge is closest to 0.

Even when an AC amplifier is used for data reproduction, the frequency determined by an interval of at least twice the insertion interval of the resynchronization pattern is set sufficiently higher than the cutoff frequency of the AC coupling. By doing so, the level shift of the reproduction signal can be ignored, and stable binarization can be realized.

The recording data system is composed of a modulation circuit, generation of a specific pattern such as a resynchronization mark, a selection circuit, an accumulated charge detection circuit, a write laser drive circuit and the like. The accumulated charge detection circuit can be realized by comparing the bit number on the mark side with the bit number on the gap side by the counter. The modulation circuit and the write laser drive circuit can be realized by the conventional configuration.

In the mark edge recording method, the accumulated charge detection circuit counts the number of code word bits corresponding to the mark side and the gap side based on the code word generated by the modulation circuit. As the resynchronization mark, two types of patterns having an even number and an odd number of code word bits are prepared, and the accumulated charge value up to the resynchronization mark insertion timing indicates the accumulated charge up to that point. Select the resync mark in the direction of approaching 0.

When the regenerative data system is composed of an AC coupled amplifier, the low cutoff frequency of the amplifier is set to be sufficiently lower than the frequency corresponding to the resynchronization mark interval. The correction of the accumulated electric charge of is effective. When the low cutoff frequency of the reproduction system is increased, the average level fluctuation amount of the reproduction signal is taken into consideration, and resynchronization is performed so that the edge detection position deviation caused by the level fluctuation falls within the detection window width. It is necessary to shorten the mark interval. However, if the resynchronization mark interval is shortened, the number of over heads increases.

On the other hand, from the original purpose of the resynchronization mark, the shorter the resynchronization mark interval, the more effective it is from the function of correcting the bit deviation between the reproduction clock and the reproduction data.
It is necessary to select an appropriate interval from the increase in heads. 130
In a continuous servo type magneto-optical disk having a diameter of mm, a resynchronization mark of 1 byte is inserted for every 20 bytes of data. In the mark edge recording method and in order to detect the resynchronization mark from only one side edge, the resynchronization pattern length is slightly increased. As an example, 1-7
When the mark edge recording method is used in the RLL modulation method,
By inserting a 2-byte resynchronization mark for every 30 bytes of data, the level fluctuation of the reproduction signal is maintained in a state where the self-clocking property is maintained even for a modulation system which originally has no DC free property. It is possible to realize stable recording and reproduction by reducing the accumulated charge amount deviation from 0).

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one implementation example in which the present invention is applied to an optical disk device.

In FIG. 1, an optical disc 101 is rotated at a constant speed by a spindle motor 102, and a laser beam for recording and reproduction is condensed by an optical head 103 on a recording film surface of the optical disc 101 by a focusing lens. The optical head 103 corresponds to the information recording position and the optical disk 10
1 can be moved in the radial direction.

The detection signal 104 detected by the photodetector in the optical head 103 is a low frequency component cutoff filter 10.
5, the DC component is removed. This is the detection signal 10
This is because a lot of noise generated from the focal position tracking mechanism of the light spot is superposed in the low frequency region of No. 4 and this noise component needs to be removed in order to reliably reproduce the information.

The signal passed through the low frequency component cutoff filter 105 is amplified to a desired signal level by the amplifier 106 and converted into a digital signal 108 by the binarization circuit 107. A clock component is extracted from a digital signal 108 by a PLL (phase lock loop) circuit 109, and the digital signal 10 is extracted using this clock signal.
From 8, the reproduction data 111 is generated by the demodulation circuit 110.

At the time of information recording, the recording data 112 passes through the modulation circuit 113 and is converted into the recording code sequence 114 adapted to the optical disk recording / reproducing characteristics. Then, the re-synchronization signal 116 generated by the re-synchronization signal generation circuit 115 is added at regular intervals in the recording code sequence 114, and the laser drive circuit 117 responds to the signal to regenerate the optical head 103.
The laser inside is modulated. The laser light is emitted from the optical head 10.
Recording is performed by focusing the light on the recording film surface of the optical disc 101 by the focusing lens in 3 and forming a recording mark according to the intensity of the light spot.

Next, the format of data recorded on the optical disc 101 will be described with reference to FIG.

Recording / reproduction of information on / from the optical disk is performed in units called sectors. This sector exists around 100,000 or more along the information track spirally provided from the inner circumference to the outer circumference of the optical disk, and each sector is physically identified by an identification number called a sector address. FIG. 2 shows the recording format of one sector in which information is recorded on the optical disc.

The sector head portion 201 is provided at the head of the sector.
There is. The sector head unit 201 has a sector mark for recognizing that it is the head of a sector, a synchronization signal for starting a clock signal generation in the PLL circuit 109, and information such as the above-mentioned sector address as prepits at the time of manufacturing an optical disc. It is a premade part.

The area following the sector head portion 201 is a portion for recording a recording mark when information is actually recorded.
First, the synchronization signal 202 for locking the frequency of the clock signal generated by the PLL circuit 109 is recorded first. A signal having the same function as the synchronizing signal 202 is also present in the sector head unit 201, but the signal in the sector head unit 201 is not recorded during actual recording. Therefore, when the same clock information as the clock used for recording the actual information is recorded in this portion and there is a slight deviation between the clock component in the sector head unit 201 and the clock component at the time of recording. Therefore, the synchronization signal 202 is used to finely adjust the clock signal generated by the PLL circuit 109 to perform resynchronization.

After the synchronization signal 202, a signal obtained by code conversion of actual user information by the modulation circuit is recorded. The amount of information recorded in one sector is fixed for each optical disk, and is usually 1K.
Bytes, or 512 bytes. After the predetermined amount of user information, an error correction code (ECC) for detecting and correcting the error when the user information is erroneously detected due to noise during reproduction is recorded. The above user information signal 203 and ECC 204 are blocks for each fixed amount; data (1), data (2), ..., Data (N), and ECC (1), ECC (2) ,.
It is divided into C (M) (N and M represent certain integer values) and recorded in a form in which a resynchronization signal 205 is added to each block.

The resynchronization signal 205 is used as a clock signal in the PLL circuit 109 while no clock information can be detected from the reproduction signal at the time of reproduction at a portion (defective portion) where recording marks cannot be recorded continuously due to scratches on the optical disk. It is provided in order to deal with a phenomenon in which a deviation of an integer number of cycles occurs and all subsequent signal detection is erroneous. That is,
By adding a signal that can be identified even if the clock is deviated at regular intervals as a resynchronization signal, the deviation of the clock signal is detected and resynchronized based on the signal at the time of reproduction, and the subsequent information detection is performed. Return to normal operation again. The detection error in the section from the defective portion to the resynchronization signal is corrected using the error correction signal. After this, the data (K)
The resynchronization signal 205 added between (K represents a certain integer value) and the data (K + 1) is Resync (K), E
The resynchronization signal 205 added between CC (K) and ECC (K + 1) will be called Resync (N + K).

The above user information signal 203 and EC
After C204, the buffer unit 206 for adjusting the variation of the one-factor time caused by the rotation jitter or the like follows, and then to the head of the next sector.

Next, the structure of the recording signal pattern of the user information signal 203 will be described with reference to FIG.

The recording code sequence 114 is a signal sequence obtained by passing the recording data 112 through a modulation circuit. Generally, the modulation rule used for converting the recording data of the optical disc is RLL (run length limited) in which the number of "0" s between "1" s and "1" s of the code symbols obtained by conversion is in a range. It is a system. This is because the clock information is extracted from the reproduction signal itself during data decoding during reproduction, so that the polarity inversion that is the source of the clock information is always constant in the reproduction signal in order to perform the clock information extraction operation in a stable manner. For reasons such as being required to exist within the time interval.

Upon receiving the recording code sequence 114, the laser drive circuit 117 modulates the emission intensity of the laser like the recording signal pattern sequence 301. That is, the recording code sequence 114
The strong / weak of the laser emission intensity is inverted corresponding to "1" of. The recording mark 302 is formed on the information track of the optical disc 101 during the period when the emission intensity is strong according to the modulation of the laser beam.

At the time of reproduction, a reproduction signal 303 in which the electric signal potential changes depending on the presence or absence of the recording mark is obtained. Since much noise is superimposed on the low frequency component of the reproduced signal 303, the low frequency component cutoff filter 10
5 is used to remove the noise, but when the recorded signal pattern sequence 301 has a signal component in the same frequency range as the noise, the low frequency component cutoff filter 105 loses the information component, It causes an error at the time of signal decoding. Therefore, in order to realize highly reliable recording / reproducing, it is necessary to devise so that the recording signal pattern series 301 does not include a low frequency component.

One of the simple calculation methods for detecting the low frequency component in the recording signal pattern series 301 is a method using accumulated charge (DSV) 304. This is because the "Low" level weight of the recording signal pattern sequence is -1, "High".
This is a method of calculating the value (DSV) obtained by cumulatively adding the weights for each bit with the weight of the h ″ level as +1 and making a determination based on the magnitude. For example, from the beginning to the end of the recording signal pattern sequence of one sector. When the absolute value of the DSV value of 1 is large, it means that this recording data contains a lot of DC components, that is, the overall duty is largely deviated from 50%.

Therefore, in order to suppress the DC component of the recording signal pattern series, the DSV value should be calculated so that it is as close to 0 as possible. That is, a plurality of types of patterns for the user information signal 203 and the resynchronization signal 205 to be added between each block of the ECC 204 are prepared, and each resynchronization signal 205 is selected from among them based on the DSV value of each block. To do. Specifically, the K-th (K represents a certain integer value) resynchronization signal 205 (Res)
sync (K)) is the DSV value in the period from data (1) to data (K), and the level of the recording signal pattern sequence immediately before Resync (K) (hereinafter referred to as signal level) (“Low” / "High") and data (K +
1) Select using a single DSV value. However, the calculation of the DSV value of the data (K + 1) alone is performed assuming that the initial signal level is “Low”.

For example, the DSV value from data (1) to data (K) is a positive number α, the last signal level up to that point is "Low", and the DSV value of data (K + 1) alone is If it is a positive number β (however, the DSV values of the resynchronization signal alone are all 0) (1) If an even number of signal level inversions during Resync (K) is used, the data (K ) Becomes "Low", the DSV value from the data (1) to the data (K + 1) is α + β (2) When the number of inversions of the signal level during Resync (K) is odd. When used, the first signal level of the data (K) becomes “High”, so the DSV value from the data (1) to the data (K + 1) is α−β, and in this case, the data (1) ) To data (K + 1) The absolute value of the V value is small (2), i.e. Res
A signal whose number of signal level inversions is odd is selected for ync (K).

Table 1 shows the results of performing these selections in all cases. Table 1 shows the selection criteria of the resynchronization signal.

[0047]

[Table 1]

It should be noted that by selecting the resynchronization signal 205 based on the same judgment criteria as the ECC 204 part, the low frequency component suppression of the entire recording signal pattern sequence can be realized.

Next, a specific example of the resynchronization signal 205 will be described. However, since this resynchronization signal 205 uses a pattern that is not generated from the modulation rule so that it can be detected even when the clock is shifted by an integer period during reproduction as described above, it depends on the modulation rule used in the modulation circuit 113. To do. Therefore, here, as an example, (1-7) modulation which is one of the RLL systems (for example, JP-A-58-119273).
An example of the configuration of the resynchronization signal 205 according to Japanese Patent Laid-Open Publication No. 2005-242242 will be given.

First, Table 2 shows the modulation rule of (1-7) modulation. This modulation method is a method of converting a 2-bit data word into a 3-bit code word, and a code word generated by converting data according to this modulation rule is always a symbol "
There must be 1 or more and 7 or less "0" between 1 "and" 1 ".

[0051]

[Table 2]

FIG. 4 shows an example of a code word pattern (prohibition pattern) that is not generated by this modulation rule.

(1) and (2) deviate from the rule that 1 or more and 7 or less "0" must be inserted between "1" and "1". Further, in the case of this modulation rule, the following prohibition pattern exists in addition to this. First, as in (3), "1"
If there are 6 "0" s between "1" and "1", 7 "0" s will not be inserted between "1" and the next "1". Also,
As in (4) and (5), "0" is 7 between "1" and "1".
If there is one, "0" is 6 between the next "1"
It doesn't enter more than one.

Further, due to the prohibition from (2) to (5), 14 between "1" and "1" including one "1" in between.
The rule is established that symbols of more than 1 bit cannot be entered. Therefore, when the resynchronization signal includes the patterns (3) to (5), in the binarized reproduction signal, the interval between the continuous falling edges and the falling edges or the continuous rising edges is increased. Since the resynchronization signal can be identified because the edge interval is longer than a certain time, the device configuration can be simplified in the case of a reproducing system using the front and rear edge independent detection method (see, for example, JP-A-2-183471).

FIG. 5 shows a specific example of the structure of the resynchronization signal 205 using the prohibition pattern (5) shown in FIG. Since 3 bits of the code word immediately before the sync signal are included in this pattern, the number of signal level inversions in each pattern changes depending on the immediately preceding code word, but the number of signal level inversions in (Pattern 1) is The resynchronization signal 205 for suppressing the low-frequency component of the recording signal pattern sequence can be configured by these two types, since the number of times is always one more than that of 2) and the even and odd are always different. Further, the resynchronization signal 2
Reference numeral 05 is also convenient in the case of a reproducing system using the front and rear edge independent detection method.

In addition to the specific configuration example of the resynchronization signal 205 shown here, a plurality of resynchronization signals 20 are used for suppressing low frequency components of the recording signal pattern sequence.
It is possible to construct a set of five.

Finally, FIG. 6 shows the transfer characteristic of the low frequency component cutoff filter 105 used when reproducing the recording mark recorded by the recording signal using the resynchronization signal 205. When the interval of the re-synchronization signal is T seconds, almost no recording signal information is included in the reproduction signal obtained when the recording mark is reproduced in this manner at a frequency of 1/2 T Hz or less. Therefore, since only the noise component is included in the region below this frequency in the reproduced signal, the low frequency component cutoff filter 105 can efficiently remove the noise component. Therefore, it is necessary to design the interval T of the resynchronization signal in consideration of the recording density and the frequency region of the noise component added to the reproduction signal.

[0058]

By using this information recording method and apparatus , it is possible to suppress the low-frequency component of the recording signal by the modulation method which originally does not have DC-free property, and the reproducing side generates noise without losing the information component. Since many low-frequency components that are superimposed can be removed, highly reliable recording / reproducing can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of an implementation example in which the present invention is applied to an optical disk device.

FIG. 2 is a conceptual diagram showing an information sector and its recording format in an optical disc.

FIG. 3 is a waveform diagram showing a recording signal pattern sequence configuration of a user information signal.

FIG. 4 is a conceptual diagram showing a codeword pattern (prohibition pattern) that is not generated by the (1-7) modulation rule.

FIG. 5 is a conceptual diagram showing a specific configuration example of a resynchronization signal.

FIG. 6 is a graph showing a transfer characteristic of a low frequency component cutoff filter.

[Explanation of symbols]

101 ... Optical disc, 102 ... Spindle motor, 10
3 ... Optical head, 104 ... Detection signal, 105 ... Low frequency component cutoff filter, 106 ... Amplifier, 107 ... Binarization circuit, 108 ... Digital signal, 109 ... PLL circuit, 1
10 ... Demodulation circuit, 111 ... Reproduction data, 112 ... Recording data, 113 ... Modulation circuit, 114 ... Recording code sequence, 11
5 ... Resynchronization signal generation circuit, 116 ... Resynchronization signal, 117
... Laser drive circuit, 201 ... Sector head section, 202 ...
Sync signal, 203 ... User information signal, 204 ... ECC,
205 ... Resynchronization signal, 206 ... Buffer section, 301 ... Recording signal pattern series, 302 ... Recording mark, 303 ... Reproduction signal, 304 ... Cumulative charge (DSV)

─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Fumiyoshi Kirino 1-280 Higashi Koikekubo, Kokubunji, Tokyo Inside Hitachi Central Research Laboratory (72) Inventor Go Toda 1-280 Higashi Koikeku, Tokyo Kokubunji City Hitachi, Ltd. Central Research Laboratory (56) Reference JP-A-3-113872 (JP, A) JP-A-62-272726 (JP, A) JP-A-2-243024 (JP, A) JP-A-63-160422 (JP, A) A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G11B 20/14

Claims (10)

(57) [Claims] 1. An information recording method for recording data on a recording medium using a predetermined encoding rule, comprising: a first synchronizing signal for locking the frequency of a clock signal generated by a PLL circuit; 2 sync signals are prepared, the first sync signal is inserted for each unit for recording, and the second sync signal is a code word “1” having one code word “1” between them. A first group including a pattern in which the interval between 1's and 1's is longer than the longest interval in the recording data, and the number of appearances of the code word "1" is an even number;
A specific pattern composed of a second group in which the code word “1” appears odd times, and the specific pattern
Code contains bits that depend on the previous codeword,
An information recording method, characterized in that any one of the specific patterns is inserted into the record data at regular intervals so that the charge accumulated when reproducing the record data approaches 0. 2. A low frequency component in a specific section of the recording data is detected, and which of the groups to select the specific pattern is determined based on the detection result. Information recording method described in. 3. A specific section of the recording data is a section including the specific pattern, and a DSV (digital
3. The information recording method according to claim 2, wherein the sum value) is used as the detection result of the low frequency components in the section. 4. The information recording method according to claim 3,
The number of code word bits corresponding to the mark side and the gap side is counted based on the code word, and one of the first group and the second group is selected as a specific pattern in the direction in which the DSV is 0. An information recording method characterized by insertion. 5. The recording data has an encoding rule, and as the specific pattern, a pattern having a code word interval that does not match the encoding rule is used.
The information recording method as described in any of 1 to 4. 6. An RLL (run length limit) code is used as the encoding rule, and code words are made to correspond to both ends of a mark to be recorded on a medium. Information recording method. 7. An information recording apparatus for recording data on a recording medium using a predetermined encoding rule, wherein a first synchronizing signal for locking the frequency of a clock signal generated by a PLL circuit is generated. Means and said first
Is inserted for each unit for recording, and has a circuit for generating a second synchronization signal, and the second synchronization signal has one code word "1" in between. A first group in which the interval between two codewords “1” having a length is longer than the longest interval in the recording data, and the number of appearances of the codeword “1” is an even number; Word "1"
Number of occurrences are identified pattern composed of a second group is an odd number of times, just before the said specific pattern
Bits depending on the code word are included, and one of the specific patterns is inserted at regular intervals in the recording data so that the accumulated charge when reproducing the recording data approaches 0. An information recording device characterized by being provided. 8. The information recording apparatus according to claim 7,
A DSV detection circuit for counting the number of code word bits corresponding to the mark side and the gap side based on the code word is further provided,
According to the output of the SV detection circuit, the first group and the second group
An information recording apparatus characterized in that a specific pattern in the direction of setting DSV to 0 is selected and inserted. 9. An information recording method for recording data on a recording medium by a mark edge recording method, wherein a first synchronization signal for locking the frequency of a clock signal generated by a PLL circuit and a second synchronization signal. A signal is prepared, the first synchronization signal is inserted for each unit for recording, and the second synchronization signal is a code word "1" having one code word "1" between them. A first group including a pattern in which the interval of "1" is longer than the longest interval in the recording data, and the number of appearances of the code word "1" is an even number;
A specific pattern composed of a second group in which the code word “1” appears odd times, and the specific pattern
Code contains bits that depend on the previous codeword,
An information recording method, characterized in that any one of the specific patterns is inserted into the record data at regular intervals so that the charge accumulated when reproducing the record data approaches 0. 10. The information recording method according to claim 9, wherein the number of codeword bits corresponding to the mark side and the gap side is counted based on the codeword, and the number of codeword bits is counted from among the first group and the second group. An information recording method characterized by selecting and inserting a specific pattern in a direction in which the difference in the number of code word bits corresponding to the counted mark side and the gap side is set to 0.