JP3487795B2 - Liquid crystal display device and driving method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used in OA equipment such as personal computers and word processors, multimedia information terminals, AV equipment, game equipment and the like, and has a function of correcting a voltage drop occurring in the horizontal direction of a display screen. The present invention relates to a method for driving a liquid crystal display device including the.

[0002]

2. Description of the Related Art A matrix type STN (Super Twisted Nematic Type) liquid crystal display device is normally provided with a plurality of row electrodes (scanning electrodes) to which a scanning voltage is applied, and a signal arranged so as to intersect each row electrode. A plurality of column electrodes (signal electrodes) to which a voltage is applied, one of each row electrode and one of each column electrode
The liquid crystal layer is configured to respond to a voltage value applied between one of the row electrodes and one of the column electrodes at the intersection of the two. Each row electrode is arranged along the horizontal direction of the display screen, and each column electrode is arranged along the vertical direction of the display screen. In such a liquid crystal display device, when the display screen becomes large, a gradation phenomenon occurs in which a brightness difference occurs in the left and right directions.
This is because as the display screen becomes larger, the resistance value of each row electrode along the left-right direction of the display screen causes a voltage drop along the extension direction of the row electrode, which is applied to the liquid crystal layer in the left-right direction of the row electrode. This is because a difference in voltage occurs. The scanning voltage applied to the row electrodes is controlled by the scanning drive IC, and the signal voltage applied to the column electrodes is controlled by the signal drive IC.

A method of improving the gradation phenomenon is proposed in Japanese Patent Laid-Open No. 9-212475.
In this publication, the voltage applied to each column electrode is increased stepwise from one end of each row electrode to the other end thereof.

[0004]

As described above, when the signal voltage applied to each column electrode is increased stepwise for correction, the voltage value of the column electrode is controlled by using the signal drive IC. is doing. Normally, in voltage control of a plurality of signal drive ICs, one signal drive IC needs to control the voltage of 100 or more column electrodes, which may make it impossible to perform highly accurate voltage correction.

Further, when the resistance value of each row electrode increases due to the increase in the size of the display screen and the required correction amount increases, different signal drive is performed in order to optimally correct the signal voltage of each column electrode. There is also a problem that a brightness difference occurs at the boundary between the column electrodes whose voltage is controlled by the IC.

The present invention is intended to solve such a problem, and an object thereof is to suppress the voltage difference occurring in the left-right direction of the row electrode by a highly accurate and smooth correction, thereby suppressing the occurrence of a gradation phenomenon. A driving method and a liquid crystal display device are provided.

[0007]

According to a method of driving a liquid crystal display device of the present invention, a plurality of row electrodes to which a scanning voltage is applied and a plurality of signal voltages applied to intersect each row electrode are provided. Liquid crystal having a column electrode and a liquid crystal layer that responds to voltage values applied to one of the row electrodes and one of the column electrodes at the intersection of one of the row electrodes and one of the column electrodes. A method for driving a display device, wherein a plurality of column electrodes are set as one unit and a correction voltage is applied to each of a plurality of units for each of a plurality of horizontal scanning periods set in a vertical blanking period. The number of times the correction voltage is applied for each of the plurality of units increases from one end of each row electrode toward the other end.

The correction voltage is given by a pulse signal, and the correction voltage amount is changed stepwise by pulse modulation.

The interval of the correction voltage amount that is changed stepwise can be expanded or contracted.

A plurality of row electrodes to which a scanning voltage is applied, a plurality of column electrodes to which a signal voltage is applied, which are arranged so as to intersect each row electrode, and a scanning drive IC which applies a voltage to each row electrode. , Signal drive IC for applying voltage to each column electrode
And at the intersection of one of each row electrode and one of each column electrode,
A liquid crystal display device having a liquid crystal layer that responds to a voltage value applied to one of each row electrode and one of each column electrode, for each of a plurality of horizontal scanning periods set within a vertical blanking period. In addition, the plurality of column electrodes are used as one unit to generate the correction voltage applied to each of the plurality of units, and the number of times the correction voltage is applied to each unit increases from one end of each row electrode to the other end. And a gradation correction circuit adapted to do so.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a gradation correction circuit of a liquid crystal display device according to a first embodiment of the present invention. As described above, the display screen of the liquid crystal display device has a plurality of row electrodes to which a scanning voltage is applied, a plurality of column electrodes to which a signal voltage is applied, which are arranged so as to intersect each row electrode, and one of the row electrodes. One of the column electrodes has a liquid crystal layer responsive to a voltage value applied between one of the row electrodes and one of the column electrodes at an intersection of the column electrode and one of the column electrodes. Each row electrode is arranged along the horizontal direction of the display screen, and each column electrode is arranged along the vertical direction of the display screen. The scanning voltage applied to each row electrode is controlled by the scanning drive IC, and the signal voltage applied to each column electrode is controlled by the signal drive IC 5.
The gradation correction circuit 100 in FIG. 1 is composed of a dot counter 1, a line counter 2, a gradation correction data generation circuit 3, and a selector circuit 4, and the signal output from the selector circuit 4 is input to the signal drive IC 5. .

The dot counter 1 outputs information about the position of the display screen in the left-right direction, and is counted up by the input CLOCK signal,
The dot count value S101 as the output signal is input to the gradation correction data generation circuit 3. The dot count value is configured to be reset every one horizontal scanning period by the LP signal which is a pulse signal indicating the cycle of one horizontal scanning period.

The line counter 2 outputs information relating to the vertical position of the screen and is counted up by the input LP signal, and the line count value S201 which is the output signal thereof is sent to the gradation correction data generation circuit 3. It has been entered. The line count value is configured to be reset every one vertical scanning period by the STA signal which is a pulse signal indicating the cycle of one vertical scanning period.

The gradation correction data generation circuit 3 is
First, the vertical blanking period is determined from the line count value S201, and a part of the vertical blanking period is assigned to the correction data transfer period.
Next, the gradation correction data generation circuit 3 generates predetermined correction data according to the horizontal direction of the screen based on the dot count value S101, and outputs the correction data to the selector circuit 4 together with the clock signal XCK1 for transferring the correction data. .

The selector circuit 4 receives the correction data generated by the gradation correction data generation circuit 3 and the transfer clock XCK1 for the correction data, and
Normal display data and transfer clock X for the display data
CK0 is input. Then, during the display data transfer period, normal display data and its transfer clock XCK0 are output to the signal drive IC 5, and during the vertical blanking period, correction data and its transfer clock XCK1 are output to the signal drive IC 5.

The signal generated by the gradation correction circuit 3 is output to a predetermined column electrode through the signal driving IC 5 so that a correction voltage is applied to the column electrode, which causes a brightness difference in the horizontal direction of the screen. Is corrected.

FIG. 2 is a graph showing a timing chart of each signal for operating the gradation correction circuit 100. The STA signal is a pulse signal that indicates the cycle of one vertical scanning period, and is a confirmation signal that rises at the beginning of the display data transfer period and that the vertical retrace period is followed by the display data transfer period. The CLOCK signal is a signal corresponding to the number of pixels (the number of dots). The LP signal is a pulse signal indicating the cycle of one horizontal scanning period.

The data represents display data and correction data. The display data is output in each horizontal scanning period in the display data transfer period. The correction data is output in each horizontal scanning period within the correction data transfer period.

The vertical blanking period is set to a length that is an integral multiple of the horizontal scanning period, and the correction data transfer period is set in the vertical blanking period. In the example of FIG. 2, the vertical blanking period is 4
H (one horizontal scanning period is 1H), and the correction data transfer period is 2H.

Next, the gradation correction circuit 1 shown in FIG.
SVGA (Super Video Graphic Array: 8)
A liquid crystal display device that performs dual scan driving of (00 × 600 dots) will be described as an example.

Table 1 is a table for explaining a correction method for suppressing this gradation phenomenon. Each row electrode arranged in the left-right direction of the display screen intersects with 800 column electrodes. As the period for providing the correction data, 8H (one horizontal scanning period is 1H) in the vertical blanking period described in FIG. 2 is used as the correction data transfer period. Next, one unit of the column electrode to which the correction data is input is set to 50 dots, and 16 correction regions are provided (80
0 ÷ 50 = 16). Then, in the period from the 1H to the 8H, the number of times the correction data is applied is changed from 1 dot to 80 times.
Eight-step correction can be performed by gradually increasing the number toward 0 dots. Here, “0” in Table 1 means that the correction voltage is not applied, and “1” means that the correction voltage is applied.

[0023]

[Table 1]

FIG. 5 is prepared based on Table 1, and shows the correction voltage applied from the signal driving IC 5 to the column electrodes,
6 is a graph showing a timing chart of a scanning voltage applied to a row electrode from a scanning driving IC. The correction data and the display data respectively transferred to the signal driving IC 5 and the scanning driving IC during the data transfer period are applied to the column electrodes and the row electrodes during the data output period after 1H. The correction voltage is set to ± Vcol when the correction voltage is applied to the column electrode during the correction data output period, and is set to Vcenter when the correction voltage is not applied. Ranges of ± Vcol and Vcenter of the 100th, 300th, 500th, and 700th columns on the column electrode side are the range for applying the correction voltage of the display of '1' in Table 1 and the display of '0'. It corresponds to the range in which the correction voltage is not applied. As for the scanning voltage, a selection pulse having a potential of ± Vrow corresponding to the row display is output during the display data output period, and Vcent during the other period.
It is set to er. As a result, when the correction voltage is not applied during the correction data output period, both the correction voltage and the scanning voltage are set to Vcenter, and no voltage is applied to the liquid crystal layer.

FIG. 4 shows data in which the correction voltage and scanning voltage shown in FIG. 5 are used to set the number of times the correction voltage is applied according to each correction region of the gradation phenomenon of FIG. It can be seen that the correction amount is appropriate.

FIG. 12 is a graph showing the luminance distribution in the left-right direction of the screen when the correction control of the present invention is not performed in the conventional SVGA dual-scan drive liquid crystal display device. 800 on the right
Corresponds to the dot position. As shown in FIG. 12, there is a gradation phenomenon in which the brightness decreases from the position of one dot at the left end to 800 dots at the right end.

Therefore, if luminance correction as shown in FIG. 4 is performed on each of the left and right areas of the display screen in which the gradation phenomenon of FIG. 12 occurs, each of the left and right areas of the display screen as shown in FIG. The luminance distribution becomes uniform at.

In the above-described example, the correction data transfer period is 8H, and the correction area for inputting the correction data is the column electrode 50.
Although the correction is performed with the book as one unit, the correction data transfer period may be arbitrarily set to any H in the vertical blanking period in order to set the optimum correction amount, and the correction area for inputting the correction data is set. Also, any number of column electrodes may be set as one unit. Further, the liquid crystal display device is not limited to the SVGA dual scan drive.

The second embodiment is a correction method in the case where the correction voltage is a pulse width modulation method in the first embodiment and the correction accuracy is increased.

FIG. 6 is a diagram showing the structure of the gradation correction circuit 200 in the case where the correction voltage is of the pulse width modulation type, and shows the pulse width of the signal voltage and the correction voltage applied to the column electrode input to the selector circuit 40. A data gradation clock GCK for determining is added.

Dot counter 1 and line counter 2
Are the dot count values S101,
The line count value S201 is output.

The dot count value S101 and the line count value S201 are input to the gradation correction data generation circuit 30. The gradation correction data generation circuit 30 first determines the vertical blanking period based on the dot count value S101, allocates a part thereof to the correction data transfer period, and then generates the correction data to be given to the correction area based on the line count value S201. , The correction data transfer clock XCK1 and the correction data gradation clock GCK which is a signal for dividing one horizontal scanning period into a plurality of periods.
Output with 1.

The selector circuit 40 receives the correction data generated by the gradation correction data generation circuit 30, the correction data transfer clock XCK1 and the correction data gradation clock GCK1, and the normal display data and its display data. Transfer clock XCK0 and display data gradation clock GCK0 are input.

As shown in FIG. 7, the selector circuit 40 outputs the normal display data and the display data transfer clock XCK0 to the signal drive IC 50 during the period other than the vertical blanking period, and corrects during the vertical blanking period. The data and correction data transfer clock XCK1 are output. In addition, the selector circuit 4
0 outputs the display data gradation clock GCK0 during the display data output period, and outputs the correction data gradation clock GCK1 during the correction data output period. At this time, according to FIG. 7, the display data output period and the correction data output period are delayed by one horizontal scanning period with respect to the display data transfer period and the correction data transfer period. The data gradation clock GCK for controlling the pulse width of the signal voltage to be generated also delays one horizontal scanning period with respect to the data and data transfer clock XCK. As in FIG. 2, the vertical blanking period is set to a length that is an integral multiple of the horizontal scanning period, and the correction data transfer period is set in the vertical blanking period. Also in the example of FIG. 7, the vertical blanking period is 4H (one horizontal scanning period is 1H), and the correction data transfer period is 2H.

Next, also in the second embodiment, an example of 16-step pulse width modulation in a liquid crystal display device of dual scan drive with SVGA (800 × 600 dots) will be described as in the first embodiment.

Table 2 shows a pulse width modulation type correction method for suppressing the gradation phenomenon shown in FIG. As the period for providing the correction data, 8H (1 horizontal scanning period is 1H) in the vertical blanking period is used as the correction data transfer period. Next, one unit of the column electrode to which the correction data is input is 16 dots, and 50 correction regions are provided. Then, in the period from the 1H to the 8H, the number of times the correction data is applied to the column electrode is changed from 1 dot to 8
By increasing the number of dots toward 00 dots in stages, 120 (15 × 8) stages of correction can be performed, and the correction accuracy is higher than the eight stages of correction of the first embodiment. Here, “0” in Table 2 does not apply the correction voltage, and “1/15”, “2/15”, ... “14/15” and “1” are set according to each pulse width. It means that a correction voltage controlled dynamically is applied.

[0037]

[Table 2]

FIG. 11 is a diagram showing a timing chart of the correction voltage applied from the signal driving IC 50 to the column electrodes and the scanning voltage applied from the scanning driving IC to the row electrodes. Signal driving IC and scanning driving IC during the data transfer period
The data transferred to is applied to the electrode during the data output period after 1H. The correction voltage is set to ± Vcol when the correction voltage is applied to the column electrode during the correction data output period, and is set to Vcenter when the correction voltage is not applied. The pulse width of the correction voltage is "0", "1/15", "2/1" based on the correction data gradation clock GCK1.
1'of 5 ', ...' 14/15 'and'15 / 15 = 1'
It is controlled in 6 stages. Range of ± Vcol and Vc of the 100th, 300th, 500th and 700th columns on the column electrode side
The ranges of enter are "1/15" and "2/1" in Fig. 10, respectively.
5 ', ...,' 14/15 ', '15 / 15 = 1' correspond to the range to which the display correction voltage is applied, and '0' display correspond to the range where the correction voltage is not applied.

The scanning voltage is such that a selection pulse having a potential of ± Vrow corresponding to the row display is output during the display data output period, and is set to Vcenter during the other periods. As a result, when the correction voltage is not applied during the correction data output period, both the correction voltage and the scanning voltage are set to Vcenter, and no voltage is applied to the liquid crystal layer.

FIG. 9 shows data in which the number of times of applying the correction voltage according to each correction region of the gradation phenomenon of FIG. 12 is set by using the correction voltage and the scanning voltage shown in FIG. From the data of FIG. 4 of the first embodiment, it can be seen that the correction amount is more appropriate.

As shown in FIG. 8, the time interval of the data grayscale clock GCK for determining the pulse width of the signal voltage and the correction voltage applied to the column electrode is set to the correction data floor of the correction data output period. By setting like the adjustment clock GCK1, the applied correction amount can be set more accurately.

Therefore, if the brightness correction shown in FIG. 9 is applied to each of the left and right areas of the display screen in which the gradation phenomenon of FIG. 12 occurs, the left and right areas of the display screen as shown in FIG. In Embodiment 1, the luminance distribution is
It is more uniform than the data in FIG.

In the second embodiment, the correction data transfer period is 8H, and the correction area for inputting the correction data is the column electrode 16
Although the correction is performed with the book as one unit, the correction data transfer period may be arbitrarily set to any H in the vertical blanking period in order to set the optimum correction amount, and the correction area for inputting the correction data is set. Also, any number of column electrodes may be set as one unit. The liquid crystal display device according to the first embodiment.
Similarly, it is not limited to SVGA dual scan drive.

[0044]

As described above, according to the driving method of the liquid crystal display device of the present invention, the plurality of column electrodes are set as one unit for each of the plurality of horizontal scanning periods set within the vertical blanking period, and the correction is performed for each of the plurality of units. The voltage is applied to each unit, and the number of times the correction voltage is applied for each unit increases from one end of each row electrode toward the other end, which enables highly accurate correction of the gradation phenomenon. , A uniform luminance distribution was realized in the horizontal direction of the liquid crystal display screen.

[Brief description of drawings]

FIG. 1 is a block diagram of a gradation correction circuit according to a first embodiment of the present invention.

FIG. 2 is a graph showing a timing chart of each signal in the block diagram of FIG.

FIG. 3 is a diagram showing an example of a luminance distribution of the liquid crystal display device after correction according to the first embodiment of the present invention.

FIG. 4 is a graph showing an example of a correction amount according to the first embodiment of the present invention.

FIG. 5 is a graph showing a timing chart of a correction voltage and a scanning voltage applied to each of the column electrode and the row electrode according to the first embodiment of the present invention.

FIG. 6 is a block diagram of a gradation correction circuit according to a second embodiment of the present invention.

7 is a graph showing a timing chart of each signal in the block diagram of FIG.

FIG. 8 is a graph showing a timing chart of a data grayscale clock GCK according to the second embodiment of the present invention.

FIG. 9 is a graph showing an example of a correction amount according to the second embodiment of the present invention.

FIG. 10 is a graph showing an example of the luminance distribution of the liquid crystal display device after correction according to the second embodiment of the present invention.

FIG. 11 is a graph showing a timing chart of a correction voltage and a scanning voltage applied to a column electrode and a row electrode according to the second embodiment of the present invention.

FIG. 12 is a graph showing an example of a luminance distribution of a conventional STN liquid crystal display device.

[Explanation of symbols]

1 dot counter 2 line counter 3 Gradation correction data generation circuit 4 Selector circuit 5 signal drive IC 30 gradation correction data generation circuit 40 selector circuit 50 signal drive IC 100 gradation correction circuit 200 gradation correction circuit

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Claims (4)

(57) [Claims] 1. A plurality of row electrodes to which a scanning voltage is applied,
A plurality of column electrodes to which a signal voltage is applied, arranged so as to intersect each row electrode, one of each row electrode and one of each column electrode
A method for driving a liquid crystal display device having a liquid crystal layer that responds to a voltage value applied to one of each row electrode and one of each column electrode at an intersection with one, For each of the multiple horizontal scanning periods set to
A plurality of column electrodes are set as one unit and a correction voltage is applied to each of the plurality of units. The number of times the correction voltage is applied to each of the plurality of units increases from one end of each row electrode to the other end. A method for driving a liquid crystal display device, comprising: 2. The method for driving a liquid crystal display device according to claim 1, wherein the correction voltage is given by a pulse signal, and the correction voltage amount is changed stepwise by pulse modulation. 3. The method of driving a liquid crystal display device according to claim 2, wherein the interval of the correction voltage amount changed stepwise can be expanded or contracted. 4. A plurality of row electrodes to which a scanning voltage is applied,
A plurality of column electrodes, which are arranged so as to intersect each row electrode, to which a signal voltage is applied, a scanning drive IC that applies a voltage to each row electrode, and a signal drive I that applies a voltage to each column electrode
A liquid crystal display having C and a liquid crystal layer responsive to a voltage value applied to one of the row electrodes and one of the column electrodes at the intersection of one of the row electrodes and one of the column electrodes. The device, for each of a plurality of horizontal scanning periods set within the vertical blanking period,
A plurality of column electrodes are used as one unit to generate correction voltages to be applied to each of the plurality of units, and the number of times the correction voltage is applied to each of the units is increased from one end of each row electrode to the other end. A liquid crystal display device, comprising: