JP3478609B2 - Timing system - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a timing system,
In particular, the present invention relates to a timing system for adjusting a clock provided in a controller connected to a management center to an accurate time.

[0002]

2. Description of the Related Art In a system in which a plurality of controllers are connected to a management center, each controller may control the time of a controlled device by a clock provided in its own device. For example, in a controller such as a cash corner, time control of an opening / closing store such as opening and closing a shutter and blinking a light is performed based on a clock provided in the controller.

[0003]

If the timepiece provided in the controller as described above fails, the controller will not open and close at the correct time. The present invention includes a management center having a timekeeping function,
In a timing system that includes a controller that controls the time of a controlled device and a communication line that connects the management center and the controller, if a failure occurs in a clock that the controller has, it is promptly handled. To enable accurate time management to continue and
The purpose is to make it possible to automatically correct the clock of the controller.

[0004]

In order to achieve the above object, the present invention provides a management center having a timekeeping function, a controller for controlling the time of a controlled device, and communication for connecting the management center and the controller. In a timing system including a line, a master clock used for time management of the controller, a sub clock, detection means for detecting abnormality of the master clock, and the detection means detects abnormality of the master clock. And a switching means for switching the time control in the controller from the master clock to the sub clock, and after the switching by the switching means is completed, the timekeeping data from the management center is fetched into the master clock via the communication line. And means are provided.

[0005]

During operation of the controller, the timekeeping data of the master clock is constantly checked by the detecting means. For example, when the master clock is stopped, or when the timekeeping data of the master clock shows an improbable value of 61 seconds, which should be a value of 00 to 59 seconds, the detection means detects an abnormality of the master clock. To do.

When the detection means detects an abnormality in the master timepiece, the switching means switches the timekeeping function of the time management of the controller from the master timepiece to the sub timepiece. Therefore, even if an abnormality occurs in the master clock, the controller continues accurate time management. Further, after the switching from the master clock to the sub clock is completed, the correcting means clocks the master clock to an accurate time according to the clock data from the management center. After this time adjustment, the clock on which the time management of the controller is based is switched from the sub clock to the master clock again.

[0007]

Embodiments of the timing system of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram of the timing system of the present invention applied to a cache corner. In the figure, 1 is a management center, 2 is a controller forming a cache corner, and 3 is a communication line connecting the management center 1 and the controller 2. Although a plurality of controllers 2 are normally connected to the management center 1, only one controller 2 is shown in this figure.

The management center 1 has a main clock 4. The controller 2 has an RTC (real time clock) 5 which is a hard clock as a master clock. 6
Is a CPU. The shutter controller 7 that controls the opening and closing of the shutter and the illumination controller 8 that controls the blinking of the illumination are controlled based on the time measurement data indicated by the RTC 5.

A memory 9 stores programs, data and the like. An interface 10 connects the RTC 5, the shutter controller 7, and the illumination controller 8 to the CPU 6. FIG. 1 is a block diagram showing a timing system of the present invention. The clocked data of the RTC 5 is sent to the memory A and the switching means 21. A soft clock 22 is prepared as a sub clock in the CPU 6. Switching means 21
Switches the timing data of the RTC 5 or the soft clock 22 to switch the shutter controller 7 and the illumination controller 8 from each other.
Send to.

There are provided a memory B for storing the contents of the memory A at predetermined time intervals, and reference data 31 for checking abnormality of the timekeeping data. As the reference data, 00 to 99 for the year, 00 to 12 for the month, 00 to 31 for the day, 00 to 23 for the hour, and 00 to 23 for minutes and seconds in the clock data Values of 00 to 59 are prepared.

For the day, the last day corresponding to each month, for example, 28 days in February (29 days in a leap year)
Sunday), November 30th, December 31st. The clock data stored in the memory A, the data stored in the memory B, and the reference data 31
Is input to the detection means 23.

The detecting means 23 outputs a switching signal to the switching means 21 and outputs time measurement data to the soft timepiece 22.
The switching means 21 switches and connects the RTC 5 and the soft clock 22 to the shutter controller 7 and the illumination controller 8. Further, it outputs a signal to the correction means 24.

The correction means 24 is connected to the main clock 4 and the RTC 5 of the management center 1. Next, the operation of the timing system of FIG. 1 will be described with reference to the flowcharts of FIGS. First, the initial operation will be described. In step S1, an initial value 0 is set in the counter P that counts up by "1" every 200 ms.

In step S2, the timekeeping data is read from the RTC 5 and the data is stored in the memory A. As this timekeeping data, ○ year ○ month ○ day ○ hour ○ minute ○ second
Items up to the second are used. In the initial operation,
The value of the memory A is transferred to the memory B by proceeding from step S3 to step S4. In step S5, P = 1 is set, and the flow advances to step S6 to wait for 200 ms.

After the lapse of 200 ms, the following steady operation is performed following the above initial operation. As a steady operation, the case where there is no abnormality in the RTC 5 will be described first. In step S2, the time measurement data is read from the RTC 5 and the data is stored in the memory A. After that, step S3,
The process proceeds from step S7 to step S8.

If the RTC 5 is normal and no abnormality is detected in step S8, steps S9 to S10 are performed.
Then, P = P + 1 is set, and at step S6, the next 200
Wait for ms. When 200 ms has elapsed, the process proceeds to step S2 again, and thereafter, the same operation is repeated until P = 6. When P = 6, the process proceeds from step S7 to step S11.

In step S11, the value in memory A and the value in memory B are compared. Here, if there is no abnormality in the RTC 5, the value of the memory A in which the latest timing data is stored is large. Step S
When P = 6 in 9, the process proceeds to step S4, the value of the memory A is transferred to the memory B, and P = 1 is set in step S5.
The process proceeds to step S6 and waits for the next 200 ms.

Thereafter, the same operation is repeated. next,
The case where an abnormality occurs in the RTC 5 will be described. First, an abnormal value (for example, 61
A case of indicating a value of second) will be described. In step S8, the detection means 23 compares the value of the memory A with the reference data 31. As mentioned above, the standard data is 00-99 for the year and 00-99 for the month.
12, 00-31 corresponding to the calendar of the month for the day,
00-23 for minutes, 00-59 for minutes and seconds
Value is prepared.

The detection means 23 determines the year, month, day, hour,
Check whether the value for each item of minute and second is within the range of the value of the reference data. For example, when a value such as 61 seconds is obtained, it is determined that the timekeeping data is abnormal, and the process proceeds to step S13. In step S13, 0.
2 (= 200 ms) × P is calculated and stored in the register α, and the process proceeds to step S14. In step S14, α calculated in step S13 is added to the value of the memory B.

Explaining the reason why this calculation is performed, the value of the memory A shows an abnormal value at the present time, but the value of the memory B was a normal value at the time of reading into the memory B. Then, the counter P indicates the number of times of waiting for 200 ms (0.2 seconds) after being read into the memory B. Therefore, α = 0.2 × P indicates the elapsed time, and B
+ Α indicates the current normal time.

In step S15, the calculated present time is transmitted from the detecting means 23 to the software timepiece 22. In step S16, the output of the detection means 23 causes the switching means 21 to switch from the RTC 5 to the software timepiece 22.
The time control of the shutter controller 7 and the illumination controller 8 is performed based on the time measurement data obtained from the soft timepiece 22. Then, it progresses to step S17.

In step S17, the correction means 24 obtains the correct time from the main clock 4 of the management center 1 via the communication line 3 and clocks the RTC 5. In step S18, the switching means 21 switches from the soft clock 22 to the RTC 5 after the time adjustment by the correcting means 24 is completed. After that, in the controller 2, time control of the shutter controller 7 and the illumination controller 8 is performed based on the time measurement data of the RTC 5.

Next, the case where the RTC 5 is stopped, which is another abnormality of the RTC 5 in this embodiment, will be described. As described above, when P = 6, step S
It progresses from 7 to step S11. In step S11, the value of memory A and the value of memory B are compared. At this time, P
= 6, the time interval between the value of the memory B and the value of the memory A is 200 ms × 6, which is 1.2 seconds. Therefore,
If normal, A> B. However, when the RTC5 is stopped, the output timing data does not change,
Even after 1.2 seconds have passed, the value of the memory A is equal to the value of the memory B. Therefore, step S1
If 1 is not A> B, it is determined that an abnormality has occurred in the RTC 5, and the process proceeds to step S12.

In step S12, 1.2 (seconds) is stored in the register α, and the process proceeds to step S14. In step S14, the current time is calculated by adding the register α to the value stored in the memory B, as in the above-described operation. The operation after step S14 is as described above. The embodiments of the present invention have been described above,
The present invention is not limited to the above embodiments, but various modifications can be made.

For example, in the above embodiment, there are cases where the RTC 5 is stopped or the timekeeping data is incorrect and the data in the memory B is large, that is, when the timekeeping data is delayed, and an abnormal value which is impossible as the timekeeping data is indicated. Although both abnormalities can be detected, only one of them can be the target of abnormality detection and the other can be omitted. Further, the method of detecting the abnormality of the master timepiece is not limited to the above two examples, and any detecting means can be adopted.

Further, although an example in which each functional means, master clock and sub clock are provided on the controller 2 side has been described, it is possible to change some of these to be provided on the management center 1 side. . The communication line connecting the management center 1 and the controller 2 may be wired or wireless.

[0027]

According to the present invention, there is provided a timing system comprising a management center having a timekeeping function, a controller for controlling the time of a controlled device, and a communication line connecting the management center and the controller. Even if there is an abnormality in the timekeeping data of the clock held by the controller, it can be detected promptly and accurate time management can be continued. The present invention can also automatically correct the timekeeping data of the clock of the controller in which the abnormality has occurred.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an embodiment of a timing system of the present invention.

FIG. 2 is a device configuration diagram of the timing system of the present invention.

FIG. 3 is a flowchart (part 1) explaining the operation of the system of FIG.

FIG. 4 is a flowchart (part 2) explaining the operation of the system of FIG.

[Explanation of symbols]

1 ... Management Center 2 ... Controller 3 ... communication line 4 ... Main clock 5 ... RTC 6 ... CPU 7 ... Shutter controller 8 ... Lighting controller 9 ... Memory 10 ... Interface 21 ... Switching means 22 ... Soft clock 23 ... Detection means 24 ... Correction means 31 ... Standard data

Claims (2)

(57) [Claims] 1. A time management system comprising a management center having a timekeeping function, a controller for controlling the time of a controlled device, and a communication line connecting the management center and the controller. Used for the master clock, sub clock, detection means for detecting abnormality of the master clock, when the detection means detects abnormality of the master clock, the time control in the controller from the master clock to the sub clock. Switching means for switching to a clock, and after the switching by this switching means is completed,
A time adjustment system comprising: a correction unit that takes in timekeeping data from the management center into the master clock via the communication line. 2. The detecting means, when detecting an abnormality of the master timepiece, calculates timekeeping data in which the timekeeping data of the master timepiece before the abnormality occurs is advanced by a predetermined time,
2. The timekeeping system according to claim 1, wherein the timekeeping operation of the sub clock is started based on the timekeeping data.