JP3452187B2 - Communication initialization method for failure diagnosis device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a failure diagnosis apparatus for diagnosing an ISO standard diagnosis program or the like of a vehicle-mounted failure diagnosis apparatus by a failure diagnosis apparatus main body constituted by a personal computer. It relates to a communication initialization method. 2. Description of the Related Art Some diagnosis programs for conventional vehicle-mounted failure diagnosis devices have a protocol for initialization which is not suitable for a multitasking personal computer as is currently used. FIG. 4 shows an example of the conditions for initializing a diagnostic program according to ISO standard 14230-2. Initialization and required diagnostic data are transmitted as a command from the diagnostic device body to the diagnostic circuit on a communication line 40 between the diagnostic device main body and a vehicle-mounted diagnostic circuit (not shown). Then, after the delay time 50 elapses at the base voltage, 25 ms ± 1 m at the initializing low voltage 51.
s, the time 53 including the initial low voltage time after returning to the original base voltage is 50 ms ± 1 ms, and the request data Pd
Is transmitted, the diagnostic program of the diagnostic circuit determines that a legitimate request has been made. If this condition is not fulfilled, the diagnostic program of the in-vehicle diagnostic circuit will not be initialized and will not be communicated. This is a condition with no particular problem on a single-task computer. [0005] FIG. 5 shows a multitasking computer or an initialization state in a vehicle-mounted diagnostic circuit by a personal computer. After the delay time 50, error times 51E and 53E occur in the initialization low voltage 51 and the time 53 including the original base voltage, respectively. This error time occurs when the operating system (OS) performs multitask processing, and is almost inevitable when a general-purpose personal computer is used. And the error time is 1ms
In the above, communication failure occurs in the diagnostic program of the ISO standard. In actual multitasking, a plurality of diagnostic programs are further executed in parallel with other application programs, so that there is a lot of error time of 1 ms or more, so that communication is not established. SUMMARY OF THE INVENTION The present invention has been proposed in view of the above-mentioned problems of the prior art, and has been developed in accordance with the ISO standard and a similar initialization method. It is an object of the present invention to provide a communication initialization method for a diagnostic device. According to the present invention, there is provided a diagnostic processing system (Dg) for connecting a diagnostic machine main body (Dg) with a diagnostic target vehicle (not shown). 1)
The diagnostic processing system (1) has a CPU
(24) and a control unit (2) having a RAM (29)
4A) is a communication initialization method in the failure diagnosis device (100) provided with 4A), wherein the control unit (24A) receives a command related to communication initialization and outputs a low voltage for a predetermined time (A6) (step S1) Then, the base voltage is output for a predetermined time (A7) (step S6),
The elapsed time of the sum of the activation times (A8 = A6 + A7) is confirmed (set time elapsed determination step: step S4). If the request data (Pd) is received during the period (step S2), the data (Pd) is received. ) To RAM (2
9) and save it (RAM request transmission step: step S3), and confirm the elapse of the startup time (step S4).
If there is stored data later (step S7), the stored data (A9) is sequentially output one byte at a time (CPU request data transmission step: step S8). Communication control of the diagnostic processing system, command communication, storage of request data in RAM,
Transmission to the PU and the like are performed by a program stored in a ROM in the diagnostic processing system. The above makes it possible to communicate a diagnostic program created in accordance with the ISO standard with a general-purpose multitasking personal computer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a failure diagnosis device according to the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of the failure diagnosis device 100. In FIG. 1, a failure diagnosis device 100 includes a diagnosis machine body Dg outside a vehicle and a diagnosis system 1 surrounded by a dotted line. The diagnostic processing system 1
A first connector 2 connected to a failure diagnosis circuit Cg, which is an in-vehicle failure diagnosis device; a conversion unit 1A for converting a signal into a predetermined format in the diagnosis processing system 1;
and a second connector 31 connected to the g. The diagnostic device main body Dg is configured based on a general-purpose personal computer. The first connector 2 is a connection means for matching the connector of the vehicle-side communication circuit bus Bs, and includes a plurality of on-board failure diagnosis circuits connected to the bus Bs, for example,
Fault diagnosis circuit for electronic control of engine operation, ABS
-It has a failure diagnosis circuit for braking start such as ASR, and a connection function with others. The conversion section 1A includes a first signal conversion means 46.
The signal input / output circuit switching means 10 and the control unit 24
A, first and second communication means 21 and 23, voltage detection means 22, and second signal conversion means 30. The first signal converter 46 includes a first signal converter 4 and a second signal converter 6, each of which is connected to a unique failure diagnosis circuit Cg via the first connector 2. . In FIG. 1, the first signal conversion device 4 is connected to a first failure diagnosis circuit Cg1, and the second signal conversion device 6 is connected to a second failure diagnosis circuit Cg2. The level of the voltage, the current, and the like are increased or decreased as necessary to make them uniform. Note that the above signal conversion device
Although the first and second signal converters 4 and 6 are used for simplicity of description, it is appropriate that the number is equal to the number of failure diagnosis circuits Cg. The signal input / output circuit switching means 10 includes first and second signal conversion devices 4 and 6 in the first signal conversion means 46.
Has a function of a switch for connecting any one of them to the first communication means 21. The control unit 24A comprises a communication control means 24 which is a CPU, a ROM 28 and a RAM 29, and has a main function of communication control for communication with the diagnostic machine main body Dg and the failure diagnosis circuit Cg. That is, the first communication unit 21 is controlled by the communication control unit 24 according to the control command.
It is configured to communicate with the failure diagnosis circuit Cg. Second
The communication means 23 is configured to communicate with the diagnostic device main body Dg according to a control command of the communication control means 24. The communication control means 24 which is a CPU includes:
The second communication means 21 and 23 are controlled to perform communication, and signals inputted from the first and second communication means 21 and 23 are analyzed using the ROM 28 and the RAM 29 to analyze data signals, control commands, and the like. If necessary, it is configured to have a function of changing the specification to have compatibility as a communication signal. The voltage detecting means 22 determines whether the failure diagnosis circuit Cg is operating via the first connector 2 based on the presence or absence of a voltage, and receives power from the vehicle via the signal line 22a to receive the first signal. , Second communication means 21, 2
3 and a function of supplying power to the control unit 24A. The ROM 28 stores the first and second communication means 21
, A control command and a data signal which are input to the converter 23, a program for compiling a predetermined format, comparison data required by the program, a procedure required for transmission and reception of a signal, and the like are built-in. It is configured as the center of the The RAM 29 has a function of storing data at the time of arithmetic processing for operating the communication control means 24 and a function of inputting / outputting data when necessary. The second signal conversion means 30 has a digital signal conversion function for converting into data necessary for communication between the second communication means 23 and the diagnostic device Dg. The operation of the fault diagnostic apparatus 100 having the above configuration will be described with reference to the flowchart of FIG. 2 and the schematic diagram of the communication initialization method of FIG. In step S1, the diagnostic device main body Dg
Issues a command for initialization. The command is to hold the low-voltage predetermined time A6 at t0 after the delay time A5 has elapsed, and then hold the base voltage for the predetermined time A7 to calculate the sum of the low-voltage time A6 and the base voltage time A7 at t3 of the activation time A8. It is an instruction. In the ISO correspondence of this example, the low voltage time A6 is 25 ms ± 1 ms, and the start time A8, which is the sum of A6 and A7 after returning to the base voltage, is 50 ms ±
It is instructed to be 1 ms. Then, initialization is executed according to the command. The step of receiving this command by the diagnostic processing system 1 is a command receiving step. In step S2, it waits for interrupt reception of request data to be transmitted during the command receiving step. Then, the diagnostic device main body Dg transmits the request data Pd at time t1. If the interrupt on the side of the diagnostic processing system 1 is YES, the process proceeds to step S3.
In step S3, the request data Pd is stored in the RAM 29
Is written and saved. This transmission to the RAM 29
This is a RAM request transmission step. In step S5 for waiting for an interruption of NO, the low voltage time A6 is counted, and when the low voltage time A6 has elapsed, the base voltage time A7 is executed in step S6, and the flow proceeds to step S4. In step S4, an initialization start time A8
Is counted, and a predetermined time elapse time t3 is confirmed. If NO is less than the elapsed time t3, the process returns to step S2 to continue receiving the request data Pd. Predetermined startup time A
When the time 8 has elapsed and the time t3 has elapsed, the process proceeds to step S7.
At time t1 in FIG. 3, the request data Pd is received and R
The time at which input to the AM is started is indicated, and the time t2 indicates the reception completion time. Time t1 to time t2 is the reception time. The elapse time count of the initialization start time A8 and the elapse determination of the predetermined time in the above are the set time elapse determination step. In step S7, it is confirmed that the request data Pd is stored in the RAM 29. Suppose, NO
If so, this operation ends. If save is YES,
Go to step S8. Step S8 to step S10
Is reproduction of the request data Pd. In step S8, the request data Pd in the RAM 29 is transferred from the time t3 to the in-vehicle diagnostic circuit Cg at time CP.
Transmit via U24A. One byte of request data Pd is transmitted from time t3 of the initialization elapsed time A8. Since the first one-byte transmission is the initialization elapsed time A8, that is, 50 ms ± 1 ms, the diagnostic circuit of the ISO standard recognizes that the command is a legitimate command. In step S9, the remaining request data P
Check d. If YES, the process goes to step S10, and if NO without data, the operation ends. In step S10, it is checked whether or not the transmission data from the RAM 29 is at a communication speed and communication interval suitable for reception of the diagnostic circuit Cg of the transmission destination. If yes,
Returning to step S8, transmission is continued. If the data transmission specification is conforming NO, it is modified to conforming specification. Thus, the request data A9 in FIG. 3 is transmitted to the diagnostic circuit Cg. The step of transmitting the request data Pd once stored in the RAM 29 to the CPU 24 is a CPU request data transmission step. And
In response to the request data A9, the diagnostic circuit Cg responds with the response data A10, and the diagnostic device body Dg diagnoses each unit of the vehicle. The effects of the present invention will be listed below. (1) According to the failure diagnosis apparatus of the present invention,
The diagnostic device body and the vehicle-mounted diagnostic circuit are connected by a diagnostic processing system that executes an initialization data pattern of the ISO standard, so that off-board diagnosis can be performed outside the vehicle. Further, this diagnostic processing system allows the diagnostic machine main body to be constructed with an inexpensive general-purpose personal computer. (2) Since data including commands from the diagnostic device main body can be temporarily stored in the RAM, protocols other than the ISO standard can be freely dealt with by a program in the ROM. (3) The communication processing between the diagnostic device main body and the on-vehicle diagnostic circuit can be freely optimized for the transmission speed and transmission interval according to the diagnosis object by the diagnostic processing system. The diagnostic speed of the entire diagnostic circuit can be increased. You.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block configuration diagram of a failure diagnosis device according to an embodiment of the present invention. FIG. 2 is a flowchart for explaining the operation of FIG. 1; FIG. 3 is a diagram schematically showing a communication initialization pattern by the failure diagnosis device of FIG. 1; FIG. 4 is a diagram showing a communication initialization pattern according to the ISO standard. FIG. 5 is a diagram schematically showing a state in which a time error appears in an initialization pattern due to multitasking of the diagnostic device main body. [Description of Signs] 100 ··· Failure diagnosis device Dg ··· Diagnosis device main body Cg ··· In-vehicle (on-board) failure diagnosis device, circuit generic name 1 ··· failure processing system 1A ··· conversion unit 2 ··· first Connector 4 ... first signal converter 6 ... second signal converter 10 ... signal input / output circuit switching means 21 ... first communication means 22 ... voltage detection means 22a ... Wire 23 ... second communication means 24 ... CPU, communication control means 24A ... control unit 28 ... ROM 29 ... RAM 30 ... second signal conversion means 31 ... second Connector 46 of the first signal conversion means

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-7-212431 (JP, A) JP-A-2-112771 (JP, A) JP-A-6-161541 (JP, A) (58) Survey Field (Int.Cl. ⁷ , DB name) G05B 23/00-23/02 B60S 3/00-13/02

Claims (1)

(57) [Claims 1] A diagnostic machine main body (Dg), and a diagnostic processing system (1) for connecting the diagnostic machine main body (Dg) and a vehicle to be diagnosed, and a diagnosis thereof. The processing system (1) is a communication initialization method in a failure diagnosis device (100) including a control unit (24A) having a CPU (24) and a RAM (29), wherein the control unit (24)
According to A), a command related to communication initialization is received, and a low voltage is output for a predetermined time (A6) (step S1), and thereafter, a base voltage is output for a predetermined time (A7) (step S1).
6), it is confirmed that the total activation time (A8) has elapsed (step S4). If the request data (Pd) is received during that period (step S2), the data (Pd) is stored in the RAM (29). ) And save it (step S3). If there is saved data after the start time elapse confirmation (step S4) (step S7), the saved data (A)
9) sequentially outputting one byte at a time (step S8).