JP3449361B2 - Manufacturing method of liquid crystal display device - Google Patents

Manufacturing method of liquid crystal display device

Info

Publication number
JP3449361B2
JP3449361B2 JP2001068983A JP2001068983A JP3449361B2 JP 3449361 B2 JP3449361 B2 JP 3449361B2 JP 2001068983 A JP2001068983 A JP 2001068983A JP 2001068983 A JP2001068983 A JP 2001068983A JP 3449361 B2 JP3449361 B2 JP 3449361B2
Authority
JP
Japan
Prior art keywords
signal wiring
liquid crystal
crystal display
scanning signal
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2001068983A
Other languages
Japanese (ja)
Other versions
JP2001318393A (en
Inventor
英嗣 山元
裕 南野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2001068983A priority Critical patent/JP3449361B2/en
Publication of JP2001318393A publication Critical patent/JP2001318393A/en
Application granted granted Critical
Publication of JP3449361B2 publication Critical patent/JP3449361B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)

Description

【発明の詳細な説明】 【0001】 【発明の属する技術分野】本発明は、薄膜トランジスタ
を用いたマトリックス型液晶表示装置の静電気等による
異常な高電圧による素子破壊を防止し、性能劣化や生産
性向上および歩留りの向上を図るものである。 【0002】 【従来の技術】液晶表示装置はガラス基板をベースに、
その表面上に導電膜、絶縁膜を順次形成し、フォトレジ
ストをマスクにしてパターンを形成していくため、その
製造工程では静電気等による帯電が生じ易く、異常な高
電圧(以降、サージ電圧と称す)が発生し、画素を構成
する薄膜トランジスタの破壊や配線の損傷を引き起こ
す。 【0003】そこで、従来の液晶表示装置では図3に示
すように、映像信号配線群3および走査信号配線群5を
液晶表示パネル1の外周にて接続してある。これによ
り、液晶表示パネル製造工程で、静電気等によるサージ
電圧が発生しても、その影響は特定の映像信号配線ある
いは走査信号配線に集中せず、画面全体に分散するた
め、画素領域内の薄膜トランジスタ7、液晶セル8およ
び蓄積容量9等の破壊的なダメージにならない。例え
ば、静電気により外部よりQ0の電荷が特定の走査信号
配線にのみ流入した場合、走査信号配線の1ラインあた
りの容量がCg0とすると、次式のように、 Vg1=Q0/Cg0 電圧Vg1が特定の走査信号配線に印加されることにな
るが、前述のように走査信号配線群を接続してる場合、
その走査信号配線群の有する容量は、1ラインあたりの
容量(Cg0)の走査信号配線の本数(N本)倍にな
り、次式のように Vgall=Q0/N×Cg0=Vg1/N 電圧Vgallが印加される。これは、電圧Vg1のN
分の1であり、印加電圧の低減、素子破壊の防止ができ
る。 【0004】 【発明が解決しようとする課題】しかしながら、上記構
成のように映像信号配線や走査信号配線が接続された状
態では、画像表示が不可能なため、液晶表示パネル製造
工程中、例えばガラス基板から液晶表示パネルを切り出
すとき、同時に映像信号配線群や走査信号配線群の接続
を切り放し、それぞれの配線に分離する。 【0005】したがって、これ以降の工程、例えば、液
晶表示パネルの検査工程や外部駆動回路の実装工程で
は、静電気等によるサージ電圧の印加、素子破壊の問題
はそのままで解決されない。 【0006】そこで本発明は、映像信号配線または走査
信号配線が分離された後の、液晶表示パネルのサージ電
圧印加による破壊を防止するサージ保護回路を提供する
ことを目的とするものである。 【0007】 【課題を解決するための手段】この目的を達成するため
本発明は、複数の画素電極からなる画素領域と、走査信
号配線群と、映像信号配線群と、一端が前記走査信号配
または前記映像信号配線に接続される複数の高抵抗素
子または複数の非線形電圧電流素子と、前記高抵抗素子
または前記非線形電圧電流素子の他端が接続される共通
配線と、前記画素電極または前記映像信号配線または前
記走査信号配線との間に容量を形成する対向電極と、
記共通配線と前記対向電極とが接続されるポイントとを
有し、前記画素領域の外側で、かつ前記走査信号配線群
の端部および前記映像信号配線群の端部より内側の領域
に前記共通配線と前記高抵抗素子または前記非線形電圧
電流素子とが配置され液晶表示パネルを製造し、前記
液晶パネル外部駆動回路を実装し後に前記ポイント
を切り放すことを特徴とする液晶表示装置の製造方法で
ある。 【0008】共通配線を、外部駆動回路実装工程以降に
て、画素電極または映像信号配線または走査信号配線と
の間に容量を形成する電極から切り放す。 【0009】本発明の手段を用いることにより、映像信
号配線または走査信号配線から侵入するサージ電圧を低
減、画素内部の素子や配線の破壊を抑制でき、歩留りの
向上が図れる。また、外部駆動回路の実装後、サージ保
護回路を共通配線から切り放すことでリーク電流の低
減、消費電力の低減が可能である。 【0010】 【実施例】以下本発明の実施例について説明する。図1
は本発明の一実施例の液晶表示装置の構成概略図を示
す。従来例の図3と同一部分には、同一符号を付す。 【0011】図1に示したように画素領域2内の薄膜ト
ランジスタ7のゲート電極に接続する走査信号配線6、
および薄膜トランジスタ7のソース電極に接続する映像
信号配線4は、画素領域2の周囲で薄膜トランジスタ7
のソース電極に接続する画素電極9または映像信号配線
4または走査信号配線6との間に大きな容量を形成する
対向電極10に接続した共通配線11と交差する。これ
らの交差部に、ソース電極およびゲート電極が走査信号
配線6に接続された薄膜トランジスタ13とソース電極
およびゲート電極が共通配線11に接続された薄膜トラ
ンジスタ12のドレイン電極どうしを接続したサージ保
護回路14を構成する。 【0012】これらの薄膜トランジスタ12,13は、
ソース電極とゲート電極を共通としているため、図2に
示すようなダイオード電圧電流特性を持つ。すなわち、
印加電圧が電圧Vbより低下すると電流が急激に増加
し、導通状態となる逆方向特性を示す。通常、この電圧
Vbは液晶表示装置の駆動信号電圧より高く、数10ボ
ルト以上である。 【0013】したがって、通常の画素表示時は、サージ
保護回路14にはほとんど電流が流れず映像信号配線4
および走査信号配線6と共通配線11は絶縁されている
が、数10ボルト以上のサージ電圧が印加された場合、
サージ保護回路14に電流が流れ、映像信号配線4およ
び走査信号配線6と共通配線11は導通状態になり、サ
ージ電圧は対向電極10に吸収され、画素内部の素子に
は高電圧が印加されない。 【0014】ところで、液晶表示装置製造中の液晶表示
パネルへのサージ電圧は、外部駆動回路実装工程以降に
は直接侵入しない。また、映像信号配線4および走査信
号配線6と共通配線11の間にサージ保護回路14があ
ると、わずかではあるが電流が流れる。特に、バックラ
イト点灯時は光や温度上昇でサージ保護回路14のリー
ク電流の増加が生じ、対向電極の電位変動や、消費電力
の増加が起こる。そこで、液晶表示パネルへのサージ電
圧印加が生じない外部駆動回路実装工程以降またはモジ
ュール組立以降にサージ保護回路14を共通配線11か
らポイント15にて切り放し、共通配線11への電流の
流入をなくす。 【0015】なお、サージ保護回路14を構成する薄膜
トランジスタは、本実施例では画素内の薄膜トランジス
タと同一の構造を取っており、容易に形成できる利点が
あるが、他の構造、例えばMIM構造や半導体PN接合
を利用したダイオードであってもなんら差し支えない。 【0016】また、この液晶表示装置の製造方法は、サ
ージ保護回路14が高抵抗素子あるいはダイオードリン
グ等で形成されている場合により効果的である。 【0017】 【発明の効果】以上のように本発明は、液晶表示装置へ
のサージ印加電圧を抑制し、画素領域内の薄膜トランジ
スタや容量、あるいは配線へのダメージを防止し、歩留
り向上を可能にする。また、ダイオードの逆方向特性を
利用しているため、不要な電流を流すことがなく、各電
極の相互の干渉を抑え、消費電力を増加させない。 【0018】さらに、サージ保護回路を共通配線から切
り放すことで、リーク電流の影響を完全に除去できる。
Description: BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a matrix type liquid crystal display device using thin film transistors, which prevents device breakdown due to abnormally high voltage due to static electricity or the like, and degrades performance and productivity. It is intended to improve the yield and the yield. 2. Description of the Related Art A liquid crystal display device is based on a glass substrate.
A conductive film and an insulating film are sequentially formed on the surface, and a pattern is formed using a photoresist as a mask. In the manufacturing process, charging due to static electricity or the like is likely to occur, and an abnormally high voltage (hereinafter referred to as a surge voltage). ), Which causes the destruction of the thin film transistor constituting the pixel and the damage of the wiring. Therefore, in the conventional liquid crystal display device, the video signal wiring group 3 and the scanning signal wiring group 5 are connected on the outer periphery of the liquid crystal display panel 1, as shown in FIG. As a result, even if a surge voltage due to static electricity or the like is generated in the liquid crystal display panel manufacturing process, the influence is not concentrated on a specific video signal wiring or scanning signal wiring, but is dispersed over the entire screen. 7, does not cause destructive damage to the liquid crystal cell 8, the storage capacitor 9, and the like. For example, if the charge of Q0 flows into only a specific scanning signal line from the outside due to static electricity, and the capacitance per line of the scanning signal line is Cg0, then the following equation is obtained: Vg1 = Q0 / Cg0 The voltage Vg1 is specified. Is applied to the scanning signal lines, but when the scanning signal line group is connected as described above,
The capacitance of the scanning signal wiring group is multiplied by the number of scanning signal wirings (N lines) of the capacitance per line (Cg0), and as follows: Vgall = Q0 / N × Cg0 = Vg1 / N Voltage Vgall Is applied. This is the N of the voltage Vg1.
This is one-half, and the applied voltage can be reduced and the element can be prevented from being destroyed. However, in the state where the video signal wiring and the scanning signal wiring are connected as in the above configuration, it is impossible to display an image. When the liquid crystal display panel is cut out from the substrate, the connection of the video signal wiring group and the scanning signal wiring group is cut off at the same time and separated into respective wirings. Therefore, in the subsequent steps, for example, the inspection step of the liquid crystal display panel and the mounting step of the external drive circuit, the problem of application of surge voltage due to static electricity or the like and the problem of element destruction cannot be solved. It is an object of the present invention to provide a surge protection circuit for preventing a liquid crystal display panel from being damaged by application of a surge voltage after a video signal wiring or a scanning signal wiring is separated. According to the present invention, there is provided a pixel region including a plurality of pixel electrodes, a scanning signal wiring group, a video signal wiring group, and one end provided with the scanning signal wiring. Or, a plurality of high resistance elements or a plurality of non-linear voltage / current elements connected to the video signal wiring, a common wiring to which the other end of the high resistance element or the non-linear voltage / current element is connected, the pixel electrode or the image a counter electrode that forms a capacitance between the signal wiring or the scanning signal lines, before
The point at which the common wiring and the counter electrode are connected is
The common line and the high-resistance element or the non-linear voltage / current element are arranged outside the pixel region and in a region inside the end of the scanning signal line group and the end of the video signal line group. it is to produce a liquid crystal display panel, a manufacturing method of a liquid crystal display device, characterized in that detach the points after mounting the external drive circuit to the liquid crystal panel. [0008] The common wiring is cut off from an electrode forming a capacitor between the pixel electrode and the video signal wiring or the scanning signal wiring after the external drive circuit mounting step. By using the means of the present invention, it is possible to reduce a surge voltage intruding from a video signal wiring or a scanning signal wiring, suppress the destruction of elements and wirings inside pixels, and improve the yield. Further, after the external drive circuit is mounted, the surge protection circuit can be cut off from the common wiring to reduce leakage current and power consumption. An embodiment of the present invention will be described below. FIG.
FIG. 1 shows a schematic diagram of a configuration of a liquid crystal display device according to an embodiment of the present invention. The same parts as in FIG. 3 of the conventional example are denoted by the same reference numerals. As shown in FIG. 1, the scanning signal wiring 6 connected to the gate electrode of the thin film transistor 7 in the pixel region 2,
The video signal wiring 4 connected to the source electrode of the thin film transistor 7
And a common line 11 connected to a counter electrode 10 forming a large capacitance between the pixel electrode 9 or the video signal line 4 or the scanning signal line 6 connected to the source electrode. These intersections, the surge protection circuit 14 which is connected to the drain electrode to each other of the TFT 12 connected to thin film transistors 13 and the source electrode and the gate electrode to the scanning signal No. wiring 6 run the source electrode and gate electrode connected to the common wiring 11 Is composed. These thin film transistors 12 and 13 are:
Since the source electrode and the gate electrode are shared, the diode has a diode voltage-current characteristic as shown in FIG. That is,
When the applied voltage is lower than the voltage Vb, the current rapidly increases, and exhibits a reverse characteristic in which the conductive state is established. Usually, this voltage Vb is higher than the drive signal voltage of the liquid crystal display device and is several tens of volts or more. Therefore, during normal pixel display, almost no current flows through the surge protection circuit 14 and the video signal wiring 4
And the scanning signal wiring 6 and the common wiring 11 are insulated, but when a surge voltage of several tens of volts or more is applied,
A current flows through the surge protection circuit 14, the video signal wiring 4 and the scanning signal wiring 6 and the common wiring 11 become conductive, the surge voltage is absorbed by the counter electrode 10, and no high voltage is applied to the elements inside the pixel. By the way, the surge voltage applied to the liquid crystal display panel during the manufacture of the liquid crystal display device does not directly enter after the external drive circuit mounting step. Further, if the surge protection circuit 14 is provided between the video signal wiring 4 and the scanning signal wiring 6 and the common wiring 11, a small amount of current flows. In particular, when the backlight is turned on, a rise in light or temperature causes an increase in the leak current of the surge protection circuit 14, which causes a fluctuation in the potential of the counter electrode and an increase in power consumption. Therefore, the surge protection circuit 14 is disconnected from the common wiring 11 at the point 15 after the external drive circuit mounting process or after module assembly in which no surge voltage is applied to the liquid crystal display panel, so that the current does not flow into the common wiring 11. In this embodiment, the thin film transistor constituting the surge protection circuit 14 has the same structure as the thin film transistor in the pixel, and has an advantage that it can be easily formed. A diode using a PN junction does not matter at all. This method of manufacturing a liquid crystal display device is more effective when the surge protection circuit 14 is formed of a high resistance element or a diode ring. As described above, the present invention suppresses the surge voltage applied to the liquid crystal display device, prevents damage to the thin film transistor, the capacitor, or the wiring in the pixel region, and improves the yield. I do. Further, since the reverse characteristics of the diode are used, unnecessary current does not flow, interference between the electrodes is suppressed, and power consumption is not increased. Further, by disconnecting the surge protection circuit from the common wiring, the influence of the leakage current can be completely eliminated.

【図面の簡単な説明】 【図1】本発明の一実施例の液晶表示装置の構成概略図 【図2】同実施例のダイオード電圧電流特性図 【図3】従来例の液晶表示装置の構成概略図 【符号の説明】 1 液晶表示パネル 2 画素領域 3 映像信号配線群 4 映像信号配線 5 走査信号配線群 6 走査信号配線 7 薄膜トランジスタ 8 液晶セル 9 画素電極 10 対向電極 11 共通配線 12、13 薄膜トランジスタ(ソース電極とゲート電
極共通) 14 サージ保護回路 15 共通配線切断ポイント
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a configuration of a liquid crystal display device according to an embodiment of the present invention. FIG. 2 is a diagram of a diode voltage-current characteristic of the embodiment. FIG. Schematic diagram [Description of symbols] 1 Liquid crystal display panel 2 Pixel region 3 Video signal wiring group 4 Video signal wiring 5 Scanning signal wiring group 6 Scanning signal wiring 7 Thin film transistor 8 Liquid crystal cell 9 Pixel electrode 10 Counter electrode 11 Common wiring 12, 13 Thin film transistor (Common to source electrode and gate electrode) 14 Surge protection circuit 15 Common wiring disconnection point

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平3−296725(JP,A) 特開 平2−242229(JP,A) 特開 昭63−106788(JP,A) 特開 平5−333377(JP,A) (58)調査した分野(Int.Cl.7,DB名) G02F 1/136 ──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-3-296725 (JP, A) JP-A-2-242229 (JP, A) JP-A-63-106788 (JP, A) JP-A-5-205 333377 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) G02F 1/136

Claims (1)

(57)【特許請求の範囲】 【請求項1】 複数の画素電極からなる画素領域と、 走査信号配線群と、 映像信号配線群と、 一端が前記走査信号配線または前記映像信号配線に接続
される複数の高抵抗素子または複数の非線形電圧電流素
子と、 前記高抵抗素子または前記非線形電圧電流素子の他端が
接続される共通配線と、 前記画素電極または前記映像信号配線または前記走査信
号配線との間に容量を形成する対向電極と、前記共通配線と前記対向電極とが接続されるポイントと
を有し、 前記画素領域の外側で、かつ前記走査信号配線群の端部
および前記映像信号配線群の端部より内側の領域に前記
共通配線と前記高抵抗素子または前記非線形電圧電流素
子とが配置され液晶表示パネルを製造し、 前記液晶パネル外部駆動回路を実装し後に前記ポイ
ントを切り放すことを特徴とする液晶表示装置の製造方
法。
(57) [Claim 1] A pixel region including a plurality of pixel electrodes, a scanning signal wiring group, a video signal wiring group, and one end connected to the scanning signal wiring or the video signal wiring. A plurality of high resistance elements or a plurality of nonlinear voltage / current elements, a common wiring to which the other end of the high resistance element or the non-linear voltage / current element is connected, the pixel electrode or the video signal wiring or the scanning signal wiring, A counter electrode forming a capacitor between the common wiring and the point where the common electrode and the counter electrode are connected;
The common wiring and the high-resistance element or the non-linear voltage / current element are provided outside the pixel region and in an area inside an end of the scanning signal wiring group and an end of the video signal wiring group. method of manufacturing a liquid crystal display device manufactured arranged liquid crystal display panel, and wherein said to detach the points after mounting the external drive circuit to the liquid crystal panel.
JP2001068983A 2001-03-12 2001-03-12 Manufacturing method of liquid crystal display device Expired - Lifetime JP3449361B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001068983A JP3449361B2 (en) 2001-03-12 2001-03-12 Manufacturing method of liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001068983A JP3449361B2 (en) 2001-03-12 2001-03-12 Manufacturing method of liquid crystal display device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP34191492A Division JP3223614B2 (en) 1992-12-22 1992-12-22 Liquid crystal display

Publications (2)

Publication Number Publication Date
JP2001318393A JP2001318393A (en) 2001-11-16
JP3449361B2 true JP3449361B2 (en) 2003-09-22

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JP (1) JP3449361B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4306654B2 (en) * 2005-07-26 2009-08-05 カシオ計算機株式会社 Transistor array panel
JP4946042B2 (en) * 2005-12-26 2012-06-06 エプソンイメージングデバイス株式会社 Liquid crystal display
JP4816110B2 (en) * 2006-01-31 2011-11-16 ソニー株式会社 Liquid crystal display
US9691797B2 (en) 2014-04-08 2017-06-27 Sharp Kabushiki Kaisha Display device

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