JP3449007B2 - Multiplex communication device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplex communication device used in a vehicle or the like, and more particularly to a multiplex communication device for transmitting and receiving analog data.

[0002]

2. Description of the Related Art For example, in vehicle electrical equipment, a control unit controls a motor, a lamp and the like based on signals from various sensors arranged at a predetermined portion of the vehicle. Previously, the output signal of each sensor was input to the input port of the microcomputer installed in the control unit, but as the number of sensors increases as the vehicle becomes more sophisticated, there will be a shortage of microcomputer ports and wires. Due to problems such as enlargement of harnesses, the introduction of multiplex communication has recently been introduced.

FIG. 12 shows the configuration of such a conventional multiplex communication device. Control unit 401
Is a microcomputer 404 for processing data and a microcomputer 40.
4, a transmission / reception circuit 405 that outputs the output data from the communication line 403 to the communication line 403, and transfers the data obtained from the communication line 403 to the microcomputer 404, and a drive circuit 406 that controls the motors 407 and 407, the lamp 408, and the like. There is. The control unit 401 is the communication line 4
A plurality of sensor units 402, 402, ...
Connected with.

Each sensor unit 402 has a communication line 403.
A receiving circuit 409 for receiving the above signal, and a receiving circuit 409
A decoder 410 for decoding the signal obtained by
A control circuit 411 that controls based on the data obtained by the decoder 410, and an address setting unit 417 that sets a unique address for each individual sensor unit 402 are provided. The sensor unit 402 further provides A / D converters 415 and 416 for converting the voltages output from the externally connected sensors 419 and 420 into digital values, and outputs the outputs of the plurality of A / D converters to the control circuit 411. A multiplexer 414 for switching and outputting by
An encoder 413 that encodes a digital value obtained through the multiplexer 414, a transmission circuit 412 that outputs the data encoded by the encoder 413 to the communication line 403, and a clock generation circuit that generates the operation timing of each circuit described above. 418 and.

FIG. 13 shows an example of a communication format when the control unit 401 obtains the sensor output value from the sensor unit 402. On the control unit 401 side, the microcomputer 404 controls the transmission / reception circuit 4
First, a transmission start code 501 is issued via 05, followed by the address 5 of the sensor unit 402 to be transmitted.
02 is output to the communication line 403. Then, on the sensor unit 402 side, the receiving circuit 409 receives the signal from the control unit 401, and the decoder 410 decodes the signal.

The control circuit 411 has an address setting section 417.
When the address set in step 1 and the reception address 502 match, the transmission circuit 412 causes the transmission start code 503 and its own address 504 to be followed by data A 505 and data B 505.
506 is sent to the communication line 403, and control is sent back to the control unit 401. This reply data is
The encoder 4 outputs the output values of the sensors 419 and 420 digitally converted by the A / D converters 415 and 416.
It is coded by 13. When a plurality of sensors are installed as in this example, the control circuit 41
1 controls the multiplexer 414 to sequentially switch the output value of the sensor to be replied and continuously reply.

The reply data output from the sensor unit 402 to the communication line 403 is the control unit 401.
Of the microcomputer 404.
Is delivered to. The microcomputer 404 obtains the output value of the sensor by decoding this signal. When it is necessary to acquire data from a plurality of sensor units, the above operation is repeated while changing the transmission address. The microcomputer 404 uses the motor 407 based on the output value of a predetermined sensor.
The control contents of the lamp and the lamp 408 are determined, and the drive circuit 406 drives the motor and the lamp based on the control content.

[0008]

In the conventional multiplex communication device, as described above, since the output signal of the sensor is converted into a digital value and then transmitted / received, a control unit as a communication control means is provided. The higher the resolution required by, the larger the number of bits required for digital conversion of the sensor output, and the larger the reply frame of the sensor unit. As a result, especially when there are many sensors, there is a problem that the information obtained per unit time becomes small and the responsiveness deteriorates. Therefore, in view of the above conventional problems, the present invention provides a multiplex communication device that ensures high responsiveness even when the resolution required by communication control means such as a control unit is increased or the number of sensors is increased. The purpose is to provide.

[0009]

Therefore, the present invention provides the first aspect of the present invention.
In the multiplex communication device in which the communication control means of (1) and the second communication control means connected to the sensor that outputs the voltage as an analog value are connected by a communication line, the first communication control means generates a clock signal. A clock signal output means for sending the clock signal to the communication line, a data signal output means for outputting a data signal having the same frequency as the clock signal by superimposing it on the clock signal sent to the communication line, and synchronizing with the clock signal. And a signal processing means for reading the voltage level on the communication line, and the second communication control means extracts the clock signal from the received signal fetched from the communication line and the data signal from the received signal. , A timing generation means for processing the extracted data signal in synchronization with the extracted clock signal, and a predetermined signal generation means for the timing generation means. The output of the sensor superimposed on the clock signal of the communication line has been assumed and a sensor signal output means for outputting When outputting.

In particular, the clock signal output means sends the signal, which is obtained by alternately switching the potential of the communication line between the high potential and the low potential, to the communication line as a clock signal, and the data signal output means outputs the data to be output. weight according to a signal to change the height of the high potential of the clock signal, the sensor signal output means, the output of the sensor to the clock signal of the communication line
It is assumed to vary the height of the high potential of the communication line clock signal by tatami.

The above clock signal output means is
The communication line is connected to a constant voltage source via a pull-up resistor, and the first signal transistor is provided between the communication line and ground and is turned on / off in synchronization with a clock signal. A series circuit including a second transistor that is provided in parallel with the first transistor between the communication line and the ground, and is turned on / off in response to a pull-down resistor and a data signal. When the means outputs a predetermined signal,
An analog switch for connecting the output of the sensor and the communication line may be provided. Alternatively, among the above, particularly when the sensor signal output means outputs the predetermined signal by the sensor signal conversion means for converting the voltage value output from the sensor into a difference between two different voltage values and the timing generation means. , And an analog switch that sequentially connects the two outputs of the sensor signal conversion means to the communication line.

When a plurality of second communication control means are connected to the communication line, a unique address is set for each second communication control means , and the timing is set. The generation circuit detects a transmission start of the first communication control means when a predetermined signal sequence set in advance is received and a transmission start detection means, and after the transmission start detection means detects the transmission start, An output permission unit that permits the output of the sensor signal output unit only when the signal string indicating the address is received can be provided.

Similarly, when a plurality of second communication control means are connected to the communication line, a unique address is set for each second communication control means , and the timing generation circuit is , A transmission start detecting means for detecting the start of transmission of the first communication control means when a predetermined signal sequence set in advance is received, and the transmission start detecting means determines the start of transmission and then determines by its own address It is also possible to provide an output permission unit that permits the output of the sensor signal output unit when counting the predetermined number of clocks.

[0014]

[Action] In the second communication control means, communicating by Rukoto superimposed on the clock signal remains communication line of analog value output sensor signal output means of the sensor when the timing generating means is outputting a predetermined signal High potential on the line
Change the height . As a result, the value of the output of the sensor can be obtained from the pulse amplitude on the side of the first communication control means that receives it, and the value can be obtained with a relatively small communication frame regardless of the resolution required for each communication control means. The sensor signal is transmitted.

Particularly, when the sensor signal output means converts the voltage value output from the sensor into a difference between two different voltage values and the two outputs are sequentially connected to the communication line by an analog switch, a during one of the communication control means and the second communication control unit - even if the difference in the ground potential occurs, it is possible to obtain an accurate sensor output in the first communication control unit side.

Further, in the case where the second communication control means are plural, when each second communication control means counts a predetermined number of clocks determined by its own address, the output permission means outputs the sensor signal. If the output of the means is permitted, the sensor signals of all the second communication control means can be obtained from the first communication control means by issuing a single transmission request, so that the communication frame Particularly small.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of the first embodiment of the invention. The control unit 101 as the first communication control means uses the communication line 1
, Are connected to a plurality of sensor units 102, 102, ... As second communication control means. The control unit 101 includes a microcomputer 104 that outputs a clock signal and performs data processing, and a microcomputer 10
A transmission / reception circuit 105 that outputs a clock signal or a data signal from the communication line 103 to the communication line 103 and transfers the signal from the communication line 103 to the microcomputer 104, and a drive circuit 106 that controls the motors 107 and 107, the lamp 108, and the like. ing.

In each sensor unit 102, first, a clock / data separation circuit 109 for separating a clock signal and a data component from a signal on a communication line, and a data component (reception data signal) R obtained from the clock / data separation circuit 109.
Similarly, XDATA is used for the clock / data separation circuit 109.
Clock component (extracted clock signal) RXC obtained from
A decoder 110 that decodes in synchronization with LK, and an output control counter 111 that is reset when the decoder 110 detects a transmission start code described later and counts up in synchronization with the extracted clock signal RXCLK are provided.

The sensor unit 102 further compares the address setting unit 112 for setting a unique address for each individual sensor unit with the received address obtained from the decoder 110 and the address set by the address setting unit 112, and when they match. When the value of the address comparison circuit 113 that outputs an address match signal to the output control counter 111 indicates a predetermined value set for each, and the address comparison circuit 113 is outputting the address match signal, it is connected to the outside. Circuit 11 for outputting the output voltages of the detected sensors 118 and 119 to the communication line 103 by analog values, respectively.
4, 115 are provided.

FIG. 2 shows details of the transmission / reception circuit 105 in the control unit 101. The communication line 103 is
It is connected to a constant voltage source of 12V via a pull-up resistor R1, and a transistor Tr1 which is turned on / off by a clock signal TXCLK from an output port of the microcomputer 104 is connected between the communication line 103 and ground. There is. Further, a series circuit including a transistor TR2 and a pull-down resistor R2 having a resistance value similar to that of the pull-up resistor R1 is connected in parallel with the transistor TR1 between the communication line 103 and the ground. This transistor Tr2 is connected to the NR from the output port of the microcomputer 104.
ON / OFF by data signal TXDATA of Z code
To do. Further, the signal on the communication line 103 is converted into a reply signal RX of a voltage level that can be input to the microcomputer 104 by the resistors R3 and R4 having a resistance value sufficiently larger than the pull-up resistors R1 and R2, and the microcomputer 104 is converted. Is input to the A / D port of.

Next, FIG. 3 shows details of the output circuit 114 (and 115) in the sensor unit 102. The output signal of the sensor 118 (119) is impedance-converted by the voltage follower 124 and input to the adding circuit 127. The adding circuit 127 includes an operational amplifier 125, four resistors R5 to R8 having the same resistance value, and a 7V constant voltage source 126. As a result, the adder circuit 12
7 has a constant voltage of 7V added to the sensor output of 0 to 5V.
The analog voltage value of ~ 12V is output.

The output of the adder circuit 127 is the inverter 12
8 is input to the complementary analog switch 129. The analog switch 129 outputs the address coincidence signal and outputs the output permission signal when the value of the output control counter 111 reaches the set predetermined value.
When it is output through 6 (117), it becomes conductive. Then, the output of the adder circuit 127 that has passed through the analog switch 129 is sent to the communication line 103 via the resistor R9. The resistor R9 is the control unit 101.
It is provided for limiting the current when the transistor Tr1 is turned on.

Here, the principle of encoding the transmission / reception signal in this embodiment will be described. First, in encoding a digital value, as shown in FIG.
Two judgment levels L (VH>VL> 0) are set,
A pulse having an amplitude of VH or more is defined as "H", and a pulse having an amplitude of VL or more and less than VH is defined as "L". That is,
In the case of data transmission in the control unit 101, if the transistor Tr2 is turned off when the transistor Tr1 is off, the potential on the communication line 103 is 12
If the transistor Tr2 is turned on while the transistor Tr1 is off, the potential of the communication line 103 becomes 1
It is an intermediate value obtained by dividing 2V by resistors R1 and R2. Therefore, by setting the determination level VH to a value between 12 V and the intermediate potential and setting the determination level VL to a value lower than the intermediate potential, the data value is encoded corresponding to the potential on the communication line 103. The data can be identified by the receiving side.

When the transistor Tr1 is on, the communication line 10 is turned on regardless of whether the transistor Tr2 is on or off.
3 is forcibly grounded. Therefore, the clock signal TXCLK output from the microcomputer 104 of the control unit 101 turns on / off the transistor Tr1.
While repeating FF, the data signal TXDATA from the microcomputer 104 turns ON / OFF the transistor Tr2.
If F is performed, the pulse train having the above-mentioned two types of amplitudes will be output onto the communication line 103.

Note that here, in order to clarify the start of transmission, as shown in FIG.
One pulse train is used as a transmission start code, and as shown in (c), three pulse trains are used, "HHH" is data "00", "HLH" is data "01", and "HHL" is data "10". , And “HLL” as data “11”,
Two-bit binary data shall be defined.

FIG. 5 further shows details of the clock / data separation circuit 109 in the sensor unit 102. Comparators Cmp1 and Cmp2 are provided with their non-inverting inputs connected to the communication line 103. The resistor R1 is provided on the inverting input side of the comparators Cmp1 and Cmp2.
The voltage value VH due to the division of 0 and R11 and the resistances R12 and R12
The voltage values VL due to the distribution of 13 are input as reference values, respectively. However, VH and VL are the above-mentioned determination levels.

The output of the comparator Cmp1 is input to the flip-flop 130. Comparator Cmp
The output of 2 is connected to the clock input of the flip-flop 130 via the delay circuit 131 and is also supplied to the decoder 110 and the output control counter 111 as the extracted clock signal RXCLK. Comparator Cmp1
The pulse signal obtained by sampling the output of the above is sampled by the extracted clock signal RXCLK, that is, the output of the flip-flop 130 is supplied to the decoder 110 as the reception data signal RXDATA of the NRZ code.

Next, the operation of the present embodiment configured as described above will be described. FIG. 6 is a timing chart when the control unit 101 obtains the sensor output value from the sensor unit 102. FIG. 6A shows a clock signal by the microcomputer 104,
(B) shows a data signal from the microcomputer 104, and (c) shows a signal potential on the communication line. Control unit 101
When the sensor unit 102 makes a transmission request,
As shown in (b), the microcomputer 104 sets the data signal TXD immediately before the fall of the clock signal TXCLK.
It is given to the base of the transistor Tr2 so as to change ATA.

When the clock signal TXCLK is at high level, the transistor Tr1 is turned on and the communication line 10
Since 3 is grounded, the state of the data signal TXDATA,
That is, the communication line 103 is almost OV regardless of ON / OFF of the transistor Tr2.

On the other hand, the clock signal TXCLK is L
When it is at the ow level, the transistor Tr1 is turned off. Therefore, depending on the state of the data signal TXDATA, the communication line 1
The signal level on 03 will change. That is,
When the data signal TXDATA is at low level, the transistor Tr2 is turned off, and the signal potential of the communication line 103 becomes "H" of approximately 12V by the pull-up resistor R1.
When the data signal TXDATA is at the high level, the transistor Tr2 is turned on, and the communication line 103 is divided by the voltage division of the pull-up resistor R1 and the pull-down resistor R2.
Is "L" having a value of about 6V. Therefore, while the microcomputer 104 is outputting the clock signal TXCLK, regardless of the value of the transmission data TXDATA, the communication line 1
03 has the same frequency as the clock signal TXCLK and VL
A pulse having the above amplitude is output.

In the timing chart of FIG. 6, the control unit 101 transmits the address Ah (= 1010b) indicated by "HHL" and "HHL" following the transmission start code indicated by "HLLL" in (c). It shows the state of being performed. After sending this address, the microcomputer 104
Keeps outputting the clock signal TXCLK while fixing the data signal TXDATA to the low level.

In the sensor unit 102, the communication line 103
Upon receiving the above signal, the clock / data separation circuit 109 separates the clock and data. The received signal is input to the comparators Cmp1 and Cmp2, respectively. The comparator Cmp2 whose reference potential is VL outputs a pulse having a constant cycle regardless of the value of the received data.
This pulse becomes the extracted clock signal RXCLK shown in (e) of FIG. 6 via the delay circuit 130. The extracted clock signal is used as sampling of the reception data RXDATA and operation timing of each logic circuit.

On the other hand, since the comparator Cmp1 sets the reference potential to VH, the high level is output only when the signal received from the communication line is "H" as shown in (d). The output of the comparator Cmp1 is input to the flip-flop 130 and sampled at the rising edge of the extracted clock signal RXCLK. Then, the output of the flip-flop becomes the reception data RXDATA of the NRZ code as shown in (f) and is taken in by the decoder 110. The sensor unit 102 which has detected the transmission start code as shown in (g) by the decoder 110 resets the output control counter 111. Then, the address comparison circuit 113
Then, the address set by the address setting unit 112 is compared with the received address, and if they match, an address match signal is output as in (j).

During this period, the output control counter 111 is
As shown in (h), the extracted clock signal RXC of (e)
It counts up every falling edge of LK, and when it is a predetermined value (here, 6) as shown in (k), the output circuit A114
Then, the output permission signal A is output via the AND circuit 116. When the address match signal is output, the output circuit 114, which receives the output permission signal from the output control counter 111 via the AND circuit, turns the analog switch 129 on.
In the N state, the sensor signal of the sensor 118 is set to the communication line 10
Output to 3. When the output control counter 111 further counts up to the next predetermined value (7 in this case),
As shown in (m), the output permission signal B is output to the output circuit 115, and similarly, the sensor signal of the sensor 119 is transmitted to the communication line 103.
Output above.

When these sensor signals are output, the microcomputer 10 of the control unit 101 is operated as described above.
4 stops outputting data, that is, data signal TXDAT
Fix A at low level and turn on transistor Tr2.
It is FF. Therefore, when the transistor Tr1 is OFF, the potential on the communication line 103 has a value determined by the output value of the sensor 118. For example, when the resistance value of the resistor R1 is sufficiently larger than that of the resistor R9 and the output value of the sensor 118 is an analog value of 0 to 5V, the potential on the communication line 103 is about 7V after the addition circuit 127 adds 7V. It becomes 7V to about 12V. Thus, the control unit 101
Of the microcomputer 104 of the low clock signal TXCLK
By reading the A / D port of the sensor 11 from the potential on the communication line 103 when the level is set to the level.
Output voltages of 8 and 119 can be obtained.

Here, the connection system of the TXCLK output port of the microcomputer 104 of the control unit, the pull-up resistor R1 of the transmission / reception circuit 105, and the transistor Tr1 constitutes the clock signal output means of the invention. Further, the connection system of the TXDATA output port of the microcomputer, the pull-down resistor R2 of the transmission / reception circuit, and the transistor Tr2 constitutes the data signal output means of the invention, and the input A / D of the microcomputer.
The connection system of the port and the resistors R3 and R4 of the transmission / reception circuit respectively constitutes the signal processing means of the invention. The clock / data separation circuit 109 in the sensor unit constitutes clock extraction means, and the decoder 110, the output control counter 111, the address comparison circuit and the AND circuit 116 (1
17) is a timing generation means, and an output circuit 11
4 (115) respectively constitute sensor signal output means. Particularly, the decoder 110 constitutes the transmission start detecting means in the timing generating means, and the address comparing circuit and the AND circuit 116 (117) constitute the output permitting means.

The present embodiment is configured as described above, and the output of the sensor is superimposed on the clock signal sent by the control unit as an analog value, and the output value of the sensor is obtained by the magnitude of the pulse amplitude. Therefore, the sensor signal can be obtained with a relatively small communication frame regardless of the resolution required by the control unit.
Even if many sensors exist, it has an effect that high responsiveness is secured.

FIG. 7 shows the configuration of the second embodiment of the present invention. In this embodiment, in the sensor unit 202,
The output enable signal from the output control counter 211 is output to the AND circuit 224 for each of the output circuits 214 and 215.
2 to 2 are input respectively. The two output permission signals C1 and C2 or D1 and D2 input to each output circuit are output when the output control counter 211 indicates a continuous predetermined value.

FIG. 8 shows the details of the output circuit 214 (215). The output signals of the sensors 118 and 119 are impedance-converted by the voltage follower 228 and input to the subtraction circuit 229. The subtraction circuit 229 includes an operational amplifier 230 and four resistors R14 to R1 having the same resistance value.
7 and 12V constant voltage source 231, and 0
~ 5V sensor output is subtracted from constant voltage 12V 12
It is set to be ~ 7V (12V-sensor output). The output of the subtraction circuit 229 is input to a complementary analog switch 235 provided with an inverter 234. The analog switch 235 becomes conductive when the address coincidence signal is output and the output permission signal C2 due to the value of the output control counter 211 reaching the set predetermined value is output via the AND circuit.

The output of the subtraction circuit 229 which has passed through the analog switch 235 is sent to the communication line 103 via the resistor R18. The resistor R18 is provided for limiting the current when the transistor Tr1 of the control unit 101 is turned on. Further, in parallel with the analog switch 235, there is provided an analog switch 233 that conducts a constant voltage of 12 V to the communication line 103 by another output enable signal C1 input at a timing different from that of the output enable signal B. The other configuration is the first in FIG.
It is similar to the embodiment of.

Next, the operation of this embodiment configured as described above will be described. FIG. 9 is a timing chart when the control unit 101 obtains the sensor output value from the sensor unit 102. Similar to the timing chart of FIG. 6 in the first embodiment,
(A) shows a clock signal by the microcomputer 104,
(B) is a data signal from the microcomputer 104, (c) is a signal potential on the communication line, (d) is an output of the comparator Cmp1, (e) is an extracted clock signal RXCLK, and (f) is an output of a flip-flop. Received data RXD
ATA, (g) is a transmission start code detected by the decoder,
(H) shows the counter status of the output control counter, and (j) shows the address match signal as the output of the address comparison circuit. Further, (k) to (o) show output permission signals from the output control counter output via the AND circuit.

After detecting the transmission start code, the sensor unit 202, which has recognized the coincidence of the addresses, sequentially outputs the output permission signals to the respective output circuits 214 and 215 when the output control counter 211 has a preset value. Output. Here, the count value of the output control counter 211 is 6
Then, the output circuit 214 outputs the first output permission signal C
Upon receiving 1 (see (k)), the analog switch 233 that outputs a constant voltage of 12 V is turned on. When the other output permission signal C2 is received at the subsequent count value 7, the analog switch 235 is turned on, and (sensor signal -12V) is output to the communication line 103 via the subtraction circuit 229.

As a result, the control unit 101
The microcomputer 104 can read the output value of the sensor 118 from the difference between the amplitudes by reading two consecutive predetermined pulse amplitudes from the A / D port. Similarly, the output circuit 215 operates in synchronization with the count-up of the output control counter 211, and the output value of the sensor 119 is transmitted to the microcomputer 104. Here, the subtraction circuit 229 that subtracts the constant voltage sent from the analog switch 233 from the sensor output constitutes the sensor signal conversion means of the invention.

In the previous embodiment, if a difference in earth potential occurs between the control unit and the sensor unit, the recognition accuracy of the sensor output value may be affected.
In the second embodiment, the sensor output value is configured as described above, and the sensor output value is represented by the amplitude difference between the two pulses. Therefore, the accurate sensor output value is not affected by the difference in the ground potential. It becomes possible to recognize. Therefore, it is particularly effective when there is a possibility that a difference in ground potential may occur between the control unit and the sensor unit.

Next, FIG. 10 shows a third embodiment. In this embodiment, the address comparison circuit is omitted, and the address setting unit 1
The address set in 12 is input to the output control counter 311. The output control counter 311 is
When a predetermined count value determined by the address set by the address setting unit 112 is reached, the output circuit 114,
The output permission signal is output to 115. The AND circuit in the first embodiment is omitted together with the address comparison circuit. Other configurations are the same as those in the first embodiment.

FIG. 11 shows a timing chart in the third embodiment. Similar to the timing chart of FIG. 6 in the first embodiment, (a) shows a clock signal by the microcomputer 104, (b) is a data signal from the microcomputer 104, (c) is a signal potential on the communication line, ( (d) is the output of the comparator Cmp1, (e) is the extracted clock signal R
XCLK, (f) show reception data RXDATA obtained as the output of the flip-flop, (g) shows a transmission start code detected by the decoder, and (h) shows the counter status of the output control counter. Further, (j) and (k) show output permission signals from the output control counter to the output circuits 114 and 115. Here, the output control counter 311 constitutes the output permission means in the timing generation means of the invention.

In this embodiment, when the control unit 101 obtains the sensor output from the sensor unit 302, only the transmission start code is transmitted and the address signal is not transmitted. In each sensor unit whose transmission start code has been detected by the decoder 310, the output control counter 311 is reset. After that, the output control counter 311 counts up at each falling edge of the extraction clock RXCLK,
When it reaches a predetermined value determined by its own address, it outputs an output permission signal as in the first embodiment.

The output circuit 114 which receives this output permission signal
Outputs the signal of the sensor 118 to the communication line 103. Further, the output circuit 115 operates similarly in synchronization with the subsequent count-up of the output control counter 311, and the signal of the sensor 119 is output to the communication line 103. The counter value at which the output permission signal is output for each address is set to be different, and following the transmission start code transmitted by the control unit 101, a plurality of pulses representing the output value of each sensor are output from each sensor unit. Will be output. The microcomputer 104 of the control unit 101 can know the output value of each sensor by reading the amplitude of the pulse corresponding to the desired sensor from the A / D port.

In the first and second embodiments, in order to obtain the signal of a certain sensor, it is necessary to make a transmission request to the sensor unit corresponding to that sensor.
This embodiment has the effect that all sensor signals can be obtained from all sensor units with one transmission request.

[0050]

As described above, according to the present invention, in the multiplex communication device in which the first communication control means and the second communication control means are connected by the communication line, the communication is performed on the first communication control means side. The data signal is superimposed on the clock signal to be sent out on the line and output, while the second communication control means side extracts the clock signal from the received signal taken in from the communication line and processes the data signal in synchronization with this. The sensor output is provided with the generation means and the sensor signal output means for superimposing the output of the externally connected sensor on the clock signal on the communication line when the timing generation means is outputting a predetermined signal, and outputting the sensor signal. Is superimposed as it is as an analog value and its value is expressed by the pulse amplitude, and the sensor signal can be received with a relatively small communication frame regardless of the resolution required for each communication control means. Can be transmitted, the sensor has high responsiveness even when there are many there is an effect that is ensured.

Further, the sensor signal output means converts the voltage value output from the sensor into a difference between two different voltage values, and the two outputs are sequentially connected to the communication line by the analog switch. Even if there is a difference in the ground potential between the first communication control device and the second communication control device, the sensor output can be accurately transmitted without being affected by the difference.

Further, when there are a plurality of second communication control devices, the output permitting means outputs the sensor signal when each second communication control device counts a predetermined number of clocks determined by its own address. By allowing the output of the means, the sensor signals of all the second communication control devices can be obtained from the first communication control device by issuing a single transmission request, and the communication frame can be further expanded. Can be made smaller.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a first exemplary embodiment of the present invention.

FIG. 2 is a circuit diagram showing details of a transmission / reception circuit in a control unit.

FIG. 3 is a circuit diagram showing details of an output circuit in the sensor unit.

FIG. 4 is a pulse explanatory diagram showing a principle of encoding a transmission / reception signal in an example.

FIG. 5 is a circuit diagram showing details of a clock / data separation circuit in the sensor unit.

FIG. 6 is a timing chart when the control unit obtains the output value of the sensor from the sensor unit.

FIG. 7 is a block diagram showing a configuration of a second exemplary embodiment of the present invention.

FIG. 8 is a circuit diagram showing details of an output circuit in the sensor unit.

FIG. 9 is a timing chart when the control unit obtains a sensor output value from the sensor unit.

FIG. 10 is a block diagram showing a configuration of a third exemplary embodiment of the present invention.

FIG. 11 is a timing chart when the control unit obtains the output value of the sensor from the sensor unit.

FIG. 12 is a block diagram showing a configuration of a conventional multiplex communication device.

FIG. 13 is a diagram showing a communication format in a conventional example.

[Explanation of symbols]

101 control unit (first communication control means) 102, 202, 302 sensor unit (second communication control means) 103 communication line 104 microcomputer 105 transmission / reception circuit 106 drive circuit 107 motor 108 lamp 109 clock / data separation circuit (clock extraction) 110) 310 decoders 111, 211, 311 output control counter 112 address setting unit 113 address comparison circuits 114, 115, 214, 215 output circuits 116, 117 AND circuits 118, 119 sensors 124, 228 voltage followers 125, 230 operational amplifiers 126, 231 Constant voltage source 127 Addition circuit 128, 234 Inverter 129, 233, 235 Analog switch 130 Flip-flop 131 Delay circuit 229 Subtraction circuit (sensor signal conversion means) 4 1 control unit 402 sensor unit 403 communication line 404 microcomputer 405 transmission / reception circuit 406 drive circuit 409 reception circuit 410 decoder 411 control circuit 412 transmission circuit 413 encoder 413 encoder 415, 416 A / D converter 417 address setting unit 418 clock generation circuit 419, 420 Sensor Cmp1, Cmp2 Comparator R1 Pull-up resistor R2 Pull-down resistor Tr1, Tr2 Transistor RXCLK Extracted clock signal RXDATA Received data signal TXCLK Clock signal TXDATA data signal

Claims (5)

(57) [Claims] 1. A multiplex communication device in which a first communication control means and a second communication control means connected to a sensor for outputting a voltage in an analog value are connected by a communication line, wherein the first communication control is provided. Means, the potential of the communication line is high potential
And a signal that is alternately switched to low potential as the clock signal
A clock signal output means for sending to the communication line Te, by Rukoto data signal of the clock signal with a frequency equal to is superimposed on a clock signal sent to the communication line
Data signal output means for changing and outputting the high potential of the clock signal and signal processing means for reading a voltage level on the communication line in synchronization with the clock signal, the second communication control A means for extracting a clock signal from a reception signal taken in from the communication line, and a timing for extracting a data signal from the reception signal and processing the extracted data signal in synchronization with the extracted clock signal. a generation unit, wherein the Rukoto superimposes the output of the sensor clock signal of said communication line when said timing generating means outputs a predetermined signal
Change the height of the high potential of the clock signal on the communication line
Multiplex communication system, characterized in that it comprises a sensor signal output means for outputting by. 2. The clock signal output means connects the communication line to a constant voltage source via a pull-up resistor.
Is installed between the communication line and ground, and the clock signal
Equipped with a first transistor that turns on and off in synchronization with the signal
The data signal output means is provided between the communication line and the ground.
Is provided in parallel with the first transistor,
The second switch that turns on / off according to the resistance and the data signal.
The sensor signal output means is provided with a series circuit including a transistor , and the timing generation means is
When outputting a predetermined signal,
The multiplex communication device according to claim 1, further comprising an analog switch for connecting to a communication line . 3. The clock signal output means connects the communication line to a constant voltage source via a pull-up resistor and is provided between the communication line and ground, and turns on / off in synchronization with the clock signal. A second transistor that is turned off, the data signal output means is provided in parallel with the first transistor between the communication line and ground, and is turned on / off in response to a pull-down resistor and a data signal; The sensor signal output means is a voltage output from the sensor.
Sensor signal conversion that converts the value into the difference between two different voltage values
Means and the timing generating means are outputting a predetermined signal, the sensor signal converting means outputs two outputs.
The multiplex communication device according to claim 2, further comprising an analog switch that is sequentially connected to the communication line . 4. A plurality of the second communication control means are provided for the communication.
Connected to the second line and fixed to each second communication control means.
A given address has been set, and the timing generation circuit has a predetermined signal sequence set in advance.
Start of transmission of the first communication control means when receiving
A transmission start detecting means for detecting
After detecting the start of transmission, a signal indicating the self address
Output of the sensor signal output means only when receiving a line
Claims, characterized in that an output permission unit that permits
4. The multiplex communication device according to any one of 1 to 3 . 5. A plurality of the second communication control means are connected to the communication line, a unique address is set in each of the second communication control means , and the timing generation circuit is set in advance. constant when receiving a predetermined signal sequence, and a transmission start detecting means for detecting the start of transmission of the first communication control means, after the transmission start detecting means detects the start of transmission, by the address of the self
4. The multiplex communication device according to claim 1 , further comprising: an output permission unit that permits the output of the sensor signal output unit when counting the predetermined number of clocks .