JP3442493B2 - Semiconductor light receiving element and method of manufacturing the same - Google Patents
Semiconductor light receiving element and method of manufacturing the sameInfo
- Publication number
- JP3442493B2 JP3442493B2 JP20191894A JP20191894A JP3442493B2 JP 3442493 B2 JP3442493 B2 JP 3442493B2 JP 20191894 A JP20191894 A JP 20191894A JP 20191894 A JP20191894 A JP 20191894A JP 3442493 B2 JP3442493 B2 JP 3442493B2
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- Prior art keywords
- light
- light receiving
- diffusion region
- film
- metal film
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Description
【０００１】[0001]
【産業上の利用分野】この発明は、光通信において光を
高速で光電変換する半導体受光素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light receiving element for photoelectrically converting light at high speed in optical communication.
【０００２】[0002]
【従来の技術】従来の半導体受光素子（以下、「フォト
ダイオード」または「素子」とも称する）の一例が、文
献：「光通信素子光学、−発光・受光素子−、ｐｐ．３
７１−３７３，ｐｐ．３４７−３５０，光学図書刊」に
記載されている。この半導体受光素子は、基本的にｐｎ
接合ダイオードにおける光起電力効果を利用したもので
あり、半導体受光素子の拡散領域の直下の光吸収層の空
乏層に、受光面から光を入射させて光電変換を行う。こ
のフォトダイオードの周波数応答特性である周波数帯域
を制限する遮断周波数は、素子のＣＲ時定数およびキャ
リア走行時間によって制限される。このＣＲ時定数は、
素子のｐｎ接合容量、電極容量その他の浮遊容量および
負荷抵抗等によって決まる。これらの容量を減少させて
ＣＲ時定数を小さくすることにより、素子の周波数応答
特性を向上させることができる。2. Description of the Related Art An example of a conventional semiconductor light receiving element (hereinafter, also referred to as "photodiode" or "element") is described in the literature: "Optical communication element optics, -light emitting / light receiving element-", pp. 3
71-373, pp. 347-350, Optical Book ". This semiconductor light receiving element is basically a pn
It utilizes the photovoltaic effect in the junction diode, and photoelectrically converts light by making it enter the depletion layer of the light absorption layer directly below the diffusion region of the semiconductor light receiving element from the light receiving surface. The cutoff frequency that limits the frequency band, which is the frequency response characteristic of the photodiode, is limited by the CR time constant of the device and the carrier transit time. This CR time constant is
It is determined by the pn junction capacitance of the element, electrode capacitance and other stray capacitance, load resistance and the like. The frequency response characteristics of the device can be improved by reducing these capacitances and reducing the CR time constant.
【０００３】[0003]
【発明が解決しようとする課題】ところで、従来の半導
体受光素子では、素子の受光面の周囲の絶縁膜で覆われ
たウインド層にも、光が絶縁膜を透過して入射してしま
う。入射した光は迷光となって光吸収層の空乏層が形成
されていない領域に入射して少数のキャリアを発生させ
ることがある。発生したキャリアは、拡散領域直下の空
乏層に拡散するが、拡散速度が非常に遅いため、素子の
応答速度の劣化が生じてしまうことがあった。By the way, in the conventional semiconductor light receiving element, light is transmitted through the insulating film and enters the window layer covered with the insulating film around the light receiving surface of the element. The incident light may become stray light and may enter the region of the light absorption layer where the depletion layer is not formed to generate a small number of carriers. The generated carriers diffuse into the depletion layer immediately below the diffusion region, but the diffusion speed is so slow that the response speed of the device may deteriorate.
【０００４】このため、従来、受光面の周囲の絶縁膜上
に、光を遮るために遮光金属膜を形成した素子が提案さ
れている。しかし、遮光金属膜を表面に形成すると、遮
光金属膜で反射された反射光が迷光となって、素子を装
備した装置全体に悪影響を与えるおそれがある。一方、
光を遮光するために、ウインド層上に直に遮光金属膜を
形成し、その遮光金属膜上に絶縁膜を形成する構造も考
えられる。しかし、遮光金属膜と拡散領域との短絡を防
ぐため、遮光金属膜と拡散領域端の間に空乏層幅以上の
ギャップを設ける必要がある。その結果、逆バイアス電
圧を印加して生じた空乏層が形成されていない光吸収層
へ光がこのギャップから入射してしまう。このため、光
吸収層での少数キャリアの発生を制御できず、高速応答
の劣化が生じてしまう。Therefore, conventionally, there has been proposed an element in which a light-shielding metal film is formed on the insulating film around the light-receiving surface to shield light. However, when the light-shielding metal film is formed on the surface, the reflected light reflected by the light-shielding metal film becomes stray light, which may adversely affect the entire device equipped with the element. on the other hand,
In order to block light, a structure in which a light-shielding metal film is directly formed on the window layer and an insulating film is formed on the light-shielding metal film is also conceivable. However, in order to prevent a short circuit between the light-shielding metal film and the diffusion region, it is necessary to provide a gap larger than the width of the depletion layer between the light-shielding metal film and the end of the diffusion region. As a result, light enters from the gap to the light absorption layer in which the depletion layer formed by applying the reverse bias voltage is not formed. Therefore, the generation of minority carriers in the light absorption layer cannot be controlled, and the high-speed response deteriorates.
【０００５】そこで、これらの問題を解決するために、
この出願に係る発明者は、特願平５−２６２８０６号に
おいて、遮蔽膜積層体を具えた半導体受光素子を提案し
ている。この遮蔽膜積層体では、遮光金属膜の露出する
ことなく内部に含まれるように、絶縁膜と遮光金属膜
（金属膜）とを積層してある。この遮蔽膜積層体によ
り、迷光を防ぎ、その結果、迷光による素子の応答特性
の劣化の抑制を図ることができる。Therefore, in order to solve these problems,
The inventor of this application proposes a semiconductor light receiving element having a shielding film laminate in Japanese Patent Application No. 5-262806. In this shield film laminated body, the insulating film and the light shielding metal film (metal film) are laminated so that the light shielding metal film is contained inside without being exposed. Stray light can be prevented by this shielding film laminate, and as a result, deterioration of response characteristics of the element due to stray light can be suppressed.
【０００６】しかしながら、この遮蔽膜積層体において
は、遮光金属膜を表面に露出させることなく設けてあ
り、かつ、拡散領域との短絡を防ぐためにウインド層か
ら電気的に絶縁して設けてある。このため、遮光金属膜
と素子との間で浮遊容量が発生する。浮遊容量が発生す
ると、素子全体の素子容量が増加することになる。素子
容量の増加は素子の応答速度の劣化を招く。However, in this shielding film laminated body, the light shielding metal film is provided without being exposed on the surface, and is electrically insulated from the window layer in order to prevent a short circuit with the diffusion region. Therefore, stray capacitance is generated between the light shielding metal film and the element. When stray capacitance occurs, the element capacitance of the entire element increases. An increase in element capacitance causes deterioration in element response speed.
【０００７】そこで、さらに、この出願に係る発明者
は、特願平６−１４４１６２号公報において、この遮光
金属膜をウインド層とオーミック電極を介して電気的に
接続した半導体受光素子を提案している。Therefore, the inventor of the present application further proposes, in Japanese Patent Application No. 6-144162, a semiconductor light receiving element in which this light shielding metal film is electrically connected to a window layer via an ohmic electrode. There is.
【０００８】しかしながら、オーミック電極を介して
も、遮光金属膜とウインド層との間に僅かに浮遊容量が
発生してしまう。一方、素子の応答速度はより向上させ
ることが要請されているため、浮遊容量はできるだけ抑
制することが望ましい。However, even through the ohmic electrode, a slight stray capacitance is generated between the light shielding metal film and the window layer. On the other hand, since the response speed of the device is required to be further improved, it is desirable to suppress the stray capacitance as much as possible.
【０００９】また、半導体受光素子の製造にあたって
は、工程が複雑とならないことが望ましい。Further, in manufacturing the semiconductor light receiving element, it is desirable that the steps are not complicated.
【００１０】このため、浮遊容量を低下させて素子の応
答速度をより向上させた半導体受光素子の実現が望まれ
ていた。Therefore, it has been desired to realize a semiconductor light receiving element in which the stray capacitance is reduced and the response speed of the element is further improved.
【００１１】[0011]
【課題を解決するための手段】この出願に係る第１の発
明の半導体受光素子によれば、第１導電型基板の主表面
に形成された第１導電型の光吸収層と、光吸収層の表面
に形成された第１導電型のウインド層と、ウインド層の
表面から、光吸収層の表面に到達する深さまで形成され
た第２導電型の受光拡散領域と、受光拡散領域の周囲の
ウインド層に形成され、かつ、受光拡散領域の周囲に形
成される空乏層から離間された第２導電型の周辺拡散領
域と、受光拡散領域と電気的に接続された第１主電極
と、第１導電型基板の裏面に形成された第２主電極と、
周辺拡散領域上に形成された、遮光金属膜と当該遮光金
属膜の上部表面及び下部表面をそれぞれ覆う絶縁膜とを
備えた遮蔽膜積層体と、周辺拡散領域上の少なくとも一
部領域を覆うように設けられ、遮光金属膜と周辺拡散領
域とを電気的に接続する、オーミック電極とを有するこ
とを特徴とする。According to the semiconductor light receiving element of the first invention of this application, a light absorption layer of the first conductivity type formed on the main surface of the substrate of the first conductivity type, and a light absorption layer. A first conductive type window layer formed on the surface of the second conductive type, a second conductive type light receiving diffusion region formed from the surface of the window layer to a depth reaching the surface of the light absorbing layer, and a surrounding of the light receiving diffusion region. A second conductivity type peripheral diffusion region formed in the window layer and separated from a depletion layer formed around the light receiving diffusion region; a first main electrode electrically connected to the light receiving diffusion region; A second main electrode formed on the back surface of the one conductivity type substrate;
A shielding film laminate, which is formed on the peripheral diffusion region and includes a light-shielding metal film and an insulating film that covers the upper surface and the lower surface of the light-shielding metal film, and covers at least a partial region on the peripheral diffusion region. And an ohmic electrode for electrically connecting the light-shielding metal film to the peripheral diffusion region.
【００１２】また、この出願に係る第２の発明の半導体
受光素子の製造方法によれば、第１導電型基板上に、第
１導電型の光吸収層及び第１導電型のウインド層を順次
積層する工程と、ウインド層の表面から、光吸収層の表
面に到達する深さまで第２導電型の受光領域を形成する
のと同時に、受光拡散領域の周囲に形成される空乏層か
ら離間するように第２導電型の周辺拡散領域を形成する
工程と、受光拡散領域上に第１主電極を形成するのと同
時に、周辺拡散領域上にオーミック電極を形成する工程
と、露出しているウインド層上に、第１の絶縁膜を形成
する工程と、受光拡散領域が形成された領域外のウイン
ド層を覆うように、オーミック電極と電気的に接続され
る遮光金属膜を形成する工程と、遮光金属膜上に、第２
の絶縁膜を形成する工程とを含むことを特徴とする。Further, according to the method of manufacturing the semiconductor light receiving element of the second invention of the present application, the first conductivity type light absorption layer and the first conductivity type window layer are sequentially formed on the first conductivity type substrate. The step of stacking and forming the light receiving region of the second conductivity type from the surface of the window layer to the depth reaching the surface of the light absorbing layer, and at the same time, separating it from the depletion layer formed around the light receiving diffusion region. A second conductivity type peripheral diffusion region, a step of forming a first main electrode on the light receiving diffusion region and an ohmic electrode on the peripheral diffusion region at the same time, and an exposed window layer. A step of forming a first insulating film thereon, a step of forming a light shielding metal film electrically connected to the ohmic electrode so as to cover the window layer outside the region where the light receiving diffusion region is formed, Second on the metal film
And a step of forming an insulating film.
【００１３】[0013]
【作用】この発明の半導体受光素子によれば、ウインド
層上に、遮光金属膜を中間層として含む遮蔽膜積層体を
具えているので、この遮蔽膜積層体に入射する光の透過
率を小さくすることができる。その結果、迷光による素
子の応答特性の劣化を抑制することができる。さらに、
この発明の素子では、遮光金属膜をオーミック電極を介
してウインド層と電気的に接合しているため、遮光金属
膜と素子との間に浮遊容量が生じない。その結果、素子
容量の増加を抑制することができるので、素子の応答速
度の向上を図ることができる。According to the semiconductor light receiving element of the present invention, since the shielding film laminated body including the light shielding metal film as the intermediate layer is provided on the window layer, the transmittance of light incident on the shielding film laminated body is reduced. can do. As a result, the deterioration of the response characteristics of the element due to stray light can be suppressed. further,
In the device of the present invention, since the light-shielding metal film is electrically joined to the window layer via the ohmic electrode, no stray capacitance is generated between the light-shielding metal film and the device. As a result, an increase in element capacitance can be suppressed, so that the response speed of the element can be improved.
【００１４】ところで、遮光金属膜とウインド層とを直
に接合すると、遮光金属膜はショットキー電極となる。
このため、この接合部にショットキーバリアが形成され
て接合容量が生じてしまう。接合容量により素子容量が
増加すると素子の応答特性が劣化してしまう。そこで、
この発明では、オーミック電極を介して遮光金属膜とウ
インド層とを電気的に接続することにより接合容量の発
生を低下させることができる。By the way, when the light shielding metal film and the window layer are directly joined, the light shielding metal film becomes a Schottky electrode.
For this reason, a Schottky barrier is formed at this junction and junction capacitance is generated. If the element capacitance increases due to the junction capacitance, the response characteristics of the element deteriorate. Therefore,
In this invention, the generation of the junction capacitance can be reduced by electrically connecting the light shielding metal film and the window layer via the ohmic electrode.
【００１５】さらに、この発明の半導体受光素子によれ
ば、ウインド層中に周辺拡散領域を設け、この周辺拡散
領域上にオーミック電極を設けることにより、遮光金属
膜と周辺拡散領域とをオーミック電極を介して電気的に
接続している。このため、接合容量による浮遊容量の発
生をより抑制することができる。その結果、素子容量の
発生をより抑制することにより、素子の応答速度の向上
を図ることができる。Further, according to the semiconductor light receiving element of the present invention, by providing the peripheral diffusion region in the window layer and providing the ohmic electrode on the peripheral diffusion region, the light shielding metal film and the peripheral diffusion region are provided as the ohmic electrodes. It is electrically connected via. Therefore, it is possible to further suppress the generation of stray capacitance due to the junction capacitance. As a result, it is possible to improve the response speed of the element by further suppressing the generation of the element capacitance.
【００１６】また、周辺拡散領域およびオーミック電極
は、空乏層の幅よりも拡散領域から離れた位置に設けて
あるので、受光拡散領域との短絡が生じるおそれはな
い。また、オーミック電極が空乏層の幅よりも受光拡散
領域から離れていても、遮光金属膜があるために、ギャ
ップから光が入射して応答特性の劣化が生じるおそれも
ない。Further, since the peripheral diffusion region and the ohmic electrode are provided at a position farther from the diffusion region than the width of the depletion layer, there is no possibility of short circuit with the light receiving diffusion region. Further, even if the ohmic electrode is farther from the light receiving diffusion region than the width of the depletion layer, there is no possibility that light will enter through the gap and the response characteristics will be deteriorated because of the light shielding metal film.
【００１７】また、この発明の半導体受光素子の製造方
法によれば、周辺拡散領域を受光拡散領域と同時に形成
する。また、受光拡散領域上の第１主電極を形成するの
と同時に周辺拡散領域上にオーミック電極を形成する。
このため、従来の製造方法に比べて工程数を増やすこと
なく、浮遊容量を抑制して応答速度の向上した半導体受
光素子を容易に製造することができる。Further, according to the method of manufacturing a semiconductor light receiving element of the present invention, the peripheral diffusion region is formed simultaneously with the light receiving diffusion region. Moreover, at the same time as forming the first main electrode on the light receiving diffusion region, an ohmic electrode is formed on the peripheral diffusion region.
For this reason, it is possible to easily manufacture a semiconductor light receiving element that suppresses stray capacitance and has an improved response speed without increasing the number of steps as compared with the conventional manufacturing method.
【００１８】[0018]
【実施例】以下、図面を参照して、この発明の半導体受
光素子の構造の一例について説明する。尚、図面は、こ
の発明が理解できる程度に概略的に示してあるに過ぎな
い。従って、この発明は、図示例にのみ限定されるもの
で無いことは明らかである。尚、図では断面を表すハッ
チングを一部省略して示してある。DESCRIPTION OF THE PREFERRED EMBODIMENTS An example of the structure of the semiconductor light receiving element of the present invention will be described below with reference to the drawings. It should be noted that the drawings are only schematically shown so that the present invention can be understood. Therefore, it is obvious that the present invention is not limited to the illustrated examples. In the drawing, hatching showing a cross section is partially omitted.
【００１９】＜第１実施例＞図１は、この発明の半導体
受光素子の実施例の説明に関する図である。図は、ウイ
ンド層を具えたプレーナ型フォトダイオードの要部断面
の斜視図である。図１では遮蔽積層体の詳しい構造を省
略して示してある。<First Embodiment> FIG. 1 is a diagram for explaining an embodiment of a semiconductor light receiving element of the present invention. The figure is a perspective view of a cross-section of a main part of a planar photodiode having a window layer. In FIG. 1, the detailed structure of the shield laminate is omitted.
【００２０】この実施例の半導体受光素子では、第１導
電型の基板としてのｎ+ −ＩｎＰ基板１０の第１主表面
１０ａ上に、厚さ１．５〜２．０μｍのｎ- −ＩｎＰの
バッファ層１２、厚さ１．５〜２．２μｍのｎ- −Ｉｎ
ＧａＡｓの光吸収層１４および厚さ１．５μｍのｎ- −
ＩｎＰのウインド層１６を順次に通常の結晶成長法によ
って積層してある。このウインド層１６の一部領域に
は、このウインド層１６と光吸収層１４との界面に達す
る第２導電型の受光拡散領域としてのｐ+ 受光拡散領域
を具えている。このｐ+ 受光拡散領域１８は、ウインド
層に亜鉛（Ｚｎ）またはカドミウム（Ｃｄ）を選択的に
拡散させて形成している。In the semiconductor light receiving element of this embodiment, an n -- InP layer having a thickness of 1.5 to 2.0 .mu.m is formed on the first main surface 10a of the n.sup. + -InP substrate 10 as the first conductivity type substrate. Buffer layer 12, n --In having a thickness of 1.5 to 2.2 μm
The GaAs light absorption layer 14 and a thickness of 1.5 μm n − −
InP window layers 16 are sequentially laminated by a normal crystal growth method. A partial region of the window layer 16 is provided with a p + light receiving diffusion region as a light receiving diffusion region of the second conductivity type which reaches the interface between the window layer 16 and the light absorbing layer 14. The p + light receiving diffusion region 18 is formed by selectively diffusing zinc (Zn) or cadmium (Cd) in the window layer.
【００２１】このｐ+ 受光拡散領域１８上の一部領域
は、平面パターンで見て円形状に反射防止膜２０が形成
され、受光面２２となっている。また、ｐ+ 受光拡散領
域１８上の非受光面の領域には第１主電極としてのｐ側
電極２６が形成されている。一方、基板１０の第２主表
面１０ｂにはｎ側電極２８が形成されている。A partial area on the p + light receiving diffusion area 18 is a light receiving surface 22 on which an antireflection film 20 is formed in a circular shape when seen in a plane pattern. Further, a p-side electrode 26 as a first main electrode is formed in a region of the non-light receiving surface on the p + light receiving diffusion region 18. On the other hand, the n-side electrode 28 is formed on the second main surface 10b of the substrate 10.
【００２２】そして、この発明の半導体受光素子では、
ウインド層の一部領域であって、受光拡散領域１８の周
囲に形成される空乏層（図示せず）の幅よりも当該受光
拡散領域１８から離れた領域に、当該受光拡散領域１８
と同一材料からなる周辺拡散領域３８を具えている。In the semiconductor light receiving element of the present invention,
The light receiving diffusion region 18 is located in a part of the window layer, which is farther from the light receiving diffusion region 18 than the width of a depletion layer (not shown) formed around the light receiving diffusion region 18.
And a peripheral diffusion region 38 made of the same material as the above.
【００２３】また、ｐ+ 受光拡散領域１８の周囲のウイ
ンド層１６上には遮蔽膜積層体３０を設けてある。A shielding film laminate 30 is provided on the window layer 16 around the p + light receiving diffusion region 18.
【００２４】次に、この遮蔽膜積層体３０について説明
する。図２は、図１に示した半導体受光素子の要部（遮
蔽膜積層体３０付近）を拡大して示した断面図である。Next, the shielding film laminate 30 will be described. FIG. 2 is an enlarged cross-sectional view of the main part (near the shielding film laminate 30) of the semiconductor light receiving element shown in FIG.
【００２５】この遮蔽膜積層体３０は、チタン（Ｔｉ）
の遮光金属膜３２とＳｉ3 Ｎ4 膜の絶縁膜３４とを積層
して構成されている。この絶縁膜３４は、上側絶縁膜
（すなわち第２の絶縁膜）３４ａと下側絶縁膜（すなわ
ち第１の絶縁膜）３４ｂとを以って構成されている。ま
た、この遮光金属膜３２は、中間層として、上側絶縁膜
（すなわち第２の絶縁膜）３４ａと下側絶縁膜（すなわ
ち第１の絶縁膜）３４ｂとに挟まれており、表面に露出
することなく遮蔽膜積層体３０の内部に含まれている。The shielding film laminate 30 is made of titanium (Ti).
The light-shielding metal film 32 and the insulating film 34 of Si 3 N 4 are laminated. The insulating film 34 includes an upper insulating film (that is, a second insulating film) 34a and a lower insulating film (that is, a first insulating film) 34b. The light-shielding metal film 32 is sandwiched between the upper insulating film (that is, the second insulating film) 34a and the lower insulating film (that is, the first insulating film) 34b as an intermediate layer, and is exposed on the surface. Without being included in the shielding film laminated body 30.
【００２６】さらに、この遮光金属膜３２は、ウインド
層１６に設けられた周辺拡散領域３８とオーミック電極
３６を介して電気的に接続（コンタクト）している。Further, the light shielding metal film 32 is electrically connected (contacted) with the peripheral diffusion region 38 provided in the window layer 16 via the ohmic electrode 36.
【００２７】このオーミック電極３６は、ｐ+ 受光拡散
領域１８から、このｐ+ 受光拡散領域１８の周囲に形成
される空乏層（図示せず）の幅よりも離れた位置で周辺
拡散領域３８と電気的に接続している。[0027] The ohmic electrode 36, the p + light diffusion area 18, a peripheral diffused region 38 at a position apart than the width of the depletion layer formed around the p + light diffusion region 18 (not shown) It is electrically connected.
【００２８】この実施例の遮蔽膜積層体３０で得られ
る、入射光に対する反射率および透過率は、それぞれ約
４０〜５０％および１％以下である。このため、ｐ側電
極２６およびｎ側電極２８間に逆バイアス電圧を印加し
て生じた空乏層が形成されていない光吸収層１４へ迷光
が入射することを抑制することができる。その結果、迷
光による少数キャリアの発生を抑制することができる。
このため、少数キャリアによる高速応答時の波形の遅れ
が生じないので、素子の高速応答が可能となり、従来の
遮光金属膜を絶縁膜の表面に設けた素子よりも周波数応
答特性を改善することができる。The reflectance and the transmittance with respect to the incident light obtained by the shielding film laminate 30 of this embodiment are about 40 to 50% and 1% or less, respectively. Therefore, it is possible to prevent stray light from entering the light absorption layer 14 in which the depletion layer formed by applying the reverse bias voltage between the p-side electrode 26 and the n-side electrode 28 is not formed. As a result, generation of minority carriers due to stray light can be suppressed.
Therefore, the delay of the waveform at the time of high-speed response due to the minority carriers does not occur, which enables high-speed response of the element, and can improve the frequency response characteristic as compared with the conventional element in which the light shielding metal film is provided on the surface of the insulating film. it can.
【００２９】また、この遮蔽膜積層体３０においては、
遮光金属膜３２がオーミック電極３６を介してウインド
層１６とコンタクトされているので、遮光金属膜３２と
受光素子との間に浮遊容量が形成されない。このため、
素子容量が浮遊容量によって増加しないので、応答速度
の劣化が生じない。Further, in this shielding film laminated body 30,
Since the light shielding metal film 32 is in contact with the window layer 16 via the ohmic electrode 36, no stray capacitance is formed between the light shielding metal film 32 and the light receiving element. For this reason,
Since the element capacitance does not increase due to the stray capacitance, the response speed does not deteriorate.
【００３０】尚、この発明の半導体受光素子において
は、絶縁膜の厚さ（例えば、遮光金属膜上の絶縁膜の厚
さと、遮光金属膜とウインド層との間の絶縁膜の厚さ
と）を、それぞれλ／（４ｎ）（但し、λは入射光の波
長、ｎ絶縁膜の屈折率を表す）とすれば、遮蔽膜積層体
の光の透過率をより小さくすることができる。In the semiconductor light receiving element of the present invention, the thickness of the insulating film (for example, the thickness of the insulating film on the light shielding metal film and the thickness of the insulating film between the light shielding metal film and the window layer) is set. , Λ / (4n) (where λ represents the wavelength of incident light and the refractive index of the n insulating film), the light transmittance of the shielding film laminate can be further reduced.
【００３１】また、絶縁膜として、Ｓｉ3 Ｎ4 膜を用
い、遮光金属膜としてチタン（Ｔｉ）またはモリブデン
（Ｍｏ）を用いれば、遮光金属膜とＳｉ3 Ｎ4 膜との密
着性が良好なので、遮光金属膜が剥離するおそれを少な
くすることができる。If a Si 3 N 4 film is used as the insulating film and titanium (Ti) or molybdenum (Mo) is used as the light shielding metal film, the adhesion between the light shielding metal film and the Si 3 N 4 film is good. It is possible to reduce the risk that the light-shielding metal film will peel off.
【００３２】また、遮光金属膜の膜厚は、５００〜１０
００Å（５０〜１００ｎｍ）とすることが望ましい。こ
れは、膜厚が５００Å以上ならば、光の透過率を十分低
くすることができ、かつ、膜厚が１０００Å以下なら
ば、遮光金属膜が剥離するおそれが少ないからである。The thickness of the light-shielding metal film is 500 to 10
It is desirable to set it to 00Å (50 to 100 nm). This is because if the film thickness is 500 Å or more, the light transmittance can be sufficiently lowered, and if the film thickness is 1000 Å or less, the light-shielding metal film is less likely to peel off.
【００３３】また、周辺拡散領域３８を設けた結果、ｐ
型の周辺拡散領域と、ｎ型のバッファ層あるいは基板と
の間にｐ−ｎ接合が生じることが考えられる。しかし、
素子の製造の際に、ダイシングの工程でこのｐ−ｎ接合
は破壊される。このため、このｐ−ｎ接合に起因する浮
遊容量の発生は防止することができる。従って、周辺拡
散領域３８を設けても素子の容量は増加せず、周波数応
答特性の優れた帯域幅の広い半導体受光素子を得ること
ができる。Further, as a result of providing the peripheral diffusion region 38, p
It is conceivable that a pn junction is formed between the peripheral diffusion region of the n-type and the n-type buffer layer or the substrate. But,
During manufacturing of the device, the pn junction is destroyed in the dicing process. Therefore, it is possible to prevent the generation of the stray capacitance due to the pn junction. Therefore, even if the peripheral diffusion region 38 is provided, the capacitance of the element does not increase, and it is possible to obtain a semiconductor light receiving element having an excellent frequency response characteristic and a wide bandwidth.
【００３４】＜第２実施例＞次に、第２の発明の半導体
受光素子の製造方法の実施例について説明する。図３の
（Ａ）〜（Ｃ）および図４の（Ａ）〜（Ｃ）は、第２実
施例の説明に供する工程図である。尚、図３および図４
では、素子の要部を拡大して示す。<Second Embodiment> Next, an embodiment of a method for manufacturing a semiconductor light receiving element of the second invention will be described. FIGS. 3A to 3C and FIGS. 4A to 4C are process drawings used to describe the second embodiment. 3 and 4
Then, the principal part of the element is shown enlarged.
【００３５】この実施例では、先ず、第１導電型の基板
としてのｎ+ −ＩｎＰ基板１０の第１主表面１０ａ上
に、厚さ１．５〜２．０μｍのｎ- −ＩｎＰのバッファ
層１２、厚さ１．５〜２．２μｍのｎ- −ＩｎＧａＡｓ
の光吸収層１４および厚さ１．５μｍのｎ- −ＩｎＰの
ウインド層１６を順次に通常の結晶成長法によって積層
する（図３の（Ａ））。In this embodiment, first, an n − -InP buffer layer having a thickness of 1.5 to 2.0 μm is formed on the first main surface 10a of the n + -InP substrate 10 as the first conductivity type substrate. 12, n -- InGaAs having a thickness of 1.5 to 2.2 μm
The light absorption layer 14 and the n − -InP window layer 16 having a thickness of 1.5 μm are sequentially laminated by a normal crystal growth method ((A) of FIG. 3).
【００３６】次に、このウインド層１６の一部領域に、
このウインド層１６と光吸収層１４との界面に達する第
２導電型の受光拡散領域としてのｐ+ 受光拡散領域１８
を形成すると同時に、受光領域から離間したウインド層
１６の一部領域に周辺拡散領域３８を形成する。このｐ
+ 受光拡散領域１８および周辺拡散領域３８は、ウイン
ド層１６に亜鉛（Ｚｎ）またはカドミウム（Ｃｄ）を選
択的に拡散させて形成する（図３の（Ｂ））。Next, in a partial region of the window layer 16,
The p + light receiving diffusion region 18 as the second conductivity type light receiving diffusion region reaching the interface between the window layer 16 and the light absorbing layer 14.
At the same time, the peripheral diffusion region 38 is formed in a partial region of the window layer 16 separated from the light receiving region. This p
The + light receiving diffusion region 18 and the peripheral diffusion region 38 are formed by selectively diffusing zinc (Zn) or cadmium (Cd) in the window layer 16 ((B) of FIG. 3).
【００３７】次に、ｐ+ 受光拡散領域１８上の非受光面
の領域には第１主電極としてのｐ側電極２６を形成する
のと同時に、周辺拡散領域３８の少なくとも一部領域
に、このｐ側電極２６と同一材料からなるオーミック電
極３６を形成する。また、基板１０の第２主表面１０ｂ
にはｎ側電極（図示せず）を形成する（図３の
（Ｃ））。Next, at the same time as forming the p-side electrode 26 as the first main electrode in the non-light-receiving surface area on the p + light-receiving diffusion area 18, at least a part of the peripheral diffusion area 38 is formed. An ohmic electrode 36 made of the same material as the p-side electrode 26 is formed. In addition, the second main surface 10b of the substrate 10
Then, an n-side electrode (not shown) is formed (FIG. 3C).
【００３８】次に、ｐ+ 受光拡散領域１８上の一部領域
に、平面パターンで見て円形状に反射防止膜２０を形成
し、受光面２２とする。Next, a circular antireflection film 20 is formed in a partial area on the p + light receiving diffusion area 18 as seen in a plane pattern to form a light receiving surface 22.
【００３９】次に、遮蔽膜積層体３０の形成について説
明する。Next, the formation of the shielding film laminate 30 will be described.
【００４０】遮蔽膜積層体３０の形成にあたっては、先
ず、受光拡散領域１８上の周囲の領域であってオーミッ
ク電極３６の非形成領域に、遮蔽膜積層体３０を構成す
るＳｉ3 Ｎ4 膜の下側絶縁膜（すなわち第１の絶縁膜）
３４ｂを形成する（図４の（Ａ））。In forming the shield film laminate 30, first, the Si 3 N 4 film forming the shield film laminate 30 is formed in the peripheral region on the light receiving diffusion region 18 where the ohmic electrode 36 is not formed. Lower insulating film (that is, first insulating film)
34b is formed ((A) of FIG. 4).
【００４１】次に、オーミック電極３６および下側絶縁
膜（すなわち第１の絶縁膜）３４ｂの一部分上に、遮蔽
膜積層体３０を構成するチタン（Ｔｉ）の遮光金属膜３
２を形成する（図４の（Ｂ））。Next, on the ohmic electrode 36 and a part of the lower insulating film (that is, the first insulating film) 34b, the light shielding metal film 3 of titanium (Ti) forming the shielding film stack 30 is formed.
2 is formed ((B) of FIG. 4).
【００４２】次に、ｐ+ 受光拡散領域１８上の周囲の領
域であって、少なくとも遮光金属膜３２を含む領域に、
遮蔽膜積層体３０を構成するＳｉ3 Ｎ4 膜の上側絶縁膜
（すなわち第２の絶縁膜）３４ａを形成する（図４の
（Ｃ））。Next, in the peripheral region on the p + light receiving diffusion region 18 and including at least the light shielding metal film 32,
An upper insulating film (that is, a second insulating film) 34a of the Si 3 N 4 film forming the shielding film stack 30 is formed ((C) of FIG. 4).
【００４３】その結果、遮光金属膜３２は、中間層とし
て、絶縁膜３４の上側絶縁膜（すなわち第２の絶縁膜）
３４ａと下側絶縁膜（すなわち第１の絶縁膜）３４ｂと
に挟まれ、すなわち、当該遮光金属膜の上部表面及び下
部表面がそれぞれ絶縁膜に覆われ、表面に露出すること
なく遮蔽膜積層体３０の内部に含まれることになる。ま
た、この遮光金属膜３２は、ウインド層１６に設けられ
た周辺拡散領域３８とオーミック電極３６を介して電気
的に接続（コンタクト）することになる。As a result, the light-shielding metal film 32 serves as an intermediate layer and is located above the insulating film 34 (that is, the second insulating film).
34a and the lower insulating film (that is, the first insulating film) 34b, that is, the upper surface and the lower surface of the light-shielding metal film are covered with the insulating film, respectively, and the shielding film laminate is not exposed to the surface. It will be included inside 30. Further, the light shielding metal film 32 is electrically connected (contact) with the peripheral diffusion region 38 provided in the window layer 16 via the ohmic electrode 36.
【００４４】上述した各実施例では、これらの発明を特
定の材料を用い、特定の条件で構成した例について説明
したが、この発明は多くの変更および変形を行うことが
できる。例えば、上述した各実施例では、遮光金属膜と
して、チタン（Ｔｉ）を用いたが、この発明では、例え
ばタングステン（Ｗ）またはモリブデン（Ｍｏ）を用い
ても良い。また、上述した実施例では、絶縁膜としてＳ
ｉ3 Ｎ4 膜を用いたが、この発明では、例えばＡｌ2 Ｏ
3 膜を用いても良い。また、上述した実施例では、第１
導電型をｎ型、第２導電型をｐ型としたが、この発明で
は、第１導電型をｐ型、第２導電型をｎ型としても良
い。In each of the above-described embodiments, the invention has been described as an example in which a specific material is used and is configured under specific conditions, but the present invention can be modified and modified in many ways. For example, although titanium (Ti) is used as the light shielding metal film in each of the above-described embodiments, for example, tungsten (W) or molybdenum (Mo) may be used in the present invention. Further, in the above-described embodiment, S is used as the insulating film.
Although an i 3 N 4 film is used, in the present invention, for example, Al 2 O is used.
You may use 3 membranes. Further, in the above-described embodiment, the first
Although the conductivity type is n-type and the second conductivity type is p-type, in the present invention, the first conductivity type may be p-type and the second conductivity type may be n-type.
【００４５】[0045]
【発明の効果】この発明の半導体受光素子によれば、ウ
インド層上に、遮光金属膜を中間層として含む遮蔽膜積
層体を具えているので、この遮蔽膜積層体に入射する光
の透過率を小さくすることができる。その結果、迷光に
よる素子の応答特性の劣化を抑制することができる。According to the semiconductor light receiving element of the present invention, since the shielding film laminated body including the light shielding metal film as an intermediate layer is provided on the window layer, the transmittance of light incident on the shielding film laminated body is increased. Can be made smaller. As a result, the deterioration of the response characteristics of the element due to stray light can be suppressed.
【００４６】さらに、この発明の半導体受光素子によれ
ば、ウインド層中に周辺拡散領域を設け、この周辺拡散
領域上にオーミック電極を設けることにより、遮光金属
膜と周辺拡散領域とをオーミック電極を介して電気的に
接続している。このため、接合容量による浮遊容量の発
生をより抑制することができる。その結果、素子容量の
発生をより抑制することにより、素子の応答速度の向上
を図ることができる。Further, according to the semiconductor light receiving element of the present invention, by providing the peripheral diffusion region in the window layer and providing the ohmic electrode on the peripheral diffusion region, the light shielding metal film and the peripheral diffusion region are provided as the ohmic electrodes. It is electrically connected via. Therefore, it is possible to further suppress the generation of stray capacitance due to the junction capacitance. As a result, it is possible to improve the response speed of the element by further suppressing the generation of the element capacitance.
【００４７】また、周辺拡散領域およびオーミック電極
は、空乏層の幅よりも拡散領域から離れた位置に設けて
あるので、受光拡散領域との短絡が生じるおそれはな
い。また、オーミック電極が空乏層の幅よりも受光拡散
領域から離れていても、遮光金属膜があるために、ギャ
ップから光が入射して応答特性の劣化が生じるおそれも
ない。Further, since the peripheral diffusion region and the ohmic electrode are provided at a position farther from the diffusion region than the width of the depletion layer, there is no possibility of short circuit with the light receiving diffusion region. Further, even if the ohmic electrode is farther from the light receiving diffusion region than the width of the depletion layer, there is no possibility that light will enter through the gap and the response characteristics will be deteriorated because of the light shielding metal film.
【００４８】また、この発明の半導体受光素子の製造方
法によれば、周辺拡散領域を受光拡散領域と同時に形成
する。また、受光拡散領域上の第１主電極を形成するの
と同時に周辺拡散領域上のオーミック電極を形成する。
このため、従来の製造方法に比べて工程数を増やすこと
なく、浮遊容量を抑制して応答速度の向上した半導体受
光素子を容易に製造することができる。Further, according to the method of manufacturing the semiconductor light receiving element of the present invention, the peripheral diffusion region is formed simultaneously with the light receiving diffusion region. Further, at the same time as forming the first main electrode on the light receiving diffusion region, the ohmic electrode on the peripheral diffusion region is formed.
For this reason, it is possible to easily manufacture a semiconductor light receiving element that suppresses stray capacitance and has an improved response speed without increasing the number of steps as compared with the conventional manufacturing method.
【００４９】また、この発明の半導体受光素子は、光通
信、特に１μｍ帯波長領域の光を高速で光電変換するの
に用いて好適である。Further, the semiconductor light receiving element of the present invention is suitable for optical communication, particularly for high-speed photoelectric conversion of light in the wavelength range of 1 μm band.
【図１】この発明の半導体受光素子の実施例の説明に供
する要部断面斜視図である。FIG. 1 is a perspective cross-sectional view of a main part for explaining an embodiment of a semiconductor light receiving element of the present invention.
【図２】図１の要部を拡大して示した断面図である。FIG. 2 is a cross-sectional view showing an enlarged main part of FIG.
【図３】（Ａ）〜（Ｃ）は、この発明の半導体受光素子
の製造方法の実施例の説明に供する前半の工程図であ
る。3 (A) to 3 (C) are process diagrams of the first half used to describe an embodiment of a method for manufacturing a semiconductor light receiving element of the present invention.
【図４】（Ａ）〜（Ｃ）は、図３の（Ｃ）に続く、後半
の工程図である。FIG. 4A to FIG. 4C are process diagrams of the latter half of FIG.
１０：基板 １２：バッファ層 １４：光吸収層 １６：ウインド層 １８：ｐ+ 受光拡散領域 ２０：反射防止膜 ２２：受光面 ２６：ｐ側電極 ２８：ｎ側電極 ３０：遮蔽膜積層体 ３２：遮光金属膜 ３４：絶縁膜 ３４ａ：上側絶縁膜 ３４ｂ：下側絶縁膜 ３６：オーミック電極 ３８：周辺拡散領域10: substrate 12: buffer layer 14: light absorption layer 16: window layer 18: p + light receiving diffusion region 20: antireflection film 22: light receiving surface 26: p-side electrode 28: n-side electrode 30: shielding film laminate 32: Light-shielding metal film 34: insulating film 34a: upper insulating film 34b: lower insulating film 36: ohmic electrode 38: peripheral diffusion region
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平３−38070（ＪＰ，Ａ) 特開 平５−198835（ＪＰ，Ａ) 特開 昭61−199677（ＪＰ，Ａ) 特開 昭61−131572（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 31/10 ─────────────────────────────────────────────────── ─── Continuation of front page (56) Reference JP-A-3-38070 (JP, A) JP-A-5-198835 (JP, A) JP-A 61-199677 (JP, A) JP-A 61- 131572 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 31/10
Claims (6)
１導電型の光吸収層と、 前記光吸収層の表面に形成された第１導電型のウインド
層と、 前記ウインド層の表面から、前記光吸収層の表面に到達
する深さまで形成された、第２導電型の受光拡散領域
と、 前記受光拡散領域の周囲の前記ウインド層に形成され、
かつ、前記受光拡散領域の周囲に形成される空乏層から
離間された、第２導電型の周辺拡散領域と、 前記受光拡散領域と電気的に接続された、第１主電極
と、 前記第１導電型基板の裏面に形成された、第２主電極
と、 前記周辺拡散領域上に形成された、遮光金属膜と該遮光
金属膜の上部表面及び下部表面をそれぞれ覆う絶縁膜と
を備えた遮蔽膜積層体と、 前記周辺拡散領域上の少なくとも一部領域を覆うように
設けられ、前記遮光金属膜と前記周辺拡散領域とを電気
的に接続する、オーミック電極とを有することを特徴と
する半導体受光素子。1. A first-conductivity-type light absorption layer formed on the main surface of a first-conductivity-type substrate; a first-conductivity-type window layer formed on the surface of the light-absorption layer; A light receiving diffusion region of the second conductivity type formed from the surface to a depth reaching the surface of the light absorbing layer, and formed in the window layer around the light receiving diffusion region,
A second conductive type peripheral diffusion region separated from a depletion layer formed around the light receiving diffusion region; a first main electrode electrically connected to the light receiving diffusion region; A shield including a second main electrode formed on the back surface of the conductivity type substrate, a light-shielding metal film formed on the peripheral diffusion region, and insulating films respectively covering upper and lower surfaces of the light-shielding metal film. A semiconductor having a film stack and an ohmic electrode which is provided so as to cover at least a part of the peripheral diffusion region and electrically connects the light shielding metal film and the peripheral diffusion region. Light receiving element.
て、前記光吸収層の下に、バッファ層を有することを特
徴とする半導体受光素子。2. The semiconductor light receiving element according to claim 1, further comprising a buffer layer below the light absorption layer.
子において、前記絶縁膜の膜厚は、λ／（４ｎ）（λは
入射光の波長、ｎ絶縁膜の屈折率）であることを特徴と
する半導体受光素子。3. The semiconductor light receiving element according to claim 1, wherein the thickness of the insulating film is λ / (4n) (λ is the wavelength of incident light, and the refractive index of the n insulating film). Characteristic semiconductor light receiving element.
の半導体受光素子において、前記遮光金属膜の膜厚は、
５０ｎｍから１００ｎｍの範囲内であることを特徴とす
る半導体受光素子。4. The semiconductor light receiving element according to claim 1, wherein the light shielding metal film has a thickness of
A semiconductor light receiving element having a range of 50 nm to 100 nm.
の半導体受光素子において、前記絶縁膜はＳｉ3 Ｎ4 膜
であり、前記遮光金属膜はＴｉ膜またはＭｏ膜であるこ
とを特徴とする半導体受光素子。5. The semiconductor light receiving element according to claim 1, wherein the insulating film is a Si 3 N 4 film and the light shielding metal film is a Ti film or a Mo film. Semiconductor light receiving element.
収層及び第１導電型のウインド層を順次積層する工程
と、 前記ウインド層の表面から、前記光吸収層の表面に到達
する深さまで第２導電型の受光領域を形成するのと同時
に、前記受光拡散領域の周囲に形成される空乏層から離
間するように第２導電型の周辺拡散領域を形成する工程
と、 前記受光拡散領域上に第１主電極を形成するのと同時
に、周辺拡散領域上にオーミック電極を形成する工程
と、 露出している前記ウインド層上に、第１の絶縁膜を形成
する工程と、 前記受光拡散領域が形成された領域外の前記ウインド層
を覆うように、前記オーミック電極と電気的に接続され
る遮光金属膜を形成する工程と、 前記遮光金属膜上に、第２の絶縁膜を形成する工程とを
含むことを特徴とする半導体素子の製造方法。6. A step of sequentially laminating a first-conductivity-type light absorbing layer and a first-conductivity-type window layer on a first-conductivity-type substrate, and from the surface of the window layer to the surface of the light-absorbing layer. Forming a second-conductivity-type light-receiving region to a depth reaching the same depth, and simultaneously forming a second-conductivity-type peripheral diffusion region so as to be separated from a depletion layer formed around the light-reception diffusion region; Forming a first main electrode on the light receiving diffusion region and at the same time forming an ohmic electrode on the peripheral diffusion region; and forming a first insulating film on the exposed window layer, Forming a light shielding metal film electrically connected to the ohmic electrode so as to cover the window layer outside the region where the light receiving diffusion region is formed; and a second insulating film on the light shielding metal film. And a step of forming The method of manufacturing a semiconductor device that.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20191894A JP3442493B2 (en) | 1994-08-26 | 1994-08-26 | Semiconductor light receiving element and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20191894A JP3442493B2 (en) | 1994-08-26 | 1994-08-26 | Semiconductor light receiving element and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0864855A JPH0864855A (en) | 1996-03-08 |
| JP3442493B2 true JP3442493B2 (en) | 2003-09-02 |
Family
ID=16448964
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20191894A Expired - Lifetime JP3442493B2 (en) | 1994-08-26 | 1994-08-26 | Semiconductor light receiving element and method of manufacturing the same |
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| Country | Link |
|---|---|
| JP (1) | JP3442493B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3601761B2 (en) * | 1998-11-19 | 2004-12-15 | 松下電器産業株式会社 | Light receiving element and method of manufacturing the same |
| CN115799376B (en) * | 2023-02-09 | 2023-05-12 | 材料科学姑苏实验室 | Laminated photovoltaic cell intermediate interconnection layer structure and preparation method and application thereof |
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1994
- 1994-08-26 JP JP20191894A patent/JP3442493B2/en not_active Expired - Lifetime
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| Publication number | Publication date |
|---|---|
| JPH0864855A (en) | 1996-03-08 |
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