JP3437827B2 - Piezoelectric oscillator - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a piezoelectric oscillator in which a piezoelectric vibrator is housed in a cavity of a container body used in, for example, mobile communication control equipment, and more particularly to a piezoelectric oscillator suitable for high frequency oscillation using overtone oscillation. Regarding the oscillator.
Here, the piezoelectric vibrator includes a vibrator using a crystal plate, a piezoelectric ceramic substrate, or a single crystal piezoelectric substrate.

[0002]

2. Description of the Related Art As a piezoelectric oscillator, for example, a crystal oscillator is a very important component which is mounted in a mobile communication control device or a control device for controlling a LAN and generates an oscillation frequency for controlling its operation. For example, a crystal oscillator used for a mobile communication control device or the like has to be extremely downsized in volume as the mobile communication control device is downsized.

As a surface-mount type crystal oscillator that achieves such miniaturization, for example, in Japanese Patent Laid-Open No. 10-28024, a rectangular single plate substrate and a frame-shaped leg portion are used, and the opening has a rectangular shape. Using a container with a cavity on the bottom,
A structure has been proposed in which a crystal oscillator is mounted on the surface of the container body and an IC chip is mounted in the cavity of the container body.

21 to 24 show such a conventional surface mount type crystal oscillator 150.

The crystal oscillator 150 includes a container 151,
It is mainly composed of a rectangular crystal oscillator 152, an IC chip 153 that constitutes an oscillation control circuit, and a metal lid 154.

This crystal oscillator 150 uses a container body 151 in which a rectangular single plate-shaped ceramic substrate 155 and a frame-shaped leg portion 156 are integrated, and a cavity portion 157 is formed on the bottom surface of the container body 151. Was there.

A single plate-shaped ceramic substrate 155 for partitioning the surface of the container 151 and the bottom surface of the cavity portion 157 is provided with a via-hole conductor 158 for electrically connecting the surface side to the bottom surface of the cavity portion 157. There is. Also,
A sealing conductor pattern 159 for sealing the metallic lid 154 is formed on the surface thereof. A wiring pattern 160 including IC electrode pads is formed on the bottom surface of the cavity portion 157. Further, the frame leg 156
External terminal electrodes 161 to 164 are formed at four corners of the bottom surface of the.

Then, a rectangular crystal oscillator 152 is conductively bonded to the surface of the container body 151 via crystal oscillator support bases 169 and 170 with conductive adhesives 171 and 172. In order to hermetically seal the vibrator 152, the dish-shaped metal lid 154 is integrally joined using the sealing conductor pattern 159. An IC chip 153 is housed in the cavity portion 157. The IC chip 153 is connected to the IC electrode pad, which is the wiring pattern 160, via bumps or bonding wires. The crystal unit 152 mounted on the surface of the container body 151 is connected to the I via the via hole conductors 158 and 158.
The IC chip 153 is connected to the C chip 153, and is connected to the external terminal electrodes 161 to 164 via the wiring pattern 160. Further, a filling resin 173 is filled in the cavity portion 157 and hardened. As a result, the IC chip 153 is completely covered with the filling resin 173, and has a structure with improved moisture resistance.

[0009]

However, the above-described conventional crystal oscillator has the following fundamental-level oscillation frequency band,
For example, it is a relatively low frequency oscillator used in a frequency band of about 13 MHz to 28 MHz. Therefore, assuming a LAN 90 that configures Gigabit Ethernet (registered trademark) as shown in FIG. 25, which performs high-speed communication processing of large-capacity communication information including data such as voice, still image, and moving image, this crystal is used. The communication control device using the oscillator has a problem in communication capability.

Specifically, the network group A is
A plurality of information terminals 91 having a communication capability of 10 Mbps are connected to the Gigabit Ethernet switch 95 via the hub 93.
It is connected to the. A plurality of information terminals 92 having a communication capability of 100 Mbps are connected to the Gigabit Ethernet switch 95A via the 100M repeater 94. The Gigabit Ethernet switch 95A is connected to the server 96 having a communication capacity of 1000 Mbps. The network groups B and C have the same configuration, and the Gigabit Ethernet switch 95B of the network group B is the router 97.
The Gigabit Ethernet switch 95C of the network group C is connected to the Gigabit Ethernet switch 95A via the router 98.

In the LAN 90, a clock frequency of about 25 MHz is used for the communication indicated by the circles.
A clock frequency of about 125 MHz is used for communication in the portion indicated by the mark. As described above, each communication control device that requires a crystal oscillator that oscillates a high frequency of 125 MHz is required to process enormous amounts of communication information of the entire network at high speed and accurately. Moreover, in response to the demand for high speed in information communication, a crystal oscillator that further oscillates a high frequency of 125 MHz or more is required.

On the other hand, the characteristics of the crystal oscillator for high-frequency oscillation used in high-speed communication control equipment are as follows:
It is important for the correct processing of information.

Now, the jitter J will be described in detail. As shown in FIG. 27, the jitter J is represented as a total jitter TJ including a jitter DJ which is a non-fluctuation component and a jitter RJ which is a fluctuation component. That is, it is known that the following equation (1) TJ = DJ + 14RJ ... (1) is satisfied.

Therefore, by suppressing the jitter RJ to a low value, the total jitter TJ can be suppressed, and high frequency oscillation using overtone oscillation can be stably and favorably performed. Specifically, for example, at a clock frequency of 125 MHz, the standard deviation σ centered at 8 ns needs to be 10 ps or less.

Since the above-mentioned conventional crystal oscillator does not have such characteristics, it should be used in, for example, a communication control device for processing a huge amount of communication information of the entire network at high speed and accurately. I couldn't.

Further, in order to perform accurate and stable oscillation,
The ground potential for grounding the oscillator circuit must be stable. For this reason, when the ground pattern is widened, a part that overlaps with the wiring pattern for connecting the piezoelectric vibrator to the oscillation circuit occurs, and the parasitic capacitance generated at that part makes the oscillation unstable and deteriorates the oscillation characteristics. There was a problem of letting it.

The present invention is intended to solve the problems of the prior art, and it is possible to suppress the generation of parasitic capacitance in the wiring pattern for connecting the piezoelectric vibrator to the oscillation circuit and the ground pattern, and at the same time, to ground. An object of the present invention is to provide a small-sized piezoelectric oscillator capable of stabilizing the potential, excellent in noise resistance, and capable of performing accurate and stable oscillation.

[0018]

A piezoelectric oscillator according to the present invention comprises a container body in which an upper cavity portion and a lower cavity portion are separated by a partition formed by laminating a plurality of insulating layers, and the upper cavity portion. And a IC that constitutes an oscillation circuit housed in the lower cavity portion.
A chip and an electronic component, and an external terminal formed around the lower surface of the container body and connected to the oscillation circuit, between insulating layers of a plurality of insulating layers that form the partition of the container body, and the same insulating layer. A ground pattern for grounding the oscillator circuit and a VCC for supplying power to the IC chip
The wiring patterns for piezoelectric vibrators for connecting the piezoelectric vibrators to the oscillation circuit are arranged on the lower main surface of the partition wall, and the ground pattern and the wiring pattern for piezoelectric vibrators are parasitic capacitances. In order to suppress the occurrence of the above, it is arranged such that the overlapping portion in the thickness direction is minimized through a part of the insulating layer forming the partition wall of the container body, and the VCC pattern is substantially formed by the ground pattern. It is arranged so that it is surrounded.

More specifically, the piezoelectric vibrator wiring pattern includes monitor electrode pads for measuring the characteristics of the piezoelectric vibrator.

According to this structure, it is possible to stabilize the ground potential by forming a large area ground pattern between the layers of the laminated body forming the partition wall. In addition, the wiring pattern for the piezoelectric vibrator has an arrangement relationship of suppressing the generation of parasitic capacitance with respect to the ground pattern. For this reason, no failure caused by the stray capacitance occurs, and accurate and stable oscillation can be performed.

Further, since the piezoelectric vibrator is housed in the upper cavity portion of the container body which is separated by the partition wall, and the IC chip and the electronic parts constituting the oscillation circuit are housed in the lower cavity portion, each element is constituted. Can be condensed and arranged in a narrow space, and the oscillation circuit composed of an IC chip or the like can be protected from noise, so that it is possible to make the piezoelectric oscillator highly reliable, compact, and small in mounting area. Become.

Further, by the ground pattern formed on the partition wall of the container body separating the piezoelectric vibrator and the IC chip,
It is possible to protect the IC chip from noise and reduce the jitter component of the oscillation waveform output from the output terminal of the external terminal electrode. As a result, it becomes possible to perform stable and favorable high-frequency oscillation using overtone oscillation.

Here, using the overtone oscillation,
The point that stable and favorable high frequency oscillation can be performed will be described in detail.

In the oscillation circuit in which the capacitance is added in series to the piezoelectric vibrator, the oscillation frequency f is expressed by the following equations (2) and (3): f = f0 (1 + 1 / {2γ (1 + CL / C0)}) ( 2) It is known that the relationship of γ = C0 / C1 ... (3) is satisfied.

Here, f0: series resonance frequency of the piezoelectric vibrator, C0: parallel equivalent capacitance of the piezoelectric vibrator, C1: series equivalent capacitance of the piezoelectric vibrator, γ: capacitance ratio, CL: load capacitance of the piezoelectric vibrator. Represent

The frequency change amount Δf satisfies the following expression (4), which is a modification of the above expression (1): Δf = f−f0 = f0 / {2γ (1 + CL / C0)} (4)

The relationship between the frequency change amount Δf and the load capacitance CL has a characteristic that, in the case of the fundamental wave, as shown in FIG. 17, the slope of the frequency change amount Δf becomes larger as the load capacitance CL becomes smaller.

On the other hand, in the case of overtone oscillation of the third harmonic or more, as shown in FIG. 18, the frequency variation Δf is substantially constant even if the load capacitance CL changes.

That is, it is understood that in the overtone oscillation of the third harmonic or more, the capacitance ratio γ becomes large (γ> 1000) and the frequency variation due to the load is small.

Therefore, when overtone oscillation of the third harmonic or more is used, stable and favorable high frequency oscillation can be performed.

[0031]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be specifically described below with reference to the drawings.

(First Embodiment) FIGS. 1 to 11 show a configuration example of a surface mount type crystal oscillator 100 which is a piezoelectric oscillator according to a first embodiment of the present invention. As the oscillator circuit, an overtone oscillator circuit having a third harmonic wave or more, for example, a third harmonic wave will be described as an example.

As shown in FIG. 2, the crystal oscillator 100 includes a substantially rectangular parallelepiped container body 1 in which an upper cavity portion 5 and a lower cavity portion 10 are separated by a partition wall 8, and an upper cavity portion 5. A rectangular crystal resonator 2 to be housed,
It is mainly composed of the IC chip 3 and the four electronic components 41 to 44 that form the oscillation circuit housed in the lower cavity portion 10, the metallic lid 6 and the filling resin 7.

The container body 1 comprises a plurality of substantially rectangular ceramic insulating layers 1a and 1b, a ceramic insulating layer 1c having rectangular openings formed in the central portion and in the upper, lower, left and right portions thereof, and a frame shape having a central opening in a cross shape. The ceramic insulating layer 1d is integrally laminated.

The ceramic insulating layers 1a and 1b serve as partition walls 8 for separating the crystal unit 2 from the IC chip 3 and the electronic components 41 to 44, and the ceramic insulating layers 1c and 1d.
The frame-shaped leg portion 9 is thus formed. The concave portion surrounded by the inner wall surface of the frame-shaped leg portion 9 and the lower surface of the partition wall 8 becomes the cavity portion 10. Then, external terminal electrodes 11 to 14 are formed at four corners of the lower surface of the container body 1.

More specifically, as shown in FIG. 6, a sealing conductor film 19 is formed on the upper surface of the container body 1, that is, the upper surface of the ceramic insulating layer 1a so as to surround the outer periphery thereof. In addition, crystal oscillator electrode pads 20 and 21 for connecting to the crystal oscillator 2 are arranged in parallel near the one end in the longitudinal direction on the surface of the container body 1. The crystal oscillator electrode pads 20 and 21 are arranged in parallel. Connection bumps 22 and 23 for forming a predetermined interval are formed on the lower surface of the crystal unit 2 on the upper side.

On the lower surface of the ceramic insulating layer 1a, as shown in FIG.
Island-shaped connection patterns 113 including via-hole conductors 25, 26 for connecting to the wiring 21 and via-hole conductors 27, 28 for connecting to a wiring pattern 31 of the ceramic insulating layer 1b described later are formed. Further, a Vcc pattern 112 for supplying power to the IC chip 3 and for connecting to the electronic component 44 serving as the bypass capacitor Cb is formed on this lower surface. A ground pattern 111 is formed on almost the entire surface so as to substantially surround the Vcc pattern 112. Via-hole conductors 131 to 131 formed in the ground pattern 111
Reference numeral 138 is for forming a conductor path for grounding the IC chip 3 and the oscillation circuit. In addition, the via-hole conductor 12 formed on the ground pattern 111
Reference numerals 5 and 126 are for connecting the sealing conductor film 19 formed on the upper surface of the ceramic insulating layer 1a and the ground pattern 111. Then, the metal lid 6 is bonded to the sealing conductor film 19 to cause the metal lid 6 to have a shielding effect. Also, Vcc pattern 11
The via-hole conductors 121 to 124 formed in No. 2 are for connecting to the electronic component 44 serving as the bypass capacitor Cb of the oscillation circuit and forming a conductor path for supplying power to the IC chip 3.

As shown in FIG. 8, on the lower surface of the ceramic insulating layer 1b, a mounting portion 114 for the IC chip 3 is formed in the substantially center thereof, and the oscillation characteristic of the crystal resonator 2 is independently measured around the mounting portion 114. Monitor electrode pads 34, 35 and a plurality of element electrode pads 33 are formed. Furthermore, IC
Chip 3, electronic components 41 to 44, and external terminal electrodes 11 to 11
A wiring pattern 31 for connecting 14 to form an oscillation circuit is formed. Via-hole conductors 121 to 124, 131 to 139 formed on the wiring pattern 31,
Reference numerals 121 'and 136' denote ceramic insulating layers 1c described later.
And to form a conductor path for connecting to the IC chip 3 and the oscillation circuit. The mounting portion 114 and the via-hole conductors 121, 1
21 ', 122, 123, and 124 become a part of the above-mentioned conductor path of the Vcc potential, and the via-hole conductors 131 to 13
5,137-139 are set to the ground potential.

As shown in FIG. 9, in the ceramic insulating layer 1c, a substantially rectangular IC cavity 101 is formed substantially in the center, and substantially rectangular electronic component cavities 102 to 105 are provided on the upper, lower, left and right sides thereof. Has been formed. Then, on the lower surface of the ceramic insulating layer 1c, IC electrode pads 32 and 32a for connecting to the IC chip 3 and a wiring pattern 30 for forming an oscillation circuit are formed. Also, the via-hole conductors 121, 124, 131-1
39, 121 ', 136' are connected to the wiring pattern 30 of the ceramic insulating layer 1c and the external terminal electrodes formed on the lower surface of the ceramic insulating layer 1d, and form a conductor path for connecting to the IC chip 3 and the oscillation circuit. It is for forming. The via hole conductors 121 and 124 and the IC
The electrode pad 32a forms a part of the conductor path of the Vcc potential.

The lower surface of the ceramic insulating layer 1d is shown in FIG.
As shown in FIG. 4, GND terminals 11 for grounding as external terminal electrodes at four corners, control terminals 12 for controlling the crystal oscillator 100, and V for supplying power.
A cc terminal 13 and an output terminal 14 for oscillating output are formed.

As described above, in the container body 1 formed by laminating the above-mentioned ceramic insulating layers 1a to 1d, the electrode pads of the ceramic insulating layers 1a to 1d and the wiring patterns 30 and 31 are via hole conductors. Each conductive path is formed via the above, and the IC chip 3 and the oscillation circuit formed of the electronic components 41 to 44 are connected to the crystal resonator 2.

As described above, the ground pattern 111 for grounding the oscillation circuit and the crystal unit 2 are provided between the ceramic insulating layers of the laminate forming the partition wall 8 of the container body 1.
Wiring patterns 113 and 31 for connecting the
And are configured to have an arrangement relationship for suppressing the generation of parasitic capacitance. Specifically, the ground pattern 111 is arranged between the ceramic insulating layers 1a and 1b, and the insulating layer 1b
On the lower main surface of the piezoelectric vibrator wiring pattern 113,
31 are arranged. Then, for example, the ground pattern 111 is formed so that the overlapped portion in the thickness direction is minimized via the ceramic insulating layer 1b forming the partition wall 8 of the container body 1.
Is the monitor electrode pad 3 in the wiring pattern 31.
Notches 111a to include positions corresponding to 4, 35
Is provided so that the piezoelectric vibrator wiring patterns 113 and 31 including the monitor electrode pads 34 and 35 and the ground pattern 111 do not overlap with each other.

As a result, it is possible to stabilize the ground potential by forming a large area ground pattern 111 between the layers of the laminate forming the partition wall 8. In addition, the wiring patterns 113 and 31 have an arrangement relationship with respect to the ground pattern 111 to suppress the generation of parasitic capacitance. Therefore, since no failure due to the stray capacitance occurs, accurate and stable oscillation can be performed.

Further, the crystal resonator 2 is housed in the upper cavity portion 5 of the container body 1 separated by the partition wall 8, and the IC chip 3 and the electronic components 41 to 44 constituting the oscillation circuit are housed in the lower cavity portion 10. Since the device is housed, each element can be condensed and arranged in a narrow space, and
Since the oscillation circuit composed of a C chip or the like can be protected from noise, the crystal oscillator 100 can be made highly reliable, small in size, and small in mounting area.

Further, the IC chip 3 is protected from noise by the jitter reducing structure formed in the partition wall 8 of the container body 1 which separates the crystal oscillator 2 and the IC chip 3 from the output terminal 14 of the external terminal electrode. It is possible to reduce the jitter component of the oscillation waveform. As a result, stable and favorable high frequency oscillation using overtone oscillation can be performed.

As the above-mentioned jitter reducing structure, a ground pattern 111 for grounding the oscillation circuit is arranged between the layers of the laminate forming the partition wall 8. That is, the crystal chip 2 and the IC chip 3 and the electronic component 41 that form the oscillation circuit.
By forming the ground pattern 111 on the partition wall 8 separating the partition walls 44 to 44, a large-area ground pattern 111 can be formed, so that the ground potential is stabilized and the stray capacitance between the oscillation circuit and the crystal resonator 2 is achieved. Is reduced, and thereby, the jitter component of the oscillation waveform output from the output terminal 14 of the external terminal electrode can be significantly reduced. Therefore, stable and favorable high-frequency oscillation using overtone oscillation can be performed more reliably.

Further, since the Vcc pattern 112 connected to the electronic component 44 serving as the bypass capacitor Cb and supplying power to the IC chip 3 is formed so as to be substantially surrounded by the ground pattern 111, the ground pattern is formed. 111 by Vcc pattern 1
It is possible to protect the IC chip 3 from the noise generated from 12 and further reduce the jitter component of the oscillation waveform output from the output terminal 14 of the external terminal electrode. Therefore,
Stable and favorable high-frequency oscillation using overtone oscillation can be more reliably performed. It should be noted that being substantially surrounded includes, as shown in FIG. 7, a form that completely surrounds the periphery and a part that is exposed from the open portion of the ground pattern 111.

An electronic component 44, which is a large-capacity bypass capacitor Cb connected between the Vcc pattern 112 and the ground pattern 111, is arranged in the lower cavity portion 10, and the bypass capacitor Cb in the Vcc conductor path is provided. The distance from the connection portion P of the electronic component 44, which is to be described, to the IC electrode pad 32a, which has the Vcc potential of the IC chip 3, is minimized. That is, since the connection is set to a short path, the influence of external noise is reduced due to the short path, so that high-frequency noise superimposed on the power supply voltage supplied to the external terminal electrode should be reliably removed. You can Thereby, the jitter component of the oscillation waveform output from the output terminal 14 can be further reduced. Therefore, stable and favorable high-frequency oscillation using overtone oscillation can be more reliably performed. Furthermore, since the electronic component 44 that serves as the bypass capacitor Cb is arranged in the lower cavity portion 10, the number of external circuit components mounted on the printed wiring board is reduced and wiring is simplified, resulting in high performance and small size. The crystal oscillator 100 will be achieved.

Further, since the oscillation circuit housed in the open lower cavity portion 10 of the container body 1 is covered with the resin, the oscillation circuit is protected and the moisture resistance is improved, and I
The heat dissipation effect of the C chip 3 can be improved.

Furthermore, if the crystal oscillator 100 is provided with frequency dividing means and is configured to be capable of dividing the oscillation output, it is possible to divide the oscillation output and obtain one or more outputs at a desired frequency. The frequency dividing means is composed of a flip-flop and a logic circuit and can be integrated in the IC chip 3.

Next, a method of manufacturing the above-mentioned container body 1 will be described.

This container body 1 comprises ceramic insulating layers 1a ...
It is formed by using a ceramic green sheet of 1d. Specifically, for example, via-hole conductors 25 to 28, 1 are provided on the rectangular ceramic green sheet that becomes the insulating layer 1a.
21 to 126, 131 to 138 to form through holes,
These through holes are filled with a high melting point metal paste such as molybdenum or tungsten. At the same time, a conductor film to be the crystal oscillator electrode pads 20 and 21, a conductor film to be the connection bumps 22 and 23, and a conductor film to be the sealing conductor film 19 are printed on the upper surface of the green sheet with a high melting point metal paste. Formed by.

Further, via hole conductors 27, 28, 121 to the rectangular ceramic green sheet which becomes the insulating layer 1b.
Through holes to be 124, 127, 128, 131 to 139 are formed, and these through holes are filled with a high melting point metal paste. At the same time, on the lower surface of the green sheet, a conductor film which will be the element electrode pad 33, the monitor electrode pads 34 and 35, and the wiring pattern 31 forming the oscillation circuit is formed.

Further, an island-shaped connection pattern 113, a Vcc pattern 112 and a pattern 112 for connecting the via-hole conductors 25 to 28 to the bonding surface of either the green sheet to be the ceramic insulating layer 1a or the ceramic insulating layer 1b. A conductive film to be the ground pattern 111 is formed on the entire surface so as to substantially surround the above by printing the above-mentioned high melting point metal paste.

Further, the via-hole conductor 1 is formed on the ceramic green sheet having the substantially rectangular openings 101 to 105 formed in the central portion of the ceramic insulating layer 1c and in the vertical and horizontal directions thereof.
21, 121 ', 124, 127, 128, 131-1
Through holes to be 33, 136 to 139 are formed, and these through holes are filled with a high melting point metal paste. At the same time, IC
A conductor film to be the wiring pattern 30 that forms the electrode pads 32 and 32a and the oscillation circuit is formed.

Further, the via-hole conductors 121, 121 ', 127, 12 are formed on the frame-shaped ceramic green sheet having a cross-shaped opening in the central portion which becomes the ceramic insulating layer 1d.
Through holes to be 8, 131, 132, 136, 136 ′ are formed, and these through holes are filled with a high melting point metal paste. At the same time, a substantially rectangular conductive film to be the terminals 11 to 14 is formed at four corners around the opening which is the mounting bottom surface of the green sheet.

Then, after laminating and press-bonding such green sheets, a firing process is performed. In particular, since the crystal resonator 2 is mounted on the upper surface of the container body 1 and the IC chip 3 is mounted on the cavity portion 10, the flatness of both surfaces is important. In the pressure-bonding step, pressing is performed with the upper surface of the container body 1 as a reference surface, but since the pressing is also applied to the bottom surface region of the cavity portion 10 with uniform pressure, for example, the cavity portion 10
To the auxiliary filling member, or press with a jig with a flat upper tip and a convex upper punch.
The insulating layers 1a and 1b and the insulating layers 1c and 1d are separately pressed, and then both are pressure bonded by pressing.

Next, in the container 1, the terminals 11 to 14 exposed on the surface, the sealing conductor film 19, the crystal oscillator electrode pads 20 and 21, the IC electrode pads 32 and 32a, the element electrode pad 33, and the monitor. The container body 1 is completed by performing Ni plating, flash gold plating, and the like on the electrode pads 34 and 35 and the various wiring patterns 30 and 31.

As a result, the via-hole conductors and the wiring patterns 30 and 31 formed inside the container body 1 are made of a refractory metal conductor such as molybdenum or tungsten, and are exposed to the outer surface of the container body 11 by the terminals 11. To 14, the sealing conductor film 19, the electrode pads 20, 21, 32, 32a,
33, 34, 35 and the wiring patterns 30, 31 have a refractory metal conductor as a base conductor, and a Ni layer, A
It has a multilayer structure of u layers.

On the upper surface of the container 1, the connection bumps 22 and 23 are formed on the crystal oscillator electrode pads 20 and 21 by using a refractory metal as a base conductor and having a multilayer structure of a Ni layer and an Au layer on the surface thereof. However, it may also be formed by printing and baking a silver conductive paste, coating and curing a resin paste containing Ag powder, or the like. Further, printing and application may be performed a plurality of times in order to make the height of the connection bumps 22 and 23 above a predetermined level. The height from the upper surface of the container body 1 to the tops of the connection bumps 22 and 23 is, for example, 15 μm.
˜20 μm.

Further, on the sealing conductor film 19, a seal ring 36 which is a substantially rectangular metal frame is joined by Ag brazing or the like. The seal ring 36 is made of Fe-Ni alloy 42 alloy, Fe-Ni-Co alloy Kovar, phosphor bronze, or the like, and has a structure corresponding to the shape of the sealing conductor film 19. Therefore, the area surrounded by the upper surface of the container body 1 and the seam ring 36 becomes the accommodation area (upper cavity portion 5) of the crystal unit 2.

A crystal oscillator 2 is arranged on the upper surface of the container body 1. The crystal oscillator 2 includes excitation electrodes 2b and 2c formed on both main surfaces of a rectangular crystal plate 2a that has been subjected to a predetermined cut, for example, AT cut, and the excitation electrodes 2b and 2c.
From one side to the other end, the island-shaped extraction electrode portions 2d, 2
e and. In addition, in FIG. 4, the excitation electrode 2c and the extraction electrode 2e on the lower surface side are indicated by dotted lines. The extraction electrodes 2d and 2e are connected to the crystal oscillator electrode pads 20 and 21 through conductive adhesives 2f and 2g. Also,
The excitation electrodes 2b and 2e and the extraction electrodes 2d and 2e are made of Cr or Ni as a base layer and A as a surface layer on both surfaces of the crystal plate 2a.
g and Au are deposited and formed by a thin film technique such as vapor deposition and sputtering.

The crystal resonator 2 mounted on the upper surface side of the container body 1 is hermetically sealed by the metal lid body 6.
The metallic lid 6 is made of a metallic material such as Kovar or 42 alloy and has a thickness of, for example, 0.1 mm, and has a seam ring 36 brazed to the sealing conductor film 19 on the surface of the container 1. Welded / joined. Incidentally, it is desirable that Ni, aluminum or the like be adhered to the outer surface side main surface of the metal lid body 6. As a result, the brazing filler metal can be prevented from wrapping around the main surface of the lid 6 during welding, and stable and strong joining can be performed.

As shown in FIG. 5, the cavity 10 of the container body 1 accommodates the IC chip 3 and the electronic components 41 to 44 which form the oscillation circuit. The IC chip 3 includes oscillation oscillators 51 and 52 that form an oscillation circuit.
(See FIG. 11) and is supplied with the power supply voltage Vc
It has a c-electrode, a GND electrode connected to the ground potential, a crystal connection electrode connected to the crystal oscillator 2, an output electrode for oscillating output, and a control terminal capable of externally adjusting the frequency. The electronic component 41 is a drain capacitance capacitor Cd, the electronic component 42 is a gate capacitance capacitor Cg, the electronic component 43 is a feedback resistor Rf, and the electronic component 44 is a bypass capacitor Cb having a large capacitance (for example, a capacitance of 103 pF). .

As shown in the circuit diagram of FIG. 11, the electronic component 42 which is the gate capacitance capacitor Cg and the electronic component 41 which is the drain capacitance capacitor Cd are the input and output capacitances of the oscillation circuit. The electronic component 43 that is the feedback resistor Rf is connected between the output and the input of the oscillating inverters 51 and 52 that are the oscillating portion of the oscillating circuit, and is for adjusting the level of the feedback signal. The electronic component 44, which is a large-capacity bypass capacitor Cb, is for removing high frequency noise superimposed on the power supply voltage supplied to the external terminal electrode 13 of Vcc.

The Vcc electrode of the IC chip 3 is VccIC
It is led out to the Vcc terminal 13 via the electrode pad 32a and the wiring pattern 30 which comprises an oscillation circuit. Also,
The output electrode is led to the output electrode 14 via a predetermined IC electrode pad 32 and a wiring pattern 30 that constitutes an oscillation circuit. Further, the GND electrode is led out to the external terminal electrode 11 via a predetermined IC electrode pad 32 and a wiring pattern 30 forming an oscillation circuit. The control terminal is led out to the external terminal electrode 12 through a predetermined IC electrode pad 32 and a wiring pattern 30 which constitutes an oscillation circuit. Further, the two crystal connection electrodes are provided with a predetermined IC electrode pad 32 and a wiring pattern 30, which constitutes an oscillation circuit.
31 and monitor electrodes 34 and 35, and is electrically connected to the electrode pads 20 and 21 on the upper surface of the container body 1 through the conductive paths.

Each of these electrodes forms an aluminum electrode 3a on the non-mounting surface side of the IC chip 3 and is connected to a predetermined IC electrode pad 32, 32a via a bonding wire 4. The mounting surface of the IC chip 3 is connected to the Vcc pattern of the insulating layer 1a via the via-hole conductors 122 and 123 formed in the insulating layer 1b.

The electronic components 41 to 44 are chip-shaped components, and each electronic component 41 to 44 is a pair of element electrode pads 3.
3 and 33 are bonded via a conductive resin adhesive containing Ag powder.

The IC chip 3 and the four electronic components 41 to 44 are arranged in the cavity portion 10 so as to minimize the mounting space according to the planar shape of the cavity portion 10. There is.

The cavity 10 is filled with a filling resin 7 in order to firmly bond the IC chip 3 and the electronic components 41 to 44 and to improve the moisture resistance reliability. The filling resin layer 7 is filled and hardened so as to completely cover at least the upper surfaces of the IC chip 3 and the electronic components 41 to 44. The filling resin 7 should not be projected from the opening surface of the cavity 10. this is,
This is because the surface mount crystal oscillator 100 is stably arranged on the printed wiring board.

In the crystal oscillator 100 described above, as shown in FIG. 5, the IC chip 3 and the four electronic components 41 to 44 are used.
In mounting the component in the cavity portion 10, a component having a large planar shape such as the IC chip 3 is arranged at the center, and electronic components 41 to 44 having a small outer shape are arranged around the component to save space. The layout structure and the bottom structure of the container body 1 are considered. Specifically, the IC chip 3 is arranged in the IC cavity 101 provided substantially in the center of the bottom surface of the container body 1, and the electronic components 41 to 44 are provided in the electronic component cavities 102 to 105 provided on the upper, lower, left and right sides thereof. They are arranged respectively. Then, the external terminal electrodes 11 to 14 are arranged in the four corner regions on the bottom surface of the container body 1. With such an arrangement, there is no wasted space on the entire bottom surface of the container body 1, and the crystal oscillator 100
The mounting area of the container body 1 on the printed wiring board can be extremely miniaturized.

Further, as shown in the circuit diagram of the crystal oscillator 100 of FIG. 11, the IC chip 3 is composed of only the oscillation inverters 51 and 52 which constitute the oscillation circuit. Electronic components 41, which are drain capacitance capacitors Cd as input / output capacitances of the oscillation circuit, are provided above and below the IC chip 3,
An electronic component 42 which is a gate capacitance capacitor Cg is arranged, and an electronic component 43 which is a feedback resistor Rf and an electronic component 44 which is a large-capacity bypass capacitor Cb are arranged on the left and right sides of the IC chip 3.

As described above, the electronic component 41 that is the drain capacitance capacitor Cd, the electronic component 42 that is the gate capacitance capacitor Cg, and the electronic component 43 that is the feedback resistor Rf that form the oscillation circuit are not integrated into one chip 3. By adopting the above, it becomes easy to appropriately select these electronic components 41 to 43 and set the crystal oscillator to desired characteristics.

The electronic component 44, which is a large-capacity bypass capacitor Cb, is for removing high-frequency noise superimposed on the power supply voltage supplied to the external terminal electrode 13 of Vcc. Since it was difficult to integrate in No. 3, it was arranged on the printed circuit board on which the crystal oscillator was mounted. On the other hand, in the present invention, this electronic component 44 is also mounted in the cavity portion 10 of the container body 1 as a chip-shaped element. For this reason, the number of electronic components mounted on the printed wiring board is reduced, wiring is simplified, and it can greatly contribute to the miniaturization required for mobile communication devices, etc., and surface mounting is very easy to handle. Type crystal oscillator 100
Becomes

Next, a method of assembling the above-mentioned crystal oscillator 100 will be described with reference to the process diagram shown in FIG.

First, the container body 1 is formed (step S1).
The detailed structure and the method for forming the same are as described above.

At the same time, a step of selecting the crystal unit 2 is performed (step S2). That is, since the frequency characteristics of the crystal resonator 2 change greatly due to a slight change in the cut angle, the rank is classified according to the variation of the frequency.

Then, the container body 1, the crystal oscillator 2, the IC chip 3, the electronic components 41 to 44 such as capacitors and resistors, and the metallic lid body 6 are prepared. In addition, on the surface of the container body 1,
The seam ring 36 is joined by brazing or the like, and the bump 24 is formed.
Bumps 22 and 23 are formed on 0 and 21, respectively. Furthermore, on the aluminum electrode of each electrode on the front surface side of the IC chip 3,
Gold bumps are formed.

Next, the crystal unit 2 having predetermined characteristics is mounted (step S3). Specifically, the connection bumps 22 and 23 formed on the crystal oscillator electrode pads 20 and 21 on the surface of the container body 1 and the extraction electrode portion 2 of the crystal oscillator 2 are connected.
The lead-out electrode portions 2d and 2e and the electrode pads 20 and 21 are bonded to each other by using conductive adhesives 2f and 2g such as Ag so that the lead-out electrode portions 2d and 2e and the electrode pads 20 and 21 are bonded to each other.

As a result, the excitation electrode 2 of the crystal unit 2 is
b and 2c are electrode pads 20 and 21 and via-hole conductor 2
The electrodes 5 to 28 and the wiring patterns 30 and 31 are electrically connected to predetermined electrode pads 32 and monitor electrode pads 34 and 35 formed on the bottom surface of the cavity portion 10.

Next, the frequency of the crystal unit 2 is measured (step S4). Specifically, the monitor electrode pads 34, 35
The measuring terminal (probe) of the frequency measuring device is brought into contact with the crystal oscillator 2 and the crystal oscillator 2 is oscillated in a predetermined manner to measure the frequency.

Next, the frequency of the crystal unit 2 is adjusted (step S5). Specifically, based on the above measurement results,
On the excitation electrode 2b on the upper surface side of the crystal unit 2 bonded to the container body 1, an inert gas such as Ar is struck to the excitation electrode 31 by using an ion gun or the like to scrape the excitation electrode 2b, or a metal such as Ag. Is evaporated and the mass of the excitation electrode 2b is changed to adjust the oscillation frequency.

Next, the adjusted frequency of the crystal unit 2 is stabilized (step S6). Specifically, the entire container body 1 to which the crystal unit 2 is bonded is heat-treated at 150 to 250 ° C. This heat treatment is generally called heat aging. This thermal aging stabilizes the frequency-adjusting deposit deposited on the excitation electrode 2b, and volatilizes impurities such as a solvent contained in the conductive paste.

Next, the container body 1 accommodating the crystal unit 2 is sealed with the metallic lid body 6 (step S7). Specifically, the metal lid 6 is placed on the seal ring 36, and the periphery of the metal lid 6 is moved by a roller electrode (not shown) for seam welding while applying a welding current. And weld them together.

Next, the IC chip 3 and the electronic components 41 to 4
4 is mounted in the cavity portion 10 (step S8).

Specifically, the electronic components 41 to 44 are joined by applying a conductive resin paste containing Ag powder or the like between the pair of element electrode pads 33.33 and connecting the electronic components 41 to 44 thereto. Place and cure the conductive resin paste by curing.

To mount the IC chip 3, plasma cleaning is performed after the IC chip 3 is positioned and mounted and die-bonded, and then each electrode made of aluminum electrodes formed on the non-mounting surface side of the IC chip 3 is mounted. , And is connected to a predetermined IC electrode pad 32 via the bonding wire 4.

In order to prevent the heat generated by the curing of the conductive paste from being applied to the IC chip 3, it is advisable to first mount the electronic components 41 to 44 and then mount the IC chip 3.

By the way, when mounting the IC chip 3,
Au bumps are formed on the aluminum electrodes of the respective electrode parts on the non-mounting surface side of the IC chip 3 using Au wires or the like.
When high heat is applied with the Au bumps formed on the aluminum electrodes, the Cargendard void phenomenon occurs due to the difference in the diffusion speed of Al and Au, and the connection strength at the bonding interface between Al and Au decreases. The problem occurs.

On the other hand, in the above manufacturing method, since the IC chip 3 is mounted after the thermal aging step (step S6), the electrodes of the IC chip 3 and the connecting members (bumps and wires) are mounted.
Since it is possible to effectively suppress the occurrence of the Cargendhal void phenomenon that occurs at the joint surface, the joint state is also stable, which also enables stable operation of the IC chip.

Next, the cavity 10 is filled and covered with the filling resin 7 so as to cover the IC chip 3 and the electronic components 41 to 44 (step S9). Specifically, the IC chip 3 and the electronic component 4 arranged in the cavity portion 10
The whole of 1 to 44 is filled and cured with an epoxy resin having excellent moisture resistance.

As described above, the assembly of the crystal oscillator 100 is completed, and then a predetermined electric test is performed.

According to the above manufacturing method, the crystal resonator 2 is mounted before the IC chip 3 and the electronic parts 41 to 44 are mounted. Therefore, the crystal resonator 2 is mounted on the upper cavity portion of the container body 1. 5 and after the container body 1 is sealed,
Since the IC chip 3 and the electronic components 41 to 44 are mounted on the lower cavity portion 10 of the container body 1 by using a conductive resin paste or the like, foreign matter or outgas generated from the conductive resin paste at that time is generated. It is possible to prevent the crystal oscillator 2 from being attached.

As a result, the crystal impedance value, which is the resonance resistance value of the crystal unit 2, increases, and in contrast to the high-frequency oscillation using overtone oscillation that is easily affected by foreign matter, the effect of foreign matter is eliminated and the overtone oscillation is eliminated. It is possible to stabilize and oscillate a high frequency oscillation using the.

In the above manufacturing method, a thermal aging process for stabilizing the frequency of the crystal unit 2 is performed between the mounting process of the crystal unit 2 and the mounting process of the IC chip 3 and the electronic components 41 to 44. Provided. That is, since the thermal aging process of the crystal unit 2 can be performed before mounting the IC chip 3 or the like, unnecessary heat is not applied to the IC chip 3, and therefore the IC
The operational reliability of the oscillation circuit including the chip 3 and the like can be improved, and high-frequency oscillation using overtone oscillation can be made stable and favorable.

FIG. 19 shows the crystal oscillator 100,
(A) Reflowed at 250 ° C., and (b) 125
106.250M for heat aged at ℃
The change in the characteristics when the oscillation is performed at Hz is represented by the time on the horizontal axis and the frequency variation rate on the vertical axis. Further, FIG. 20 shows similar test results for a conventional oscillator having a structure in which a crystal oscillator and an oscillation circuit IC are arranged in one cavity.

From this result, it is clear that the crystal oscillator 100 according to the present invention hardly changes the frequency characteristic due to heat, whereas the conventional oscillator greatly changes the frequency characteristic due to heat.

(Second Embodiment) FIGS. 13 to 16 show a configuration example of a surface mount type crystal oscillator 300 which is a piezoelectric oscillator according to a second embodiment of the present invention.

As shown in FIG. 13, this crystal oscillator 300 has a lower cavity portion 340d for accommodating the IC chip 303 on the lower side of the entire container and a crystal resonator 302 on the upper side. Upper cavity part 35
0 is formed. The lower cavity portion 340d that accommodates the IC chip 303 is a surface-mounted crystal oscillator that is open on the upper surface side.

That is, the container body 301 is the first container 310.
And a second container 340. And
The first container 310 includes a plate-shaped ceramic layer 310a serving as a partition wall and a ring-shaped ceramic layer 310b, and a seam ring 336 is arranged on the surface of the ring-shaped ceramic layer 310b. The crystal resonator 302 is disposed in the upper cavity portion 350 defined by the ceramic layer 310a, the ceramic layer 310b, and the seam ring 336, and the crystal resonator 302 is hermetically sealed by the metallic lid 306. It has been stopped. The ceramic layer 310a has a laminated structure (not shown) as in the above-described first embodiment, a ground pattern 111a is arranged between the layers, and is connected to the via-hole conductor 326 having the GND potential. .

In the second container 340, a flat ceramic layer 340a and a substantially rectangular IC cavity 401 are formed substantially in the center, and upper and lower, left and right cavities 402 for electronic parts are substantially rectangular. To 405 are formed, and a ring-shaped ceramic layer 340c. This ceramic layer 34
0a and the lower cavities 340d defined by the ceramic layers 340b and 340c, the IC chip 3 and the electronic components 41 to 44 are arranged as shown in FIG. In addition, on the bottom surface of the cavity portion 340d, I
Electrode pads on which the C chip 303 and electronic components 341 to 344 are arranged and a predetermined wiring pattern are formed.

Then, at the four corners of the lower surface of the first container 310, as shown in FIG.
354 is formed. Of these, the joining terminal electrode 35
1, 352 are electrically connected to the crystal resonator electrode pad 320 via the via-hole conductor 325. Then, the bonding terminal electrodes 353 and 354 have the GND potential and are electrically connected to the seam ring 336 through the via-hole conductor 326.

As shown in FIG. 15, the second container 340 has a cavity portion 340d opened on the upper surface. The bonding terminal electrodes 361 to 364 are formed around the opening of the cavity portion 340d.
The joining terminal electrodes 361 and 362 are provided in the first container 31.
0 is a joining terminal electrode connected to the joining terminal electrodes 353 and 354 on the lower surface of the first container 310, and the joining terminal electrodes 363 and 364 are the joining terminal electrodes 351 and 35 on the lower surface of the first container 310.
2 is a joining terminal electrode connected to 2. The bonding terminal electrodes 361 to 364 are connected to the ceramic layers 340c, 34.
It is electrically connected to a predetermined wiring pattern through a via-hole conductor (not shown) which penetrates 0b.

External terminals 311 to 314 are provided at the four corners of the lower surface of the second container 340 as shown in FIG.
Are formed. The external terminals 311 to 314 are connected to a predetermined wiring pattern via via hole conductors (not shown) of the ceramic layer 340a.

For example, the external terminal 311 is a Vcc terminal electrode, the external terminal 312 is an output terminal for oscillating output, the external terminal 313 is a GND terminal, and the external terminal 31.
Reference numeral 4 is a control terminal used when adjusting the frequency.

The first container 310 and the second container 340 are connected to each other via the conductive joining member 360 of a conductive resin paste containing a metal powder such as solder or Ag. The joining terminal electrodes 351 to 354 and the joining terminal electrodes 361 to 364 of the second container 340 are joined and integrated. That is, 34 of the second container
The lower cavity portion 340d, which is open above 0, is covered and laminated by the first container 310.

Then, the lower cavity portion 340 is arranged so that electronic components 41 to 44 having small shapes are arranged around the component having a large planar shape such as the IC chip 3 as a center.
It is mounted in the circuit d to form the oscillator circuit shown in FIG. Specifically, the IC chip 3 is arranged in the IC cavity 401 provided substantially in the center of the upper surface of the second container 340, and the electronic component cavities 4 are provided above, below, left and right thereof.
The electronic components 41 to 44 are arranged on 02 to 405, respectively. Then, the external terminals 311 to 314 are arranged at the four corners on the bottom surface of the second container 340.

It is needless to say that the piezoelectric oscillator of the present invention is not limited to the specific configuration of each of the above-described embodiments, and may have a configuration modified, added or deleted as necessary.

The structure of the piezoelectric oscillator according to the present invention is as follows.
The present invention is not limited to the above-described high frequency oscillator using overtone oscillation, but can also be applied to an oscillator using a fundamental wave.

[0110]

As described above, according to the piezoelectric oscillator of the present invention, it is possible to stabilize the ground potential by forming a large area ground pattern between the layers of the laminated body forming the partition wall. Further, since the piezoelectric vibrator wiring pattern is arranged relative to the ground pattern so as to suppress the generation of parasitic capacitance, no trouble caused by stray capacitance occurs, so that accurate and stable oscillation can be performed. .

Further, since the piezoelectric vibrator is housed in the upper cavity portion of the container body separated by the partition wall, and the IC chip and the electronic parts constituting the oscillation circuit are housed in the lower cavity portion, each element is Can be condensed and arranged in a narrow space, and the oscillation circuit composed of an IC chip or the like can be protected from noise, so that the piezoelectric oscillator can be made highly reliable, small in size, and small in mounting area.

[Brief description of drawings]

FIG. 1 is an external perspective view showing a configuration example of a surface-mounted crystal oscillator that is a piezoelectric oscillator according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a configuration example of a surface mount type crystal oscillator which is a piezoelectric oscillator according to the first embodiment of the present invention.

FIG. 3 is a side view showing a configuration example of a surface mount type crystal oscillator which is a piezoelectric oscillator according to the first embodiment of the present invention.

FIG. 4 is a top view showing a configuration example of a surface mount type crystal oscillator which is a piezoelectric oscillator according to the first embodiment of the present invention with a lid omitted.

FIG. 5 is a bottom view showing a configuration example of a surface mount type crystal oscillator which is a piezoelectric oscillator according to the first embodiment of the present invention with a filling resin omitted.

FIG. 6 is a top view showing a configuration example of a ceramic insulating layer 1a constituting a container body of a surface mount type crystal oscillator which is a piezoelectric oscillator according to the first embodiment of the present invention.

FIG. 7 is a bottom view showing a configuration example of a ceramic insulating layer 1a which constitutes a container body of a surface mount type crystal oscillator which is a piezoelectric oscillator according to the first embodiment of the present invention.

FIG. 8 is a bottom view showing a configuration example of a ceramic insulating layer 1b constituting a container body of a surface mount type crystal oscillator which is a piezoelectric oscillator according to the first embodiment of the present invention.

FIG. 9 is a bottom view showing a configuration example of a ceramic insulating layer 1c which constitutes a container body of a surface mount type crystal oscillator which is a piezoelectric oscillator according to a first embodiment of the present invention.

FIG. 10 is a bottom view showing a configuration example of a ceramic insulating layer 1d which constitutes a container body of a surface mount type crystal oscillator which is a piezoelectric oscillator according to the first embodiment of the present invention.

FIG. 11 is a diagram showing an oscillation circuit of a surface-mounted crystal oscillator that is a piezoelectric oscillator of the present invention.

FIG. 12 is a process drawing showing a manufacturing process of a surface-mounted crystal oscillator that is a piezoelectric oscillator of the present invention.

FIG. 13 is a sectional view showing a configuration example of a surface mount type crystal oscillator which is a piezoelectric oscillator according to a second embodiment of the present invention.

FIG. 14 is a bottom view showing a configuration example of a first container constituting a container body of a surface mount type crystal oscillator which is a piezoelectric oscillator according to a second embodiment of the present invention.

FIG. 15 is a top view showing a configuration example of a second container constituting a container body of a surface mount type crystal oscillator which is a piezoelectric oscillator according to a second embodiment of the present invention.

FIG. 16 is a bottom view showing a configuration example of a second container which constitutes a container body of a surface mount type crystal oscillator which is a piezoelectric oscillator according to a second embodiment of the present invention.

FIG. 17 is a graph showing the relationship between the frequency change amount Δf during oscillation due to the fundamental wave and the load capacitance CL.

FIG. 18 is a graph showing the relationship between the frequency change amount Δf during oscillation due to overtone and the load capacitance CL.

FIG. 19 is a graph showing changes in frequency characteristics due to heat in the surface-mounted crystal oscillator that is the piezoelectric oscillator of the present invention, (a) reflowed at 250 ° C., (b).
Represents the one heat-aged at 125 ° C., respectively.

FIG. 20 is a graph showing changes in frequency characteristics due to heat in a conventional surface mount crystal oscillator, in which (a) is 2
Reflowed at 50 ° C., (b) represents heat aged at 125 ° C., respectively.

FIG. 21 is a cross-sectional view showing a configuration example of a conventional surface mount crystal oscillator.

FIG. 22 is a top view showing a configuration example of a conventional surface mount crystal oscillator with the lid omitted.

FIG. 23 is a bottom view showing a configuration example of a conventional surface mount type crystal oscillator with a filling resin omitted.

FIG. 24 is a diagram showing an oscillation circuit of a conventional surface mount crystal oscillator.

FIG. 25 is a diagram showing a configuration example of a LAN that configures Gigabit Ethernet using a high-speed communication control device using a piezoelectric oscillator.

FIG. 26 is an explanatory diagram for explaining jitter.

FIG. 27 is an explanatory diagram for explaining jitter.

[Explanation of symbols]

1 container 2 Crystal oscillator (piezoelectric oscillator) 3 IC chips 5 Upper cavity part 8,310a Partition (jitter reduction structure) 10 Lower cavity part 11 GND terminal 13 Vcc terminal 14 output terminals 31,113 Piezoelectric vibrator wiring pattern 34, 35 monitor electrode pad 41-44 Electronic parts 100,300 Crystal oscillator (piezoelectric oscillator) 111 ground pattern

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁷ identification code FI H03H 9/02 H03H 9/02 L H01L 41/08 U (58) Fields investigated (Int.Cl. ⁷ , DB name) H03B 5 / 00-5/36 H01L 23/02 H01L 25/16 H01L 41/09 H03H 9/02

Claims (2)

(57) [Claims] 1. A container body in which an upper cavity portion and a lower cavity portion are separated by a partition wall formed by stacking a plurality of insulating layers, a piezoelectric vibrator housed in the upper cavity portion, and An IC chip and an electronic component forming an oscillation circuit housed in the lower cavity portion and an external terminal formed around the lower surface of the container body and connected to the oscillation circuit are provided, and form a partition wall of the container body. Insulation layers of multiple insulation layers
A ground pattern for grounding the oscillation circuit and a VCC pattern for supplying power to the IC chip between the same insulating layers , and for connecting the piezoelectric vibrator to the oscillation circuit on the lower main surface of the partition wall. Of each of the piezoelectric vibrator wiring patterns, and a part of the insulating layer forming the partition wall of the container body is arranged so that the ground pattern and the piezoelectric vibrator wiring pattern suppress the generation of parasitic capacitance. A piezoelectric oscillator, wherein a superposed portion in the thickness direction is arranged so as to be minimal, and the VCC pattern is arranged so as to be substantially surrounded by the ground pattern. 2. The piezoelectric oscillator according to claim 1, wherein the piezoelectric vibrator wiring pattern includes a monitor electrode pad for measuring characteristics of the piezoelectric vibrator.