JP3435736B2 - Communication control device - Google Patents

Description

Detailed Description of the Invention

[0001]

The present invention relates to a high speed communication control system,
In particular, it relates to a communication control device suitable for a local area network (LAN).

[0002]

2. Description of the Related Art Conventionally, a communication controller for connecting a high-speed transmission line such as a LAN to an information processing device such as a personal computer or a workstation is classified into an intelligent type and a non-intelligent type due to the difference in structure. There is. The intelligent type communication controller consists of a bus controller for connecting the communication controller to the bus to which the system processor and system memory are connected, a network controller for sending and receiving frame data while directly controlling the transmission path, and a lower layer. It consists of a local processor for protocol processing and a local memory for storing communication data. The communication controller performs processing relating to, for example, the second and lower layers of the OSI reference model as necessary, and leaves the third and higher layers to the system processor. The transmission line and the system memory are connected via a communication controller, and the frame data is temporarily stored in the local memory and then copied by the system processor to the system memory. Therefore, for example, FDDI (Fibe
r Distributed Data Interface) has a transmission capacity of 1
High-speed LAN (Local Area Network) with 00 Mbps
In this case, compared with the non-intelligent type in which frame data is directly transferred to the system memory, the concentrated load on the bus can be mitigated and the underrun and overrun errors that occur can be prevented. An example of this configuration is, for example, Japanese Patent Application Laid-Open No. 2-3.
2650.

The non-intelligent type communication controller is a type without a local processor, and stores a communication controller and a network controller for directly transmitting and receiving frame data while directly controlling a transmission line. It is composed of a local memory. The network controller performs, for example, processing relating to the first layer (physical layer) and the 1.5th layer (media access control) of the OSI reference model in real time according to the transmission speed of the transmission path. The data frame is once stored in the local memory by the network controller, and then copied to the system memory by the system processor. Therefore, the lower layer is processed by the local processor, so that the performance is higher than that of the intelligent type. Further, the cost is low because there is no local processor. For this, for example, the journal of the Institute of Electronics, Information and Communication Engineers Autumn Meeting (199
2 years, B-433, Kitamura et al., Performance evaluation aimed at high-speed protocol processing in workstations) and IEEE
Communication Magazine (June, 1989, David D. Clark and others,
An Analysis of TCP Processing Overhead).

[0004]

However, in the above prior art, there is a data transfer between the system memory and the local memory.
Since a copy is generated, the performance deteriorates accordingly. Further, since the data is moved using the system processor, the load on the system processor becomes heavy.

There is also a problem when the data copy between the system memory and the local memory is performed by the communication controller without using the system processor. For example, when the buffers handled by the communication controller and the buffers handled by the protocol programs have different formats, it is necessary to transfer the data. Taking reception as an example, first, the communication controller transfers data in its own format to a buffer prepared in the system memory. After that, it is transferred to the buffer handled by the protocol program. The buffer handled by the communication controller is, for example, a buffer dedicated to the communication controller hardware in which a fixed size is allocated to a fixed address, and the buffer handled by the protocol program is, for example, a plurality of small-sized areas connected in a chain and a frame length. It is a buffer that uses the memory effectively by changing the number of areas according to. Therefore, it takes time to move the data between the buffers, and the performance deteriorates accordingly.

These problems also exist in a multi-protocol processing device that processes a plurality of communication protocols and a multi-network control device that supports a plurality of networks.

It is an object of the present invention to provide a high speed communication control device in the above communication control system, which enables direct data transfer between communication hardware for controlling a transmission line and software for processing a communication protocol.

[0008]

In order to achieve the above object, a communication control device of the present invention includes a protocol program for processing a communication protocol, a protocol buffer managed by the protocol program, and a transmission path for controlling data. It has a communication controller for transmitting and receiving and a communication buffer managed by the communication controller. Then, a shared buffer in which the protocol buffer and the communication buffer are shared is provided on the system memory so that the frame data from the transmission path can be exchanged between the communication protocol and the communication controller without performing unnecessary copying.

Further, the shared buffer is composed of a plurality of areas.

Further, the communication controller is composed only of a network controller for directly controlling the transmission path and a bus controller for controlling the bus, and the frame data from the transmission path is stored in a shared buffer on the system memory without buffering on the way. Forward.

In addition to the network controller for directly controlling the transmission path and the bus controller for controlling the bus, the communication controller is composed of a local processor and a local memory, and frame data from the transmission path is stored in the local memory inside the communication controller. Then, the communication controller transfers the data to a shared buffer on the system memory.

The shared buffer is composed of a data buffer for storing data, a protocol buffer descriptor for the communication protocol program to manage the data buffer, and a communication buffer descriptor for the communication controller to manage the data buffer. .

A means for selecting a protocol is added to the shared buffer so that a plurality of communication protocols can be processed.

Further, a plurality of transmission lines and the above-mentioned shared buffer are provided, and means for selecting a transmission line is added to the communication protocol program so that the transmission data can be sent to the corresponding transmission line.

Further, after the communication protocol program receives and processes or processes the reception frame data from the transmission path by the transmission path selection means, the data is transferred between the buffers.
Data can be sent to another transmission line without moving the data.

Further, in a device having two processing units A and B that are asynchronously and independently operating, a buffer managed by the processing unit A and a buffer managed by the processing unit B are provided between the two processing units. A shared shared buffer is provided to enable high-speed data communication without unnecessary copying between the two processing units.

[0017]

According to the present invention, the protocol buffer and the communication buffer are shared by the above-mentioned means, so that data can be communicated at high speed without extra data movement.

According to the present invention, the frame data is transmitted and received continuously, or one frame data is divided into a plurality of parts and stored.

According to the present invention, the frame data is directly transmitted / received by the transmission path and the communication protocol.

In addition, according to the present invention, unlike the above case in which the frame data is directly transferred to the system memory through the bus, the present invention can alleviate the concentrated load on the bus, and the underrun and overrun errors caused thereby can be eliminated. It is also possible to prevent this, and further, the frame data can be directly exchanged between the communication controller and the communication protocol.

Further, according to the above means, the present invention uses the above-mentioned protocol buffer descriptor and communication buffer descriptor in a queue structure.

Further, according to the above-mentioned means, the present invention is applicable to a plurality of communication protocols, and a frame-delay with a transmission line.
Exchange data directly.

Further, according to the above means, the present invention directly transmits / receives the communication protocol and the frame data to / from a plurality of transmission lines.

Further, according to the above means, according to the present invention, frame data can be passed from one transmission line to another transmission line without wasteful movement of data between buffers. You can realize various bridges, routers and gateways.

Further, according to the present invention, the buffer is shared between the two independent processing units by the above means, so that the data can be communicated at high speed without extra data movement.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the block diagram and the flow chart.

FIG. 1 is a block diagram showing the configuration of a communication control system according to an embodiment of the present invention. The communication control system includes a system processor 1 that executes a communication protocol, a system memory 2, and a communication controller 4 that transmits and receives data while controlling a transmission path 3.
The bus 8 is for connecting the above-mentioned components and is used for exchanging information. At this time, information such as control code and communication data flows. In the configuration, the system processor 1 and the system memory 2 perform communication protocol processing, application program processing, and overall control of the communication control system. The system memory 2 is also used as a storage unit for communication data in addition to various program codes running on the system processor 1. As the program, as shown in FIG. 1, a driver 21 that controls the communication controller 4, a protocol program 22 that processes a communication protocol, an application program 23, and a driver 2
1 and a buffer management unit 25 that manages the protocol buffer used by the protocol program 22. There are other operating systems, but they are omitted here because they are not directly related.

An internal structure and an outline of data reception operation when the communication controller 4 is a non-intelligent type will be described.

FIG. 12 shows the internal structure of the non-intelligent type communication controller 4. The network controller 42 sends and receives data while directly controlling the transmission path 3. The bus controller 41 is for connecting the network controller 42 to the bus 8 shown in FIG. The network controller 42 is, for example,
Am79C900 manufactured by AMD is used. In the case of transmission, the bus controller 41 instructs the system memory 2 shown in FIG.
The data in the above is read out via the bus 8, and the network controller 42 sends this out to the transmission line 3. In the case of reception, first, the network controller 42 receives the data from the transmission path 3, and the bus controller 41 transfers it to the system memory 2 via the bus 8 according to an instruction from the network controller 42. After the transmission / reception is completed, the network controller 42 notifies the system processor 1 through the bus controller 41 of the transmission end interrupt signal 216 and the reception interrupt signal 217.

FIG. 13 shows how the non-intelligent type communication controller 4 is used to receive data. The driver 21 includes a shared buffer 215 shared by the protocol program 22 and the communication controller 4,
The reception interrupt processing unit 213 is configured, and the protocol program 22 includes a protocol reception queue 222 and a transmission / reception processing unit 2.
21. The reception operation will be briefly described. First, an empty buffer for reception is prepared in the shared buffer 215. When data is sent from the transmission line 3, first the communication controller 4 sequentially receives the received data by DMA (Direct Mean).
(mory access) function to write to the shared buffer 215 in the system memory 2 via the bus 8. When the reception is completed, the communication controller 4 notifies the system processor 1 of the reception by the reception interrupt signal 217. The system processor 1 thereby activates the reception interrupt processing unit 213 of the driver 21. The reception interrupt processing unit 213 extracts the buffer containing the reception data from the shared buffer 215 and connects it to the protocol reception queue 222, and the transmission / reception processing unit 22 of the protocol program 22.
Start 1. The transmission / reception processing unit 221 extracts the reception data from the protocol reception queue 222, performs communication protocol processing, and then passes only the application data to the application program 23. As a method of actually connecting the shared buffer 215 to the protocol reception queue 222, a pointer indicating the start position of the shared buffer 215 is set in the protocol reception queue 222. Therefore, the received data does not move.

Next, an internal structure and an outline of data reception operation when the communication controller 4 is an intelligent type will be described.

FIG. 14 shows the internal structure of the intelligent type communication controller 4. Communication controller 4
Is a network controller 45 that transmits and receives data while directly controlling the transmission path 3, a bus controller 43 that connects the communication controller 4 to the bus 8, a local data memory 44 that stores frame data, and a communication protocol of a lower layer. Local processor 46 and local memory 4 for controlling the processing and communication controller 4 as a whole
It consists of 7. Bus 48 is local processor 46
For connecting the local memory 47, the bus controller 43, and the network controller 45, the bus 4
9 is a local data memory 44 and a bus controller 43
And the network controller 45, and are used for exchanging information. In the case of transmission, the bus controller 43 sends the data in the system memory 2 shown in FIG.
Is read out via the, and is temporarily stored in the local data memory 44. If necessary, the local processor 46 adds a network header to this and assembles it into frame data. Then, the network controller 45 sends this frame data to the transmission line 3 according to an instruction from the local processor 46. On the other hand, in the case of reception, the operation is opposite to that of transmission. First, the network controller 45 writes the frame data from the transmission path 3 to the local data memory 44 according to an instruction from the local processor 46, and the local processor 46 causes the network to operate as needed. Remove the header. Subsequently, the bus controller 43 transfers this data to the system memory 2 via the bus 8 according to an instruction from the local processor 46. After the transmission / reception is completed, the local processor 46 changes the bus controller 43.
Transmission end interrupt signal 2 to system processor 1 through
16 or the reception interrupt signal 217 is used to notify that effect. FIG. 15 shows how data is received using the intelligent type communication controller 4. Driver 2
1 and the protocol program 22 are the same as those shown in FIG. 13, and the constituent elements therein are given the same numbers. The reception operation will be briefly described. First, an empty buffer for reception is prepared in the local memory 44 and the shared buffer 215. When data is sent from the transmission line 3, first, the network controller 45 sequentially writes the received data in the local data memory 44. When the reception is completed, the local processor 46 removes the network header from the received data and leaves the rest in the bus controller 4
3 to the shared buffer 215 on the system memory 2
Transfer to. When the transfer is complete, the local processor 46
Receives the interrupt signal 217 through the bus controller 43.
Is used to notify the system processor 1 of the reception. As a result, the system processor 1 has the driver 21
The reception interrupt processing unit 213 is activated. The reception interrupt processing unit 213 connects the buffer containing the received data in the shared buffer 215 to the protocol reception queue 222 and activates the transmission / reception processing unit 221 of the protocol program 22. The transmission / reception processing unit 221 uses the protocol reception queue 22.
After receiving the received data from the data No. 2 and performing the communication protocol processing, only the application data is delivered to the application program 23 from the data. As a method of actually connecting the shared buffer 215 to the protocol reception queue 222, a pointer indicating the head position of the shared buffer 215 is set in the protocol reception queue 222. Therefore, the received data does not move.

In FIGS. 13 and 15, the shared buffer 2
It is also possible to configure 15 in a plurality of areas. In this case, if the frame data is stored in area units, it becomes unnecessary to prepare an empty area each time frame transmission / reception is performed.
Frame data can be continuously transmitted and received without causing a buffer shortage error.

By storing the protocol header and the application data in different areas and connecting them to represent one frame, the protocol program 22 can easily add or remove the protocol header.

The shared buffer 215 is used as a data buffer for storing data and a protocol program 2.
2 is composed of a protocol buffer descriptor for managing this data buffer and a communication buffer descriptor for managing the data buffer by the communication controller 4, and the protocol buffer descriptor and the communication buffer descriptor have a queue structure. This facilitates the exchange of communication data between the protocol program 22 and the communication controller 4.

Next, the driver 21 will be described in more detail. As described with reference to FIGS. 13 and 15, the driver 2
1 is irrelevant to the type of the communication controller 4 and operates both as a non-intelligent type and as an intelligent type.

The internal structure of the driver 21 is shown in FIG. The driver 21 has a program including a transmission end interrupt processing unit 211, a transmission processing unit 212, and a reception interrupt processing unit 213, and a transmission queue 214 and a reception queue 215 for connecting communication data in a queue. The transmission end interrupt processing unit 211 and the reception interrupt processing unit 213 are activated by the transmission end interrupt 216 and the reception interrupt 217 from the communication controller 4 shown in FIG.
Is activated by the protocol program 22. The transmission queue 214 and the reception queue 215 are a series of buffers that can be shared by both the program in the driver 21 and the communication controller 4. Send queue 21
In other words, the reception buffer 4 and the reception queue 215 are also a time buffer buffer that connects the protocol that allows a delay in processing and the transmission path 3 that operates in asynchronous real time. Transmission end interrupt processing unit 211, transmission processing unit 212, reception interrupt processing unit 2
Flowcharts of No. 13 are shown in FIGS. 11, 10 and 9, respectively.

FIGS. 7 and 8 show the transmission queue 214 of FIG.
6 illustrates a detailed structure of the reception queue 215. The two queues consist of a communication buffer descriptor and a protocol buffer. The communication buffer descriptor is for storing information necessary for the communication controller 4 shown in FIG. 1 to access the data buffer. On the other hand, the protocol buffer is managed by the buffer management unit 25 shown in FIG.
This is a buffer handled by the driver 21 and the protocol program 22. The protocol buffer has a structure in which a buffer descriptor and a buffer that stores data are integrated.

First, the transmission queue 214 of FIG. 7 will be described. In the example of FIG. 7, two pieces of frame data to be transmitted are stored, and the first frame is (TxD00 + TxD
01) chained data, the second frame is (TxD10) independent data.

The protocol buffer in the transmission queue 214 indicates the position of the buffer TB00 where the pointer (if-snd) is at the head, as shown in FIG. If the buffer does not exist, the pointer (if-snd) becomes 0.
The buffers TB00, TB01, TB10 are, for example, 1
It has a 12-byte data storage area and various buffer management information, and is composed of 128 bytes. In the buffer management information, the pointer (m-next) is the position of the buffer containing the next chain data, the offset (m-off) is the relative position where the data is stored, and the data length (m-len). Indicates the length of the stored data, and the pointer (m-act) indicates the position of the buffer that stores the next frame data. In the buffer TB01, the data storage area is set in the page buffer TPG0 by the offset (m-off). Page buffer TPG0
Has a capacity of, for example, 4 Kbytes and is used when storing large data. Whether or not the page buffer is used can be known from the offset (m-off) value. Since the offset (m-off) represents the relative position from the beginning of the buffer to the place where the data is stored, when the value exceeds the buffer length, that is, 128, it means that the page buffer is being used. Become.

The communication buffer descriptor of the transmission queue is shown in FIG.
, The descriptors TD00, TD01, TD10. ． ． It is composed of a group of and is used in a ring shape. Each descriptor TD0
Of 0, TD01, and TD10, the address (ADR) represents the start address of the buffer containing the transmission data, and the data length (BCNT) represents the length of the stored data. The data length (BCNT) has the same value as the data length (m-len) in the protocol buffer. The control right flag (DIR) indicates that this descriptor is occupied by the communication controller 4 (DIR = 1) or the driver 21 or the protocol program 22 (DIR = 0). The driver 21 sets the control right flag (DIR) to 1 after filling the area specified by this descriptor. After transmitting the contents of the buffer, the communication controller 4 clears the control right flag (DIR) to 0. First flag (ST), last flag (E
N) is used to represent the beginning and end buffers of a frame. When ST = 1, this is the first buffer of the frame, and when EN = 1, this is the last buffer of the frame. In FIG. 7, the descriptor TD00 and protocol buffers TB00, TD01 and TB01, TD
10 and TB10 respectively indicate the same transmission data area.

Next, the reception queue will be described. As shown in FIG. 8, the reception queue 215 has basically the same structure as the transmission queue 214 shown in FIG. The size (LEN) in the descriptor represents the length of the prepared reception buffer area. When receiving data using this reception queue, it is necessary to create a protocol buffer and descriptor in which a plurality of frames are stored in advance. Upon receiving the frame, the communication controller 4 sequentially stores the data in the area indicated by the descriptor, and the data length (BCNT) and the head flag (S) of the data received in the descriptor.
T), final flag (EN) and control right flag (DIR)
Set.

The operation of the communication control apparatus of this embodiment configured as above will be described.

For convenience, the communication protocol handled by this communication control device is TCP / IP (Transmission Control Protocol / In).
ternet Protocol) and IEEE802.3, IEEE80
It is a lower level protocol of 2.2. The data frame flowing through the transmission path 3 has the format shown in FIG. In FIG. 2, the data frame 200 includes a frame header 201, a protocol header 202, and user data 203.
And a frame tailor 204. The frame header 201 contains destination address information and the frame tailor 204 contains check code information for detecting a data error. In the configuration of FIG. 2, the frame header 201 is generated by the protocol program 22 shown in FIG. 1 and decoded by the communication controller 4, and the protocol header 202 is generated and decoded by the protocol program 22. The frame tailor 204 is generated and decrypted by the communication controller 4. The user data 203 is used by the application program 23, and is passed from the application program 23 to the protocol program 22. The protocol header 202 has IP and TCP configurations as shown in FIGS. 3 and 4, respectively.

In FIG. 1, the receiving operation of the data frame coming from the transmission line 3 is as follows. The encoded frame is decoded by the communication controller 4 and assembled in byte units. The reception queue shown in FIG. 8 is connected to the reception queue shown in FIG.
The frame header 201, the protocol header 202, and the user data 203 of the data frame shown in are written. At this time, the communication controller 4 judges the frame header 201 shown in FIG. 2 and receives only the data frame addressed to itself. At this time, frame tailor 2
It also checks whether the data is correct according to 04. When the data frame is received, the communication controller 4 interrupts the processor 1 with a reception interrupt signal 217, and the reception interrupt processing unit 213 of the driver 21 shown in FIG. 5 is activated.

FIG. 9 shows an operation flowchart of the reception interrupt processing unit 213. In process 91, the control right flag (DIR = 0) of the descriptor shown in FIG. 8 is searched for the received protocol buffer. When the buffer is found, it is removed from the reception queue 215 in process 92 and is connected to the protocol reception queue 222 shown in FIG. How to remove the queue is the protocol buffer pointer (mn
This can be done simply by operating ext) and (m-act). The structure of the protocol reception queue 222 shown in FIG. 6 is also the same as that of the protocol buffer of FIG. 7 or 8. Therefore, at this time, the buffer containing the data is reconnected and the data is not moved. Next, process 9
In step 3, an empty buffer is received from the buffer management unit 25 and is connected to the reception queue 215. At this time, naturally, the descriptor is also changed. In the final process 94, the protocol program 22 is activated using, for example, a software interrupt.

The protocol program 22 operates as follows. After taking out the data frame from the protocol reception queue 222 and processing the protocol header 202 shown in FIG. 2, the frame header 201 and the protocol header 202 are removed and only the user data 203 is passed to the application program 23.

The transmitting operation is the reverse of the receiving operation. When there is a data transmission request from the application program 23, the protocol program 22 receives the user data from the application program 23, adds the protocol header 202 and the frame header 201 shown in FIG. 2 to this, and sends it to the transmission processing unit 212 shown in FIG. hand over. The buffer used in the protocol program 22 is the buffer management unit 2
A buffer 5 manages.

FIG. 10 shows an operation flowchart of the transmission processing section 212. In process 101, the protocol program 2
The buffer received from No. 2 is connected to the end of the transmission queue shown in FIG. At this time, naturally, the descriptor is also created. Then, in step 102, the communication controller 4 is activated. Normally, the communication controller 4 sequentially sends the data connected to the transmission queue to the transmission path 3, so that when the data frames are continuously transmitted, the communication controller 4
You don't have to start. The process 102 takes into consideration the case where the communication controller 4 is stopped.

The communication controller 4 sequentially takes out the data frames waiting for transmission in the transmission queue, converts them into bit strings, encodes them, and sends them out to the transmission line 3. At this time, the frame data 204 shown in FIG. 2 is added to the end. When the transmission is completed, the communication controller 4 sends the transmission end interrupt signal 21
At 6, the processor 1 is interrupted, and the transmission end interrupt processing unit 211 of the driver 21 shown in FIG. 5 is activated.

FIG. 11 shows an operation flowchart of the transmission end interrupt processing section 211. In process 111, the control right flag (DIR = 0) of the descriptor shown in FIG. 9 is searched for the protocol buffer for which transmission has been completed. When the buffer is found, process 112 dequeues it,
It returns to the buffer management unit 25.

FIG. 21 is a block diagram showing the configuration of a communication control system according to another embodiment of the present invention. In FIG. 1, the communication controller, the communication protocol, and the application program are all configured as one.
FIG. 21 shows a communication control device 2101 with two communication controllers.
This is an example of a system having the drivers c1 and c2, two drivers d1 and d2, two protocol programs p1 and p2, and three application programs a1, a2, and a3. In this embodiment, in addition to the configuration shown in FIG. 21, there is the system processor 1 and the bus 8 shown in FIG. 1, but since they operate in the same manner, they are omitted here.

Communication controllers c1 and c2 shown in FIG.
Transmits and receives data while controlling the transmission lines n1 and n2, respectively. These communication controllers are the same as the communication controller 4 shown in FIG. 1, and may be either the non-intelligent type shown in FIG. 12 or the intelligent type shown in FIG. Drivers d1 and d
2 controls the communication controllers c1 and c2, respectively, and also communicates with the protocol programs p1 and p2.
Mediation of data transfer. Protocol program p1, p
24 has the same internal structure, and as shown in FIG. 24, is composed of a transmission / reception processing unit 2401, a protocol table 2403, and a protocol reception queue-2402.

First, the drivers d1 and d2 will be described. The internal configurations of the drivers d1 and d2 are the same as the configurations shown in FIG. 5, but only the operation of the reception interrupt processing unit 213 is different. The operation flow chart of the reception interrupt processing unit 213 is shown in FIG. Processing other than processing 2302 and processing 2304 is the same as the operation flow chart shown in FIG. In process 2301, the protocol buffer containing the received data frame is extracted from the reception queue 215 shown in FIG. The protocol buffer contains a frame header 201, a protocol header 202, and user data 203 of the data frames shown in FIG. Process 23
02, the frame header 2 in this data frame
Check the protocol type from the 01 part.

IEEE 802.3, IEEE 802.
2, the format of the frame header of SNAP (Sub Network Access Protocol) is shown in FIG. The "TYPE" field is a protocol identifier in the frame header. For example, in TYPE = 2048, TCP / IP,
When TYPE = 2054, ARP (Address Resolution Protocol)
l). In process 2302, when the protocol is known,
Then, the protocol buffer is connected to the protocol reception queue-2402 in the corresponding protocol program. At this time, since the buffer containing the data is reconnected as it is, the data does not move. Next, process 2
At 303, the empty buffer is connected to the reception queue 215 shown in FIG. 5, and at step 2304, the corresponding protocol program of p1 or p2 shown in FIG.

The receiving operation of the protocol program p1 or p2 is as follows. The transmission / reception processing unit 2401 shown in FIG. 24 extracts the data frame from the protocol reception queue-2402, and the protocol header 2 shown in FIG.
After the processing for 02, the frame header 201
User data 2 by removing the protocol header 202
Application program a shown in FIG.
1, a2, or a3.

The protocol table 2403 shown in FIG. 24 is used to select the application program. The contents as shown in FIG. 25 are registered in advance in the protocol table 2403. The address is the number of the communication window attached to the device. In the case of reception, the other party address and the own address are, for example, "S" in the protocol header shown in FIG.
ource Address "," Destination Address ".
The service number is the number of the communication window attached to the application program. When receiving, the partner port number, own port
For example, "Source Port", "Destinati" shown in FIG.
on port ". These addresses, port numbers, application program identifiers, and driver identifiers that have a one-to-one correspondence with the transmission path connected to the partner station are registered as a set. In order to select the corresponding application program from the data frame, the "Destination Port" is extracted from the protocol header and the corresponding application program is created using the protocol table in FIG. It can be realized by obtaining the identifier.

The transmission operation of the protocol program p1 or p2 is as follows. When a data transmission request is issued from any of the application programs a1, a2, a3 shown in FIG. 21, the protocol program p1 or p
2 receives user data from the application program in the transmission / reception processing unit 2401 shown in FIG. 24, and the protocol header 202 and the frame shown in FIG.
Driver d1 shown in FIG.
Pass to any of d2. The protocol table 2403 shown in FIG. 24 is also used for driver selection. In the protocol table 2403, as shown in FIG. 25, the transmission path, that is, the identifier of the driver to which the application program of the partner is connected is registered in correspondence with the own port number. Know which driver to use.

FIG. 26 is a diagram showing an embodiment of a router using the communication control system of FIG. Communication controller 26
The components in 01 are the same as those in FIG. 21 and are given the same numbers. A station 2602 is connected to the transmission line n1, and a station 2603 is connected to the transmission line n2.
FIG. 26 shows a state in which data is transmitted from the station 2602 on the transmission line n1 to the station 2603 on a different transmission line n2 via the communication control device 2601. The data from the station 2602 is the transmission line n.
1. Through the communication controller c1, enter the shared buffer in the driver d1 in real time without being buffered on the way. The protocol program p1 replaces the protocol header with the frame header for the data frame in this buffer, and then connects this buffer to the shared buffer in the driver d2. The reconnected shared buffer data is delivered to the station 2603 in real time through the driver d2, the communication controller c2, and the transmission line n2. Since the same buffer is used for the driver d1, the protocol program p1, and the driver d2, there is no useless movement of data between the buffers.

Next, another control method of the communication buffer descriptor and the protocol buffer shown in FIGS. 7 and 8 will be described.

FIG. 16 is a diagram showing a configuration example of the transmission communication-protocol buffer conversion table 1601 which defines the relationship between the communication buffer descriptor and the protocol buffer shown in FIG. The transmission communication-protocol buffer conversion table 1601 is included in a part of the transmission queue 214 shown in FIG.

The line numbers of the transmission communication-protocol buffer conversion table 1601 shown in FIG. 16 are the descriptor numbers TD00 and T in the communication buffer descriptor shown in FIG.
It corresponds to D01 .... The chain flag indicates whether the chain is at the beginning (ST = 1) or the end (EN = 1). Each item further stores the address (virtual address) of the protocol buffer corresponding to the descriptor and the address (virtual address and real address) of the data in the protocol buffer. What is a virtual address?
An address that is accessed using the virtual memory system and is used in general programs.

The real address is an address physically attached to the memory, and is a DMA (DirectMemo).
It is used by the communication controller as an address of the system memory when transferring data between the transmission path and the system memory by using (ryAccess).

At the time of transmission, the communication controller 4 searches the descriptor in the communication buffer descriptor in the system memory 2 and sends the transmission data to the transmission line based on the address of the transmission buffer registered therein. At this time, since the address handled by the communication controller 4 is the real address, the address of the transmission / reception data registered in the descriptor must be the real address. On the other hand, the protocol program 22 and the driver 21 access the transmission data by the virtual address of the protocol buffer. Therefore, a conversion table from the virtual address of the transmission data to the real address is required.

FIG. 19 is an operation flowchart of the transmission processing section 212 shown in FIG. In process 1903, the start address (virtual address) of the buffer and the start address (virtual address) of the data are obtained from the buffer received from the protocol program 22, and the transmission communication-protocol buffer conversion table 1601 corresponding to the number of the transmission descriptor. Set the value to. This is shown in FIG. 7 and FIG.
The configuration example of No. 6 will be described. Descriptors TD00, TD
01, TD10 to the protocol buffer TB00,
Virtual address Tx of transmission data from TB01 and TB10
D00, TPG0, TxD10 are calculated, and the real address R_
After converting into TxD00, R_TPG0, and R_TxD10, each data is stored in the row position corresponding to the descriptor number (1904). Then, the descriptor is updated based on the transmission communication-protocol buffer conversion table 1601 (1905), and the communication controller is activated (102).

FIG. 18 shows the transmission end interrupt section 2 shown in FIG.
11 is an operation flowchart of 11. The transmission end interrupt processing unit 211 extracts the buffer for which transmission has been completed from the descriptor shown in FIG. 7 (111), and uses the transmission communication-protocol buffer conversion table 1601 from the corresponding number of the descriptor to determine the address of the protocol buffer (virtual Address), and the buffer management unit 2 shown in FIG.
Return to 5 (1810). Then, the transmission communication-protocol buffer conversion table 1601 and the descriptor are updated (1811), and the process ends.

FIG. 17 is a diagram showing a configuration example of the reception communication protocol buffer conversion table 1701 which defines the relationship between the communication buffer descriptor and the protocol buffer shown in FIG. The reception communication protocol buffer conversion table 1701 is included in a part of the reception queue 215 shown in FIG.
Set the same items as 01.

FIG. 20 shows the reception interrupt processing unit 2 shown in FIG.
13 is an operation flowchart of 13. The reception interrupt processing unit 213 activated by the reception interrupt 217 extracts the buffer received from the descriptor shown in FIG. 8 (9
1), reception communication-protocol buffer conversion table 1
The address (virtual address) of the protocol buffer is obtained from 701 (2003). This protocol buffer is registered in the reception queue in the protocol program 22 and the protocol program 22 is activated (94). Next,
A new reception protocol buffer is secured from the buffer management unit 25 shown in FIG. 1 (2004), and the reception descriptor is updated (2005). At this time, the address (virtual address) of the protocol buffer and the address (virtual address, real address) of the data section are registered in the reception communication-protocol buffer conversion conversion table 1701 (2006), and the reception interrupt process ends.

[0069]

As described above, according to the present invention, since the buffer is shared between the transmission line and the protocol, extra data movement does not occur between the buffers, and the throughput of the entire communication system is improved. Not only that, but the load on the system processor is lightened, and its practical effect is great.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a communication control device showing an embodiment of the present invention.

FIG. 2 is a frame format diagram for explaining a processing method of the present invention.

FIG. 3 is a frame format diagram for explaining a processing method of the present invention.

FIG. 4 is a frame format diagram for explaining a processing method of the present invention.

FIG. 5 is an internal configuration diagram of a driver of the present invention.

FIG. 6 is an internal configuration diagram of a protocol program of the present invention.

FIG. 7 is an internal configuration diagram of a transmission queue of the present invention.

FIG. 8 is an internal configuration diagram of a reception queue of the present invention.

FIG. 9 is a flowchart of the reception interrupt processing of the present invention.

FIG. 10 is a flowchart of a transmission process of the present invention.

FIG. 11 is a flowchart of a transmission end interrupt process of the present invention.

FIG. 12 is an internal configuration diagram of the non-intelligent communication controller of the present invention.

FIG. 13 is a diagram showing an example of a data frame receiving operation using the non-intelligent communication controller of the present invention.

FIG. 14 is an internal configuration diagram of the intelligent communication controller of the present invention.

FIG. 15 is a diagram showing an example of a data frame receiving operation using the intelligent communication controller of the present invention.

FIG. 16 is a configuration diagram of a transmission communication-protocol buffer conversion table of the present invention.

FIG. 17 is a configuration diagram of a reception communication-protocol buffer conversion table of the present invention.

FIG. 18 is a flowchart of the transmission end interrupt process of the present invention.

FIG. 19 is a flowchart of a transmission process of the present invention.

FIG. 20 is a flowchart of the reception interrupt processing of the present invention.

FIG. 21 is a configuration diagram of a communication control device showing an embodiment of the present invention.

FIG. 22 is a frame header format diagram for explaining the processing method of the present invention.

FIG. 23 is a flowchart of another reception interrupt processing of the present invention.
FIG.

FIG. 24 is an internal structure diagram of another protocol program of the present invention.

FIG. 25 is an internal configuration diagram of a protocol table of the present invention.

FIG. 26 is a configuration diagram of a communication control device showing another embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Processor, 2 ... System memory, 3 ... Transmission line, 4 ... Communication controller, 21 ... Driver, 22 ... Protocol program, 23 ... Application program, 25 ... Buffer management part. 2101 ... Communication control device 2403 ... Protocol table 2601 ... Communication control device 1601 ... Transmission communication-protocol buffer conversion table 1602 ... Reception communication-protocol buffer conversion table

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Toru Horimoto, Inventor Toru Horimoto, 5030 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Within Software Development Division, Hitachi, Ltd. (72) Yukio Shimamoto 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Hitachi, Ltd. Microelectronics equipment development laboratory (56) Reference JP-A-61-232746 (JP, A) JP-A-3-91339 (JP, A) (58) Fields investigated (Int.Cl . ⁷ , DB name) H04L 13/08 H04L 29/00 G06F 15/16 G06F 13/36 H04L 12/40

Claims (9)

(57) [Claims] 1. A transmission line connected to a transmission line,
Communication controller that sends and receives data frames
And communication protocol processing and the communication controller
In a communication control device including a control processing unit, a data frame transmitted / received to / from the transmission path is stored.
A buffer that is stored in the data buffer.
Data buffer for storing frames and the processing unit
With a protocol buffer descriptor to manage the buffer
Multiple protocol buffers consisting of
Roller assigns a data buffer within each protocol buffer.
A communication buffer description that stores the information needed to access
And the communication buffer descriptor is
First address of data buffer in protocol buffer
Information, the protocol buffer descriptor includes
The second address of the data buffer in the protocol buffer
Data frame from the transmission path
Communication buffer description,
Indicated by any of the first address information contained in the child
When the received data frame is stored in the data buffer
Both send a reception interrupt signal to the processing unit, and the processing unit
When the reception interrupt signal is received, the reception data
A protocol including the data buffer in which a frame is stored
Included in the protocol buffer descriptor of the Col buffer
The received data frame according to the second address information.
A communication control device characterized by reading a program. 2. The communication control device according to claim 1,
When transmitting a data frame to the transmission path, the processing
The part sends the data frame to be transmitted to an arbitrary protocol buffer.
The communication controller is stored in the data buffer of
Is the first address contained in the communication buffer descriptor.
Of the data information to be transmitted is stored.
According to the first address information of the data buffer
Read the data frame to be transmitted,
A communication control device characterized in that it is sent to a sending path. 3. The communication control device according to claim 1 or 2.
In the protocol buffer descriptor,
The second address information is the first address of the protocol buffer.
Communication control characterized by showing relative position from dress
apparatus. 4. The communication control device according to claim 1,
In addition, the protocol buffer for each protocol buffer is
Virtual address at the beginning of the file, in the protocol buffer
The virtual and real addresses of the data buffer
Each has a storage unit that stores it in association with each other.
The first address information included in the signal buffer descriptor is
The real address of the data buffer, and the protocol
The second address information contained in the buffer buffer descriptor is
Phase from the virtual address at the beginning of the protocol buffer
Indicates a pair position and receives a data frame from the transmission line
When the processing unit stores the received data frame,
Corresponding to the first address information of the data buffer
The protocol attached and stored in the storage unit
The virtual address of the buffer is obtained, and the virtual address obtained is obtained.
And the received data frame according to the second address information.
A communication control device characterized by reading a frame. 5. The communication control device according to claim 2,
The first address contained in the communication buffer descriptor
The information is the real address of the data buffer,
The second address contained in the protocol buffer descriptor
Is the information the virtual address at the beginning of the protocol buffer?
The relative position of
When sending out, the processing unit
Protocol buffer storing the memory and the data
Obtain the virtual address of each buffer and
Convert the virtual address of the buffer to a real address,
Included in the communication buffer descriptor by the converted real address
The first address information included in the communication
A communication control device characterized by activating a troller. 6. A transmission line is connected to the transmission line and is connected to the transmission line.
Communication controller for sending and receiving data frames and the communication
Driver unit that controls the communication controller and communication protocol
Communication control device including a protocol processing unit for processing
In, the protocol processing unit transmits and receives to and from the protocol reception queue.
It consists of a processing unit, and the driver unit sends and receives an interrupt processing unit.
And a transmission / reception queue on the transmission line.
Data for storing data frames sent and received
Data buffer and the protocol processing unit are data buffers
Consists of a protocol buffer descriptor for managing
A plurality of protocol buffers, and the communication controller
Necessary for the controller to access each data buffer
Is stored in the communication buffer descriptor.
The file descriptor is the first address information of each data buffer.
, The protocol buffer descriptor is
Data including the second address information of
The communication controller is
Any first address contained in the communication buffer descriptor
Received data frame in the data buffer indicated by the information
Store the program and notify the driver section,
The processing unit is configured to store the received data frame.
Address information of protocol buffer including data buffer
Is set in the protocol reception queue, and the transmission / reception processing is performed.
The management unit is configured to store the protocol set in the protocol reception queue.
Before being included in the protocol buffer indicated by the dress information
The received data frame according to the second address information
A communication control device for reading out. 7. The communication control device according to claim 6,
The driver unit further includes a transmission processing unit, and
When transmitting a data frame, the transmission processing unit
Receives the data frame to be transmitted from the transmission / reception processing unit
Stored in the data buffer of any protocol buffer
However, the communication controller is configured to communicate with the communication queue of the transmission / reception queue.
The data frame to be transmitted in the buffer
In the first address information of the stored data buffer
Therefore, read the data frame to be transmitted,
A communication control device characterized by transmitting to a transmission path. 8. The communication control device according to claim 6,
In addition, at least one other communication protocol handling
Different protocol processors and different applications
And a plurality of application processing units for processing
Each protocol processing unit also adds port information and application information.
The protocol registration unit that registers the
And the interrupt processing unit includes the received data frame.
The type of communication protocol from the protocol identification information
Discriminate and process the determined type of communication protocol
The protocol reception queue of the protocol processing unit receives the reception
Of the protocol buffer that stores the received data frame.
Set the dress information and send it to the protocol processor.
The reception processing unit is set in the protocol reception queue
Included in the protocol buffer indicated by the address information
The received data frame according to the second address information
Read the frame and include it in the received data frame
Registered in the protocol registration section in association with the port information.
Obtain the recorded application identification information,
Application identified by the application identification information
Application to the application processing unit that processes the application.
Characterized by passing the data contained in the received data frame
Communication control device. 9. The communication control device according to claim 6,
Furthermore, it is connected to another transmission line and
At least one other communication for sending and receiving data frames
A controller and the at least one other communication controller
And at least one other driver part for controlling the roller
The protocol processing unit further includes port information and
A protocol registration unit that registers the ID information in association with
In addition, each driver unit further includes a transmission processing unit.
When sending a data frame to the transmission line,
The science section is the port information included in the data frame to be transmitted.
Is registered in the protocol registration unit in association with
Driver identification information obtained from the
To the transmission processing unit of the driver unit identified by the information.
The data frame to be transmitted is passed, and the transmission processing unit
Data frame to be transmitted can be sent to any protocol buffer.
Stored in the data buffer of the
The communication controller controlled by the unit
The data frame to be transmitted in the communication buffer descriptor
First address of the data buffer in which the memory is stored
Read the data frame to be transmitted according to the information
And sends it to the connected transmission line.
Communication control device.