JP3429075B2 - Gas discharge display element and method of erasing gas discharge display element - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to erasing means and erasing method for a memory type AC type gas discharge display device.

[0002]

2. Description of the Related Art As a conventional memory type AC type gas discharge display element of this type, there is one having a structure as shown in FIG. In the figure, 1 is a front substrate, 2 is a back substrate, 3 is an X electrode provided between the front substrate 1 and the back substrate 2 and is provided on the front substrate 1 side, and 4 is a back substrate 2.
A Y electrode 5 provided on the side, a dielectric layer provided on each of the X electrode 3 and the Y electrode 4 to form a discharge space 6,
Reference numeral 7 is a voltage applying means for applying a pulse voltage between the X electrode 3 and the Y electrode 4 in order to generate a discharge in the discharge space 6 formed by the dielectric layer 5.

Next, the pulse voltage applied from the voltage applying means 7 between the X electrode 3 and the Y electrode 4 and the erase operation by the pulse voltage will be described. The above X electrode 3 and Y electrode 4
The pulse voltage applied from the voltage applying means 7 between
It has a waveform as shown in FIG. This waveform is an example of the drive waveform of the gas discharge display element described in "Plasma Display" Chapter 5 by Kenichi Ohwaki and Yoshinori Yoshida, for example. Fig. 17 (a) shows the wide erase operation, and Fig. 17 (b) shows
Represents the narrow erase operation. In the figure, 13 is a sustain voltage V _S (V _S (V _S) applied to maintain discharge and perform display light emission.
= 100 V) sustaining pulse, 17 is a pulse applied to generate an erase discharge in the wide erase operation, and has an erase pulse width τ _e (τ _e = 5 to 10 μs) and an erase voltage Ve (discharge sustaining). Voltage about 1/2 of pulse, Ve = 50
V) is a thick erase pulse. 15 is a pulse applied to cause erase discharge in the narrow erase operation, the erase pulse duration τ _e (0.5~1μ _S), the erase voltage Ve (sustaining pulse and comparable voltage, Ve = 100 V) Is a narrow erase pulse.

Next, the operation will be described. FIG. 17 (a)
In the case of wide-width erase of, erase pulse width τ _e (τ _e = 5-10 μ
The erase voltage Ve having a wide pulse width of s) is applied, and the erase voltage Ve is continuously applied even after the erase discharge is completed, so that the space charge is absorbed by the "forced absorption of the external voltage". That is, by applying the erase voltage Ve having a wide pulse width of the erase pulse width τ _e between the X electrode 3 and the Y electrode 4, the erase discharge is generated in the discharge space 6, but after the erase discharge is completed. Also, since the application of the erase voltage Ve is continued, the space charge generated in the discharge space 6 is absorbed by the wall surface of the dielectric layer 5 and erased. When the voltage applied between the X electrode 3 and the Y electrode 4 is set to 0, the voltage applied to the discharge space 6 by the voltage of the wall charges absorbed on the wall surface of the dielectric layer 5, that is, the wall voltage is Since the value is determined by the erase voltage Ve, the erase voltage Ve is selected so that the wall voltage at this time becomes sufficiently small, and then the sustaining pulse 1
It must be ensured that the discharge does not restart even when 3 is applied.

On the other hand if narrow erase of FIG. 17 (b), a narrow erase voltage Ve of the erase pulse width _{τ e (τ e = 0.5 ~1μ} S)
Is applied to remove the applied voltage Ve during the formation of the erase discharge, and the space charges that are generated during the discharge and remain in the discharge space 6 are absorbed by the wall charges that adhere to the wall surface of the dielectric layer 5, that is, It is performed by "natural suction by the wall voltage itself". That is, by applying the erase voltage Ve between the X electrode 3 and the Y electrode 4, an erase discharge is generated in the discharge space 6, but in the case of this narrow erase, the application time of the erase voltage Ve is shortened. Erase voltage V during erase discharge formation
Since the application of e is stopped, most of the space charges generated in the discharge space 6 remain in the discharge space 6 without being absorbed by the wall surface of the dielectric layer 5. Therefore, the wall charges attached to the wall surface immediately after the removal of the erase pulse are recombined with the space charges remaining in the discharge space 6 to be neutralized naturally and the wall voltage becomes zero.

[0006]

The conventional alternating current type gas discharge display element has performed the erasing operation as described above. However, in the case of wide erasing, the sustaining pulse 13 is continuously applied as described above. However, the erase voltage Ve must be selected so that the discharge does not restart. Therefore, when the appropriate erase voltage Ve, that is, the so-called erase voltage margin is small and the discharge characteristics between the cells vary, the erase operation cannot be performed in all cells. Also, in narrow erase, the erase voltage margin is relatively large, but if the discharge delay time varies from cell to cell, the appropriate erase pulse width differs from cell to cell, so again all cells cannot be erased. There was a problem.

The present invention has been made in order to solve the above-mentioned problems, and a first object thereof is to have a large erase voltage margin and to maintain a constant level even if there are variations in discharge characteristics between cells. An object of the present invention is to provide a gas discharge display element and a method for erasing the gas discharge display element, in which all cells are erased under driving conditions. The second purpose is
An object of the present invention is to provide a gas discharge display device capable of generating a writing discharge with a writing pulse having a relatively low voltage. A third object is to provide a gas discharge display element capable of generating self-erasing discharge with a self-erasing discharge pulse having a relatively low voltage. Further, a fourth object is to provide a gas discharge display element in which the contrast is not deteriorated even when erasing by self-erasing discharge is applied.

[0008]

A gas discharge display element according to the present invention comprises a dielectric layer forming a discharge space, a pair of electrodes for causing a discharge in the discharge space formed by the dielectric layer, and a pair of these electrodes. Self-erasing means for performing an erasing operation by applying a self-erasing discharge pulse having a size and pulse width capable of self-erasing to the electrodes of, and a writing pulse is applied to the pair of electrodes after the erasing operation by the self-erasing means. Writing means for writing by means of writing, and after the fall of the self-erasing discharge pulse, a writing auxiliary pulse having a polarity opposite to that of the writing pulse is applied to the pair of electrodes. In addition, a dielectric layer that forms a discharge space, a pair of electrodes that generate discharge in the discharge space formed by the dielectric layer, and a self-erase discharge pulse is applied to the pair of electrodes to perform an erase operation. Erasing means and this self
After the erasing operation by the erasing means, write to the pair of electrodes
Write means for applying a write pulse to write data, and applying a write assist pulse to the pair of electrodes after the self-erase discharge pulse falls.
The potential difference between the self-erase discharge pulse and the write assist pulse is a potential difference that enables self-erase discharge. further,
The write assist pulse is applied to the pair of electrodes after the fall of the self-erasing discharge pulse and before the charged particles generated by the application of the self-erasing discharge pulse are completely neutralized. Is. Further, the write assist pulse is applied to the pair of electrodes within 0 to 3 μsec after the fall of the self-erasing discharge pulse. Further, the write assist pulse rises immediately after the fall of the self-erasing discharge pulse and falls before the charged particles generated by the application of the self-erasing discharge pulse are completely neutralized. Further, the write assist pulse is returned to 0 voltage while the space charge generated by the self-erasing discharge pulse remains. Further, the write assist pulse is 0 within 0.3 to 2 μsec after the fall of the self-erasing discharge pulse.
It is returned to voltage. Further, in a gas discharge display device that performs gradation display by dividing one field into a plurality of subfields, a dielectric layer that forms a discharge space and a pair that causes discharge in the discharge space formed by the dielectric layer. Self-erasing in which a self-erasing discharge pulse having a size and pulse width capable of self-erasing is applied to the pair of electrodes to perform an erasing operation only in the above electrode and a specific subfield that is a part of the plurality of subfields. Means and this
After the erasing operation by the self-erasing means of the
Writing means for applying a writing pulse to perform writing
And , . Et al is, in the gas discharge display device which performs division to gradation display one field into a plurality of sub-fields, a pair of substrates forming a discharge space, scan and sustain electrodes arranged in parallel on one of the substrates And a sustain electrode, a write electrode disposed on the other substrate, and a specific subfield that is a part of the plurality of subfields .
In body, a self-erasing means for erasing operation the self-erasing discharge pulse is applied to the scan and sustain electrodes or sustain electrodes having a self-erasable magnitude and pulse width, this self
After the erase operation by the erase means, write to the write electrode
And a writing unit that applies a pulse to perform writing . Further, the specific subfield is set once every several subfields.
Further, in the subfields other than the specific subfield among the plurality of subfields, erasing is performed so that the light emitting discharge is generated only in the cells that are lit in the previous subfield. Further, the erasing in which the light-emission discharge is performed only in the cells which are lit in the previous subfield is the wide pulse erasing or the narrow pulse erasing .
Et al is, the voltage of the self-erase discharge pulse is 1.2 to 3 times the discharge starting voltage.

[0009]

The gas discharge display element according to the present invention has a writing function.
Self-erase release of auxiliary write pulse with opposite polarity to the pulse
Since the application is performed after the trailing edge of the electric pulse , the writing discharge can be generated by the writing pulse of a relatively low voltage due to the influence of the charged particles. Also , self-erasing discharge
Immediately after the pulse falls, it rises and self-erasure is released.
Charge particles generated by the application of electric pulse are completely neutralized
Apply a write pulse that causes it to fall before
Write assist pulse and self-erase discharge pulse
The potential difference between and becomes a substantial self-erase discharge pulse voltage,
Self-erasing discharge with a relatively low voltage self-erasing discharge pulse
Can be generated . In addition , one field
Gas release for gradation display by dividing into multiple subfields
Part of the above multiple sub-fields in the electronic display element
A certain subfield once every two fields
If the settings are made in combination, and the specified sub fee
Narrow pulse cancellation in subfields other than
When performing wide pulse erase, the
Narrow trust is reduced by narrow pulse or wide pulse
Will be alleviated .

[0010]

EXAMPLES Example 1. Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a drive waveform of the gas discharge display element in this embodiment, and FIG. 2 is a sectional view thereof. In FIG. 2 , 1 to 6 are the same as the conventional configuration in FIG. The voltage application means 7a in FIG. 17 is a voltage application means for applying a pulse voltage between the X electrode 3 and the Y electrode 4 in order to generate a discharge in the discharge space 6 formed by the dielectric layer 5. it is similar to section 7, since the pulse waveform is different from conventional voltage applying means 7, which will be described with reference to the driving waveform of FIG. In FIG. 1 , 11 is a self-erasing discharge pulse, the voltage (hereinafter referred to as the self-erasing pulse voltage) Vaw is 400 to 500 V, and the pulse width is 10 μs.
belongs to. The self-erasing pulse voltage Vaw is
It may be 1.2 to 3 times the discharge start voltage. In this example, the discharge start voltage is 200 V and the self-erasing pulse voltage Vaw
Has a 2 to 2.5 times of that. Further, 12 is a write pulse, and its voltage (hereinafter referred to as write voltage) Vw is 25.
It is 0-400V. Further, 13 is a sustain voltage V _S (V _S = 100) applied to maintain discharge and perform display light emission.
V) is a sustaining pulse.

Next, the erase operation will be described. First, a self-erasing discharge pulse 11 having a self-erasing pulse voltage V _aW is applied between electrodes.
Is applied. Discharge occurs at the rising edge of this pulse, and wall charges are formed by the self-erasing pulse voltage V _aW . Therefore, the wall voltage at this time is the self-erasing pulse voltage V
ing and the value determined by the _aW, but the self-erase pulse voltage V _aW
Is set to a sufficiently high voltage, it is possible to make the wall voltage higher than the discharge start voltage, and by making the pulse width of this self-erasing discharge pulse 11 sufficiently wide,
Since the wall charges can be accumulated, so-called self-erasing discharge occurs, which is again discharged only by the wall voltage at the trailing edge of the self-erasing discharge pulse 11 (this self-erasing discharge pulse 11 is an erase in the case of narrow erase). Compared to the voltage Ve
The self-erasing pulse voltage V _aW is high and the pulse width is wide). The wall charges attached to the wall surface immediately after the fall of the self-erasing discharge pulse 11 are neutralized by recombining with the charged particles generated by the self-erasing discharge,
The wall voltage becomes 0. That is, the erase operation has been performed. This series of operations acts as an erasing operation and also has the function of facilitating the write discharge by generating space charges. Writing following erase discharge,
By maintaining, one cycle of display operation is completed. Although the voltage after the fall of the self-erasing discharge pulse 11 is set to 0 in this example, it is not necessarily 0 if the voltage does not restart discharge when the sustain pulse 13 is subsequently applied.

Example 2. FIG. 3 shows a drive waveform of the gas discharge display element in the second embodiment. In this embodiment, the write pulse 12 is generated within 0 to 3 μs after the fall of the self-erasing discharge pulse 11 (before the charged particles are completely neutralized: τ _d ).
The write assist pulse 14 having the opposite polarity is applied. In this case, the charged particles generated by the self-erase discharge become wall charges according to the write assist pulse voltage Vsw. Then write pulse 12
Is applied, the voltage applied to the discharge space is the write voltage V
It becomes the sum of w and the wall voltage formed by the write assist pulse 14. Therefore, the write discharge can be generated with a relatively low voltage. The effect of applying the write assist pulse 14 having a polarity opposite to that of the write pulse 12 can be obtained even in the case of wide erase, and charged particles are present in the discharge space when the write assist pulse 14 is applied. If the write assist pulse 14 having the opposite polarity to the write pulse 12 is applied to the object, the same effect as described above can be obtained.

Embodiment 3. FIG. 4 shows a drive waveform of the gas discharge display element in the third embodiment. In this embodiment, immediately after the fall of the self-erasing discharge pulse 11, the write pulse 12
While applying the write assist pulse 14b having the opposite polarity to
While the space charge generated by the self-erasing discharge pulse 11 still remains (τ _E = 0.
The wall charge is neutralized by returning the voltage to 0 during 3 to 2 μsec. In this way, the erase discharge is caused by the potential difference between the self-erase discharge pulse voltage V _aw and the write assist pulse voltage V _e , so that the voltage of the self-erase discharge pulse Vaw can be set to a relatively low voltage. The self-erasing discharge pulse can be generated relatively easily. Although a narrow pulse about the pulse width as an inverse polarity of the write auxiliary pulse 14b, the voltage at this time, the potential difference between the self-erase discharge pulse voltage V _aw a write auxiliary pulse voltage V _e is self-erase discharge It may be lower than the conventional narrow pulse voltage as long as it is possible.

Example 4. A fourth embodiment is shown in FIGS. FIG. 5 is a block diagram of the gas discharge display element in this embodiment, FIG. 6 is a sectional view of the cell, and FIG. 7 is a drive waveform. In this embodiment, an example in which the method of performing the erase operation utilizing self-erasing as in the present invention is applied to a dot matrix type PDP will be shown. In the figure, 8a and 8b are scan / sustain electrodes and sustain electrodes, which are arranged in parallel on the same plane, and 9 is a dielectric layer 5 below the scan / sustain electrodes 8a and 8b.
A writing electrode, 10 is a discharge cell, and 16 is a scanning pulse.

Next, the operation will be described. First, FIG.
By applying the self-erasing discharge pulse 11 to the sustain electrode 8b as shown in (b), the same erasing operation as in the first embodiment is performed. Subsequently, the scan pulse 16 is applied to the scan / sustain electrode 8a as shown in FIGS. 7C to 7E, and at the same time, the write pulse 12 is written to the write electrode 9 according to the image data as shown in FIG. 7A.
By applying, writing discharge is generated in the discharge cell 10 and writing is performed. Further, as shown in FIGS. 7B to 7E, by alternately applying the sustain pulse 13 to the scan / sustain electrode 8a and the sustain electrode 8b, the display discharge is generated and the display is performed. Although the self-erasing pulse 11 is applied to the sustain electrode 8b in this embodiment, the self-erasing pulse 11 is applied to the scan / sustain electrode 8a because the sustain electrode 8b and the scan / sustain electrode 8a are symmetrical. Good.

Example 5. FIG. 8 shows a fifth embodiment.
In this embodiment, a self-erasing pulse 11 is applied to the write electrode 9 as shown in FIG. 8A so that an erase discharge is generated between the write electrode 9 and the sustain electrode 8b or the scan / sustain electrode 8a. However, the configuration is different from that of FIG. 7 in the fourth embodiment. The other points are the same as those in the fourth embodiment.

Embodiment 6. FIG. 9 shows a sixth embodiment.
In this embodiment, the self-erasing pulse 11 is applied to the write electrode 9 as shown in FIG. 9 (a), and at the same time the self-erasing pulse 11 is applied to the sustain electrode 8b or the sustain / scan electrode 8a as shown in FIGS. The configuration is different from that of FIG. 8 in the fifth embodiment in that an erase pulse 11 is added. The other points are the same as in the fifth embodiment.

Example 7. FIG. 10 shows a seventh embodiment. In this embodiment, as shown in FIG. 10A, immediately after the self-erase discharge pulse 11 is applied to the write electrode 9, the write assist pulse 14 having the opposite polarity to the write pulse 12 is applied to the write electrode 9 as in the second embodiment.
9 is different from that of the sixth embodiment in that the voltage is applied. The remaining points are the same as in the sixth embodiment.

Example 8. FIG. 11 shows an eighth embodiment. In the present embodiment, the erase operation is sequentially performed for each row, and this point is different from the configuration in which the erase operation is simultaneously performed in all cells as in the fourth to seventh embodiments. The remaining points are the same as in the seventh embodiment. That is,
The self-erase discharge pulse 11 is shifted by one row each time the sustain pulse 13 is output to the sustain electrode 8b as shown in FIGS. 11C and 11D, and is applied to the row to which the self-erase discharge pulse 11 is applied. Then, the sustain pulse 13 is applied to the sustain / scan electrode 8a, and the sustain pulse 13 to the sustain electrode 8b is further applied.
After the output of, the scan pulse 16 is applied and the write pulse 12 is applied to the write electrode 9 to perform the write discharge.

Example 9. FIG. 12 shows a ninth embodiment. In this embodiment, the write electrode 9 is provided on the substrate 1 opposite to the substrate 2 on which the sustain / scan electrode 8a and the sustain electrode 8b are provided, and the discharge space 6 is provided between the write electrode 9 and the sustain electrode 8b. It was made to intervene,
This is characterized in that it is a so-called counter writing type PDP. In this respect, as in Examples 4 to 8 (FIG. 6), the sustain electrode 8b and the write electrode 9 are provided on the same substrate with the dielectric material interposed therebetween. The configuration is different from the one configured to drive the PDP. As for the remaining points are similar to the embodiment of the first 4-8.

Embodiment 10. 13 and 14 show a tenth embodiment. The present embodiment is different from the above-described embodiment in that erasing by self-erasing and erasing by another method are combined and performed alternately. The other points are the same as those in the above-described embodiment.
That is, FIG. 13 shows an example in which self-erasing discharge pulse 11 and narrow pulse 15 are alternately applied to alternately perform self-erasing and narrow pulse erasing as shown in FIG. 13B. is there. Further, FIG. 14 shows an example in which self-erasing and wide-width pulse erasing are alternately performed by alternately applying the self-erasing discharge pulse 11 and the wide-width pulse 17 as shown in FIG. 14B. The light emission in the narrow pulse erase or the thick pulse erase is weaker than that in the self erase, and since light is emitted only in the cell that was turned on in the previous field, the contrast is not lowered so much. On the other hand, the self-erasing discharge effect of the pilot fire lasts more than 2 fields, so 1 in 2 fields
It is effective enough to do it only once. By doing so, there is an effect that it is possible to solve the problem that the contrast is lowered because of strong light emission due to self-erasing discharge. In this example, self-erasing was performed once in two fields, but this may be performed once in several fields.

Embodiment 11. FIG. 15 shows the eleventh embodiment. In this embodiment, one field is divided into a plurality of subfields, and the number of times of light emission is controlled to perform grayscale display. In a so-called subfield grayscale PDP, several subfields are used. The configuration is different from the above-described embodiment in that self-erasing is performed once, and thin pulse erasing or thick pulse erasing is performed in other subfields. Note that FIG.
In FIG. 5, reference numeral 18 denotes a self-erasing period, 19 denotes a narrow pulse erasing period or a thick pulse erasing period, and 20 denotes a writing / sustaining period. Other points are the same as those in the above-described embodiment.

[0023]

As described above, according to the present invention, writing
Self-erase discharge of auxiliary write pulse of opposite polarity to the normal pulse
Relatively low because it is applied after the pulse falls
To generate a writing discharge with a voltage writing pulse
It is possible to obtain a gas discharge display element capable of performing the above .

Further, the self-erasing discharge pulse is directly followed by the falling edge.
After that, it rises, and the self-erasing discharge pulse is applied.
Before the charged particles generated by the
Write pulse when applying
Substantial potential difference between auxiliary pulse and self-erasing discharge pulse
It becomes self-erasing discharge pulse voltage, and self-erasing of relatively low voltage
Erase discharge pulse can generate self-erase discharge
It

Further, one field can be set to a plurality of subfields.
For gas discharge display element that divides into fields and displays gradation
The specific sub-fields that are part of
Subfields are set once every two fields
And if it is a subfield other than the specific subfield above.
Narrow pulse erase or thick pulse in Buffield
When erasing, apply erasing by self-erasing discharge
To obtain a gas discharge display element whose contrast does not deteriorate.
You can

[0026]

[0027]

[Brief description of drawings]

FIG. 1 is a cell sectional view of a gas discharge display element according to a first embodiment of the present invention.

FIG. 2 is a drive waveform diagram of the gas discharge display element according to the first embodiment of the present invention.

FIG. 3 is a drive waveform diagram of the gas discharge display element according to the second embodiment of the present invention.

FIG. 4 is a drive waveform diagram of a gas discharge display element according to a third embodiment of the present invention.

FIG. 5 is a configuration diagram of a gas discharge display element according to a fourth embodiment of the present invention.

FIG. 6 is a cell sectional view of a gas discharge display element according to a fourth embodiment of the present invention.

FIG. 7 is a drive waveform diagram of a gas discharge display element according to a fourth embodiment of the present invention.

FIG. 8 is a drive waveform chart of a gas discharge display element according to a fifth embodiment of the present invention.

FIG. 9 is a drive waveform diagram of a gas discharge display element according to a sixth embodiment of the present invention.

FIG. 10 is a drive waveform chart of a gas discharge display element according to a seventh embodiment of the present invention.

FIG. 11 is a drive waveform diagram of a gas discharge display element according to an eighth embodiment of the present invention.

FIG. 12 is a cell sectional view of a gas discharge display element according to a ninth embodiment of the present invention.

FIG. 13 is a drive waveform chart of a gas discharge display element according to a tenth embodiment of the present invention.

FIG. 14 is a drive waveform chart of a gas discharge display element according to a tenth embodiment of the present invention.

FIG. 15 is an operation diagram of the gas discharge display element according to the eleventh embodiment of the present invention.

FIG. 16 is a cell cross-sectional view of a conventional gas discharge display element.

FIG. 17 is a drive waveform diagram of a conventional gas discharge display element.

[Explanation of symbols]

1 Front substrate 2 Back substrate 3 X electrodes 4 Y electrodes 5 Dielectric layer 6 discharge space 7 Scan / sustain electrodes 8 sustaining electrodes 9 Writing electrode 10 discharge cells 11 Self-erasing discharge pulse 12 Write pulse 13 Sustain pulse 14 Write assist pulse 15 narrow erase pulse 16 scan pulses 17 Thick erase pulse 18 Self-erasure period 19 Wide erase or narrow erase period 20 Writing / maintenance period

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Claims (15)

(57) [Claims] 1. A dielectric layer forming a discharge space, a pair of electrodes for generating a discharge in the discharge space formed by the dielectric layer, and the pair of electrodes having a self-erasable size and pulse width. Self-erasing means for applying a self-erasing discharge pulse to perform an erasing operation, and writing means for applying a writing pulse to the pair of electrodes to perform writing after the erasing operation by the self-erasing means. A gas discharge display element, characterized in that, after the fall of the erase discharge pulse, a write assist pulse having a polarity opposite to that of the write pulse is applied to the pair of electrodes. 2. A dielectric layer forming a discharge space, a pair of electrodes for generating a discharge in the discharge space formed by the dielectric layer, and an erase operation by applying a self-erase discharge pulse to the pair of electrodes. And the pair of electrodes after the erasing operation by the self-erasing means.
Writers that apply write pulses to write
A step of applying a write assist pulse to the pair of electrodes after the fall of the self-erase discharge pulse, and a potential difference between the self-erase discharge pulse and the write assist pulse allows self-erase discharge. A gas discharge display element characterized by a potential difference. 3. The gas discharge display element according to claim 1, wherein the write assist pulse is generated after the self-erase discharge pulse falls and by applying the self-erase discharge pulse. A gas discharge display element, characterized in that the charged particles are applied to the pair of electrodes before being completely neutralized. 4. The gas discharge display element according to claim 3, wherein the write assist pulse is applied to the pair of electrodes within 0 to 3 μsec after the fall of the self-erase discharge pulse. A gas discharge display element characterized by: 5. The gas discharge display element according to claim 3, wherein the write assist pulse rises immediately after the fall of the self-erasing discharge pulse, and the charged particles are generated by applying the self-erasing discharge pulse. A gas discharge display element characterized in that it falls before being completely neutralized. 6. The gas discharge display element according to claim 3, wherein the write assist pulse is returned to 0 voltage while the space charge generated by the self-erase discharge pulse remains. A gas discharge display element characterized by being a thing. 7. The gas discharge display device according to claim 3, wherein the write assist pulse is returned to 0 voltage within 0.3 to 2 μsec after the fall of the self-erase discharge pulse. A gas discharge display device characterized in that 8. A gas discharge display device for displaying gray scales by dividing one field into a plurality of subfields, wherein a dielectric layer forming a discharge space and a discharge space formed by the dielectric layer are discharged. Only in the pair of electrodes to be generated and in a specific subfield that is a part of the plurality of subfields, a self-erase discharge pulse having a size and pulse width capable of self-erasing is applied to the pair of electrodes to perform the erase operation. The self-erasing means to be performed and the pair of electrodes
Writers that apply write pulses to write
Gas discharge display device characterized by comprising: a stage, a. 9. A gas discharge display device for displaying gray scales by dividing one field into a plurality of sub-fields, a pair of substrates forming discharge spaces, and scanning / maintaining arranged in parallel on one of the substrates. An electrode and a sustain electrode, a write electrode disposed on the other substrate, and a self-erasing discharge pulse having a self-erasable size and pulse width only in a specific subfield that is a part of the plurality of subfields. and self-erasing means for erasing operation is applied to the scan and sustain electrodes and the sustain electrode after the erase operation by the self-erasing unit, in the writing electrodes
Writing means for applying a writing pulse to perform writing
And a gas discharge display element. 10. The gas discharge display element according to claim 8 or 9 , wherein the specific subfield is set once every several subfields. 11. The gas discharge display device according to any one of claims 8 to 10, in the sub-fields other than the specific sub-field of the plurality of sub-fields, the cell only that were lit before subfields A gas discharge display element, characterized in that erasing is performed so that discharge light emission is performed at. 12. The gas discharge display element according to claim 11 , wherein the erasing in which discharge light emission is performed only in the cells which are lit in the previous subfield is wide pulse erasing or narrow pulse erasing. A gas discharge display element characterized by the above. 13. A gas discharge display device according to any one of claims 1 to 12, the voltage of the self-erase discharge pulse, the gas, which is a 1.2 to 3 times the discharge starting voltage Discharge display element. 14. After performing an erasing operation by applying a self-erasing discharge pulse having a size and a pulse width capable of self-erasing to a pair of electrodes for generating a discharge in a discharge space formed by a dielectric layer. In a method for erasing a gas discharge display device, wherein a writing pulse is applied between the pair of electrodes for writing, charged particles generated by applying the self-erasing discharge pulse after the self-erasing discharge pulse falls. A method of erasing a gas discharge display element, characterized in that a write assist pulse having a polarity opposite to that of the write pulse is applied to the pair of electrodes before being completely neutralized. 15. A method of erasing a gas discharge display device, in which one field is divided into a plurality of subfields for gradation display, and a pair of discharges are formed in a discharge space formed by a dielectric layer prior to writing. For the electrode of
A gas discharge display device characterized in that an erasing operation is performed by applying a self-erasing discharge pulse having a size and a pulse width capable of self-erasing only in a specific subfield which is a part of the plurality of subfields. How to erase.