JP3421594B2 - DC-DC converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC-DC converter, and more particularly to a technique for suppressing a malfunction of a control circuit when power is turned on.

[0002]

2. Description of the Related Art A general DC-DC converter will be described with reference to FIGS.

FIG. 3 is a schematic configuration circuit diagram of a DC-DC converter. Reference numeral 1 denotes an internal circuit constituting the DC-DC converter, which is supplied from a voltage supply circuit 2 by a resistance division method (R1, R2). A voltage is input to one of the comparators 3, a reference voltage is input to the other, and an output voltage from the comparator 3 is input to an oscillation control circuit 4, and an output from the oscillation control circuit 4 is output to an output pad 5. It is output to an external element group 6 to be described later.

Reference numeral 6 denotes an external device group externally connected to the internal circuit 1. The N-channel MOS transistor 7 includes an output from the oscillation control circuit 4 input to its gate, and an N-channel MOS transistor 7. Of the drain electrode
It is connected to an output line of a coil 8 in which an input voltage supplied from a power source such as a battery (not shown) is stored, and the output line supplies an output boosted by the coil 8 when the N-channel MOS transistor 7 is turned off. Diode 8 for rectification
Is input to the internal circuit 1 through an input pad 12 through a capacitor 9 for stabilizing the output. The N-channel MOS transistor 7 is a switching element for turning on and off the current of the coil 8, and does not need to be an external element in particular, and may be configured in the internal circuit 1. Absent.

By adopting such a circuit configuration, for example, a relatively low voltage (about 0.8 V to 1.9) of a battery or the like can be obtained.
(Approximately V), and the voltage is increased to approximately 2.2 V and supplied to a subsequent circuit (not shown). As shown in FIG. 4, the oscillation control circuit 4 receives the output from the comparator 3 on one side and the oscillation circuit 13 on the other side.
And the NAND circuit 14 to which the output of
An inverter 15 receives an output of the D circuit 14 and inputs an inverted signal thereof to the gate of the N-channel MOS transistor 7.

[0006]

However, in the above-described circuit configuration, the output of the oscillation circuit 13 is only output when the output of the comparator 3 is "H".
The power is supplied to the transistor 7 and the power supply voltage VDD is boosted to a desired voltage.

For this reason, when the power is turned on (the input voltage to be input is about 0.9 V to 1.5 V), the comparator 3 may not operate normally, and the input power of the battery or the like is originally low. In particular, when the capacity of the battery is reduced, the input voltage is not boosted forever, as shown by the dotted line in FIG. 2, and this circuit cannot be used.

Accordingly, it is an object of the present invention to provide a DC-DC converter that suppresses a malfunction of a control circuit when power is turned on.

[0009]

SUMMARY OF THE INVENTION Accordingly, the present invention relates to a DC-to-DC converter.
The DC converter includes an oscillation control circuit 4 having an auxiliary circuit 20 in place of the conventional oscillation control circuit 4 as shown in FIG.
A is provided.

The auxiliary circuit 20 forcibly inputs "H" to the other of the NAND circuits 14 to which the output of the oscillation circuit 13 is input during a certain period immediately after the power is turned on.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the DC-DC converter of the present invention will be described below with reference to the drawings. The same components as those in the conventional configuration are denoted by the same reference numerals, and the description will be simplified.

The characteristics of the DC-DC converter of the present invention are as follows.
An oscillation control circuit 4A having an auxiliary circuit 20 is provided in place of the conventional oscillation control circuit 4 as shown in FIG. 1 in order to suppress a malfunction of the control circuit when the power is turned on (a comparator does not operate normally). That is.

Regarding the configuration of the oscillation control circuit 4A,
This will be described together with the schematic configuration of the C-DC converter.

As shown in FIG. 1, in an internal circuit 1 constituting a DC-DC converter, a resistance dividing system (R1, R
The voltage supplied from the voltage supply circuit 2 according to 2) is input to one of the comparators 3 and the reference voltage is input to the other, and the output voltage from the comparator 3 is input to the oscillation control circuit 4A. I have.

The oscillation control circuit 4A is configured such that the output from the comparator 3 is inputted to one side, and the voltage supplied from the voltage supply circuit 21 by the resistance division method (R3, R4) is inputted to the gate to the other side. A NOR circuit 23 to which an output from the drain electrode of the N-channel MOS transistor 22 and a resistor R5 connected between the drain electrode and the power supply voltage VDD are input;
3 and an inverter 24 for inverting the output of the inverter 2.
4 is input to one end and the output of the oscillation circuit 13 is input to the other end of the NAND circuit 14. The output of the NAND circuit 14 is input to the NAND circuit 14, and the inverted signal is sent to the gate of the N-channel MOS transistor 7. (An auxiliary circuit 20 is shown by a dashed line in FIG. 1). Although not particularly illustrated, the external element group 6 is the same as the conventional configuration.

By adopting such a circuit configuration, for example, a relatively low voltage (about 0.8 V to 1.9) of a battery or the like can be obtained.
(Approximately V) to about 2.2 V and supply it to a subsequent circuit (not shown).

According to the DC-DC converter of the present invention, when the conventional power is turned on (the input voltage to be input is about 0.9 V to 1.5 V), the comparator 3 does not operate normally. The problem that this circuit cannot be used can be suppressed. That is, when the power is turned on, even if the supplied input voltage is below the operable range of the comparator 3 and the comparator 3 does not operate normally, the oscillation from the auxiliary circuit 20 is forcibly oscillated. The output of the circuit 13 is transmitted to the N-channel MOS transistor 7 to boost the power supply voltage VDD. That is, first, until the voltage obtained by dividing the power supply voltage VDD by the resistors R3 and R4 exceeds the threshold voltage (for example, about 0.8 V) of the N-channel type MOS transistor 22, N
Since the channel type MOS transistor 22 is off, the voltage of the power supply voltage VDD is supplied to one of the NOR circuits 23 via the resistor R5, and thus "H" is input to one of the NOR circuits 23. Thus, regardless of whether the signal input from the comparator 3 to the other of the NOR circuit 23 is “H” or “L”, “L” is output from the NOR circuit 23 to configure the auxiliary circuit 20. "H" is output from the inverter 24, which is the last element, and when the output of the comparator 3 is "H" as described above (that is, the signal input to the NAND circuit 14 is "H"). Only), the output of the oscillation circuit 13 is transmitted to the N-channel MOS transistor 7, and the power supply voltage V
Operates to boost DD.

After the voltage obtained by dividing the power supply voltage VDD by the resistors R3 and R4 exceeds the threshold voltage (for example, about 0.8 V) of the N-channel type MOS transistor 22, the N-channel type When the MOS transistor 22 is turned on, the power supply voltage VDD becomes equal to the resistance R5 and the N-channel type MOS.
Since it is grounded via the transistor 22, “L” is input to one of the NOR circuits 23. Therefore, if "H" is input to the other of the NOR circuit 23, the N
"L" is output from the OR circuit 23,
"H" is input to one of the NAND circuits 14 through the. Similarly, if "L" is input to the other of the NOR circuits 23, "H" is output from the NOR circuit 23, and "L" is input to one of the NAND circuits 14 via the inverter 24. As a result, the output of the oscillation circuit 13 is not transmitted to the N-channel MOS transistor 7, and the boosting of the power supply voltage VDD is stopped.

As described above, according to the present invention, even when the operation of the comparator 3 is unstable when the power is turned on, the auxiliary circuit 20 that forcibly supplies "H" to the NAND circuit 14 when the power is turned on is provided in the oscillation control circuit 4A. The output of the oscillation circuit 13 is transmitted to the N-channel MOS transistor 7 so that the power supply voltage VDD can be boosted. In this case, even if the performance of the circuit is reduced, the input voltage is correctly boosted as shown by the solid line in FIG. 2, and this circuit can be used.

[0020]

According to the present invention, an auxiliary circuit for forcibly supplying "H" to the NAND circuit when the power is turned on is added to the oscillation control circuit even when the operation of the comparator is unstable when the power is turned on. Then, the output of the oscillation circuit is transmitted to the N-channel MOS transistor, and the power supply voltage VDD can be boosted.

[Brief description of the drawings]

FIG. 1 is a schematic configuration circuit diagram showing a DC-DC converter according to an embodiment of the present invention.

FIG. 2 is a diagram showing an operation state of the DC-DC converter of the present invention.

FIG. 3 is a schematic configuration circuit diagram showing a conventional DC-DC converter.

FIG. 4 is a configuration circuit diagram showing an oscillation control circuit of a conventional DC-DC converter.

[Explanation of symbols]

2: Voltage supply circuit 3: Comparator 4A: Oscillation control circuit 20: Auxiliary circuit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-10-108455 (JP, A) JP-A-10-163909 (JP, A) JP-A-10-42549 (JP, A) JP-A-6-108 14548 (JP, A) JP-A-10-225108 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H02M 3/155 H02J 1/00 H02J 7/00

Claims (1)

(57) [Claims] A coil supplied with an input voltage from a power supply; a first transistor for controlling a current flowing through the coil; a diode for rectifying the input voltage boosted by the coil; A comparator that compares a voltage corresponding to the input voltage with a reference voltage and outputs the comparison result, an oscillation circuit, and supplies an output of the oscillation circuit to a gate of the first transistor in accordance with an output of the comparator. first comprises a gate circuit, and an auxiliary circuit for supplying forced to the first transistor to the output of the oscillation circuit when power is turned on, the auxiliary circuit
Supplies the gate with a voltage obtained by dividing the power supply voltage with a resistor
The second transistor, and the second transistor
A resistor connected between the drain and the source voltage, before
The drain output of the second transistor and the comparator;
And a second gate circuit for output of data is input, said
The first gate circuit according to the output of the second gate circuit
Supplies the output of the oscillation circuit to the first transistor
A DC-DC converter.