JP3419651B2 - Image signal processing device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal processing apparatus in a surveillance camera, a video camera or the like, which has improved performance of suppressing a color false signal in a large amplitude edge portion of an image signal.

[0002]

2. Description of the Related Art Complementary color CCDs are usually used in image signal processing devices such as so-called single-chip type surveillance cameras and video cameras that use only one CCD. The state of image signal processing by the complementary color CCD is shown in FIG. Ye on the CCD
(Yellow), Cy (cyan), Mg (magenta),
Four types of G (green) color filters are properly arranged. The luminance level for each color is output from the CCD as an electric signal due to the interlace difference. The output signal from the CCD is 2 by the image signal processing.
R-G signal, 2B-G signal, R (red), G
Information on the three primary colors of (green) and B (blue) is obtained. The color of the light incident on the CCD is reproduced based on the information of the three primary colors. However, in the case of image signal processing using such a complementary color CCD, in order to correctly reproduce a color, it is necessary that light of uniform brightness be incident on the complementary color filter for forming one color. If there is a large amplitude edge between the complementary color filters, the color will not be reproduced correctly.
This situation will be described with reference to FIG. 2R-G signal is Y
It is generated from the e + Mg signal and the Cy + G signal. At this time, in the CCD input, Ye1, Mg1 and Cy1,
If there is a difference in the input brightness level between G1, the brightness level information of each color varies, and thus the derived 2R-.
The level of the G signal changes.

As an image signal processing apparatus for correcting a color false signal due to such a large amplitude edge of luminance, an edge detection circuit detects a horizontal edge of an image signal,
A method for controlling the characteristics of a low-pass filter that passes an image signal is disclosed in Japanese Patent Application Laid-Open No. 8-98189.
As shown in FIG. 12, this device includes a CCD 101 for converting image information into an analog electric signal, a CDS / AGC unit 102 for controlling gain control, and the like.
ADC unit 103 for converting an analog signal into a digital signal
1H delay units 104 and 105 for delaying the output signal of the ADC unit 103 by one horizontal period, a low-pass filter 106 for extracting only a luminance signal from the output of the 1H delay unit 104, and the low-pass filter 1.
A horizontal aperture section 107 for detecting an edge in the horizontal direction of the output of 06 and generating an aperture signal, an output signal of the ADC section 103 and the 1H delay sections 104, 105.
The vertical aperture section 108 for detecting an edge in the vertical direction from the output signal and the output of the low-pass filter 106, the horizontal aperture section 107, and the vertical aperture section 108, and the mixer section 1
09, a gamma correction unit 110 that performs gamma correction on the output of the mixer unit 109, and a DAC unit 111 that converts an output signal of the gamma correction unit 110 into an analog signal, and the ADC unit 103 and the 1H delay unit. 104,
Variable coefficient / fixed coefficient low pass filter 120 for processing the edge portion of the output signal of 105, edge of the output signal of ADC section 103 and 1H delay sections 104 and 105, and variable coefficient / fixed coefficient low pass filter 1
An edge detection circuit 119 that outputs a control signal 112 for controlling 20; a matrix unit 113 that generates RGB information from the output of the variable coefficient / fixed coefficient low-pass filter 120; and an output signal of the matrix unit 113. White balance unit 1 that performs white balance processing
14, a gamma correction unit 115 for performing gamma correction on the output of the white balance unit 114, and a color difference matrix unit 116 for generating RY and BY color difference signals from the output of the gamma correction unit 115. A color subcarrier modulator 117 for subcarrier modulating the output of the color difference matrix unit 116; and a DAC unit 118 for converting the output of the color subcarrier modulator 117 into an analog signal.
It has and.

In this image signal processing device, the CCD 101
The signal output from is corrected by the CDS / AGC unit 102 in terms of signal level and the like, and then converted into a digital signal by the ADC unit 103. The large-amplitude edge of the digital signal output from the ADC unit 103 is detected by the edge detection circuit 119, and the variable coefficient / fixed coefficient low-pass filter 120 is detected.
Control the characteristics of. When the edge amplitude of the image signal input to the low-pass filter 120 is small, the input level is output as it is, and when the edge amplitude becomes large, the input pixels in the edge portion are interpolated by averaging the levels of the pixels before and after that. To do. The state of this interpolation will be described with reference to FIG. If the light incident on the CCD is as shown in FIG.
M1 (= Ye1 + Mg1) and CG1 (= Cy1 + G1)
Since there is an edge between the two, the 2R-G signal generated from the YM1 and CG1 is a false color signal. Such an edge is detected by the edge detection circuit 119 of FIG.
The control signal 112 is sent to the variable coefficient / fixed coefficient low pass filter 120. Upon receiving the control signal, the low-pass filter 120 receives the pixels YM located on both sides of the pixel of CG1.
1. Calculate the value CG1 'that averages the levels of 1 and YM2,
Replace CG1 with CG1 '. As a result, YM1 and C
Since the brightness level difference of G1 'becomes small, the color false signal can be suppressed to some extent.

[0005]

However, this apparatus can be applied only to the image signal when the complementary color CCD is interlaced, and the complementary color CCD can be applied by the method described below.
There is a problem that the color false signal cannot be suppressed with respect to the image signal in the case of sequentially scanning. A method of sequentially scanning the complementary color CCD will be described with reference to FIGS. 3 and 5 to 9. Non-interlaced scanning (sequential scanning) used for personal computer displays, etc.
Is shown in FIG. In this case, if 2R-G and 2B-G are created using the interlaced signal processing as shown in FIG. 3, both the information of the first line and the information of the second line are 2R-G.
2B-G signal is not generated. Therefore, R
Of the three primary colors of GB, the color cannot be reproduced because there is no B signal. In such a case, as shown in FIG.
Focusing on the four pixels of Ye1, Cy1, Mg1, and G1,
YM1 and CG1 are obtained by directly adding 1 and Mg1 and Cy1 and G1 respectively in the vertical direction, and at the same time, YG1 and CM1 are obtained by adding Ye1 and G1 and Cy1 and Mg1 in a cross-shape. This YM1 and CG1 to 2R-
It is possible to generate a G signal and simultaneously generate a 2B-G signal from YG1 and CM1.

Next, a case in which a large amplitude edge of luminance occurs when a running difference is sequentially performed by such a method will be described with reference to FIG. Complementary color CCD output Ye1,
If there is an edge between Mg1 and Cy1, G1, 2R-
While the edge of the G signal is steep, the edge of the 2B-G signal is averaged by cross addition. This is based on the magnitude relation of (Ye1, Mg1)> (Cy1, G1) and YM1 = Ye1 + Mg1, CG1 = Cy1 + G1,
It can be derived from the respective formulas of YG1 = Ye1 + G1, CM1 = Cy1 + Mg1. FIG. 9 shows a case where the conventional image signal processing device shown in FIG. 12 is applied when the edge amplitudes of 2R-G and 2B-G are different as described above. As in the case of FIG. 5, when the pixels CG1 and CM1 in the edge portion are averaged by the pixels YM1, YM2 and YG1, YG2 before and after the edge pixels, respectively, the averaged 2R-G signal and 2B as shown in FIG. The amplitude of the edge is different from that of the −G signal. This is because the luminance levels of the target pixels YM1 and YG1 for averaging are different from each other, and 2
This means that the edges of the BG signal are averaged and even if only one pixel of CM1 is replaced, the level difference between YG1 and YM1 remains uncorrected.

The present invention solves the above-mentioned drawbacks of the prior art. The complementary color CCD is sequentially driven by simultaneously controlling the pixel configuration for detecting the edge of the image signal and performing the addition by scraping and the edge interpolation operation. It is an object of the present invention to provide an image signal processing device capable of suppressing color false signals even in the case of a difference.

[0008]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a plurality of adders, which are not provided in the conventional method, for performing plow-off addition together with a normal adder, and performs edge detection. A control signal from the circuit is used to switch the pixel configuration for crossing addition with a switch, and at the same time, the interpolation unit performs interpolation processing on the output of each adder.

According to this structure, the smoothing can be sufficiently performed even for the deformation of the edge portion due to the addition of strokes, which cannot be performed by the conventional method, and the color false signal can be suppressed when the complementary color CCDs are sequentially scanned. It will be possible.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention comprises an input section for inputting at least two image signals, an adder for adding the image signals from the input section, and an input section from the input section. Of the image signals from the input section, a two-pixel delay for delaying one of the image signals from the input section by a time of two pixels, the image signal from the input section and the two Another add-on adder for adding the output of the pixel delay in a check-like manner, a switch for switching the output of the two add-on adders, and an interpolator for interpolating the output of the adder. , Another interpolator for interpolating the output of the switch, and an edge for detecting an edge of the image signal from the input part and simultaneously outputting a control signal to the two interpolator and the switch An output section, the edge detection section detects an edge of an image signal, and a control signal from the edge detection section switches the output of a plow adder having different pixel configurations, and an edge section interpolation operation. Simultaneously performing and has an effect that the color false signal can be suppressed even for an image when the complementary color CCDs are sequentially run across.

The invention according to claim 2 of the present invention is
An input unit for inputting at least two image signals, an adder for adding the image signals from the input unit, and a two-pixel delay for delaying one of the image signals from the input unit by a time of two pixels, A switch for switching between the image signal from the input section and the output of the two-pixel delay, and a adder for adding the image signal from the input section and the output of the switch in a scratching pattern An interpolator for interpolating the output of the adder, another interpolator for interpolating the output of the crossing adder, an edge of the image signal from the input, and at the same time the two interpolators and the An edge detection unit that outputs a control signal to the switch is provided, and the similar effect can be realized with a simpler configuration than the invention according to claim 1 of the present invention.

FIG. 1 shows an embodiment of the present invention.
1 to 2 will be described. (Embodiment 1) As shown in FIG. 1, an image signal processing apparatus according to a first embodiment of the present invention includes input sections 1 and 2 for inputting at least two image signals, and the input section 1,
2 and the adder 3 for adding the image signals from the input section 1, the adder 4 for adding the image signals from the input sections 1 and 2 in a scratching pattern, and the image signal from the input section 2 for a time of 2 pixels. A two-pixel delay 5 for delaying the delay, another add-on adder 6 for adding the image signal from the input unit 1 and the output of the two-pixel delay 5 in a cross-like manner, and the two add-on delays. Scale adder 4,
A switch 8 for switching the output of the switch 6, an interpolator 9 for interpolating the output of the adder 3, another interpolator 10 for interpolating the output of the switch 8, and an image signal from the input unit 1. It is provided with an edge detection unit 7 that detects an edge and simultaneously outputs a control signal to the two interpolation units 9 and 10 and the switch 8.

The operation will be described below with reference to FIGS. 10 and 11. The signals input to the input units 1 and 2 in FIG.
The first line (Ye0, Cy0, Ye1, Cy1, ...) Of the output signal of the complementary color CCD as shown in FIG. 10 respectively.
And the second line (Mg0, G0Mg1, G1, ...). Here, as shown in FIG. 10, the signal Ye1, of the input unit 1 is
Consider a case in which an edge occurs between Cy1 and Cy1. At this time,
The addition adder 4 produces a YG1 (= Ye1 + G1) signal. In addition, one of the inputs of the other add-on adder 6 receives the signal from the input unit 2 by a 2-pixel delay 5
Since the delay time is delayed by two pixels, the crossing adder 6 simultaneously generates the YG1 ′ (= Ye1 + G0) signal. When the edge detection unit 7 detects an edge and sends a control signal to the switch 8, YG1 ′ which is the output signal of the plow adder 6 is selected as the output of the switch 8. At this time, the output of the switch 8 and the output of the adder 3 become the 2B-G signal and the 2R-G signal as shown on the right side of FIG. 10, respectively. The 2R-G and 2B-G signals are input to the interpolation units 9 and 10, respectively.

FIG. 11 shows the state of signal processing in the interpolation section. The control signal from the edge detection unit 7 replaces CG1 which is the input of the interpolation unit 9 with CG1 ′ obtained by averaging YM1 and YM2. At the same time, the edge detector 7
The control signal from the CM is the input to the interpolation unit 10.
1 is replaced with CM1 'which is an average of YG1' and YG2. As a result, the outputs of the interpolators 9 and 10 have the same amplitude of the luminance edge as the 2R-G signal and 2B-G signal shown on the right side of FIG. 11, respectively.

As described above, according to the first embodiment, the edge detecting section 7 detects the edge of the image signal, and the control signal from the edge detecting section 7 causes the plucking adders 4 having different pixel configurations, 6 output switching,
By performing the edge interpolation operation in the interpolators 9 and 10 at the same time, it is possible to suppress the false color signal even in an image in which complementary color CCDs are sequentially crossed.

(Second Embodiment) As shown in FIG. 2, an image signal processing apparatus according to a second embodiment of the present invention has input sections 13 and 14 for inputting at least two image signals.
An adder 15 for adding the image signals from the input units 13 and 14, a two-pixel delay 16 for delaying the image signal from the input unit 14 by a time of two pixels, and an image from the input unit 14. A switch 17 for switching between the signal and the output of the two-pixel delay 16, and a adder 19 for adding the image signal from the input unit 13 and the output of the switch 17 in a scratchy manner.
An interpolating section 20 for interpolating the output of the adder 15, another interpolating section 21 for interpolating the output of the puffing adder 19, and an edge of the image signal from the input section 13 at the same time. It is provided with the two interpolation units 20 and 21 and an edge detection unit 18 which outputs a control signal to the switch 17.

The operation will be described below with reference to FIGS. 10 and 11. The signals input to the input units 13 and 14 in FIG. 2 are the first line (Ye0, Cy0, Ye1, Cy) of the output signal of the complementary color CCD as shown in FIG.
1, ...) and the second line (Mg0, G0, Mg1, G
1, ...). Here, as shown in FIG.
Consider a case where an edge occurs between the signal Ye1 and Cy1 of the signal. At this time, the signal of the input unit 14 is G1, and thus the output of the two-pixel delay 16 is G0. When the edge detection unit 18 detects an edge and sends a control signal to the switch 17, G0 which is the output of the two-pixel delay 16 is selected as the output of the switch 17. The output G0 of the switch 17 is added to the signal Ye1 of the input unit 13 by the plucking adder 19, and the output of the plucking adder 19 becomes YG1 '. Addition adder 19
Output and the output of the adder 15 become a 2B-G signal and a 2R-G signal as shown on the right side of FIG. 10, respectively. The 2R-G and 2B-G signals are supplied to the interpolation units 20, 2 respectively.
It becomes 1 input. The signal processing in the interpolation unit is performed in the same manner as described in the first embodiment of the present invention, and as a result,
The outputs of the interpolators 20 and 21 have the same amplitude of the luminance edge like the 2R-G signal and 2B-G signal shown on the right side of FIG. 11, respectively.

As described above, according to the second embodiment, the edge detection unit 18 detects the edge of the image signal, and the control signal from the edge detection unit 18 performs the cross addition in the cross addition unit 19. By performing the pixel configuration switching and the edge portion interpolation operation in the interpolation units 20 and 21 at the same time, it is possible to generate a color false signal when the complementary color CCDs are sequentially crossed with a simpler configuration than the invention of the first embodiment. Can be suppressed.

[0019]

As is apparent from the above-described embodiment, the present invention detects the edge of the image signal by the edge detection unit and switches the pixel configuration for performing the cross addition by the control signal from the edge detection unit. By performing the edge interpolation operation at the same time, it is possible to obtain the effect that the color false signal can be suppressed even for the image when the complementary color CCDs are sequentially crossed, and the effect can be realized by the semiconductor circuit.

[Brief description of drawings]

FIG. 1 is a block diagram of an image signal processing device according to a first embodiment of the present invention.

FIG. 2 is a block diagram of an image signal processing device according to a second embodiment of the present invention.

FIG. 3 is a schematic diagram of interlaced scanning by a complementary color CCD.

FIG. 4 is a schematic diagram of color false signal generation by a large amplitude edge.

FIG. 5 is a schematic diagram of image signal processing in a conventional image signal processing device.

FIG. 6 is a schematic diagram of sequential scanning by a complementary color CCD.

FIG. 7 is a schematic diagram of scan scanning.

FIG. 8 is a schematic diagram of a change in a luminance edge due to plucking scanning.

FIG. 9 is a schematic diagram in the case where a conventional image signal processing device is applied to the pavement scanning.

FIG. 10 is a schematic diagram (1) of image signal processing according to the present invention.

FIG. 11 is a schematic diagram of image signal processing according to the present invention (2).

FIG. 12 is a block diagram of a conventional image signal processing device.

[Explanation of symbols]

1 Input section 2 Input section 3 adder 4 Addition adder 5 2 pixel delay 6 Addition adder 7 Edge detector 8 switches 9 Interpolator 10 Interpolator 11 Output of interpolator 12 Output of interpolator 13 Input section 14 Input section 15 adder 16 2 pixel delay 17 switch 18 Edge detector 19 Addition adder 20 Interpolator 21 Interpolator 22 Output of interpolator 23 Output of interpolator 101 image sensor 102 Auto gain controller 103 A / D converter 104 1H delay 105 1H delay 106 low-pass filter 107 Horizontal aperture signal generator 108 Vertical aperture signal generator 109 signal adder 110 Gamma correction unit 111 D / A converter 112 control signal 113 Matrix part 114 White balance adjustment section 115 Gamma correction unit 116 color difference matrix section 117 color subcarrier modulation 118 D / A converter 119 Edge detection circuit 120 variable coefficient / fixed coefficient low pass filter

Claims (2)

(57) [Claims] 1. In an image signal processing device such as a surveillance camera or a video camera, an input unit for inputting at least two image signals, an adder for adding the image signals from the input unit, and an image from the input unit. A stacking adder for adding signals in a staggered pattern, a two-pixel delay for delaying one of the image signals from the input section by a time of two pixels, an image signal from the input section and the two-pixel delay And another switch for switching the outputs of the two add-on adders, an interpolator for interpolating the output of the adder, Another interpolator that interpolates the output of the switch, and detects the edge of the image signal from the input unit, and at the same time outputs the control signal to the two interpolator and the switch. An image signal processing device, comprising: 2. An image signal processing device such as a surveillance camera or a video camera, wherein an input unit for inputting at least two image signals, an adder for adding the image signals from the input unit, and an image from the input unit. Two-pixel delay for delaying one of the signals by the time of two pixels, a switch for switching between the image signal from the input section and the output of the two-pixel delay, the image signal from the input section and the switch Adder for adding the output of the above in a checkered pattern, an interpolator for interpolating the output of the adder, another interpolator for interpolating the output of the above adder, and the input section 2. An image signal processing device, comprising: an edge of an image signal from the same, and an edge detection unit that simultaneously outputs the two interpolation units and a control signal to the switch.