JP3416529B2 - Image display device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device that displays an image using a display panel in which a plurality of electron-emitting devices are arranged.

[0002]

2. Description of the Related Art Conventionally, two types of electron-emitting devices, known as a hot cathode device and a cold cathode device, are known. Among them, as the cold cathode element, for example, a surface conduction type emission element, a field emission type element (hereinafter referred to as FE type), a metal / insulating layer / metal type emission element (hereinafter referred to as MIM type), etc. are known. There is.

The surface conduction electron-emitting device is, for example, M.
I. Elinson, Radio E-ng. Electron Phys., 10, 1290,
(1965) and other examples described later are known.

The surface conduction electron-emitting device utilizes a phenomenon in which electron emission occurs when a current is passed through a thin film having a small area formed on a substrate in parallel with the film surface. The surface conduction electron-emitting device is made of an Au thin film in addition to the SnO2 thin film made by Elinson et al. [G. Dittmer: "Thin Solid Films", 9,317 (1
972)], and In2O3 / SnO2 thin films [M. Hart
well and CG Fonstad: “IEEE Trans. ED Conf.”,
519 (1975)] and carbon thin film [Haraki Araki
Others: Vacuum, Vol. 26, No. 1, 22 (1983)] and the like are reported.

As a typical example of the device structure of these surface conduction type electron-emitting devices, FIG. 30 shows a plan view of the device by M. Hartwell et al. In the figure, 3001 is a substrate, and 3004 is a conductive thin film made of metal oxide formed by sputtering. The conductive thin film 3004 is formed in an H-shaped plane shape as illustrated. An electron-emitting portion 3005 is formed by subjecting this conductive thin film 3004 to an energization process called energization forming described later. The interval L in the figure is 0.5 to 1 [mm], and the width W is
It is set to 0.1 [mm]. For convenience of illustration, the electron emitting portion 3005 is shown in a rectangular shape in the center of the conductive thin film 3004, but this is a schematic one, and the actual position and shape of the electron emitting portion is faithfully expressed. It doesn't mean that.

In the above-mentioned surface conduction electron-emitting device including the device by M. Hartwell et al., The electron-emitting portion 3005 is formed by subjecting the conductive thin film 3004 to an energization process called energization forming before electron emission. Was common. That is, the energization forming is
A constant DC voltage or a DC voltage which is boosted at a very slow rate of, for example, about 1 V / min is applied to both ends of the conductive thin film 3004 to energize the conductive thin film 3.
That is, 004 is locally destroyed, deformed, or altered to form an electron emitting portion 3005 having a high electrical resistance. A crack occurs in a part of the conductive thin film 3004 which is locally destroyed, deformed or altered. When an appropriate voltage is applied to the conductive thin film 3004 after this energization forming, electrons are emitted near the crack.

The above-described surface conduction electron-emitting device has an advantage that a large number of devices can be formed over a large area because it has a simple structure and is easy to manufacture. Therefore, as disclosed in, for example, Japanese Patent Laid-Open No. 64-31332 by the present applicant, a method for arranging and driving a large number of elements has been studied.

As an example of the FE type, for example, WP Dyke
& WW Dolan, “Field emission”, Advance in Ele
ctron Physics, 8, 89 (1956) or CA Spind
t, “Physical properties of thin-film field emissi
on cathodes with molybdeniumcones ”, J. Appl. Phy
s., 47, 5248 (1976) are known.

As a typical example of this FE type element structure, FIG. 31 shows a sectional view of the element by the above-mentioned CA Spindt et al. In the figure, 3010 is a substrate, 3011 is an emitter wiring made of a conductive material, 3012 is an emitter cone, 3013 is an insulating layer, and 3014 is a gate electrode. This device includes an emitter cone 3012 and a gate electrode 3
By applying an appropriate voltage during 014, field emission is caused from the tip of the emitter cone 3012. In addition, as another element structure of the FE type, as shown in FIG.
There is also an example in which the emitter and the gate electrode are arranged substantially parallel to the substrate plane on the substrate instead of the above laminated structure.

As an example of the MIM type, for example, C.I.
A. Mead, “Operation of tunnel-emission Devices,
J. Appl. Phys., 32,646 (1961) and the like are known.
FIG. 32 shows a typical example of this MIM type element configuration.
This figure is a cross-sectional view, and in the figure, 3020 is a substrate,
Reference numeral 3021 denotes a lower electrode made of metal, and 3022 has a thickness of 100.
A thin insulating layer of about angstrom, 3023 has a thickness of 8
The upper electrode is made of a metal having a thickness of about 0 to 300 angstroms. In the MIM type, electrons are emitted from the surface of the upper electrode 3023 by applying an appropriate voltage between the upper electrode 3023 and the lower electrode 3021.

The cold cathode device described above does not require a heater for heating because it can obtain electron emission at a lower temperature than the hot cathode device. Therefore, the structure is simpler than that of the hot cathode device, and a fine device can be manufactured. Even if a large number of elements are arranged on the substrate with high density, problems such as heat melting of the substrate are unlikely to occur. In addition, unlike the slow response speed because the hot cathode element operates by heating the heater,
In the case of a cold cathode device, there is also an advantage that the response speed is fast. Therefore, research for applying the cold cathode device has been actively conducted.

For example, the surface conduction electron-emitting device has an advantage that a large number of devices can be formed over a large area because it has a particularly simple structure and is easy to manufacture among cold cathode devices. Therefore, for example, JP-A-64-313 by the present applicant
As disclosed in Japanese Patent No. 32, a method for arranging and driving a large number of devices has been studied.

Regarding the application of the surface conduction electron-emitting device, for example, an image forming apparatus such as an image display apparatus and an image recording apparatus, a charged beam source and the like have been studied.

Particularly, as an application to an image display device, as disclosed in, for example, USP 5,066,883 by the present applicant, Japanese Patent Application Laid-Open No. 2-257551 and Japanese Patent Application Laid-Open No. 4-28137, surface conduction. An image display device using a combination of a die-emitting device and a phosphor that emits light when irradiated with electrons has been studied. An image display device using a combination of a surface conduction electron-emitting device and a phosphor is expected to have better characteristics than other conventional image display devices. For example, it can be said that it is superior in that it does not require a backlight because it is a self-luminous type and that it has a wide viewing angle, even compared with liquid crystal display devices that have become popular in recent years.

A method of arranging and driving a large number of FE type elements is disclosed in, for example, USP 4,904,89 by the present applicant.
5 are disclosed. As an example of applying the FE type to an image display device, for example, a flat panel display device reported by R. Meyer et al. Is known. [R. Meyer: “Recent D
evelopment on Microtips Display at LETI ”, Tech.Di
gest of 4th Int. Vacuum Microelectronics Conf., Na
gahama, pp. 6-9 (1991)].

An example in which a large number of MIM types are arranged and applied to an image display device is disclosed in, for example, Japanese Patent Application Laid-Open No. 3-5 by the present applicant.
It is disclosed in Japanese Patent No. 5738.

The inventors of the present application have tried surface-conduction type emission devices having various materials, manufacturing methods and structures, including those described in the above-mentioned prior art. Further, research has been conducted on a multi-electron source in which a large number of surface conduction electron-emitting devices are arranged and an image display device to which the multi-electron source is applied. For example, a multi-electron source has been tried by the electric wiring method shown in FIG. That is, two surface conduction electron-emitting devices are used.
This is a multi-electron source in which a large number of elements are arranged in a dimension and these elements are wired in a matrix as shown.

In the figure, 4001 schematically shows a surface conduction electron-emitting device, 4002 is row-direction wiring, and 4003 is column-direction wiring. The row wiring 4002 and the column wiring 4003 actually have a finite electric resistance, but they are shown as wiring resistances 4004 and 4005 in the drawing. The wiring method as described above is called simple matrix wiring. Although a 6 × 6 matrix is shown for convenience of illustration, the scale of the matrix is not limited to this, and in the case of a multi electron source for displaying an image, a desired image is displayed. This is to arrange and wire the elements that are sufficient.

In the multi-electron source in which the surface conduction electron-emitting devices are wired in a simple matrix as described above, appropriate electric signals are applied to the row direction wirings 4002 and the column direction wirings 4003 in order to output a desired electron beam. For example,
In order to drive the surface conduction electron-emitting device of any one row in the matrix, the selection voltage Vs is applied to the row direction wiring 4002 of the selected row, and at the same time, the row direction wiring 40 of the non-selected row.
A non-selection voltage Vns is applied to 02. In synchronization with this, a drive voltage Ve for outputting an electron beam is applied to the column-direction wiring 4003. According to this method, the wiring resistance 400
4 and 4005, the voltage of (Ve-Vs) is applied to the surface conduction electron-emitting device of the selected row, and (Ve-Vs) is applied to the surface conduction electron-emitting device of the non-selected row.
Vns) is applied. Here, if Ve, Vs, and Vns are set to appropriate voltages, an electron beam of a desired intensity should be output only from the surface conduction electron-emitting device of the selected row, and each of the column-direction wirings should be output. Different drive voltage Ve
Is applied, electron beams of different intensities should be output from the elements of the selected row. Further, since the response speed of the surface conduction electron-emitting device is high, the driving voltage Ve
It should be possible to change the length of time for which the electron beam is output by changing the length of time for which is applied. Hereinafter, the element applied voltage (Ve-Vs) at the time of selection is referred to as Vf.

[0020]

The following problems have occurred when a multi-electron source in which such cold cathode elements are wired in a simple matrix is applied to an image display device for a television. For example, in the case of an image display device capable of switching between wide display (aspect ratio 16: 9) and normal display (aspect ratio 4: 3), the display panel can display an image with a maximum aspect ratio of "16: 9". Have an area. Aspect ratio "4:
In the case of displaying the image of "3", cold cathode elements which are not used for the display are generated in the display panel. Even in such a case, the driver circuit corresponding to the element that is not driven for displaying an image, that is, the shift register, the driver for the modulation signal, and the like continues to be energized, and thus wasteful power is consumed. There was a problem.

The present invention has been made in view of the above-mentioned conventional example, and suppresses power consumption by stopping the power supply to the driver circuit for driving the element according to the display mode. The present invention relates to the image display device.

Another object of the present invention is to provide an image display device capable of changing the display position of an image on the display screen in the normal display mode.

[0023]

In order to achieve the above object, the image display device of the present invention has the following configuration.
That is, a display panel in which a plurality of electron-emitting devices are wired in a matrix, a row driving unit that drives a plurality of row wirings of the display panel, and a column that drives a plurality of column wirings of the display panel according to an image signal. have a drive means, said column drive hands
A plurality of drive circuits whose stages are connected to the plurality of column wirings
A first display mode in which an image is displayed using the maximum display area of the display panel
If, cut a second display mode for performing display using a smaller display area than the maximum display area of the display panel
Instead, a control signal for controlling the column driving means to perform display.
And a control unit for outputting a No., field of the second display mode
In the case of the plurality of drive circuits, the display area
Input of clock signal to drive circuit connected to outer column wiring
Stop the force and connect the column wiring in the display area.
Allows input of clock signal to the drive circuit
Input the image data to the drive circuit that allows the input of clock signal.
By inputting the
The second display mode is determined by the power consumption of the column driving means.
Mode, the power consumption of the column driving means is reduced.
Characterized in that that. In order to achieve the above object, the image display device of the present invention has the following configuration. That is, multiple
Display panel with a number of electron-emitting devices wired in a matrix
And a row driver for driving a plurality of row wirings of the display panel
And a plurality of column wirings of the display panel according to the image signal.
And column driving means for driving the column driving means,
With multiple drive circuits connected to multiple column wirings
Image display device, the maximum display of the display panel
The first display mode for displaying using an area, and
Use a display area smaller than the maximum display area of the display panel.
Switch between the 2nd display mode and the used display.
A control signal for controlling the column driving means is issued to
In the case of the 2nd display mode,
Is a column outside the display area of the plurality of drive circuits
When the power supply to the drive circuit connected to the wiring is stopped
A drive circuit connected to the column wiring in the display area
Drive that allows power supply to the
By inputting image data to the circuit, the first display
Before the power consumption in the column driving means in the mode
Note Consumption in the column driving means in the second display mode
It is characterized by reducing the power.

[0024]

[0025]

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[First Embodiment] FIG. 1 is a block diagram showing a configuration of an image display apparatus according to the present embodiment.

In the figure, reference numeral 1 is a display panel, which has an aspect ratio of 16: 9 in the vertical and horizontal directions. Here, it is assumed that 2556 (852 × 3 (RGB)) pieces in the horizontal direction,
Vertically arranged 480 phosphors are arranged on the face plate in the form of vertical stripes for each of R, G, B, and the electron-emitting devices corresponding to the phosphors are arranged in a simple matrix by the row wiring and the column wiring. Is wired to. Then, an example in which the electron-emitting devices of the display panel 1 are driven in line order (raster order) will be described.

When the NTSC signal is received and input to the NTSC decoder 4, the received signal is a normal normal TV signal having an aspect ratio of "4: 3" or an aspect ratio of "16: 9". It is determined whether the EDTV 11 or 2 is a wide signal, and the determination signal s1 is input to the system control unit 8.

When the HDTV signal is received and input to the HDTV decoder 5, a determination signal s2 that the received signal is a wide signal having an aspect ratio of "16: 9" is input to the system controller 8. When the PC (personal computer) is operating, the image signal of the RGB signal output from the PC 6 has an aspect ratio of "4: 3".
The determination signal s3 indicating that the normal signal is the normal signal is input to the system control unit 8. Reference numeral 9 denotes a user interface (I / F), which displays an image displayed on the display panel 1 in a normal (aspect ratio "4: 3") NTSC signal as a normal display / wide display or in a wide (aspect ratio "16:"). 9 ") NTSC signal wide display,
Alternatively, a wide display of the HDTV signal or a normal display of the image signal from the PC 6 can be selected. The contents selected by the user interface 9 are input to the system controller 8 as a selection signal s4. When the signal selected by the user interface 9 is received, the system control unit 8 controls the sampling frequency corresponding to the selected image signal s5.
Is input to the A / D converter 7. As a result, the A / D converter 7 converts each of the R, G, B signals into a digital signal by the control signal s5 having the sampling frequency of the selected signal rate, and the resultant digital image signal s.
10 is output to the digital processor 10.

The digital processor 10 performs gamma processing on the input RGB signals and digital filter processing for contour enhancement and noise suppression, and P / S (parallel) conversion of the resulting digital image data. Output to the unit 11. A signal s6 for controlling the operation of the digital processor 10 is input from the system control unit 8. By this control signal s6, the digital processor 10
In, edge enhancement control and contrast control can also be performed.

The P / S converter 11 serially rearranges the R, G, B digital signals input in parallel from the digital processor 10 in the order corresponding to the color arrangement of the phosphors on the display panel 1, and The rearranged serial digital image data s11 is output to the modulation signal driver unit 2. A control signal s7 for controlling parallel / serial conversion is input to the P / S converter 11 from the system controller 8.

The modulation signal driver 2 is composed of a total of eight sets (D1 to D8) of shift registers and drivers, each set including a shift register and a driver for driving the electron-emitting devices of the display panel 1. In this case, the serial digital image data s11 is divided into eight layers and driven. Here, the number of data handled by one set of drivers is 320 (= 2560/8). Further, the modulation signal driver 2 is a D for selecting a pair of a shift register and a driver for inputting the serial digital image data s11.
DS terminal that inputs S signal (DS1 to DS8) and EN (enable) signal (EN1 to E) that controls the operation of this set.
It has an EN terminal for inputting N8). By controlling ON / OFF of the DS signal, 320 pieces of data of the 2556 pieces of serial digital image data s11 are selected, and the selected image data is input to the shift register of the corresponding set. In this way, 320 sets of image data are output from each set of drivers, and 320 sets × 8 sets of parallel image data are output from 8 sets of drivers by turning on / off the DS signal and the EN signal. By changing the output timing of the DS signal and the EN signal, the output order of the image data of the eight layers in the horizontal direction can be changed. The scanning signal driver 3 is
In synchronization with the output of the modulation signal driver 2, a driving voltage is applied to the row wirings selected by the display panel 1, and the selected row wirings are sequentially switched in synchronization with the horizontal synchronizing signal to display the panel 1. The image is displayed on.

FIG. 2 shows a shift register 200 in the modulation driver set 2a of the modulation signal driver 2 of this embodiment.
3 is a block diagram showing one configuration of a set of a driver 201 and a driver 201. FIG.

An EN (enable) signal for controlling the operation of the driver 201 controls the output of a control clock (CLK) for operating the shift register 200 and the driver 201 which constitute the modulation driver set 2a. That is, when the EN signal (ENi) of a certain set among the eight sets is turned off, the shift register 200 corresponding to the turned off EN signal is turned on.
Then, the supply of the control signal (CLK) to the driver 201 is stopped. As a result, the operation of the modulation driver set 2a is stopped, and the power consumption of the modulation signal driver set 2a is suppressed. Further, when the DS signal (DSi) is turned on, the serial digital image data s11 is input to the modulation driver set 2a corresponding to the turned-on signal, and when it is turned off, the image data s11 is input to the modulation driver set 2a. prohibited. In addition, the driver 20 of the modulation driver set 2a
1 outputs a signal having a pulse width corresponding to the image data from the shift register 200 to the display panel 1.

Next, in the image display device according to the embodiment of the present invention, the aspect ratio is "16: 9" and "4:
A driving method in the case of "3" will be described.

When the received image signal is an HDTV signal, an EDTV signal (wide display), or a normal NTSC signal is displayed wide, the aspect ratio to be displayed is "16: 9". Think In this case, the A / D converter 7 samples 852 image data for each of R, G, and B and converts the sampled digital data into a digital signal.
Input to 1. In this way, the RBGs are sequentially switched in order, converted into 852 pieces × 3 pieces of image data by parallel-serial conversion, and input to the display panel 1 through the modulation signal driver 2 to display an image.

The states of the EN signal and the DS signal in this case will be described with reference to FIGS.

When displaying an image with an aspect ratio of "16: 9", all enable signals (EN1 to EN8) of the modulation driver sets D1 to D8 (FIG. 3) are enabled. As shown in FIG. 4, the driver select signal DS includes signals DS1 to DS2 and signal DS3 for every 320 data of 2560 data obtained by adding two dummy data "0" before and after the data of 2556 data. ,,, Signal DS8
Are sequentially switched on and turned on. Here, the dummy data “0” has a pull-down resistor (not shown) connected to an output line through which data is transferred from the P / S conversion unit 11 to the modulation signal driver 2, and when an image signal is not received,
The image data s11 output to the modulation signal driver 2 is set to "0". As a result, as shown in FIG. 4, the signal DS1 is converted into image data (R1, G1, B1, R).
If it is turned on two bits before 2, ...) Two dummy data "00" can be inserted, and the signal DS
If 8 is turned off later than the image data (..., R852, G852, B852) by two, two dummy data "00" can be inserted, and 2560 data per scanning line can be inserted as a whole. It can be image data.

On the other hand, when the received signal displays the normal display of NTSC or the image with the aspect ratio "4: 3" from PS6, the A / D converter 7 outputs 640 for each R, G, B. The individual image signals are sampled, converted into digital data, and passed through the digital processor 10 for P / S.
The data is input to the conversion unit 11 and sequentially switched in the order of RBG, and is parallel-serial converted into 640 image data × 3.

The enable signal EN and the select signal DS (s8) in this case will be described with reference to FIGS.

In the case of displaying an image having an aspect ratio of "4: 3" in FIG. 5, if it is desired to display the image in the center of the screen of the display panel 1, the enable signals EN1 to EN of the modulation signal drivers D1 to D8 are displayed. Of EN8, signals EN2-EN7 are enabled and signals EN1 and EN8 are disabled. Further, the select signal DS is, as shown in FIG.
Signals 320 to 320 for every 320 data, DS2 to DS
It is turned on by 3, DS4, ..., DS7. Here, both the signals DS1 and DS8 remain off.

That is, in the case of image display with an aspect ratio of "4: 3", since the enable signals EN1 and EN8 are disabled, as shown in FIG. 5, shift clocks to the modulation signal drivers D1 and D8, etc. By stopping the clock input of and not shifting the image data, the power consumed by the shift register and driver of each modulation driver group can be suppressed to a small amount.

However, when displaying an image from the PC 6, if the graphic card (video card) provided in the PC 6 is compatible with HDTV, the aspect ratio "4:
The display of "16: 9" may be performed instead of the display of "3".

FIG. 7 is a flow chart showing the operation of the system control unit 8 of the image display apparatus of this embodiment. A control program for executing this processing is stored in a memory (not shown) of the system control unit 8.

First, in step S101, the selection signal s4 from the user interface 9 is input, and in step S1
In 02, the image signal from any of the NTSC decoder 4, the HDTV decoder 5, or the PC 6 selected by the selection signal s4 is selected. At this time, the judgment signals s1 to
Based on s3, the selected image signal is a normal image signal with an aspect ratio of "4: 3" or an aspect ratio of "1".
It is checked whether it is a wide image of "6: 9" (S103), and if it is normal, the process proceeds to step S104.

In step S104, the normal sampling clock is output to the A / D converter 7 for sampling, and the digitized image signal is processed by controlling the digital processor 10 and P / S11 (S105).
Next, in step S106, the enable signal EN1,
Both EN8 are disabled (FIG. 5), and drive selects DS2 to DS7 are output in step S107 (see FIG. 6). Also, in accordance with this, step S108
Then, the scanning signal driver 3 is driven in synchronization with the horizontal synchronizing signal of the display data to select the row wiring.

On the other hand, when the wide mode is set in step S103, the process proceeds to step S109, and the sampling signal s5 for wide is converted into the A / D converter 7.
To the RGB signal, the RGB signal is sampled, and the digitized image signal is processed by controlling the digital processor 10 and P / S 11 (S 110). Then in step S111
Then, the enable signals EN1 to EN8 are all enabled (see FIG. 3), and drive select DS1 to DS8 are output in step S112 (see FIG. 4). In accordance with this, in step S108, the scanning signal driver 3 is driven in synchronization with the horizontal synchronizing signal of the display data to select the row wiring.

As described above, according to the first embodiment, the driver circuit for driving the display of the display panel is switched according to the aspect ratio of the image to be displayed, and the power consumption of the driver not used for the display is suppressed. An object of the present invention is to provide an image display device capable of displaying an image.

[Second Embodiment] Next, a second embodiment of the present invention will be described. In the second embodiment, E which controls the operation of the eight modulation driver sets of the modulation signal driver 2 is used.
The power supplied to each driver is controlled by the N (enable) signal.

FIG. 7 is a block diagram showing the structure of the modulation driver set 2b according to the second embodiment.

When the enable signal EN input to the modulation driver set 2b of each set is turned off, + 5V power supply to the shift register 200 and the driver 201 in the turned off modulation signal driver set is stopped, and the modulation thereof is performed. The power consumption of the signal driver set 2b can be suppressed to be small.

Since the operation when the aspect ratio is "4: 3" or "16: 9" in the second embodiment is the same as that in the first embodiment, the description thereof is omitted. To do.

[Third Embodiment] Next, a third embodiment of the present invention will be described. The configuration of the image display device according to the third embodiment is almost the same as that of the above-described first embodiment, and when displaying an image with an aspect ratio of "4: 3",
The only difference is that an image is displayed on the left side of the display panel 1.

That is, in the case of image display with an aspect ratio of "4: 3", 640 image data for R, G, B are sampled by the A / D converter 7, and the digital processor 1
0, P / S converter 11 switches to RBG in order, 6
Parallel-serial conversion into 40 × 3 data. The signal s11 thus converted is input to the modulation signal driver 2. The states of the enable signal EN and the driver select signal DS by the modulation driver control signal s8 at this time will be described with reference to FIGS. 9 and 10.

In the case of displaying an image with an aspect ratio of "4: 3", if it is desired to display the image on the left side of the screen, the signals EN1 to EN6 among the enable signals EN1 to EN8 of the modulation drivers D1 to D8 are enabled, The remaining enable signals EN7 and EN8 are disabled. The driver select signal DS is, as shown in FIG. 10, for each 320 pieces of 1920 pieces of data, from DS1 to DS2, DS3 ,.
It is switched on by switching to DS6. And the remaining signal D
Both S7 and DS8 are off.

That is, in the case of image display with an aspect ratio of "4: 3", the enable signals EN7 and EN8 are both disabled, so the control clock that controls the operation of the modulation driver group D7 and D8 of the modulation signal driver 2 is controlled. Input is cut off (see FIG. 2), the control clock is input until now, so that the shift register 2 of each set of the modulation driver is
00 and the driver 201 can reduce the amount of power consumed.

In the control process in the system control unit 8 in this case, in the flow chart of FIG. 7, the enable signals EN7 and EN8 are disabled in step S106, and the driver select signal D is set in step S107.
This can be dealt with by outputting S1 to DS6.

The structure of this modulation driver group is not limited to the structure of the above-described embodiment, but may be the structure of the second embodiment (FIG. 8). [Fourth Embodiment] Next, a fourth embodiment of the present invention will be described. The configuration of the image display device according to the fourth embodiment is almost the same as that of the above-described first embodiment, and an image is displayed on the right side of the display panel 1 when displaying an image with an aspect ratio of "4: 3". Only the points differ.

That is, in the case of image display with an aspect ratio of "4: 3", 640 image data for each R, G, B are sampled by the A / D converter 7, and the digital processor 1
0, P / S converter 11 switches to RBG in order, 6
Parallel-serial conversion into 40 × 3 data. The signal s11 thus converted is input to the modulation signal driver 2. The states of the enable signal EN and the driver select signal DS by the modulation driver control signal s8 at this time will be described with reference to FIGS. 11 and 12.

In the case of displaying an image having an aspect ratio of "4: 3", if it is desired to display the image on the right side of the screen, the signals EN3 to EN8 among the enable signals EN1 to EN8 of the modulation drivers D1 to D8 are enabled, The remaining enable signals EN1 and EN2 are disabled. The driver select signal DS is, as shown in FIG. 10, for each 320 pieces of 1920 pieces of data, DS3 to DS4, DS5 ,.
It is switched on with the DS8. And the remaining signal D
Both S1 and DS2 are off.

That is, in the case of image display with an aspect ratio of "4: 3", the enable signals EN1 and EN2 are both disabled, so the control clock that controls the operations of the modulation driver sets D1 and D2 of the modulation signal driver 2 Input is cut off (see FIG. 2), the control clock is input until now, so that the shift register 2 of each set of the modulation driver is
00 and the driver 201 can reduce the amount of power consumed.

In the control processing in the system control section 8 in this case, in the flow chart of FIG. 7, the enable signals EN1 and EN2 are disabled in step S106, and the driver select signal D is set in step S107.
This can be dealt with by outputting S3 to DS8.

The structure of this modulation driver group is not limited to the structure of the above-described embodiment, but may be the structure of the second embodiment (FIG. 8).

[Fifth Embodiment] FIG. 13 shows the arrangement of an image display apparatus according to the fifth embodiment of the present invention. In FIG. 13, the same parts as those in the above-mentioned embodiment are designated by the same reference numerals, and the description thereof will be omitted. In the fifth embodiment, the modulation signal driver 2 of the first embodiment is composed of eight sets of modulation drivers, whereas in the fifth embodiment, 16 modulation drivers are provided.
The modulation signal driver 12 configured as a set is provided.

As described above, when the number of modulation driver groups in the modulation signal driver 12 is increased, the number of shift registers output in parallel increases, so that the frequency of the clock for shifting data in the modulation signal driver 12 can be lowered. Therefore, the power consumption can be further reduced.

The structure of each modulation driver group of the modulation signal driver 12 is the same as that of the first embodiment (FIG. 2).
Alternatively, the configuration of the second embodiment (FIG. 5) may be used.

A method of driving the display device according to the fifth embodiment when the aspect ratio of the image signal is "16: 9" and "4: 3" will be described.

Whether the received image signal is an HDTV signal or ED
In the case of a TV signal or an image display with an aspect ratio of "16: 9" such as a wide display of normal NTSC,
The A / D converter 7 samples 852 image signals for each of R, G, and B, passes through the digital processor 10, and outputs P
The / S converter 11 performs parallel-serial conversion. The serial signal s12 thus converted is sequentially switched to the modulation signal driver 12 in the order of RBG and input as 852 × 3 image data. At this time, the enable signal EN (EN1 to EN16) and the driver select signal DS (DS1
.About.DS16) will be described with reference to FIGS.

In the case of the image display with the aspect ratio of "16: 9", all the enable signals EN1 to EN16 corresponding to the modulation driver groups indicated by D1 to D16 are all enabled. As shown in FIG. 4, each driver select signal DS creates a total of 2560 data by adding two dummy data “00” before and after the 2556 data, and selects the select signal DS1 for every 160 data. To DS2, DS
3, ..., DS16 are sequentially switched and output. here,
The dummy data “00” is set so that the data becomes “0” when the image signal is not received by the pull-down resistor (not shown) when the data is transferred from the P / S conversion unit 11 to the modulation signal driver 12. ing. Therefore, as shown in FIG. 4, the select signal DS1 is set to the image data (R1, G1,
If it is turned on two pixels before B1, R2, ...)
Individual dummy data "00" can be inserted, and the select signal DS16 is used as image data (..., R852, G852, B85).
Two dummy data "00" can be inserted by turning off by 2 pixels later than 2).

FIG. 14 shows that the aspect ratio is "1".
FIG. 15 shows a case of displaying at "6: 9", and FIG. 15 shows a timing example of the driver select signals DS1 to DS16 in this case.

When the received image signal is the normal display of NTSC or the display based on the image signal from the PC 6 and the aspect ratio at the time of display is "4: 3", A
640 image data are sampled for each of R, G, and B by the / D converter 7, and are parallel-serial converted into 640 × 3 image data in the order of RBG by the digital processor 10 and the P / S converter 11. . The states of the enable signal EN and the driver select signal DS when the serial signal s12 thus converted is input to the modulation signal driver 12 will be described with reference to FIGS.

In the case of image display with an aspect ratio of "4: 3", if it is desired to display in the center of the screen, EN3 to EN14 are enabled and enabled in the enable signals EN1 to EN16 of the modulation driver sets D1 to D16. All signals EN1, EN2 and EN15, EN16 are disabled (Fig. 16). The drive select signal DS is shown in FIG.
As shown in Fig. 7, 1920 data is D every 160 data.
It is turned on by switching from S3 to DS4, DS5, ..., DS14. Also, the signals DS1, DS2 and DS15, DS16 are all off.

However, the image having the aspect ratio of "4: 3" is not limited to the central portion of the display panel 1a, and may be displayed at another place. As a method thereof, 14 consecutive DSs of the drive select signals DS1 to DS16 are switched in ascending order and four select signals D not selected are selected.
Turn off S. With this switching method, five display positions can be selected in the fifth embodiment.

(Structure of Display Panel 1 and Manufacturing Method Thereof) Next, the structure and the manufacturing method of the display panel 1 or 1a of the image display device applied to this embodiment will be described with reference to specific examples. .

FIG. 18 is a perspective view of a display panel used in the embodiment, in which the display panel 1 is shown to show the internal structure.
A part of 1a is notched and shown.

In the figure, 1005 is a rear plate, and 1006.
Is a side wall, 1007 is a face plate, and 1005
˜1007 form an airtight container for maintaining a vacuum inside the display panel. When assembling an airtight container, it is necessary to seal the joints of each member in order to maintain sufficient strength and airtightness. Sealing was achieved by firing at 400-500 degrees for 10 minutes or more. A method of evacuating the inside of the airtight container will be described later.

The rear plate 1005 has a substrate 1001.
, But the cold cathode device 1002 is fixed on the substrate.
Are formed by N × M. Here, N and M are positive integers of 2 or more and are appropriately set according to the target number of display pixels. For example, in a display device intended for high-definition television display, it is desirable to set the numbers N = 3000 and M = 1000 or more. In this embodiment, N = 3072 and M = 1024. These N ×
The M cold cathode elements are arranged in a simple matrix by M row-direction wirings 1003 and N column-direction wirings 1004. The portion composed of 1001 to 1004 is called a multi-electron source. The manufacturing method and structure of the multi electron source will be described in detail later.

In this embodiment, the multi-electron source substrate 1001 is fixed to the rear plate 1005 of the airtight container. However, when the multi-electron source substrate 1001 has sufficient strength, The multi-electron source substrate 1001 itself may be used as the rear plate of the airtight container.

A fluorescent film 1008 is formed on the lower surface of the face plate 1007. Since the present embodiment is a color display device, the phosphor film 1008 is coated with phosphors of three primary colors of red, green and blue used in the field of CRT. The phosphors of each color are shown in FIG.
As shown in FIG. 9 (A), the conductors are painted in stripes, and black conductors 1010 are provided between the phosphor stripes. The purpose of providing the black conductor 1010 is to prevent the display color from deviating even if the irradiation position of the electron beam is slightly deviated, and to prevent the reduction of the display contrast by preventing the reflection of external light. This is to prevent the fluorescent film from being charged up by the electron beam. Although graphite was used as a main component for the black conductor 1010, other materials may be used as long as they are suitable for the above purpose.

Further, the method of separately applying the phosphors of the three primary colors is shown in FIG.
The arrangement is not limited to the stripe arrangement shown in FIG. 9A, but may be a delta arrangement as shown in FIG. 19B or an arrangement other than that. When a monochrome display panel is created, a monochromatic phosphor material may be used for the phosphor film 1008, and a black conductive material may not necessarily be used.

On the surface of the fluorescent film 1008 on the rear plate side, a metal back 1009 known in the field of CRT is used.
Is provided. The purpose of providing the metal back 1009 is
In order to improve the light utilization efficiency by specularly reflecting a part of the light emitted by the fluorescent film 1008, and from the collision of negative ions, the fluorescent film 10
08 is protected, the electrode is used to apply an electron beam acceleration voltage, and the fluorescent film 1008 is used as a conductive path for excited electrons. The metal back 1009 was formed by forming a fluorescent film 1008 on the face plate substrate 1007, smoothing the surface of the fluorescent film, and vacuum-depositing Al on the surface. The metal back 1009 is not used when a low voltage fluorescent material is used for the fluorescent film 1008.

Although not used in this embodiment,
For the purpose of applying acceleration voltage and improving the conductivity of the fluorescent film,
A transparent electrode made of, for example, ITO may be provided between the face plate substrate 1007 and the fluorescent film 1008.

Dx1 to DxM, Dy1 to DyN, and Hv are terminals for electrical connection having an airtight structure provided for electrically connecting the display panel and an electric circuit (not shown). Dx1 to DxM are row-direction wirings 1003 of the multi-electron source
And Dy1 to DyN are column direction wirings 1004 of the multi-electron source.
, Hv is electrically connected to the metal back 1009 of the face plate.

To evacuate the inside of the airtight container to a vacuum, after assembling the airtight container, an exhaust pipe (not shown) and a vacuum pump are connected to each other, and the inside of the airtight container is reduced to the power of 10 −7 [to].
Evacuate to a vacuum degree of about [rr]. Then, the exhaust pipe is sealed, but in order to maintain the degree of vacuum in the airtight container, a getter film (not shown) is formed at a predetermined position in the airtight container immediately before or after the sealing. The getter film is, for example, B
It is a film formed by heating a getter material containing a as a main component with a heater or high-frequency heating and vapor deposition, and the inside of the airtight container is 1 × 10 −5 due to the adsorption action of the getter film.
The degree of vacuum of 1 to 10 × 7 [torr] is maintained.

The basic structure and manufacturing method of the display panel of this embodiment have been described above.

Next, a method of manufacturing the multi-electron source used in the display panel of the above embodiment will be described. The multi-electron source used in the image display device of the present embodiment is not limited in material, shape, or manufacturing method of the cold cathode element as long as it is an electron source in which cold cathode elements are wired in a simple matrix. Therefore, for example, a surface conduction electron-emitting device, an FE type, or a MIM type cold cathode device can be used.

However, in the situation where a display device having a large display screen and a low cost is required, the surface conduction electron-emitting device is particularly preferable among these cold cathode devices. That is,
In the FE type, since the relative position and shape of the emitter cone and the gate electrode greatly affect the electron emission characteristics, extremely high precision manufacturing technology is required. This is required to achieve a large area and reduce manufacturing cost. It becomes a disadvantageous factor. Also, MI
In the M type, it is necessary to make the insulating layer and the upper electrode thin and uniform, which is also a disadvantageous factor for achieving a large area and a reduction in manufacturing cost. In this respect, the surface conduction electron-emitting device has a relatively simple manufacturing method, so that it is easy to increase the area and reduce the manufacturing cost. Further, the inventors have found that among the surface conduction electron-emitting devices, those in which the electron-emitting portion or its peripheral portion is formed of a fine particle film have particularly excellent electron-emitting characteristics and can be easily manufactured. Therefore, it can be said that it is most suitable for use in a multi-electron source of an image display device of high brightness and large screen. Therefore, in the display panel of the above-described embodiment, the surface conduction electron-emitting device in which the electron emitting portion or its peripheral portion is formed of the fine particle film is used. Therefore, the basic configuration, manufacturing method, and characteristics of a suitable surface conduction electron-emitting device will be described first, and then the structure of a multi-electron source in which a large number of devices are wired in a simple matrix will be described.

(Preferable Element Structure and Manufacturing Method of Surface Conduction Type Emitting Element) Typical structures of the surface conduction type emitting element in which the electron emitting portion or its peripheral portion is formed of a fine particle film include a planar type and a vertical type. There are different types.

(Plane Type Surface Conduction Type Emitting Element) First, the element structure and manufacturing method of the plane type surface conduction type emitting element will be described. FIG. 20 is a plan view (a) and a cross-sectional view (b) for explaining the configuration of the flat surface conduction electron-emitting device. In the figure, 1101 is a substrate, 1102 and 1103 are element electrodes, 1104 is a conductive thin film, 1105.
Is an electron emission portion formed by the energization forming process, 1
Reference numeral 113 is a thin film formed by the energization activation process.

As the substrate 1101, for example, various glass substrates such as quartz glass and soda lime glass, various ceramic substrates such as alumina, or an insulating layer made of, for example, SiO 2 is laminated on the above various substrates. Substrate, etc. can be used.

Further, the device electrodes 1102 and 1103 provided on the substrate 1101 so as to face each other in parallel to the substrate surface are made of a conductive material. For example, N
i, Cr, Au, Mo, W, Pt, Ti, Cu, Pd,
Metals such as Ag, or alloys of these metals,
Alternatively, an appropriate material may be selected and used from metal oxides such as In2O3-SnO2 and semiconductors such as polysilicon. The electrodes can be easily formed by combining a film forming technique such as vacuum deposition and a patterning technique such as photolithography and etching, but it can be formed by using another method (for example, a printing technique). It doesn't matter.

The shapes of the device electrodes 1102 and 1103 are appropriately designed according to the application purpose of the electron-emitting device.
Generally, the electrode interval L is designed by selecting an appropriate value from the range of several hundred angstroms to several hundreds of micrometers, but it is preferable that the electrode interval L is several micrometers or more for application to a display device. It is in the range of 10 micrometers. In addition, as for the thickness d of the device electrode, an appropriate numerical value is usually selected from the range of several hundred angstroms to several micrometers.

A fine particle film is used for the conductive thin film 1104. The fine particle film described here is a film containing a large number of fine particles as constituent elements (including an island-shaped aggregate).
Refers to. A microscopic examination of the particulate film usually reveals that
A structure in which individual fine particles are arranged apart from each other, a structure in which fine particles are adjacent to each other, or a structure in which fine particles overlap each other are observed.

The particle diameter of the fine particles used for the fine particle film is in the range of several angstroms to several thousand angstroms, but the range of 10 angstroms to 200 angstroms is particularly preferable. Further, the film thickness of the fine particle film is appropriately set in consideration of various conditions as described below. That is, the device electrode 11
02 or 1103, conditions necessary for good electrical connection, conditions required for conducting the energization forming described below satisfactorily, conditions necessary for setting the electric resistance of the fine particle film itself to an appropriate value described below. , And so on.

Specifically, it is set within the range of several angstroms to several thousand angstroms, but the range of 10 angstroms to 500 angstroms is particularly preferable.

Materials that can be used to form the fine particle film include, for example, Pd, Pt, Ru, Ag, and A.
u, Ti, In, Cu, Cr, Fe, Zn, Sn, T
Metals such as a, W, Pb, etc., PdO, S
oxides such as nO2, In2O3, PbO, Sb2O3, HfB2, ZrB2, LaB6, CeB6,
Borides such as YB4, GdB4, etc., Ti
Carbides such as C, ZrC, HfC, TaC, SiC, WC, etc., nitrides such as TiN, ZrN, HfN, etc., semiconductors such as Si, Ge, etc., carbon, etc. And can be appropriately selected from these.

As described above, the conductive thin film 1104 is formed of a fine particle film, and its sheet resistance value is
It was set so as to fall within the range of 10 3 to 10 7 [ohm / □].

The conductive thin film 1104 and the device electrode 11
Since 02 and 1103 are preferably electrically connected well, they have a structure in which some of them overlap each other. In the example of FIG. 20, the overlapping manner is
The substrate, the device electrode, and the conductive thin film are stacked in this order from the bottom, but in some cases, the substrate, the conductive thin film, and the device electrode may be stacked in this order from the bottom.

Further, the electron emitting portion 1105 is a crack-like portion formed in a part of the conductive thin film 1104, and has an electrically higher resistance than the surrounding conductive thin film. The crack is formed by subjecting the conductive thin film 1104 to a later-described energization forming process. Fine particles having a particle diameter of several angstroms to several hundred angstroms may be arranged in the cracks. Since it is difficult to accurately and accurately show the actual position and shape of the electron-emitting portion, the electron-emitting portion is schematically shown in FIG.

The thin film 1113 is a thin film made of carbon or a carbon compound and covers the electron emitting portion 1105 and its vicinity. The thin film 1113 is formed by performing the energization activation process described later after the energization forming process.

The thin film 1113 is any one of single crystal graphite, polycrystalline graphite, amorphous carbon, or a mixture thereof, and the film thickness is 500 [angstrom] or less, but 300 [angstrom] or less. Is more preferable. The actual thin film 1113
Since it is difficult to accurately illustrate the position and shape of
In the figure, it is shown schematically. Further, in the plan view (a), an element in which a part of the thin film 1113 is removed is shown.

The basic structure of a preferable element has been described above, but the following elements are used in the embodiments.

That is, soda lime glass was used for the substrate 1101, and Ni thin films were used for the device electrodes 1102 and 1103. The thickness d of the device electrode was 1000 [angstrom], and the electrode interval L was 2 [micrometer]. Pd or PdO is used as the main material of the fine particle film, and the thickness of the fine particle film is about 100 [angstrom] and the width W is 1
00 [micrometer].

Next, a method of manufacturing a suitable flat surface conduction electron-emitting device will be described. 21 (a) to (e)
20A and 20B are cross-sectional views for explaining the manufacturing process of the surface conduction electron-emitting device, and the notation of each member is the same as that in FIG.

1) First, as shown in FIG. 21A, device electrodes 1102 and 1103 are formed on a substrate 1101. Before forming this, the substrate 11
After thoroughly cleaning 01 with a detergent, pure water, and an organic solvent, the material of the element electrode is deposited. (As a method of depositing,
For example, a vacuum film forming technique such as a vapor deposition method or a sputtering method may be used. ) After that, the deposited electrode material is patterned using photolithography / etching technology,
A pair of device electrodes (1102 and 1103) shown in (a).
To form.

2) Next, a conductive thin film 1104 is formed as shown in FIG.

In forming the film, first, an organometallic solution is applied to the substrate (a), dried, and heated and baked to form a fine particle film, which is then patterned into a predetermined shape by photolithography and etching. . here,
The organometallic solution is a solution of an organometallic compound whose main element is the material of the fine particles used for the conductive thin film. (Specifically, Pd is used as the main element in the present embodiment.
Further, although the dipping method is used as the coating method in the embodiments, other methods such as a spinner method or a spray method may be used. ) Further, as a method for forming a conductive thin film formed of a fine particle film, other than the method of applying the organometallic solution used in the present embodiment, for example, a vacuum vapor deposition method, a sputtering method, or a chemical vapor deposition method. In some cases, etc. are used.

3) Next, as shown in FIG. 11C, the forming power supply 1110 to the device electrodes 1102 and 110 are removed.
An appropriate voltage is applied between 3 and an energization forming process is performed to form the electron emitting portion 1105.

The energization forming process energizes the electroconductive thin film 1104 made of a fine particle film to appropriately destroy, deform or alter a part of the electroconductive thin film 1104 to change the structure suitable for electron emission. It is a process that causes it. A portion of the conductive thin film made of the fine particle film, which has been changed to a structure suitable for emitting electrons (that is, the electron emitting portion 110).
In 5), an appropriate crack is formed in the thin film.
Note that the electric resistance measured between the element electrodes 1102 and 1103 after the formation is significantly increased as compared with before the formation of the electron emission portion 1105.

In order to describe the energization method in more detail, FIG. 22 shows an example of an appropriate voltage waveform applied from the forming power supply 1110. When forming a conductive thin film made of a fine particle film, a pulsed voltage is preferable, and in the case of the present embodiment, a triangular wave pulse having a pulse width T1 is continuously provided at a pulse interval T2 as shown in FIG. Applied. In that case, the peak value Vpf of the triangular pulse is
The pressure was sequentially increased. Also, monitor pulses Pm for monitoring the formation state of the electron emission portion 1105 are inserted between the triangular wave pulses at appropriate intervals, and the current flowing at that time is measured by the ammeter 1.
Measured at 111.

In the present embodiment, for example, in a vacuum atmosphere of about 10 −5 [torr],
For example, the pulse width T1 is set to 1 [millisecond], the pulse interval T2 is set to 10 [millisecond], and the peak value Vpf is increased by 0.1 [V] for each pulse. The monitor pulse Pm was inserted once every five pulses of the triangular wave were applied. The voltage Vpm of the monitor pulse was set to 0.1 [V] so as not to adversely affect the forming process. Then, when the electric resistance between the element electrodes 1102 and 1103 reaches 1 × 10 6 [ohm], that is, when the monitor pulse is applied, the current measured by the ammeter 1111 is 1 × 10 −7 [ohm]. A] At the stage when it became below, the energization related to the forming process was terminated.

The above method is a preferable method for the surface conduction electron-emitting device according to the present embodiment. For example, the design of the surface conduction electron-emitting device such as the material and film thickness of the fine particle film or the element electrode spacing L is changed. In that case, it is desirable to appropriately change the energization conditions accordingly.

4) Next, as shown in FIG.
From the activation power source 1112 to the device electrodes 1102 and 1103
Appropriate voltage is applied between the two to perform energization activation treatment,
The electron emission characteristics are improved.

The energization activation process is a process of energizing the electron-emitting portion 1105 formed by the energization forming process under appropriate conditions to deposit carbon or a carbon compound in the vicinity thereof. (In the figure, a deposit made of carbon or a carbon compound is schematically shown as the member 1113.) Note that by performing the energization activation treatment, the emission current at the same applied voltage is typically compared to that before the activation. Specifically, it can be increased 100 times or more.

Specifically, 10 to the minus 4th power or 1
In a vacuum atmosphere within the range of 0 minus 5 [torr],
By periodically applying a voltage pulse, carbon or a carbon compound originating from an organic compound existing in a vacuum atmosphere is deposited. The deposit 1113 is any one of single crystal graphite, polycrystalline graphite, and amorphous carbon, or a mixture thereof, and the film thickness is 500 [angstrom] or less, more preferably 300 [angstrom] or less.

In order to explain the energization method in more detail, FIG. 23A shows an example of an appropriate voltage waveform applied from the activation power supply 1112. In the present embodiment, the energization activation process is performed by periodically applying a rectangular wave having a constant voltage. Specifically, the rectangular wave voltage Vac is 14
[V], pulse width T3 is 1 [millisecond], pulse interval T4
Was set to 10 [milliseconds]. The above-mentioned energization conditions are preferable conditions for the surface conduction electron-emitting device of the present embodiment, and when the design of the surface conduction electron emission device is changed, it is desirable to appropriately change the condition accordingly.

Reference numeral 1114 shown in FIG. 20D is an anode electrode for capturing the emission current Ie emitted from the surface conduction electron-emitting device, to which a DC high voltage power supply 1115 and an ammeter 1116 are connected. (Note that the substrate 1101
In the case where the activation treatment is carried out after being incorporated into the display panel, the fluorescent surface of the display panel is set to the anode electrode 1114.
Used as. ) While applying the voltage from the activation power supply 1112, the emission current Ie is measured by the ammeter 1116 to monitor the progress of the energization activation process, and the activation power supply 111
2 control the operation. An example of the emission current Ie measured by the ammeter 1116 is shown in FIG.
When the pulse voltage is started to be applied from 112, the emission current Ie increases with the passage of time, but eventually saturates and hardly increases. In this way, when the emission current Ie is almost saturated, the voltage application from the activation power supply 1112 is stopped, and the energization activation process ends.

The above-mentioned energization conditions are preferable conditions for the surface conduction electron-emitting device of the present embodiment, and when the design of the surface conduction electron emission device is changed, the conditions should be changed accordingly. Is desirable.

As described above, the plane type surface conduction electron-emitting device shown in FIG. 21 (e) was manufactured.

(Vertical Surface-Conduction Type Emission Element) Next, another typical structure of the surface-conduction-type emission element in which the electron emission portion or its periphery is formed of a fine particle film, that is, vertical-type surface conduction type emission element. The configuration of the element will be described.

FIG. 24 is a schematic cross-sectional view for explaining the basic structure of the vertical type, in which 1201 is a substrate.
202 and 1203 are element electrodes, 1206 is a step forming member, 1204 is a conductive thin film using a fine particle film, 1205
Is an electron emission portion formed by the energization forming process, 1
213 is a thin film formed by the energization activation process.

The vertical type is different from the above-described flat type in that one of the element electrodes (1202) is provided on the step forming member 1206, and the conductive thin film 1204 covers the side surface of the step forming member 1206. The point is that they are covered. Therefore, the device electrode interval L in the flat type shown in FIG. 20 is set as the step height Ls of the step forming member 1206 in the vertical type. In addition, the substrate 1201, the device electrodes 1202 and 1203, the conductive thin film 1204 using a fine particle film,
For, the materials listed in the description of the planar type can be similarly used. Further, the step forming member 120
For 6, an electrically insulating material such as SiO2 is used.

Next, a method of manufacturing a vertical type surface conduction electron-emitting device will be described.

25 (a) to 25 (f) are sectional views for explaining the manufacturing process, and the notation of each member is the same as that in FIG.

1) First, as shown in FIG. 25A, a device electrode 1203 is formed on a substrate 1201.

2) Next, as shown in FIG. 11B, an insulating layer for forming a step forming member is laminated. The insulating layer may be formed by laminating, for example, SiO2 by a sputtering method.
For example, another film forming method such as a vacuum vapor deposition method or a printing method may be used.

3) Next, as shown in FIG. 13C, the device electrode 1202 is formed on the insulating layer.

4) Next, as shown in FIG. 9D, a part of the insulating layer is removed by using, for example, an etching method to expose the device electrode 1203.

5) Next, as shown in FIG. 7E, a conductive thin film 1204 using a fine particle film is formed. For formation, a film forming technique such as a coating method may be used as in the case of the flat type.

6) Next, as in the case of the flat type, an energization forming process is performed to form an electron emitting portion.
(The same process as the planar energization forming process described with reference to FIG. 21C may be performed.) 7) Next, as in the case of the planar type, the energization activation process is performed to perform the electron emission portion. Deposit carbon or a carbon compound in the vicinity. (The same process as the planar energization activation process described with reference to FIG. 21D may be performed.) As described above, the vertical surface conduction electron-emitting device shown in FIG. Manufactured. (Characteristics of surface conduction electron-emitting device used for display device)
The device configuration and manufacturing method of the planar and vertical type surface conduction electron-emitting devices have been described. Next, the characteristics of the device used in the display device will be described.

FIG. 26 shows typical examples of (emission current Ie) vs. (device applied voltage Vf) characteristics and (device current If) vs. (device applied voltage Vf) characteristics of the device used in the display device. . The emission current Ie is significantly smaller than the device current If, and it is difficult to illustrate them on the same scale. Moreover, these characteristics are changed by changing design parameters such as the size and shape of the device. Therefore, the two graphs are shown in arbitrary units.

The element used for the display device has the following three characteristics regarding the emission current Ie.

First, when a voltage larger than a certain voltage (which is called a threshold voltage Vth) is applied to the element, the emission current Ie rapidly increases. On the other hand, when the voltage is less than the threshold voltage Vth, the emission current Ie increases. Ie is hardly detected. That is, it is a non-linear element having a clear threshold voltage Vth with respect to the emission current Ie.

Secondly, since the emission current Ie changes depending on the voltage Vf applied to the element, the emission current Ie at the voltage Vf.
You can control the size of.

Thirdly, since the response speed of the current Ie emitted from the element is fast with respect to the voltage Vf applied to the element, the charge amount of electrons emitted from the element depends on the length of time for which the voltage Vf is applied. You can control.

Due to the above-mentioned characteristics, the surface conduction electron-emitting device could be suitably used for the display device. For example, in a display device in which a large number of elements are provided corresponding to the pixels of the display screen, by utilizing the first characteristic, it is possible to sequentially scan and display the display screen. That is, a voltage equal to or higher than the threshold voltage Vth is appropriately applied to the driven element according to the desired light emission luminance, and a voltage lower than the threshold voltage Vth is applied to the non-selected element. By sequentially switching the elements to be driven, it is possible to sequentially scan the display screen for display.

By utilizing the second characteristic or the third characteristic, it is possible to control the light emission brightness, so that it is possible to perform the gradation display. (Structure of a Multi Electron Source in which Many Elements are Wired in a Simple Matrix) Next, a structure of a multi electron source in which the above surface conduction electron-emitting devices are arranged on a substrate and wired in a simple matrix will be described.

FIG. 27 is a plan view of the multi-electron source used for the display panel of FIG. Figure 20 on the board
Arrayed surface conduction electron-emitting devices similar to those shown in
These elements are wired in a simple matrix by row-direction wiring electrodes 1003 and column-direction wiring electrodes 1004.
An insulating layer (not shown) is formed between the electrodes at the intersections of the row-direction wiring electrodes 1003 and the column-direction wiring electrodes 1004 to maintain electrical insulation.

The cross section taken along the line AA 'in FIG. 27 is shown in FIG.
Shown in.

The multi-electron source having such a structure is
After forming the row-direction wiring electrodes 1003, the column-direction wiring electrodes 1004, the interelectrode insulating layer (not shown), and the device electrodes of the surface conduction electron-emitting device and the conductive thin film on the substrate in advance,
Row-direction wiring electrode 1003 and column-direction wiring electrode 1004
The device was manufactured by supplying power to each element through the device and performing an energization forming process and an energization activation process.

FIG. 29 shows a structure in which image information provided from various image information sources such as television broadcasting can be displayed on a display panel using the surface conduction electron-emitting device described above as an electron source. It is a figure for showing an example of the display device which did.

In the figure, reference numeral 2100 denotes a display panel, which corresponds to the above-mentioned display panels 1 and 1a. 2101 is a display panel drive circuit, 2102 is a display controller, 2103 is a multiplexer, 2104 is a decoder, 2105 is an input / output interface circuit, 2
106 is a CPU, 2107 is an image generation circuit, 2108 and 2109 and 2110 are image memory interface circuits, 2111 is an image input interface circuit,
2112 and 2113 are TV signal receiving circuits, 2114
Is an input unit. (Note that when the display device receives a signal including both video information and audio information, such as a television signal, it naturally reproduces audio at the same time as displaying video. Descriptions of circuits, speakers, etc. relating to reception, separation, reproduction, processing, storage, etc. of audio information not directly related to characteristics will be omitted.) The functions of the respective parts will be described below in accordance with the flow of image signals.

First, the TV signal receiving circuit 2113 is a circuit for receiving a TV image signal transmitted using a wireless transmission system such as radio waves or spatial optical communication. The system of the TV signal to be received is not particularly limited, and various systems such as NTSC system, PAL system and SECAM system may be used. Further, a TV signal (for example, a so-called high-definition TV such as the MUSE method) including a larger number of scanning lines than these is suitable for taking advantage of the display panel suitable for a large area and a large number of pixels. It is a signal source. T received by the TV signal receiving circuit 2113
The V signal is output to the decoder 2104.

The TV signal receiving circuit 2112 is a circuit for receiving a TV image signal transmitted by using a wired transmission system such as a coaxial cable or an optical fiber. Similar to the TV signal receiving circuit 2113, the system of the TV signal to be received is not particularly limited, and the TV signal received by this circuit is also output to the decoder 2104.

Further, the image input interface circuit 21
Reference numeral 11 denotes a circuit for capturing an image signal supplied from an image input device such as a TV camera or an image reading scanner. The captured image signal is a decoder 2104.
Is output to. Image memory interface circuit 211
Reference numeral 0 is a circuit for capturing an image signal stored in a video tape recorder (hereinafter abbreviated as VTR), and the captured image signal is output to the decoder 2104. The image memory interface circuit 2109 is a circuit for fetching an image signal stored in the video disc,
The captured image signal is output to the decoder 2104. The image memory interface circuit 2108 is a circuit for capturing an image signal from a device that stores still image data, such as a so-called still image disc, and the captured still image data is output to the decoder 2104.

The input / output interface circuit 2105 is
It is a circuit for connecting the display device to an external computer, a computer network, or an output device such as a printer. It is of course possible to input and output image data, character data, and graphic information, and in some cases, input and output control signals and numerical data between the CPU 2106 of this display device and the outside. .

The image generation circuit 2107 is provided with image data, character / graphic information, or a CPU which is externally input via the input / output interface circuit 2105.
2106 is a circuit for generating display image data based on image data and character / graphic information output from the 2106.
Inside this circuit, for example, a rewritable memory for accumulating image data and character / graphic information, a read-only memory in which image patterns corresponding to character codes are stored, and a processor for performing image processing Etc. and the circuits necessary for image generation are incorporated. The display image data generated by this circuit is the decoder 2
Although it is output to 104, it is also possible to input / output to / from an external computer network or printer via the input / output interface circuit 2105 in some cases.

The CPU 2106 mainly performs operations relating to operation control of the display device and generation, selection and editing of a display image. For example, a control signal is output to the multiplexer 2103 to appropriately select or combine image signals to be displayed on the display panel. At that time, a control signal is generated for the display panel controller 2102 according to the image signal to be displayed, and the screen display frequency, the scanning method (for example, interlaced or non-interlaced), the number of scanning lines in one screen, etc. are displayed. The operation of the device is controlled appropriately. Further, the image data or the character / graphic information is directly output to the image generation circuit 2107, or an external computer or memory is accessed through the input / output interface circuit 2105 to display the image data or the character / graphic information. input. It should be noted that the CPU 2106 may of course be involved in tasks for other purposes. For example, it may be directly related to a function of generating and processing information, such as a personal computer or a word processor.

Alternatively, as described above, the computer may be connected to an external computer network through the input / output interface circuit 2105, and work such as numerical calculation may be performed in cooperation with an external device.

The input unit 2114 is used by the user to input commands, programs, data, etc. to the CPU 2106, and various inputs such as a joystick, a bar code reader, a voice recognition device in addition to a keyboard and a mouse. It is possible to use equipment.

The decoder 2104 converts various image signals input from the above 2107 to 2113 into three primary color signals,
Alternatively, it is a circuit for inversely converting the luminance signal into the I signal and the Q signal. Note that it is desirable that the decoder 2104 includes an image memory therein, as indicated by a dotted line in the figure. This is to handle a television signal that requires an image memory for reverse conversion, such as the MUSE method. Also, by providing an image memory,
An advantage that a still image can be easily displayed, or image processing and editing including image thinning, interpolation, enlargement, reduction, and composition can be easily performed in cooperation with the image generation circuit 2107 and the CPU 2106. Is born.

The multiplexer 2103 is the CPU 2
A display image is appropriately selected based on a control signal input from 106. That is, the multiplexer 210
Reference numeral 3 denotes a drive circuit 21 for selecting a desired image signal from the inversely converted image signals input from the decoder 2104.
Output to 01. In that case, by switching and selecting image signals within one screen display time, it is possible to divide one screen into a plurality of areas and display different images depending on the areas, as in a so-called multi-screen television. .

Display panel controller 2102
Is a circuit for controlling the operation of the drive circuit 2101 based on a control signal input from the CPU 2106. First, regarding the basic operation of the display panel, for example, a signal for controlling an operation sequence of a power supply (not shown) for driving the display panel is output to the drive circuit 2101.

As a component related to the display panel driving method, for example, a signal for controlling the screen display frequency and the scanning method (for example, interlace or non-interlace) is output to the drive circuit 2101. In some cases, a control signal relating to image quality adjustment such as brightness, contrast, color tone, and sharpness of a display image may be output to the drive circuit 2101. Drive circuit 2
Reference numeral 101 denotes a circuit for generating a drive signal applied to the display panel 2100, which operates based on an image signal input from the multiplexer 2103 and a control signal input from the display panel controller 2102. .

The functions of the respective parts have been described above. With the configuration illustrated in FIG. 29, the display panel 2 displays image information input from various image information sources in this display device.
100 can be displayed. That is, various image signals such as television broadcasting are transmitted to the decoder 2
After inverse conversion at 104, multiplexer 210
3 is appropriately selected and input to the drive circuit 2101. On the other hand, the display controller 2102 generates a control signal for controlling the operation of the drive circuit 2101 according to the image signal to be displayed. The drive circuit 2101 controls the display panel 2 based on the image signal and the control signal.
A drive signal is applied to 100.

As a result, the display panel 2100
The image is displayed at. These series of operations are C
It is totally controlled by the PU 2106.

Further, in the present display device, the image memory built in the decoder 2104 and the image generation circuit 21.
Due to the involvement of 07 and the CPU 2106, not only the one selected from a plurality of image information is displayed, but also the image information to be displayed is enlarged or reduced, for example.
It is also possible to perform image processing such as rotation, movement, edge enhancement, thinning, interpolation, color conversion, aspect ratio conversion of images, and image editing such as composition, deletion, connection, replacement, and fitting. is there. Although not particularly mentioned in the description of the present embodiment, a dedicated circuit for processing and editing audio information may be provided as in the above-mentioned image processing and image editing.

Therefore, the display device of this embodiment is a display device for television broadcasting, a terminal device for a video conference, an image editing device for handling still images and moving images, a terminal device for a computer, an office terminal such as a word processor. It is possible to combine the functions of a device, a game console, etc., and has a very wide range of applications for industrial or consumer use. It is needless to say that FIG. 29 merely shows an example of the configuration of a display device using a display panel having a surface conduction electron-emitting device as an electron source, and the present invention is not limited to this. For example, of the constituent elements in FIG. 29, circuits relating to functions that are unnecessary for the purpose of use may be omitted. On the contrary, the constituent elements may be added depending on the purpose of use. For example, when the display device is applied as a video telephone, it is preferable to add a television camera, a voice microphone, an illuminator, a transmission / reception circuit including a modem, and the like to the components.

In the display device of the present embodiment, the display panel using the surface conduction electron-emitting device as an electron source can be easily thinned, so that the depth of the entire display device can be reduced. In addition, a display panel using surface conduction electron-emitting devices as an electron source can easily enlarge the screen, has high brightness, and has excellent viewing angle characteristics, so this display device provides a realistic and powerful image with good visibility. It is possible to display.

Even if the present invention is applied to a system composed of a plurality of devices (eg, host computer, interface device, reader, printer, etc.), a device composed of one device (eg, copying machine, facsimile device) Etc.)

Further, an object of the present invention is to supply a storage medium having a program code of software for realizing the functions of the above-described embodiments to a system or an apparatus so that the computer (or the CPU or MPU) of the system or the apparatus can operate. It is also achieved by reading and executing the program code stored in the storage medium.

In this case, the program code itself read from the storage medium realizes the function of the above-described embodiment, and the storage medium storing the program code constitutes the present invention.

As a storage medium for supplying the program code, for example, a floppy disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a CD
-R, magnetic tape, non-volatile memory card, ROM, etc. can be used.

Moreover, not only the functions of the above-described embodiments are realized by executing the program code read by the computer, but also the OS (operating system) running on the computer based on the instructions of the program code. ) And the like perform some or all of the actual processing, and the processing realizes the functions of the above-described embodiments.

Further, after the program code read from the storage medium is written in the memory provided in the function expansion board inserted into the computer or the function expansion unit connected to the computer, based on the instruction of the program code, This also includes a case where a CPU or the like included in the function expansion board or the function expansion unit performs some or all of the actual processing and the processing realizes the functions of the above-described embodiments.

As described above, according to the present embodiment, it is possible to effectively use the driver circuit according to the wide display or the normal display, and prevent wasteful power consumption.

As described above, according to the present invention, it is possible to suppress the power consumption by stopping the power supply to the driver circuit that drives the element according to the display mode. it can.

Further, according to the present invention, in the case of the normal mode display, there is an effect that the display position of the image on the display screen can be changed.

[0168]

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an image display device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a modulation signal driver set according to the first embodiment of the present invention.

FIG. 3 shows an aspect ratio “16:
It is a figure explaining the control signal when displaying the image of "9".

FIG. 4 shows an aspect ratio “16:
It is a timing diagram of a control signal when displaying an image of "9".

FIG. 5 is an aspect ratio “4: 3” according to the first embodiment.
It is a figure explaining the control signal when displaying the image of.

FIG. 6 is an aspect ratio “4: 3” according to the first embodiment.
6 is a timing diagram of control signals when displaying the image of FIG.

FIG. 7 is a flowchart showing a control process of the system control unit 8 according to the first embodiment of the present invention.

FIG. 8 is a diagram showing a configuration of a modulation signal driver set according to a second embodiment of the present invention.

FIG. 9 is a diagram illustrating another example of displaying an image with an aspect ratio of “4: 3” according to the third embodiment of the present invention.

FIG. 10 is an aspect ratio “4:
It is a timing diagram of a control signal when displaying an image of "3".

FIG. 11 is a diagram illustrating another example of displaying an image having an aspect ratio of “4: 3” according to the fourth embodiment of the present invention.

FIG. 12 is an aspect ratio “4:
It is a timing diagram of a control signal when displaying an image of "3".

FIG. 13 is a block diagram showing a configuration of an image display device according to a fifth embodiment of the present invention.

FIG. 14 is an aspect ratio “16:
It is a figure explaining the case where an image of "9" is displayed.

FIG. 15 shows an aspect ratio “16:
It is a timing diagram of a control signal when displaying an image of "9".

FIG. 16 is an aspect ratio “4:
It is a figure explaining the case where an image of "3" is displayed.

FIG. 17 is an aspect ratio “4:
It is a timing diagram of a control signal when displaying an image of "3".

FIG. 18 is a perspective view in which a part of the display panel of the image display device according to the embodiment of the present invention is cut away.

FIG. 19 is a plan view showing an example of a phosphor array on a face plate of a display panel.

FIG. 20 is a plan view (a) and a sectional view (b) of a planar surface conduction electron-emitting device used in the embodiment.

FIG. 21 is a cross-sectional view showing a manufacturing process of a flat surface conduction electron-emitting device.

FIG. 22 is a diagram showing applied voltage waveforms during energization forming processing.

FIG. 23 is a waveform (a) of applied voltage during energization activation processing,
It is a figure which shows the change (b) of discharge current Ie.

FIG. 24 is a cross-sectional view of a vertical surface conduction electron-emitting device used in the embodiment.

FIG. 25 is a cross-sectional view showing the manufacturing process of the vertical surface conduction electron-emitting device.

FIG. 26 is a graph showing typical characteristics of the surface conduction electron-emitting device used in the embodiment.

FIG. 27 is a plan view of the substrate of the multi-electron source used in the embodiment.

FIG. 28 is a partial cross-sectional view of the substrate of the multi-electron source used in the embodiment.

FIG. 29 is a block diagram of a multifunctional image display device using the image display device according to the embodiment of the present invention.

FIG. 30 is a diagram showing an example of a conventionally known surface conduction electron-emitting device.

FIG. 31 is a diagram showing an example of a conventionally known FE.

FIG. 32 is a diagram showing an example of a conventionally known MIM type.

FIG. 33 is a diagram illustrating a wiring method of an electron-emitting device that the inventors have tried.

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Claims (7)

(57) [Claims] 1. A display panel in which a plurality of electron-emitting devices are wired in a matrix, a row driving means for driving a plurality of row wirings of the display panel, and a plurality of column wirings of the display panel according to an image signal. possess a column driving means for driving said
The column driving means includes a plurality of column wirings connected to the plurality of column wirings.
In an image display device including a drive circuit, a first display mode for performing display using the maximum display area of the display panel and a second display mode for performing display using a display area smaller than the maximum display area of the display panel. A control section for outputting a control signal for controlling the column driving means to perform display by switching between display modes, and in the case of the second display mode, the plurality of drive circuits.
Of the drive circuit connected to the column wiring outside the display area
In addition to stopping the input of the clock signal to the
Clock to the drive circuit connected to the column wiring in the display area
Allows the input of a signal and allows the input of the clock signal
By inputting image data to the drive circuit,
Power consumption in the column driving means in the first display mode
Force to the column driving means in the case of the second display mode.
Image display device characterized by reducing power consumption . 2. The clock when the second display mode is selected.
There are multiple drive circuits that are allowed to input
Input image data to these drive circuits in time series.
The image display apparatus according to claim 1, characterized in that that. 3. A plurality of electron-emitting devices are arranged in a matrix.
Wired display panel and multiple row wiring of the display panel
Row driving means for driving, and a plurality of column wirings of the display panel
A column driving means for driving in accordance with an image signal,
The column driving means includes a plurality of column wirings connected to the plurality of column wirings.
In an image display device equipped with a drive circuit, display is performed using the maximum display area of the display panel.
First display mode and maximum display area of the display panel
Table 2 for display using a smaller display area
In order to display by switching the display mode,
A plurality of drive circuits in the case of the second display mode , the control circuit outputting a control signal for controlling the stages;
Drive circuit connected to the column wiring outside the display area
Power supply to the display area and
Allows power supply to the drive circuit connected to the column wiring,
Input image data to the drive circuit where power supply is permitted.
To drive the column in the first display mode.
In the case of the second display mode from the power consumption in the means
The feature is to reduce the power consumption in the column driving means.
Image display device. 4. The power supply in the case of the second display mode.
There are multiple drive circuits that are allowed to supply
The feature is that image data is sequentially input to the circuit in time series.
The image display device according to claim 3, which is a characteristic. 5. The aspect ratio is 1 in the first display mode.
6: 9 is wide display mode, the second display mode aspect ratio of 4: image display apparatus according to any one of claims 1 to 4, characterized in that a 3 normal display mode. 6. The image display apparatus according to any one of claims 1 to 5, characterized in that said electron-emitting devices are surface conduction electron-emitting devices. 7. The electron emission device is an FE type emission device or
2. An MIM type emission device , characterized in that
The image display device according to any one of 5 above.