JP3414921B2 - Protective relay - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a protective relay device having a function of judging a defect in an analog input circuit.

[0002]

2. Description of the Related Art FIG. 5 is a block diagram showing a conventional protective relay device disclosed in, for example, Japanese Patent Publication No. 3-79932.
In the figure, 1 is a three-phase line of a power system, 2 is a current detector for detecting an A-phase current I _A (hereinafter referred to as CT), 3 is a current detector for detecting a B-phase current I _B (hereinafter, referred to as CT). Reference numeral 4 denotes a current detector (hereinafter referred to as CT) for detecting the C-phase current I _C.

Reference numeral 5 is an input converter for converting the A-phase current into a predetermined magnitude for insulation, 6 is an input converter for converting the B-phase current into a predetermined magnitude and insulation, and 7 is a C-phase current. An input converter for converting to a predetermined size and isolating, 8 is a current I _A , I _B ,
A monitoring signal generator for generating a monitoring signal I _4f having a frequency four times I _C , 9 is an adder for superimposing the monitoring signal I _4f on the current I _A , and 10 is a monitoring signal I on the current I _B An adder for superimposing _4f, and an adder 11 for superimposing the monitoring signal I _4f on the current I _C.

Reference numerals 12 to 14 are analog filters for removing higher harmonic components from the outputs of the adders 9 to 11 such as I _A + I _4f . Reference numerals 15 to 17 are sample and hold (holding the outputs of the analog filters 12 to 14 for a certain period). Hereinafter, SH is referred to as SH, and 18 is a multiplexer (hereinafter referred to as MPX) that sequentially reads and outputs the data held in SH 15 to 17.
, 19 is an analog / digital converter (hereinafter referred to as an A / D converter) for analog / digital converting the data output from the MPX 18.

[0005] 20 computer to perform a relay operation and poor judgment, etc., 21 a data distribution unit for distributing the output of the A / D converter 19, 22 is digital data (I _A + I _4f + G, which is distributed by the data distributor 21 ₁ ) and a digital filter for extracting a fundamental wave (currents I _A + a ₁ , I _B + a ₂ , I _C + a ₃ ), 23 is a current I _A + a ₁ , I _B + a ₂ ,
Relay trip unit that performs relay calculation based on I _C + a ₃ and trips the circuit breaker based on the calculation result, 2
4 digital to extract digital data _{(I A + I 4f + G} 1 , etc.) 4 of the fundamental wave from the harmonic (monitoring _{I 4f + b 1, I 4f} + b 2, I 4f + b 3) distributed by the data distribution unit 21 A filter 25 is a failure determination unit that determines a circuit failure by comparing the monitoring signal I _4f + b ₁ etc. with a predetermined alarm value ε.

Next, the operation will be described. First, CT2
4 to 4 detect the currents I _A , I _B , and I _C of the respective phases of the three-phase line 1, adders 9 to 11 generate currents I _A , I _B , and I _{C from the} monitoring signal generator 8. The monitoring signal I _4f thus _generated is superimposed. As a result, the outputs of the adders 9 to 11 have the filter characteristics as shown in FIG.
.. to 14, the harmonic components are removed from the outputs of the adders 9 to 11 such as I _A + I _4f .

When the harmonic components are removed from the analog filters 12 to 14, the SHs 15 to 17 temporarily hold the outputs of the analog filters, and the MPX 18 sequentially reads the outputs of the analog filters from the SHs 15 to 17 and outputs A Output to the / D converter 19. This A / D converter 19
Converts the output of MPX 18 from analog to digital and outputs it to the computer 20.

As a result, the data distribution unit 2 of the computer 20
Digital data 1 is output from the A / D converter _{19 (I A + I 4f +} G 1, I B + I 4f + G 2, I C + I 4f +
G ₃ ) is distributed to the digital filters 22 and 24, respectively, as shown in FIG. Here, G _{1 to} G ₃ are analog input circuits (CT2 to CT4, analog filter 12).
.About.14, SH15 to SH17, and MPX18).

Then, the digital filter 22 performs digital filter calculation as shown below to obtain digital data (I _A + I _4f + G ₁ and I _B + I _4f).
The monitoring signal I _4f is removed from + G ₂ , 1 _C + I _4f + G ₃ ) to _obtain the fundamental wave (currents I _A + a ₁ , I _B + a ₂ , 1 _C +).
a ₃ ) is extracted.

Here, a _{1 to} a ₃ are errors at the fundamental wave level due to a defect in the analog input circuit. Fundamental wave = I (t) -I (t -90 °) ····· (1) However, I (t): the digital data of the current (I _A +
I _4f + G _1, etc.) I (t-90 °): digital data before phase Li 90 ° by current _{(I A + I 4f + G} 1 , etc.) By the way, FIG. 7 is a frequency characteristic diagram of the digital filter 22.

Then, when the fundamental wave is extracted from the digital filter 22, the relay trip section 23 performs a relay operation based on the fundamental wave currents I _A + a ₁ , I _B + a ₂ and I _C + a ₃ , and The breaker is tripped based on the calculation result.

On the other hand, the digital filter 24 performs the following digital filter calculation,
Digital data (I _A + I _4f + G ₁ , I _B + I _4f + G
_{The second} harmonic of the fundamental wave (monitoring signals I _4f + b ₁ , I _4f + b ₂ , I _4f + b ₃ ) is extracted from ₂ , I _C + I _4f + G ₃ ).

Here, b _{1 to} b ₃ are errors at the fourth harmonic level due to a defect in the analog circuit. 4 harmonic = I (t) + I ( t-180 °) ····· (2) However, I (t): the digital data of the current (I _A +
I _4f + G _1, etc.) I (t-180 °): digital data before phase Li 180 ° by current _{(I A + I 4f + G} 1 , etc.) By the way, FIG. 8 is a frequency characteristic diagram of the digital filter 24.

When the fourth harmonic of the fundamental wave is extracted by the digital filter 24, the failure determining section 25 compares the monitoring signal I _4f + b ₁ etc. with a predetermined alarm value ε, and the monitoring signal I _4f + b. _{When 1} or the like is larger than the predetermined value ε, it is determined that the analog input circuit has a defect, the result of the determination is displayed on a display device or the like (not shown), and the series of processes is ended. * Analog input circuit failure monitoring signal I _4f + b ₁ etc.> alarm value ε * Analog input circuit normal monitoring signal I _4f + b ₁ etc. ≤ alarm value ε

[0015]

Since the conventional protective relay device is constructed as described above, it is possible to constantly monitor the analog input circuit for defects. Since the defect determination (defect determination of the fourth harmonic level) is performed based on a signal having a frequency different from the fundamental wave, there is a problem that the defect determination cannot be accurately performed. .

A conventional example in which a monitoring signal having the same frequency as the current of each phase is superimposed on the current of each phase is "Electrical Cooperation Research Vol. 50 No. 1," published by the Electric Cooperation Research Group in April 1994.
As disclosed on pages 99 and 109, the conventional example does not separate the currents of the respective phases and the monitoring currents, but performs the failure determination based on the currents of the respective phases on which the monitoring signals are superimposed. Therefore, if the magnitude of the current of each phase fluctuates, the determination accuracy fluctuates.

The present invention has been made to solve the above problems, and provides a protective relay device which can accurately determine a defect in an analog input circuit by using a monitoring signal having the same frequency as the current of each phase. The purpose is to

[0018]

A protective relay device according to a first aspect of the present invention is a first analog filter for deriving a first output by superimposing a monitoring signal on a current of each phase by a superimposing means. And a monitoring signal by means of superimposing means on the current of each phase
Second analog filter means for inverting and superimposing the polarity of the above to derive the second output, and subtracting the second output from the first output, and comparing the absolute value of the subtraction result with a predetermined alarm value. And a defect determination means for determining a circuit defect.

According to a second aspect of the present invention, there is provided a protective relay device comprising first analog filter means for deriving a first output by superimposing a monitoring signal on the current of each phase by the superimposing means.
Switching means for sequentially switching and outputting the second output in which the polarity of the monitoring signal is inverted and superposed on the current of each phase by the superposing means, and the analog output from the first output corresponding to the output phase of the output The output of the filter means is subtracted, and the defect determination means for determining a circuit failure by comparing the absolute value of the subtraction result with a predetermined alarm value is provided.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described below. Embodiment 1. 1 is a configuration diagram showing a protective relay device according to Embodiment 1 of the present invention. In the figure, 1 is a three-phase line of a power system, and 2 is a CT (current detector) for detecting an A-phase current I _A. ) 3 is a CT (current detector) that detects the B-phase current I _B , and 4 is a CT (current detector) that detects the C-phase current I _C.

Reference numeral 5 is an input converter (input conversion means) for converting the A-phase current into a predetermined magnitude and insulating, and 6 is an input converter (input conversion) for converting the B-phase current into a predetermined magnitude and insulating. Means), 7 is an input converter (input conversion means) for converting the C-phase current into a predetermined magnitude and insulating it, and 31 is a monitoring signal generator for generating a monitoring signal I _M having the same frequency as the three-phase line. And a monitoring signal generator 31.
Inverter to output -I _M by inverting the polarity of the output I _M,
Reference numeral 33 is an adder (superimposing means) that superimposes the monitoring signal I _M on the current I _A , 34 is an adder (superimposing means) that superimposes the monitoring signal I _B on the current I _B , and 35 is monitoring current I _C Signal I _M
Is an adder (superimposing means) for superimposing the current I _A , and 36 is an adder (superimposing means) for superimposing an inversion of the monitoring signal I _M on the current I _A , and 37 is an inversion of the monitoring signal I _M for the current I _B Is an adder (superimposing means) for superimposing the current I _C on the current I _C and superimposing an inversion of the monitoring signal I _M on the current I _C.

[0022] 39-41 analog filter (analog filter means) for removing harmonic components from the I _A + I _M or the like which is the output of the adder 33 to 35, 42 to 44 adders 3
An analog filter (analog filter means) for removing harmonic components from I _A -I _M which is the output of 6 to 38, 4
5 to 50 are sample and hold (hereinafter, referred to as SH) which holds the outputs of the analog filters 39 to 44 for a certain period.
Reference numeral 1 denotes a multiplexer (hereinafter, referred to as MPX) as a switching unit that sequentially reads and outputs the data held in the SH 45 to 50, and 52 is an analog-digital converter (hereinafter, A) that converts the data output from the MPX 51 into analog-digital. / D converter).

Reference numeral 53 is a computer that performs relay calculation and defect determination, 54 is a data distribution unit that distributes the output of the A / D converter 52, and 55 is digital data (I _A + I _M + K) distributed by the data distribution unit 54. ₁₎ and digital data _{(I a -I M + K 2} ) or the like is added to remove the monitoring signal I _M relay operation current _{2I a + K 1 + K 2} , 2I B + K 3
_{+ K 4, 2I C + K} 5 + K 6 adder for deriving (trip unit), 56 is a current _{2I A + K 1 + K 2} , 2I B + K
_A relay calculation unit (trip unit, hereinafter referred to as a relay trip unit) that performs a relay calculation based on ₃ + K ₄ , 2I _C + K ₅ + K ₆ and trips the circuit breaker based on the calculation result, 57 is a monitoring signal I Set value I _MS corresponding to _M
(E.g., if the signal level of the monitor signal I _M due to the characteristics of the analog filter 39 to 44 is reduced to 80%, is the set of 80% of the value of the monitoring signal) is a setter for storing.

[0024] 58 the setting value I _MS corresponding to digital data _{(I A + I M1 + K} 1) and digital data _{(I A -I M1 + K 2} ), and the monitoring signal I _M, which is distributed by the data distributor 54 operation to the phase current I _a failure determination value to remove such _{K 1 -K 2, K 3 -K} 4, K 5 defect determination computing unit for deriving the -K ₆ (defect determining means), 59 defect determination value K
_{1 -K 2, K 3 -K 4} , K 5 -K 6 and defect determining unit for determining a circuit failure by comparing a predetermined alarm value ε a (bad determination unit).

[0025] Next, the operation will be described. First, CT2
~ CT4 detects the currents I _A , I _B , I _C of each phase of the three-phase line 1, and the adders 33, 34, 35 add the currents I _A , I _B , I.
_The monitoring signal I _M generated by the monitoring signal generator 31 for _C , and the adders 36, 37, 38 invert the monitoring signal I _M for the currents I _A , I _B , I _C. Did-
Superimpose I _M.

[0026] Thus, the output of the adder 33 to 38 are input to an analog filter 39 to 44 having the filter characteristic shown in FIG. 6, which is the output of the adder 33~38 I _A + I _M, I so that the _a -I _M such harmonic components are removed.

When the harmonic components are removed by the analog filters 39 to 44, the SHs 45 to 50 temporarily hold the outputs of the analog filters 39 to 44, and the MPX 51.
Sequentially output the outputs of the analog filters 39 to 44 from SH45 to
It is read from 50 and output to the A / D converter 52. The A / D converter 52 analog-digital converts the output of the MPX 51 and outputs it to the computer 53.

[0028] Thus, the data distribution unit 5 of the computer 53
4 is digital data I _A + I _M + K ₁ , I _A -I _M + K ₂ , I _B + I _M + output from the A / D converter 52.
_{K 3, I B -I M +} K 4, I C + I M + K 5, I C -I
_As shown in FIG. 1, _M + K ₆ is distributed to the adder 55 and the defect determination calculator 58, respectively. Here, K _{1 to} K ₆ are analog input circuits (CT2-4, analog filter 39-
44, SH 45 to 50, and MPX 51).

[0029] The adder 55 is as shown below,
Digital data (I _A + I _M + K ₁ , I _B + I _M + K
₃ , I _C + I _M + K ₅ ) and digital data (I _A -I _M + K ₂ , I _B -I _M + K ₄ , I _C -I _M +) respectively.
K ₆₎ by adding the current relay operation for each phase by removing the monitoring signal _{I M 2I A + K 1 +} K 2, 2I B + K 3 +
Extract K ₄ , 2I _C + K ₅ + K ₆ .

[0030] for the phase A _{2I A + K 1 + K 2} = (I A + I M + K 1) + (I A -I M + K 2) ····· (3) B -phase _{2I B + K 3 + K 4} = ( _{I B + I M + K 3} ) + (I B -I M + K 4) ····· (4) for phase C _{2I C + K 5 + K 6} = (I C + I M + K 5) + (I C -I M ＋ K ₆ ) ・ ・ ・ ・ ・ (5)

When the monitor signal is removed by the adder 55, the relay trip section 56 causes the current 2I _A + K <sub>1
+ K 2, 2I B + K</sub> 3 + K 4 performs relay operation based, on _{2I C + K 5 + K 6} , to trip the circuit breaker based on the calculation result.

On the other hand, failure determination computing unit 58, digital data and analog data for each phase on the basis of the set value I _MS corresponding to the monitoring signal I _M, which is distributed by the data distributor 54, the first circuit defective A defect determination value indicating the degree is calculated as shown below.

[0033] A for phase _{(I A + I M + K} 1) - (I A -I M + K 2) -2I MS = K 1 -K 2 ····· (6) B -phase (I _B + I _M + K _{3) - (I B -I M} + K 4) -2I MS = K 3 -K 4 ····· (7) C -phase _{(I C + I M + K} 5) - (I C -I M + K 6) -2I _MS = K ₅ -K ₆ (8)

When the defect determination value is calculated by the defect determination calculation unit 58, the defect determination unit 59 compares the defect determination value with a predetermined alarm value ε, and when the defect determination value is larger than the predetermined alarm value ε. It is determined that the analog input circuit is defective, the result of the determination is displayed on a display device (not shown), and the series of processes is completed.

[0035] * Analog input circuit failure defect determination value | K ₁ -K ₂ | like> alarm value epsilon * analog input circuit normal failure determination value | K ₁ -K ₂ | is equal ≦ alarm value epsilon alarm value epsilon rated current The value is about 20%.

As described above, according to the first embodiment, the monitoring signal I _M is extracted from the phase currents on which the monitoring signal I _M is superimposed.
Each phase current on which the inverted −I _{M of M} is superimposed is subtracted to calculate a defect determination value, and the defect determination value and a predetermined alarm value ε.
Since the analog input circuit is judged to be defective by comparing with each other, the defect is judged by the fundamental wave actually used for the relay calculation without being influenced by the fluctuations of the currents I _A , I _B , I _C of the respective phases. As a result, there is an effect that a defect determination can be accurately performed.

[0037] Embodiment 2. In the first embodiment, six sets of analog filters 39 to 44 and SH45 to the three-phase current inputs I _A , I _B , and I _C are used.
Has been described which consists of 50, the output I _A -I _M adder 36-38 as in FIG. _{2, I B -I M, I} C -
I _M is an MPX that performs a switching operation in synchronization with MPX 51.
The signal is commonly input to the analog filter 61 and the SH 62 via 60. This allows
The same effects as those of the first embodiment can be obtained, and two sets of analog filters and SH are not required, and the device configuration can be simplified.

Application Example 1. In the first and second embodiments, the monitoring signal I_MBy superimposing
There was thisApplication example 1As shown in FIG.
Monitoring signal I in state 2_MExcept the superimposing means of
is there. The relay operation unit (trip means) 70 is an analog relay.
Current I derived from the filters 39, 40, 41_A+
K₁, I_B+ K₂, I_C+ K₃To use.

The defect determination calculation section (defect determination means) 71 performs the following calculation. For the phase A _{(I A + K 1) -} (I A + K 2) = K 1 -K 2 ····· (9) B -phase _{(I B + K 3) -} (I B + K 4) = K 3 - K ₄ ····· (10) C-phase _{(I C + K 5) -} (I C + K 6) = K 5 -K 6 ····· (11)

In this application example 1 , three-phase current inputs I _A , I
_{When B} and I _C are zero, defect detection is impossible, but there is an effect that defect determination can be performed with a simpler configuration than the second embodiment.

Application Example 2 In the first embodiment, it is premised that the analog filter or the like has no conversion error and the current of each phase can be accurately detected. Therefore, when the analog filter or the like has a conversion error,
The accuracy of the defect determination deteriorates as the absolute value of the current of each phase increases.

The failure determination value _{= (I A + I M +} K 1) - (I
When there is no defect in the _{A -I M + K 2) -2I} MS = K 1 -K 2 to the analog input circuit, K _1, K ₂ but should become defective determination value = 0 both at zero, the analog If there is a conversion error in the filter 39, the analog filter 42, etc., the defect determination value = 0 does not hold.

[0043] Therefore, to compensate for the conversion errors such as an analog filter in this application example 2, instead, as shown in the following equation (6) (7) (8) in the first embodiment, calculates the defect determination value To do. For the phase A _{(I A + I M + K} 1) - (I A -I M + K 2) -2I MS -αI A ····· (12) B -phase _{(I B + I M + K} 3) - (I B _{-I M + K 4) -2I MS} -αI B ····· (13) C -phase _{(I C + I M + K} 5) - (I C -I M + K 6) -2I MS -αI C ··· .. (14) where α is a ratio coefficient (eg, 0.05)

Application Example 3 Although the monitoring signal generator 31 emits the monitoring signal I _M in the first and second embodiments and the application example 1 , for example, as shown in FIG. 4, the computer 53 monitors the control signal at the time of inspection. The monitoring signal I _M may be generated by outputting to the monitoring signal generator 31 only at the time of inspection for determining a defect in the analog input circuit.

[0045] As a result, other than the time of inspection, the adder 55
In, the relay calculation can be performed without performing the addition calculation for deriving the relay calculation current, and the effect of improving the accuracy of the relay calculation is obtained.

[0046]

As described above, according to the first aspect of the invention, the superimposing means superimposes the supervisory signal on the current of each phase from the first output in which the superimposing means superimposes the supervisory signal on the current of each phase. Since the inverted and superimposed second output is subtracted and the absolute value of the subtraction result is compared with a predetermined alarm value to determine the circuit failure, the circuit is not affected by the fluctuation of the current of each phase,
Further, as a result of the fact that the defect determination can be actually made at the fundamental wave level used for the relay calculation, there is an effect that the circuit defect can be accurately determined.

[0047] According to the second aspect of the invention, a first output and superposing the monitoring signal by the superimposing unit to each phase of the current,
The second output, which is obtained by inverting and superposing the monitoring signal on the current of each phase by the superimposing means, is sequentially switched by the switching means and is derived from the analog filter means, and the first output is changed to the output phase of the first output. The output of the corresponding analog filter means is subtracted, and the absolute value of the subtraction result is compared with a predetermined alarm value to determine circuit failure. Without being affected by fluctuations,
Further, as a result of the fact that the defect determination can be actually made at the fundamental wave level used for the relay calculation, there is an effect that the circuit defect can be accurately determined.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a protective relay device according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram showing a protective relay device according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram showing a protective relay device according to an application example 1 .

FIG. 4 is a configuration diagram showing a protective relay device according to an application example 3 ;

FIG. 5 is a configuration diagram showing a conventional protective relay device.

FIG. 6 is a characteristic diagram of an analog filter.

FIG. 7 is a frequency characteristic diagram of a digital filter that extracts a fundamental wave.

FIG. 8 is a frequency characteristic diagram of a digital filter that extracts a fourth harmonic.

[Explanation of symbols]

1 3-phase line, 5, 6, 7 input converter (input converting means), 31 monitoring signal generator (monitoring signal generating means), 39 to 44 analog filter (analog filter means), 51 multiplexer (switching means) 5,
5 adder (trip means), 56, 70 relay operation part (trip means), 58, 71 defect determination operation part (defect determination means), 59 defect determination part (defect determination means).

─────────────────────────────────────────────────── --- Continuation of the front page (56) Reference JP 62-104422 (JP, A) JP 63-161811 (JP, A) JP 51-127441 (JP, A) JP 63- 148817 (JP, A) JP 5-91642 (JP, A) JP 5-344641 (JP, A) JP-B 3-79932 (JP, B2) (58) Fields investigated (Int.Cl. ⁷ , DB name) H02H 3/05 G01R 31/00-31/02

Claims (2)

(57) [Claims] 1. A three-phase input conversion means for converting a current of each phase of a three-phase line in a power system into a predetermined magnitude, and each phase.
A monitoring signal generating circuit for generating a monitoring signal of the same frequency and current, a first analog filter means for deriving a first output and the overlap with the monitoring signal the 3-phase input for each phase, Second analog filter means for deriving a second output by superimposing a three-phase input on each phase with a monitoring signal obtained by inverting the polarity of the monitoring signal , the first output for each phase and the above Trip means for adding the second output and tripping the circuit breaker based on the addition result, subtracting the first output and the second output for each phase, and the absolute value of the subtraction result and a predetermined value Protective relay device having a defect determination means for comparing circuit alarm values to determine a circuit defect. 2. A three-phase input conversion means for converting a current of each phase of a three-phase line in a power system into a predetermined magnitude, and each phase.
A monitoring signal generating circuit for generating a monitoring signal of the same frequency and current, a first analog filter means for deriving a first output and the overlap with the monitoring signal the 3-phase input for each phase, A second output for deriving a second output by superimposing the three-phase input on each phase with the monitoring signal in which the polarity of the monitoring signal is inverted.
Analog filter means and the second analog filter means
Adding a switching means for outputting sequentially switching stage, said first output for each phase, an output in synchronization with the output phase is derived from the second analog filter means, based on the addition result The trip means for tripping the circuit breaker, the first output for each phase, and the output derived from the second analog filter means output in synchronization with this output phase are subtracted, and the subtraction result A protective relay device comprising: a failure determination means for determining a circuit failure by comparing an absolute value with a predetermined alarm value.