JP3414625B2 - Voltage detection circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an AC / D for detecting an input signal.
Regarding the C conversion circuit, in detail, the presence or absence of the signal under measurement is checked, or a DC time signal for displaying the period during which the signal is input is formed using the signal under measurement by connecting to a recorder or the like. The present invention relates to a voltage detection circuit that operates.

[0002]

2. Description of the Related Art The recording paper of a recorder is provided with graduation lines showing a time axis at regular intervals along the traveling direction of the normal paper, and if the paper feed speed is known, the signal waveform drawn on the recording paper. The recording time can be read. However, the recording of the signal waveform rarely starts on the scale line and ends on the scale line, and in general, it often starts between the scale lines and ends between them.

In this case, if the displayed signal waveform becomes complicated, the time axis becomes difficult to read. Therefore, as an auxiliary line for reading the time from the recording start of the signal waveform to the end of recording, for example, a straight line is displayed on a corner of the display section. It is convenient for the user to analyze the waveform by allowing the user to draw. Turning on and off of the time signal for drawing this straight line is performed at the same timing as the start and end of recording of the signal waveform.
In that case, the higher the accuracy, the more complicated the structure of the circuit for generating the time signal becomes, and it becomes difficult to easily incorporate the circuit into the input section of the recorder, the probe for pickup, or the like.

FIG. 5 shows an actual fairness 5-that solves such a problem.
It shows a configuration of a conventional technique described in Japanese Patent No. 24182. This conventional example will be briefly described. In FIG. 5, 1 and 2 are input terminals, 3 and 7 are current limiting resistors, 4
Is a full-wave rectifier circuit, 5 is a surge absorbing circuit, 6 is a capacitor for compensating the dead region of the full-wave rectifier circuit 4, 8 and 9 are photocouplers consisting of photodiodes and phototransistors, 11 is a high-frequency bypass capacitor, and 12 is a capacitor. A comparator provided for waveform shaping, 13 is a gain adjusting resistor, and 14 is an output terminal.

In the above structure, the sin wave-shaped signal under measurement as shown in FIG. 6 (a) is input to the input terminals 1 and 2 from t ₀ to t _1.
The input from the full-wave rectifier 4 is as shown in FIG.
The waveform is as shown in (b). Then, this waveform becomes a waveform as shown in FIG. 6C by the capacitor 6, and is applied to the photodiode 8 via the resistor 7. as a result,
A current similar to the input waveform flows through the photodiode 8 and emits light with an intensity proportional to the change in the waveform.

This optical signal is converted into an electric signal by the phototransistor 9, amplified by the transistor 10 and input to one terminal of the comparator 12. The voltage E ″ shown in FIG. 6D is applied to the other terminal of the comparator 12.
A threshold voltage Vref set lower than the above is added. The signal under measurement input from the transistor 10 is waveform-shaped here, and a DC signal voltage of a constant level shown in FIG. 6E appears at the output terminal.

[0007]

By the way, in the above-mentioned conventional example, the collectors of the photoelectric conversion transistor 9 and the amplification transistor 10 are connected to each other, and the emitter of the photoelectric conversion transistor 9 is connected to the base of the amplification transistor 10. Therefore, since the transistor is used in the linear region,
It is necessary to make up for individual differences in the respective amplification factors. as a result,

Circuit adjustment is necessary so that the output of the amplifying transistor becomes appropriate as the input of the comparator. Further, since the time constant is generated in the resistor 7 and the capacitor 11 of the adjusting circuit, the response when the signal under measurement is momentarily interrupted is poor. Since there are many circuits after the photocoupler, it is necessary to supply a large amount of power from the outside. Therefore, power consumption is high. There is a problem such as. The present invention solves such a problem, and an object thereof is to make adjustments unnecessary and quick response,
It is to realize a voltage detection circuit with low power consumption.

[0009]

SUMMARY OF THE INVENTION The present invention has been made to achieve the above object, and a current limiting circuit for limiting an input current generated by a signal under measurement and a full-wave rectifier for detecting the input current. And a capacitor for charging and discharging by the signal voltage output from the full-wave rectifier to boost the minimum value of the signal voltage waveform to a value of a predetermined level, and the signal voltage whose minimum value is boosted by this capacitor. To one of the input terminals and a threshold voltage having a magnitude not exceeding the boosted voltage level is applied to the other input terminal; and a first switch whose opening and closing is controlled by the output of the comparator. , This first
Equipped with a second switch that opens and closes in association with the opening and closing of one switch
For example, are those characterized by being connected to identification means for identifying the presence or absence of input of the signal to be measured downstream of the second switch, also place the recorder downstream of the second switch The DC signal output from the comparator is recorded together with the recording of the signal under measurement.

[0010]

1 is a block diagram of a voltage detection circuit showing an example of an embodiment of the present invention, and FIG. 2 is an explanatory view of the principle. First, the present invention will be described with reference to FIG. 1,
Reference numeral 2 is an input terminal, and 3 is a current limiting resistor, one end of which is connected to the input terminal 1 and the other end of which is connected to the inverting input terminal of the comparator 12. Reference numeral 21 is a reference voltage source connected to the non-inverting input terminal of the comparator. 22 is an open / close switch (first switch) made up of an FET (relay or the like ) , the drain side is connected to the inverting input terminal of the comparator 12 via the voltage detection resistor 23, and the source side is the negative potential side of the reference voltage source 21. It is connected to the.

Reference numeral 24 is a photocoupler (second switch), in which the anode side of the light emitting element (eg LED) 24a is the drain side of the open / close switch 22 and the cathode side is the open / close switch.
(First switch) Connected to the source side of 22. One of the sides of the photocoupler (second switch) 24 on the light receiving element 24b side is connected to the Vcc power supply via the pullup resistor 25 of the photocoupler, and the other terminal is grounded. Reference numeral 26 is an output terminal connected to the pull-up resistor 15 and the collector side of the light receiving element 14b.

Consider the case where a sine wave as shown in FIG. 3 (a) is applied between the input terminals 1 and 2 in the above configuration for a half cycle. Then, the sine wave causes a current as shown in FIG. 3B to be input terminal 1 → current limiting resistor 3 → voltage detecting resistor 23 → open / close switch (first switch) 22 → input terminal 2. At this time, the open / close switch (No.
1 (switch) 22 is the circuit current flowing in FIG. 3 (c), and the circuit current flowing in the light emitting element (primary side photodiode 24a) of the photo coupler (second switch) 24 is shown in FIG. 3 (d). During the period from t0 to t1 of 3 (c), the circuit current (d) flowing into the primary side photodiode 24a is zero, so the light receiving element (secondary side phototransistor ) 24 (b) is off. Therefore, the collector output terminal voltage (f) of the phototransistor 24b becomes H level.

The comparator circuit (comparator) 12 waits until the voltage (e) generated at the inverting input terminal by this current (b) exceeds the voltage set by the reference voltage source 21 (t0 → t1).
Control is performed so that the open / close switch (first switch) 22 continues to be turned on. Then, as the input voltage (a) increases, the generated voltage (e) also increases. When the generated voltage (e) exceeds the reference voltage, the comparison circuit 12 turns off the open / close switch (first switch) 22. Let

When the open / close switch (first switch) 22 is turned off, the circuit current (b) is changed to the open / close switch (first switch).
22 ) and instead flows out to the primary side diode 24a of the photocoupler 24, which causes the secondary side phototransistor 2 of the photocoupler (second switch) 24.
4b is turned on. As a result, the voltage of the collector output terminal voltage (f) changes from H level to L level. From this, it can be seen that a voltage higher than the predetermined value was applied between the input terminals 1 and 2.

Next, when the input voltage (a) decreases, the generated voltage (e) also decreases, and when the input voltage (e) decreases below the reference voltage, the comparison circuit 12 turns on the open / close switch (first switch) 22. As a result, the circuit current (b) opening and closing switch (first
Switch) 22 and the photo coupler (second switch)
The current (d) flowing through the primary side diode 24a of the switch 24 becomes zero and the collector output terminal voltage (to) becomes H level.

The open / close switch (first switch) 22
Since the forward voltage Vf of the primary side photodiode 24a is larger than the source-drain voltage VDS at the time of turning on, the open / close switch (first switch)
Switch) 22 is turned off, and the primary side photodiode 2
At the same time when the circuit current (4) is generated in 4a, the comparison circuit 12
The inverting input terminal voltage (e) rises by about Vf-VDS. Further, since the open / close switch (first switch) 22 is turned on and the circuit current (d) of the primary side photodiode 24a becomes zero, the voltage decreases by about Vf-Vsw at the same time, so that a malfunction such as chattering due to the state transition occurs. do not do.

Next, FIG. 1 will be described. In this figure, the same elements as those of the conventional example of FIG. In this embodiment, a voltage limiting means 27 such as a Zener diode is provided at the output end of the full-wave rectifier circuit 4 to protect the measuring circuit when an excessive voltage is applied between the input terminals 1 and 2. Further, the output terminal of the full-wave rectifier circuit 4 is connected to a charging / discharging means 29 such as a capacitor charged by a signal under measurement via a rectifying means 28 such as a diode that determines the directionality of the circuit current. There is.

The energy charged in the charging / discharging means 29 passes through a current limiting means 30 such as a constant current diode (which may be a resistor) which determines the maximum value of the amount of discharge, and a voltage detecting circuit 23 composed of a resistor or the like. Given to.

The voltage generated by the current flowing through the voltage detection circuit 23 and the voltage set by the reference voltage source are compared by the comparison circuit (comparator) 12. The other end of the voltage detection circuit 23 has an opening / closing switch (first switch) such as an FET whose opening / closing is controlled according to the comparison result of the comparison circuit 12 .
Switch 22 and a transmission circuit 24 such as a photocoupler (second switch) for transmitting the switching result to the secondary side. In addition, photo coupler (second switch)
The collector of the phototransistor 24b (light receiving element) constituting 24 is connected to the Vcc power supply via the pull-up resistor 25, and the emitter terminal is grounded. Reference numeral 31 is a recorder for recording the output of the circuit.

FIG. 4 shows the input terminals 1 and 2 of the voltage detection circuit.
It shows a state in which a continuous measured signal such as (a) is applied between them, and when such a measured signal is applied, it is rectified by the full-wave rectification circuit 4 and is as shown in FIG. It becomes a signal. The signal in FIG. 4B is the charging / discharging means (capacitor).
When input to 29, a voltage as shown by the dotted line in FIG. 4C is generated between both terminals. If the capacity of the charging / discharging means 29 is increased, it is possible to make the slope of the dotted line portion at the time of discharging close to flat, but in that case, the time constant with the current limiting resistor 3 becomes large and the responsiveness deteriorates.

Therefore, the capacity of the charging / discharging means 29 can be reduced by controlling the discharge current by the current limiting means 30 . That is, when the input voltage shown in FIG. 4 (a) decreases and the discharge from the charging / discharging means 29 starts, the voltage between both terminals of the charging / discharging means 29 is changed by the function of the current limiting means 30 as shown in FIG. 4 (c). It becomes like the solid line part shown in.

Terminal voltage of the charging / discharging means 29 (FIG. 4C)
As a result, a circuit current (FIG. 4D) is generated, and the voltage at the inverting input terminal of the comparison circuit 12 becomes as shown in FIG. 4E due to the function of this circuit current (D). Inverted input terminal voltage (Fig. 4e)
Is smaller than the reference voltage, the circuit current (Fig. 4 (d)) flows through the open / close switch (first switch) 22, and if it is larger than the reference voltage, the photocoupler (second switch ) is switched as described above with reference to Figs.
H) flowing through the 14 it is for (FIG. 4 two, the circuit current of the head of the waveform is cut in E (d) is to work a is greater than or equal the current of the constant current diode 30 does not flow, this It is not cut when a resistor is used for the current circuit 30. Also, the time difference between dt1 and dt2 is different in Fig. 4 (to) because dt1 is defined by the rising speed of the external signal and dt2 is the charging / discharging means. This is because it is specified by the discharge time constant).

As a result, delays dt ₁ and dt _{2 with} respect to the period t _{0 to} t ₁ during which the input voltage (FIG. 4A) is generated, respectively.
₂ of photocoupler 14 from period t ₂ to t ₃
The secondary collector output terminal voltage (FIG. 4F) becomes L level. It should be noted that dt ₁ and dt ₂ are within a few msec and do not pose any practical problems. And this output (L, H)
Input to the recorder, the DC input can be recorded in synchronism with the signal to be measured.If a piezoelectric buzzer or a light emitting element is connected instead of the recorder, is the signal to be measured output a predetermined level signal? I can know how.

According to the above arrangement, since the active means such as the transistor is not used as the amplifying means, the adjustment is unnecessary. Further, since the time constant does not increase, the responsiveness to changes in the signal voltage under measurement is good. Furthermore, for the purpose of simply knowing whether or not there is an input, a circuit is not particularly required after the photocoupler, so that power consumption can be reduced.

As described above, according to the present invention,
A capacitor for boosting the minimum value of this signal voltage waveform to a value of a predetermined level is provided after the full-wave rectifier, and the signal voltage whose minimum value is boosted by this capacitor is input to one input terminal and the other A comparator to which a threshold voltage whose magnitude does not exceed the boosted voltage level is applied to the input terminal, an open / close switch ( first switch) whose opening and closing is controlled by the output of the comparator, and the first switch.
Equipped with a second switch that opens and closes in relation to the opening and closing of the switch
An identification means for identifying the presence / absence of the input of the signal under measurement is connected to the subsequent stage of the second switch . As a result, it is possible to realize a voltage detection circuit that requires no adjustment, has high responsiveness to changes in the measured voltage, and consumes less power.

[Brief description of drawings]

FIG. 1 is a block configuration diagram showing an example of an embodiment of a voltage detection circuit of the present invention.

FIG. 2 is a block configuration diagram for explaining an operation principle of the present invention.

FIG. 3 is a diagram showing waveforms generated in the circuit of FIG.

FIG. 4 is a diagram showing waveforms generated in the circuit of FIG.

FIG. 5 is a block diagram showing an example of a conventional voltage detection circuit.

6 is a diagram showing waveforms generated in the circuit of FIG.

[Explanation of symbols]

1,2 input terminals 3 Current limiting means 4 Full wave rectifier circuit 5 Surge voltage limiting means 12 comparator 21 Reference voltage source 22 Open / close switch 23 Voltage detection means 24 photo coupler 25 pull-up resistor 27 Voltage limiting means 28 Rectification means 29 charging / discharging means 30 Current limiting means 31 recorder

Claims (4)

(57) [Claims] 1. A current limiting circuit for limiting an input current generated by a signal to be measured, a full-wave rectifier for detecting the input current, and a signal voltage output from the full-wave rectifier for charging and discharging to obtain the signal voltage. A capacitor for boosting the minimum value of the waveform to a predetermined level, and the signal voltage whose minimum value is boosted by this capacitor are input to one input terminal and the other input terminal is boosted. A comparator to which a threshold voltage that does not exceed the voltage level is applied , the first switch whose opening and closing is controlled by the output of this comparator, and the opening and closing of this first switch
This second switch is equipped with a second switch that opens and closes in an associated manner.
Voltage detecting circuit, characterized in that connecting the identification means for identifying the presence or absence of input of the signal to be measured to the subsequent switch. 2. The voltage detecting circuit according to claim 1, wherein the identifying means is audibly identifiable. 3. The voltage detection circuit according to claim 1, wherein the identification means is visually identifiable. 4. A current limiting circuit for limiting an input current generated by a signal under measurement, a full wave rectifier for detecting the signal under measurement, and a signal voltage output from the full wave rectifier for charging and discharging the signal. A capacitor for boosting the minimum value of the voltage waveform to a value of a predetermined level, and the signal voltage whose minimum value is boosted by this capacitor is received at one input terminal, and the other input terminal is boosted by the voltage. A comparator to which a threshold voltage that does not exceed the voltage level is applied , the first switch whose opening and closing is controlled by the output of this comparator, and the opening and closing of this first switch.
A recorder provided with a second switch that opens and closes in succession and is arranged after the second switch, and records a DC signal output from the comparator together with recording the signal under measurement. A voltage detection circuit characterized by the above.