JP3409320B2 - Power circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit suitable for use in supplying power to electronic equipment such as a VTR and a CD player. FIG. 4 shows a basic configuration of a conventional power supply circuit. As shown in FIG. 1, the power supply circuit includes a line filter 1 for removing noise components from a voltage supplied from a commercial AC power supply, a full-wave rectification circuit 2 for full-wave rectification of the output of the line filter 1, and a full-wave rectification circuit. 2 comprises a power factor improving unit 3 for improving the power factor of the output, and an output rectifying and smoothing circuit 4 for rectifying and smoothing the output of the power factor improving unit 3. Next, the operation will be described with reference to the waveform diagram of FIG. Voltage V _i supplied from the commercial AC power source, after the unnecessary noise components are removed by the line filter 1, is full-wave rectified by full-wave rectifying circuit 2. As shown in FIG. 5A, the output of the full-wave rectifier circuit 2 repeats a waveform that gradually increases from 0 to a predetermined peak, and gradually decreases from that peak to the 0 level again. Since this output voltage V _P of the full-wave rectifying circuit 2 is obtained by simply full-wave rectification of the input voltage V _i, the input voltage V _i is small, the output voltage of the full-wave rectifying circuit 2, as shown by curve L V _P also becomes smaller.
When the input voltage V _i conversely increases, increases as shown by the output voltage V _P also curve H of the full-wave rectifying circuit 2. [0004] The power factor improving section 3 switches the voltage V _P, as shown in FIG. 5 (b), to limit the output level
As a result, the power factor is improved and output as voltage V _S. This voltage V _S is rectified and smoothed by the output rectifying and smoothing circuit 4 is output as the output voltage V _0. Incidentally, the output voltage V _P of the full-wave rectifier circuit 2
Changes according to the input voltage V _i , the ripple of the voltage V ₀ output from the output rectifying / smoothing circuit 4 changes. That is, the threshold voltage of the power factor improving unit 3 When V _1, when the voltage V _P is greater than the voltage V _1, the power factor improving section 3 can generate a stable output. However, when the voltage V _P is smaller than the voltage V _1, the power factor improving section 3 can not be performed for proper operation, the output voltage is 5
(B), the smaller than when the voltage V _P is greater than the voltage V _1. This occurs in response to the period of the input voltage V _i, as shown in FIG. 5 (c), will appear as a ripple of the output voltage V ₀ which output rectifier smoothing circuit 4. [0006] As shown in FIG.
When the output voltage V _P of the changes in response to the input voltage V _i, crossing timing change in the reference voltage V _1, it also affects the output voltage V _S of the power factor improving section 3. That is, the voltage V _P
The output voltage V _S of the power factor correction unit 3 decreases as the level of
The range in which the level of is lowered is widened. As a result, FIG.
Ripple level of the output voltage V _P of the full-wave rectification circuit 2 is large as shown in (c) is reduced, a small ripple is large. Namely, when the voltage V _P is smaller than the voltage V _1, due to the lack of ability to control the power factor improving section 3, the output voltage V _S of the power factor improvement part 3 becomes a DC output voltage V ₀ or less, from the input Power will not be transmitted to the output. During the period Tn during which this power is not transmitted, a load current is supplied from an output smoothing capacitor (not shown) included in the output rectifying / smoothing circuit 4, so that the output voltage decreases. Then, the width of the decrease becomes the ripple voltage. Also,
If the load conditions are constant, since the ratio of the decrease in the output voltage is the same, the ripple voltage period Tn, i.e., changes by the effective value V _i of the input voltage. [0008] In the conventional device, switching is performed even during the period Tn which is not related to the transmission of electric power, so that the driving loss of the switching element, the switching loss, and the on-state are reduced. There is a problem that power loss is caused and power is wasted. In addition, since the ripple voltage also changes in accordance with the effective value of the input voltage, not only efficiency is deteriorated, but also
There is a problem that the control range of the DC / DC converter following the subsequent stage must be widened. The present invention has been made in view of such a situation, and is intended to prevent wasteful power consumption. A power supply circuit according to the present invention is provided with a rectifying means for rectifying an AC voltage, a switching means for switching an output voltage of the rectifying means, and a switching voltage from the switching means. Primary coil and 1
A transformer having a secondary coil to which a switching voltage is transmitted via a secondary coil; rectifying and smoothing means for rectifying and smoothing a voltage obtained in the secondary coil of the transformer; Conversion means for converting to a voltage by a resistor connected in series to the coil, multiplication means for multiplying an error voltage which is a difference between an output voltage of the rectifying and smoothing means and a predetermined reference voltage, and an output voltage from the rectification means; ,
The output voltage from the multiplier is compared with the voltage converted by the converter, and the output voltage from the multiplier is sent to the converter.
During the period that is greater than the converted voltage,
Driving switching means so that switch voltage is supplied
Adjusting means for outputting a signal for causing the output voltage of the rectifying means to be held; inputting and holding the output voltage from the holding means and the output voltage from the rectifying means;
The output voltage from the
Output from the rectifier whose peak value fluctuates
Force voltage is always constant regardless of fluctuations in AC voltage
An AGC circuit for correcting output to a signal, output of the AGC circuit
The output signal is compared with a predetermined reference value to determine whether or not the output signal from the adjusting means exists while the output signal is smaller than the reference value.
However, the present invention is characterized in that it comprises a comparing means for stopping the operation of the switching means. In the power supply circuit having the above structure, the switching operation of the switching means is stopped while the output level of the rectifying means is smaller than the reference value . Therefore, the switching operation is prevented from being uselessly performed, and unnecessary power consumption is eliminated. FIG. 1 is a block diagram showing a configuration of an embodiment of a power supply circuit according to the present invention, and portions corresponding to those in FIG. 4 are denoted by the same reference numerals. In this embodiment, the full-wave rectifier circuit 2 is constituted by a diode bridge circuit. The output rectifying / smoothing circuit 4 includes a diode 31 and a capacitor 32. further,
The power factor improving section 3 is configured as follows. That is, the output of the full-wave rectifier circuit 2 is supplied to a capacitor 11 for a high-frequency filter and a primary coil 13a of a transformer 13 connected in parallel to the capacitor 11. The primary coil 13a has N
A PN transistor 14 and a resistor 15a as a current detection unit 15 for detecting a current flowing through the primary coil 13a are connected in series. The output of the secondary coil 13b of the transformer 13 is supplied to the diode 31. The output of the full-wave rectifier circuit 2 is divided by resistors 16a and 16b as an input voltage detector 16, and the voltage is
C circuit 17, peak hold circuit 18, and multiplication circuit 2
2 are provided. The AGC circuit 17 controls the output voltage of the input voltage detection unit 16 according to the output of the peak hold circuit 18 and outputs the output voltage to the comparison circuit 19. The comparison circuit 19 includes: a reference voltage output from the reference voltage generation circuit 20;
The voltage is compared with the voltage input from the AGC circuit 17, and the switch 12 is controlled to be switched according to the comparison result. The output of the comparison circuit 19 drives the reset signal generation circuit 21 to reset the peak hold circuit 18. On the other hand, the capacitor 3 of the output rectifying and smoothing circuit 4
2 is divided by the resistors 23 a and 23 b as the output voltage detection unit 23 and is input to the comparison circuit 25. The comparison circuit 25 compares this voltage with the voltage output by the battery 24 as a reference voltage generation circuit, and outputs the comparison result to the multiplication circuit 22. The multiplication circuit 22 multiplies the output of the input voltage detection unit 16 by the output of the comparison circuit 25 and supplies the result to the comparison circuit 26. The comparison circuit 26 compares the output of the current detection unit 15 with the output of the multiplication circuit 22,
The RS flip-flop 27 is set according to the comparison result. The RS flip-flop 27 includes an oscillation circuit 28
Is reset. Noah circuit 2
9 is the output of the RS flip-flop 27 and the oscillation circuit 28
And outputs it to the switch 12. Next, the operation will be described with reference to the timing charts of FIGS. The full-wave rectifier circuit 2
The input voltage from which unnecessary noise components have been removed by the line filter 1 is full-wave rectified and output. This full-wave rectified voltage (FIG. 2A) is supplied to the primary coil 13a of the transformer 13. When the NPN transistor 14 is on, a current flows through the primary coil 13a of the transformer 13.
This current is converted into a voltage by the resistor 15a and supplied to one input terminal of the comparison circuit 26. When a change current flows through the primary coil 13a of the transformer 13, a voltage is generated in the secondary coil 13b. This voltage is rectified by the diode 31, and is smoothed by the capacitor 32 and output. This output voltage is divided by the resistors 23a and 23b and supplied to one input terminal of the comparison circuit 25. A reference voltage generated by the battery 24 is supplied to the other input terminal of the comparison circuit 25. The comparison circuit 25 calculates the voltage from the resistor 23b and the battery 24.
And outputs the error voltage to the multiplying circuit 22. On the other hand, the output of the full-wave rectifier circuit 2 is a resistor 16a
, 16b and supplied to the other input terminal of the multiplication circuit 22. The multiplying circuit 22 multiplies the voltage input from the resistor 16b by the voltage input from the comparing circuit 25, and supplies the multiplied voltage to the other input terminal of the comparing circuit 26. The comparison circuit 26 compares the voltage A ₁ (FIG. 3A) input from the multiplication circuit 22 with the voltage A ₂ (FIG. 3A) supplied from the resistor 15a. 22
When the output A ₁ of greater than the output A ₂ of the resistor 15a logic 1
And outputs a logical 0 when the value is small (FIG. 3
(B)). The RS flip-flop 27 is
Triggered and set by the falling edge of
The output of the RS flip-flop 27 (FIG. 3D) is inverted by the NOR circuit 29 (FIG. 3E), and the switch 1
2 to one terminal H. Now, assuming that the switch 12 has been switched to the terminal H side, when the RS flip-flop 27 is set, the NPN transistor 1
4 will be turned off. Therefore, the primary coil 13a
No current flows through On the other hand, the oscillation circuit 28 generates a pulse (FIG. 3C) at a predetermined cycle, and the RS flip-flop 27 is reset by the falling edge of the pulse. When the RS flip-flop 27 is reset,
The output (FIG. 3D) is inverted by the NOR circuit 29 (FIG. 3E) and supplied to the terminal H of the switch 12.
Therefore, the NPN transistor 14 turns on. As a result, the current starts to flow through the primary coil 13a of the transformer 13 again. The magnitude of the current flowing through the primary coil 13a is, when not greater than the output A ₁ of the multiplier circuit 22 within a predetermined period, a pulse oscillation circuit 28 is output (Fig. 3
(C) is inverted by the NOR circuit 29 (FIG. 3).
(E)), and supplied to the terminal H of the switch 12. Therefore, this turns off the NPN transistor 14. This ensures that the NPN transistor 14 is turned off at predetermined intervals regardless of the terminal voltage of the resistor 15a. As described above, the PW
Since the M signal is output and the pulse width of the PWM signal is controlled to change in accordance with the output voltage, servo is performed so that the output voltage is always constant. In addition, servo is applied so as to obtain a constant power factor. The above operation is the same as in the conventional case. In this embodiment, the following operation is further performed. That is, the peak hold circuit 18 peak-holds a value obtained by dividing the output of the full-wave rectifier circuit 2 (FIG. 2A) by the resistors 16a and 16b. That is, the full-wave rectifier circuit 2
When the level is high, the output voltage changes as shown by a curve H in FIG. 2A, and when the level is low, the output voltage changes as shown by a curve L. In response to this change, the peak hold circuit 18 performs a peak hold as shown by a curve H in FIG. 2B when the output voltage of the full-wave rectifier circuit 2 is large, and a curve L in FIG. Perform peak hold as shown by. The hold output of the peak hold circuit 18 is supplied to the AGC circuit 17 as a control voltage. As a result, the AGC circuit 17 controls the voltage supplied from the input voltage detector 16 in accordance with the control voltage and outputs it.
As a result, the output of the AGC circuit 17 is controlled to be always constant with respect to the fluctuation of the AC voltage , as shown in FIG. That is, as shown by a curve H in FIG.
Input voltage even when a large listening, and as indicated by the curve L, even when small again, a peak of the signal output from the AGC circuit 17 becomes the same value. The comparison circuit 19 compares the signal input from the AGC circuit 17 with the reference voltage V ₂ output from the reference voltage generation circuit 20, and outputs a logic H when the output of the AGC circuit 17 is higher than the reference voltage V _2. When it is smaller, a logic L is output. When the output of the comparison circuit 19 is inverted from logic L to H, the reset signal generation circuit 21 outputs a reset signal (FIG. 2).
(E)) occurs, and the peak hold circuit 18 is reset. It is repeated the above operation, the output of the comparator circuit 19 repeats the operation to output the logical H when the logic L, large when the output of the AGC circuit 17 is less than the reference voltage V _2. When the output of the comparison circuit 19 becomes logic H, the switch 12 is switched to the terminal H side. At this time, the PWM signal output from the NOR circuit 29 (FIG. 2)
(F)) is input to the base of the NPN transistor 14, and the NPN transistor 14 performs the switching operation as described above. On the other hand, when the comparison circuit 19 outputs a logic L, the switch 12 is switched to the grounded terminal L side. As a result, the NPN transistor 14 is turned off (FIG. 2F). That is, when the voltage output from the AGC circuit 17 (FIG. 2 (c)) is less than the reference voltage V _2, so that the switching operation of the NPN transistor 14 is stopped. As described above, in the output reference voltage V ₂ is less than the period of the AGC circuit 17 can not perform a sufficient power factor correction. Therefore, by stopping the switching operation of the NPN transistor 14 itself as a switching element, a drive loss, a switching loss, and an on-loss of the switching element are prevented from occurring, and unnecessary power is not consumed. Further, voltage output from the AGC circuit 17 as described above, the <br/> regardless constant contracture in voltage of the full-wave rectifying circuit 2 outputs. As a result, the period during which the comparison circuit 19 is at logic L is constant. Thereby, the ripple of the output voltage output by the capacitor 32 is constant regardless the output voltage of the full-wave rectifying circuit 2, as shown in FIG. 2 (g).
Therefore, the output voltage of the output rectifying / smoothing circuit 4 is changed to a DC voltage (not shown).
Even when the voltage is supplied to the / DC converter and a predetermined voltage is obtained, the ripple of the supplied voltage is always constant, so that the circuit for removing the ripple is simplified. As described above, according to the power supply circuit of the present invention,
Using the output voltage from the holding means as a correction signal source,
From the rectifier whose peak value fluctuates with the fluctuation of
Output voltage, regardless of the AC voltage fluctuation
Correct the signal to a constant value, and compare the output signal of the AGC circuit with a predetermined
When the output signal is smaller than the reference value,
Switch, regardless of the presence or absence of the output signal from the adjustment means.
Since the operation of the tuning means is stopped, it is possible to prevent the power from being wasted in a period substantially not related to the transmission of the power. Further, by making the period for controlling the switching operation constant as required, it is possible to make the ripple of the output voltage constant.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram showing a configuration of an embodiment of a power supply circuit of the present invention. FIG. 2 is a timing chart for explaining the operation of the embodiment of FIG. 1; FIG. 3 is a timing chart illustrating an operation of a PWM control unit in the embodiment of FIG. FIG. 4 is a block diagram showing a configuration of an example of a conventional power supply circuit. FIG. 5 is a timing chart for explaining the operation of the example of FIG. 4; [Description of Signs] 1 Line filter 2 Full-wave rectifier circuit (rectifier) 3 Power factor improving unit 4 Output rectifying and smoothing circuit 12 Switch 13 Transformer 14 NPN transistor (switching unit) 15 Current detector 16 Input voltage detector 17 AGC circuit Reference Signs List 19 comparison circuit (comparing means) 20 reference voltage generation circuit 21 reset signal generation circuit 22 multiplication circuit 23 output voltage detection unit 24 batteries 25, 26 comparison circuit 27 RS flip-flop 28 oscillation circuit

Claims (1)

(57) [Claim 1] Rectifying means for rectifying an AC voltage, switching means for switching an output voltage of the rectifying means, and a primary coil to which a switching voltage from the switching means is supplied. A transformer having a secondary coil to which the switching voltage is transmitted via the primary coil; rectifying and smoothing means for rectifying and smoothing a voltage obtained in a secondary coil of the transformer; and a primary coil of the transformer. A converting means for converting a current flowing through the rectifier into a voltage by a resistor connected in series to the primary coil; an error voltage which is a difference between an output voltage of the rectifying / smoothing means and a predetermined reference voltage; compares the multiplying means for multiplying an output voltage, and the voltage converted by the output voltage and the converter means from said multiplying means, or the multiplication means Output current of
The pressure is greater than the voltage converted by the conversion means
Meanwhile, the switch voltage is supplied to the primary coil.
Signal for driving the switching means as described above.
And adjusting means for outputting a holding means for holding a peak of an output voltage of said rectifying means, an output voltage from said holding means, output from said rectifying means
Input voltage and correct the output voltage from the holding means.
As a signal source, the peak value changes in conjunction with AC voltage fluctuations.
The output voltage from the operating rectifying means has a peak value.
Corrects and outputs a constant signal regardless of the AC voltage fluctuation
That the AGC circuit compares the output signal with a predetermined reference value of the AGC circuit, the output signal is smaller duration than the reference value, the
A power supply circuit , comprising: comparison means for stopping the operation of the switching means regardless of the presence or absence of an output signal from the adjustment means .