JP3408961B2 - Power converter - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power conversion device such as an inverter for converting a DC voltage into an AC voltage, and more particularly to a control technique thereof.

[0002]

2. Description of the Related Art FIG. 15 shows, for example, Japanese Patent Publication No. 7-44841.
It is a block diagram which shows the structure of the conventional power converter device shown by the publication. In the figure, 1 is an inverter as a power converter, 2 is a battery of a DC voltage V _D which is a DC input of the inverter 1, and 3 and 4 are AC filters for converting a rectangular wave output voltage from the inverter 1 into a sine wave voltage. The reactor, the capacitor, and 5 are loads.

Reference numeral 6 is a current detector for detecting the output current I _A of the inverter 1, 7 is a voltage detector for detecting the output voltage V _C of the inverter 1, and 8 is a current command value I _A ref and output current I _A.
A current control circuit for generating a voltage command value V based on _A and the output voltage V _C, and 9 an inverter 1 by pulse width modulation (PWM) based on the voltage command value V from the current control circuit 8.
2 is a pulse width modulation circuit for generating a switching command signal P to the.

FIG. 16 is a block diagram showing the internal structure of the pulse width modulation circuit 9. In the figure, 10 is a carrier wave generation circuit for generating a carrier wave C having a triangular waveform, for example, 11 is a voltage command value V from the current control circuit 8 and a carrier wave C from the carrier wave generation circuit 10 and outputs a switching command signal P. It is a comparison circuit to do.

Next, the operation of this conventional example will be described. The output current I _A of the inverter 1 detected by the current detector 6, the output voltage V _C of the inverter 1 detected by the voltage detector 7, and the inverter output current command value I _A ref are input to the current control circuit 8, and The current control circuit 8 generates the output voltage command value V of the inverter 1. This voltage command value V is input to the pulse width modulation circuit 9, and this voltage command value V and the carrier wave C output from the carrier wave generation circuit 10 are compared.
The switching command signal P of the inverter 1 is generated by making a comparison with 1. Then, based on the switching command signal P, the inverter 1 operates, and a sinusoidal AC output voltage V _C is obtained via the AC filter including the reactor 3 and the capacitor 4.

For example, when the current command value I _A ref rises, the voltage command value V tends to rise due to the deviation from the output current I _A, and the switching command signal P obtained from the comparison result with the carrier C switches the inverter 1. The device operates in the direction in which the energization pulse width of the element increases and the output voltage V _C increases, and the output current I _A increases.

[0007]

The conventional power converter is constructed as described above, and the peak value of the voltage command value V changes within the range of the peak value of the carrier wave C or less in a normal normal operation state. The pulse width modulation operation according to the change of the voltage command value V is possible. However, an abnormal phenomenon such as a steep and large fluctuation of the load 5 occurs, and when the voltage command value V abnormally increases and exceeds the peak value of the carrier C for a short time, the following problems occur. .

That is, even if the voltage command value V exceeds the peak value of the carrier wave C, the inverter 1 does not have the ability to output the voltage according to the voltage command value V. Inevitably, a voltage having a value deviating from the voltage command value V is output. In this case, how the output voltage of the inverter 1 deviates from the voltage command value V affects, for example, in which of the three phases the abnormal state caused is the factor. It is conceivable and will be a different phenomenon in each case. Therefore, generally, in the above-mentioned abnormal state, a phase difference also occurs between the output voltage of the inverter 1 and the voltage command value V, and thereafter, even if the voltage command value V is a value within the range of the magnitude of the carrier wave C. There was a problem in that the phenomenon in which the control operation became unstable was unavoidable even after recovery to the above condition.

The present invention has been made to solve the above-mentioned problems, and an object thereof is to realize a power conversion device in which the output voltage can always follow the voltage command value and stable control characteristics can be obtained. And

[0010]

A power converter according to a first aspect of the present invention is a current control circuit for generating a voltage command value of the power converter based on a deviation input between a current command value and an output value of the power converter. And a power conversion device including a pulse width modulation circuit that generates a switching command signal to the power converter by pulse width modulation based on the voltage command value,
A voltage command value limiting means that is inserted between the current control circuit and the pulse width modulation circuit, performs predetermined limiting processing according to the value of the voltage command value from the current control circuit, and sends out to the pulse width modulation circuit. , The voltage command value limiting means
Voltage command value sent from the flow control circuit to the pulse width modulation circuit
When the limiting process is performed, the deviation input in the current control circuit
The integral value of force is re-set based on the voltage command
And an integrated value recalculating means for calculating .

The power converter according to a second aspect of the present invention is the power converter according to the first aspect, wherein when the input voltage of the power converter is fluctuated and controlled, the limit value set as a reference for limiting the voltage command value is set as above. It is adapted to be changed according to the input voltage.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. 1 is a block diagram showing a configuration of a power conversion device according to a first embodiment of the present invention. In the figure, 1 is an inverter as a power converter formed by connecting switching elements such as transistors in a bridge connection, 2 is a battery having a DC output voltage of ± V _D with respect to a neutral point, and 3 and 4 are from the inverter 1. The reactor (output inductance L _S ) and the capacitor 5 forming the AC filter for shaping the rectangular wave output voltage of No. 2 into a sine wave voltage are loads.

Reference numeral 6 denotes a three-phase output current I _AU of the inverter 1,
A current detector that detects I _AV and I _AW , 7 is a voltage detector that detects the three-phase output voltages V _CU , V _CV , and V _CW of the inverter 1, and 8 is based on the current command value and the output current and output voltage. A current control circuit that generates a voltage command value.
Control is performed with the two-phase component of the q-axis. Therefore, the inverter 1
Three-phase output currents _{I AU,} I _AV, currents of two phases _{I AW I A d, I A} q 3 -phase two-phase conversion circuit for converting the 12, the output voltage _V CU of the three-phase inverter _{1, V CV} , V _CW into two-phase voltages V _C d and V _C q.

I _A dref and I _A qref are the d-axis of the current command value,
It is the q-axis component. 14 2-phase voltage command value Vd of the current control circuit 8, the voltage command value _V U of 3 phases _Vq, V V, _{V W}
A two-phase / three-phase conversion circuit for converting into a pulse width modulation circuit 9 for generating a switching command signal P for the inverter 1 by pulse width modulation (PWM) based on a voltage command value.
Then, 15 is inserted between the two-phase / three-phase conversion circuit 14 and the pulse width modulation circuit 9, and 2 generated by the current control circuit 8 is generated.
Voltage command values V _U , V _V , V _W from the three-phase conversion circuit 14
Is a voltage command value limitation processing circuit which performs a predetermined limitation process on the pulse width modulation circuit 9 and sends it to the pulse width modulation circuit 9. Details of its function and operation will be described later.

FIG. 2 shows an example of the internal configuration of the current control circuit 8, which performs integral proportional control (IP control) on the d and q axes, which is introduced in, for example, Japanese Patent Publication No. 7-46917. The outline of the operation is as follows. That is, the current command value _{I A} dref, _{I A} qref and the output current _{I A} d, _{I A} deviation counts and q _{(K I)} multiplied by the integral (1 / s) the value output current _{I A} d , I _A q multiplied by a count (K _P ), ωL _S
(L _S output inductance) d which calculates the non-interacting component section of the q-axis, and the output voltage V _C d, the voltage command value Vd by adding the feed forward term of V C _q, and generates output Vq.

FIG. 3 is a program flow chart for explaining the operation of the voltage command value limit processing circuit 15, and this program is a constant sampling digital control program.

Next, the operation of FIG. 1 will be described. The output current I _AU of the inverter 1 detected by the current detector 6,
I _AV, current obtained by converting the _{I AW} with 3-phase two-phase conversion circuit _{12 I A d, I A q} , the output voltage _V CU inverter 1 detected by the voltage detector _{7, V CV,} V _CW Are inputted to the current control circuit 8 by inputting the voltages V _C d, V _C q and the inverter output current command values I _A dref, I _A qref obtained by the conversion of the three-phase two-phase conversion circuit 13. At 8, the output voltage commands Vd and Vq of the inverter 1 are generated. The output voltage command value Vd, converts Vq 2-phase three-phase conversion circuit 14 in the three-phase voltage command value _{V U, V V,} the _{V W,} the voltage _{V U, V V,}
V _W is input to the voltage command value limit processing circuit 15.

In the voltage command value limit processing circuit 15, the voltage command values V _U , V _V , and V _W are within the peak value of the carrier wave C of the pulse width modulation circuit 9 or less based on the program flow chart shown in FIG. Restriction processing is performed so that The voltage command value limited by the voltage command value limiting processing circuit 15 is input to the pulse width modulation circuit 9, a switching command signal P for the inverter 1 is generated, and the inverter 1 operates based on this switching command signal P. The processing contents of each STEP of the program flowchart shown in FIG. 3 will be described below.

In FIG. 3, first, in STEP 10, the absolute value V _U abs = | V of each of the voltage command values V _U , V _V , and V _W.
U |, V _V abs = | V _V |, V _W abs = | V _W | are calculated. Next, in STEP 11, the maximum value Vmax = max among the absolute values V _U abs, V _V abs, and V _W abs obtained in STEP 10.
(V _U abs, V _V abs, V _W abs) is calculated.

Next, in STEP 12, it is determined whether or not the maximum value Vmax obtained in STEP 11 exceeds the limit value Vlimit set according to the peak value of the carrier wave C. Here, the limit value Vlimit is 0.95 of the peak value of the carrier wave C.
Set to about 1.0 times.

At STEP 12, the maximum value Vmax is the limit value Vl.
If it exceeds imit (Y in STEP12), STEP13
Then, the voltage command values V _U , V _V , and V _W are limited based on the following equation.

V _U = V _U · (Vlimit / Vmax) V _V = V _V · (Vlimit / Vmax) V _W = V _W · (Vlimit / Vmax)

When the maximum value Vmax does not exceed the limit value Vlimit (N in STEP 12), the voltage command value V _U ,
V _V and V _W remain unchanged, and no restriction processing is performed (step 14).

As described above, even if the voltage command value generated by the current control circuit 8 exceeds the limit value, the voltage command value is limited within the peak value of the carrier wave and sent to the pulse width modulation circuit 9. Therefore, in the pulse width modulation circuit 9, it is possible to control the output voltage of the inverter 1 to match the voltage command value, the phase difference between the voltage command value and the output voltage is eliminated, and stable control operation is obtained. To be Further, in the voltage command value limiting process, since the method of multiplying each phase of the three phases by the same coefficient is adopted, the limiting process itself does not cause the interphase imbalance of the voltage command value.

Embodiment 2. FIG. 4 is a program flowchart for explaining the operation of voltage command value limit processing circuit 15 in the second embodiment of the present invention. This is to simplify the arithmetic processing as compared with the case of the first embodiment shown in FIG. In FIG. 4, first, in STEP 20, the voltage command value V _{U is set} to the carrier wave C.
The limiting process is performed so that the value is within the limit value ± Vlimit set corresponding to the + side peak value and the − side peak value of. Specifically, for example, the instantaneous value of the voltage command value V _U is + Vlimit
When it exceeds the value of, it is limited to the value of the limit value + Vlimit. Exactly the same limiting process is performed for the voltage command values V _V and V _W.
(Steps 21 and 22).

In this case, as compared with the one shown in FIG. 3, the contents of the arithmetic processing are greatly simplified and the arithmetic processing time is shortened. However, since the necessary restriction processing is performed for each phase individually, imbalance between phases may occur.

Embodiment 3. In the above embodiment, the DC voltage of the battery 2, which is the input voltage of the inverter 1, is not changed, but in FIG. 5, the charge / discharge controller 16 is added to change the DC voltage of the battery 2. This is because by varying the DC voltage of the battery 2, the output control capability of the inverter 1 is complemented and the control output range is expanded.
As a result of expanding the output range, it is necessary to change the limit value of the voltage command value accordingly.

Therefore, the DC voltage take-in section 17 is provided to perform the processing of the program flow chart shown in FIG. That is, in FIG. 6, the DC voltage V _D of the battery 2 is read by the DC voltage take-in unit 17 in STEP 30. Then, in STEP 31, the limit value Vlimit of the voltage command value is calculated based on the DC voltage V _D of the battery 2 read in STEP 30. Here, the limit value Vlimit =
As the DC voltage V _D , the limit value Vlimit is made to follow the DC voltage V _D as it is.

As described above, in the third embodiment, the limit value Vlimi, which is the reference for limiting the voltage command value, is applied.
Since the value of t is made to fluctuate according to the DC voltage V _D of the battery 2 to be fluctuated, even if the output range of the inverter 1 is changed due to the fluctuation of the DC voltage V _D , the above-mentioned DC As in the case where the voltage V _D is not controlled to change,
The output voltage of the inverter 1 can be controlled to match the voltage command value, and stable control operation can be obtained.

Fourth Embodiment In each of the above embodiments, the limiting process is performed on the voltage command values V _U , V _V , and V _W between the current control circuit 8 and the pulse width modulation circuit 9, which are converted into the three-phase components. Although the configuration is adopted, the fourth embodiment performs the limiting process on the voltage command values Vd and Vq of the two-phase component output from the current control circuit 8.

FIG. 7 is a block diagram showing the structure of the power conversion device according to the fourth embodiment of the present invention. In the figure, reference numeral 18 is a voltage command value limit processing circuit inserted between the current control circuit 8 and the two-phase / three-phase conversion circuit 14. FIG. 8 is a program flowchart for explaining the operation of the voltage command value limit processing circuit 18. This program is also a constant sampling digital control program.

FIG. 9 is a diagram showing d and q axis voltage vectors in the three-phase inverter. That is, in general, the three-phase inverter can take a voltage vector within the range of a regular hexagon shown in the figure depending on the on / off mode of each switching element. Here, one side of the regular hexagon is 2 · √2 / √3 times the DC voltage V _D of the battery 2 shown in FIG. 7. V in FIG.
_R corresponds to the radius of the inscribed circle of the regular hexagon. The voltage command value limit processing circuit 18 determines the voltage command values Vd and Vq for the d and q axes.
Is limited to within V _R (V _R = √2 · V _D ), and its operation will be described below with reference to the flowchart of FIG.

First, in STEP 40, the voltage command values Vd and Vq are set.
The sum of squared squares of √ (Vd ² + Vq ² ) is calculated. next,
In STEP 41, if the sum of squared √ (Vd ² + Vq ²⁾ exceeds the limit value _{V R} (Y in STEP 41) is, STEP
In step 42, the voltage command values Vd and Vq are limited based on the following equation.

[0034] _{Vd = Vd · (V R /} √ (Vd 2 + Vq 2)) Vq = Vq · (V R / √ (Vd 2 + Vq 2))

[0035] When the sum of squared √ (Vd ² + Vq ²⁾ does not exceed the limit value _{V R} (N in STEP 41), the voltage command values Vd, Vq is limiting process is not performed as it (ST
EP43).

As described above, the voltage command value limit processing circuit 1
In No. 8, since the limiting process is performed in the two phases of the d and q axes, the configuration is simplified and the arithmetic process is simple and quick as compared with the voltage command value limiting processing circuit 15 performed in the U, V, and W3 phases. There is an advantage to be.

Embodiment 5. FIG. 10 is a program flow chart for explaining the operation of voltage command value limit processing circuit 18 in the fifth embodiment of the present invention. This is to simplify the arithmetic processing as compared with the one shown in FIG. 8 of the fourth embodiment. Figure 11
FIG. 6 is a diagram illustrating limit values Vdlim and Vqlim adopted here. That is, here, the limiting process is performed within the range of the square inscribed in the regular hexagon described in FIG. However, the limit value is expressed by the following formula.

Vdlim = Vqlim = 2 · (√2 / (1 + √3)) · V _D

Next, the operation of the limiting process of the voltage command value limiting processing circuit 18 will be described with reference to FIG. In FIG. 10, first, in STEP 50, the voltage command value Vd is set to the limit value ± Vd.
Limit processing is performed so that the value is within lim. Next, STE
In P51, the voltage command value Vq is limited so that the voltage command value Vq becomes a value within the limit value ± Vqlim.

In this case, as compared with the one shown in FIG. 8, the contents of the arithmetic processing are greatly simplified and the arithmetic processing time is shortened. However, since the required limiting process is performed for each axis individually, the amount of limiting process may differ for the d and q axes.

Sixth Embodiment 12 is a block diagram showing the configuration of a power conversion device according to Embodiment 6 of the present invention. The difference from the circuit of FIG. 7 in the previous fourth embodiment is that the voltage command value limit processing circuit 1
When the limiting process of the voltage command values Vd and Vq is performed in 8, the feedback is fed back to the current control circuit to improve the responsiveness of the current control operation based on the limiting process. That is, in the circuit shown in FIG. 7, the voltage command value V
Even if d and Vq exceed the limit value and the voltage command value limit processing circuit 18 performs the limit process, the voltage command values Vd and Vq, which are the outputs, are further increased in the current control circuit 8 due to the influence of the integral element. However, there is a possibility that the limiting processing operation will continue unnecessarily. The current control circuit 19 of FIG. 12 eliminates this problem.

FIG. 13 is a block diagram showing the internal structure of the current control circuit 19. In the figure, what is largely different from FIG. 2 above is the part of the integral proportional control section 20,
Hereinafter, this part will be mainly described. Reference numeral 21 is a multiplier K _I counter, 22 is an adder, and 23 is a voltage command value limiting processing circuit 1.
A selection circuit that receives a signal indicating whether or not there is a limiting process from 8 and connects the contact o and the contact a if there is no limiting process, and connects the contact o and the contact b if there is a limiting process, 24 is 1 Sampling dead time element, 25 is multiplier V _R / √ (Vd ²
+ Vq ² ) counter.

FIG. 14 shows the current control circuit 1 focusing on the feedback of the voltage command value limitation processing circuit 18 regarding the presence / absence of the limitation processing.
9 is a program flow chart for explaining the operation of No. 9, which is also a constant sampling digital control program. Hereinafter, description will be made with reference to FIG.

In the original operation, since the voltage command value limiting processing circuit 18 does not perform the limiting process, it is assumed here that the selecting circuit 23 selects the contact a first. In this case, the output from the counter 21 is added to the output one sampling before and output, and the integral operation is executed. That is, in STEP 60 of FIG. 14, the integral control of the output current is performed by the calculation shown in the following equation. In _{I A dintg = (I A dref} -I A d) · K I + I A dintg I A qintg = (I A qref-I A q) · K I + I A qintg Here, _{K I} is an integral gain.

Next, in STEP 61, the calculation shown in the following equation is performed. In _{Vdtmp = V C d-K P} · I A d-ω · L S · I A q Vqtmp = V C q-K P · I A q + ω · L S · I A d where, _{K P} is a proportional gain, omega _{· L S · I A q,} ω · L
_S · _{I A} d is d, a non-interfering component section of the q-axis.

At STEP 62, the voltage command value is obtained by the following equation. _{Vd = I A dintg + Vdtmp Vq} = I A qintg + Vqtmp Therefore, the operation up to this is similar to the circuit of the previous Figure 2.

Next, in STEP 63, the voltage command values Vd, Vq
Limit processing for. The contents are the same as those in the flowchart of FIG. 8 described above. Here, if there is no limit processing (N in STEP 64), the obtained voltage command value V is not fed back to the current control circuit 19 at all.
d and Vq are converted into a three-phase voltage command value V _U by the two-phase / three-phase conversion circuit 14,
The inverter 1 is controlled by the switching command signal P generated here by converting it into V _V , V _W and sending it to the pulse width modulation circuit 9.

When the voltage command value limiting processing circuit 18 performs the limiting process (Y in STEP 64), the process proceeds to STEP 65 to recalculate the integral value of the integral control. In the circuit of FIG. 13, as a result of the selection circuit 23 switching from the contact a to the contact b, the integrated value is replaced with the value of the following formula. _{I A dintg = Vd · (V} R / √ (Vd 2 + Vq 2)) - Vdtmp I A qintg = Vq · (V R / √ (Vd 2 + Vq 2)) - Vqtmp

By the above feedback operation, the current control circuit is prevented from overshooting the integral amount, and the control operation for making the voltage command value and the output voltage coincide with each other is made more reliable. Note that the examples of FIGS. 12 to 14 show the case where the limiting process is performed on the voltage command values Vd and Vq of the d and q axes.
In the case where the limiting process is performed on the three-phase voltage command values V _U , V _V , and V _W described with reference to FIG. 1 and the like, the same control as in the cases of FIGS. It goes without saying that the same effect can be obtained by feeding back to the circuit.

In each of the above embodiments, the current control circuit is of the d- and q-axis two-phase control system, but the present invention is not limited to this, and other control systems such as a three-phase system are adopted. May be. Although the power converter has been described as a three-phase inverter, the present invention is not limited to this, and the present invention can be applied to a single-phase inverter and other power converters and has the same effect.

[0051]

As described above, the power converter according to claim 1 is a current control circuit for generating a voltage command value for the power converter based on a deviation input between the current command value and the output value of the power converter. , And a power converter including a pulse width modulation circuit that generates a switching command signal to the power converter by pulse width modulation based on the voltage command value,
A voltage command value limiting means that is inserted between the current control circuit and the pulse width modulation circuit, performs predetermined limiting processing according to the value of the voltage command value from the current control circuit, and sends the voltage command value limiting means to the pulse width modulation circuit. Since it is provided, the output voltage can always follow the voltage command value, and stable control characteristics can be obtained. Well
In addition, by the voltage command value limiting means, from the current control circuit
Limiting the voltage command value sent to the pulse width modulation circuit
At this time, the integrated value of the deviation input in the current control circuit is
Recalculate based on the voltage command value that has been limited
The current control circuit
Is prevented from overshooting and the voltage command value and
The control operation to match the output voltage is made more reliable.
It

In the power converter according to the second aspect of the present invention, when the input voltage of the power converter is fluctuated and controlled, the limit value set as a reference for limiting the voltage command value is set according to the input voltage. Since it is made to fluctuate, even if the output range of the power converter changes due to the fluctuation of the input voltage,
It is always possible to control the output voltage to match the voltage command value, and a stable control operation can be obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a power conversion device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing an internal configuration of a current control circuit 8 of FIG.

3 is a program flow chart for explaining the operation of the voltage command value limitation processing circuit 15 of FIG.

FIG. 4 is a program for explaining the operation of voltage command value limitation processing circuit 15 in the second embodiment of the present invention.
It is a flowchart.

FIG. 5 is a block diagram showing a configuration of a power conversion device according to a third embodiment of the present invention.

FIG. 6 is a program flow chart for explaining the operation of the DC voltage take-in unit 17 of FIG.

FIG. 7 is a block diagram showing a configuration of a power conversion device according to a fourth embodiment of the present invention.

8 is a program flow chart for explaining the operation of the voltage command value limitation processing circuit 18 of FIG. 7. FIG.

9 is a diagram for explaining a limit value of a voltage command value in the voltage command value limit processing circuit 18 of FIG.

FIG. 10 is a program flowchart for explaining the operation of voltage command value limit processing circuit 18 in the fifth embodiment of the present invention.

FIG. 11 is a diagram for explaining a limit value of the voltage command value in FIG.

FIG. 12 is a block diagram showing a configuration of a power conversion device according to a sixth embodiment of the present invention.

13 is a block diagram showing an internal configuration of a current control circuit 19 of FIG.

14 is a program flowchart for explaining the operation of the current control circuit 19 of FIG.

FIG. 15 is a block diagram showing a configuration of a conventional power conversion device.

16 is a block diagram showing an internal configuration of the pulse width modulation circuit 9 of FIG.

[Explanation of symbols]

1 inverter, 2 battery, 6 current detector, 7
Voltage detector, 8, 19 Current control circuit, 9 Pulse width modulation circuit, 10 Carrier wave generation circuit, 11 Comparison circuit, 1
2, 13 3-phase 2-phase conversion circuit, 14 2-phase 3-phase conversion circuit, 15, 18 Voltage command value limit processing circuit, 16 Charge / discharge controller, 17 DC voltage intake section, 20 Integral proportional control section, 23 Selection circuit , I _A dref, I _A qref current command value, I _AU , I _AV , I _AW , I _A d, I _A q output current, V _CU , V _CV , V _CW , V _C d, V _C q output voltage, V _U , V _V , V _W , Vd, Vq voltage command value, P
Switching command signal, C carrier wave.

Claims (2)

(57) [Claims] 1. A deviation between a current command value and an output value of a power converter.
Generate the voltage command value of the power converter based on the difference input
Pulse based on current control circuit and above voltage command value
Switching command signal to the power converter by width modulation
In a power conversion device equipped with a pulse width modulation circuit that generates
There are, of insertion between the current control circuit and a pulse width modulation circuit
Depending on the value of the voltage command value from the current control circuit.
The signal to be sent to the above pulse width modulation circuit after being subjected to a certain limit process.
The pressure command value limiting means and the voltage command value limiting means
Voltage command value sent from the flow control circuit to the pulse width modulation circuit
When the limiting process is performed, the deviation input in the current control circuit
The integral value of force is re-set based on the voltage command
And an integrated value recalculating means for calculating.
Power converter. 2. When the input voltage of the power converter is fluctuated and controlled, a limit value set as a reference for limiting the voltage command value is fluctuated according to the input voltage. Item 2. The power conversion device according to item 1 .