JP3408017B2 - Method for manufacturing semiconductor light emitting device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor light emitting device such as a semiconductor laser device or a light emitting diode (LED), and more particularly to a method for measuring the fluorescence lifetime of a light emitting layer during the process.

[0002]

2. Description of the Related Art In recent years, the technology for producing III-V group compound semiconductor devices has been remarkably developed, and its practical application has already progressed in the fields of information processing and communication. These are due to the development of high quality crystal growth technology and microstructure processing technology. In particular, in light-emitting devices such as semiconductor lasers and LEDs, high-quality thin-layer crystal growth processing is indispensable, and at the same time, etching, embedded regrowth, electrode formation, and cleavage for forming the device structure after such crystal growth are performed. Many require complicated processing steps such as mounting.

A conventional method for manufacturing a semiconductor light emitting device will be described below by taking a manufacturing process for a red semiconductor laser device as an example.

2 and 11 are views for explaining a conventional manufacturing process of a red semiconductor laser device, and FIGS. 2A to 2D show sectional structures of the device in main steps. FIG. 11 and FIG. 11 are diagrams showing the flow of processes P1 to P11 in the manufacturing process.

In the figure, reference numeral 101 is a red semiconductor laser device, and a light emitting portion 101a is provided on an n-type GaAs substrate 1 via an n-type GaAs buffer layer 20.
The light emitting portion 101a includes a Ga _0.4 In _0.6 P active layer 22.
The lower n-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P lower cladding layer 21 and the upper p-type (Al _0.7 Ga _0.3 ).
And a sandwich is made structure by _{0 .5} In _0.5 P upper cladding layer 23.

On the upper clad layer 23, GaInP is formed.
Mesa stripe portion 29a through the etch stop layer 24
And n-type GaAs current constriction layers 29 are formed on both sides of the mesa stripe portion 29a so that the height thereof is about the same as that of the mesa stripe portion 29a. Here, the mesa stripe portion 29a is formed on the etch stop layer 24 by p-type (Al _0.7 Ga _0.3 ) _0.5 I.
n _0.5 P clad layer 25, p-type Ga _0.5 In _0.5 P thin layer 2
6 and a p-type GaAs contact layer 27 are sequentially laminated.

A p-type electrode 3 is formed on the surfaces of the contact layer 27 and the current constriction layer 29, while an n-type electrode 2 is formed on the back surface of the n-type GaAs substrate 1. .

Next, the manufacturing method will be described.

Typical examples of semiconductor crystal growth techniques include liquid phase epitaxy, molecular beam epitaxy, and metalorganic chemical vapor deposition. Here, a process including thin-layer crystal growth of a light emitting portion of a semiconductor laser device will be described using a molecular beam epitaxy method.

After performing pretreatment P1 on the n-type GaAs substrate 1 by chemical etching, the substrate 1 is mounted on a substrate holder and introduced into a molecular beam epitaxy apparatus. After heat-cleaning the GaAs substrate 1 in this apparatus, as shown in FIG.
Crystal growth of the semiconductor layer forming the light emitting portion 101a of the semiconductor laser 101 shown in (a) is performed (process P2).

That is, n-type G is formed on the n-type GaAs substrate 1.
The aAs buffer layer 20 is grown, and then n-type (Al
_0.7 Ga _0.3 ) _0.5 In _0.5 P lower cladding layer 21, Ga _0.4
In _0.6 P active layer 22, p-type (Al _0.7 Ga _0.3 ) _0.5 In
_{The 0.5} P upper clad layer 23 is sequentially crystal-grown, and then the GaInP etch stop layer 24 and the p-type (Al _0.7 G
a _0.3 ) _0.5 In _0.5 P cladding layer 25, p-type Ga _0.5 In
_{The 0.5} P thin layer 26 and the p-type GaAs contact layer 27 are sequentially crystal-grown (FIG. 2A).

At this time, it is necessary to pay close attention to the crystal growth conditions so that the luminous efficiency in the active layer is sufficiently high. For example, regarding the growth temperature, the optimum growth condition ±
It must be set to about 10 ° C.

After that, the growth substrate is taken out from the molecular beam epitaxy apparatus, and the device structure forming process is performed.

[0014] In this step, a thin layer 28 such as Al ₂ 0 ₃ on the p-type GaAs contact layer 27 was formed by vacuum deposition, then performing selective etching by photolithography and chemical etching. At this time,
As shown in (b), the semiconductor layer is etched by
The process is performed until the InP etch stop layer 24 is reached, and a mesa stripe portion 29a made of the semiconductor layers 27, 26, 25 and having a width of about 5 μm is formed (process P3).

Then, the growth substrate is introduced into the molecular beam epitaxy apparatus again, and as shown in FIG. 2C, the Al ₂ O ₃ thin layer 28 of the mesa stripe portion 29a is used as a mask to form the mesa stripe portion 29a. The n-type GaAs current confinement layer 29 is selectively grown on both sides of the (process P4).

At this time, polycrystalline G is formed on the upper part of the mesa stripe.
Although the aAs layer 29b grows, this polycrystalline GaAs layer 2
9b is an Al ₂ O ₃ thin layer 2 formed by the subsequent chemical etching.
And 8 (process P5).

Further, the wafer (substrate) is processed from the back surface side to be thinned to about 100 μm, and AuZn and Au are sequentially vacuum-deposited on the mesa stripe portion 29a and the current confinement layer 29, and at the same time, the substrate 1 is formed. Ni and AuGe are sequentially vacuum-deposited on the back surface side, and a heat treatment process is performed.
As shown in (d), a p-type ohmic electrode having an Au / AuZn structure is formed on the front surface side of the substrate, and AuGe / Ni is formed on the rear surface side of the substrate.
An n-type ohmic electrode having a structure is formed (Process P6).

Next, the substrate is cleaved in the direction perpendicular to the mesa stripe portion 29a so that it has a bar shape (process P).
7) A laser resonator having a length of about 800 μm is formed, and a dielectric thin layer for controlling the reflectance is grown on both ends of the cleave by vacuum evaporation (Process P8).

Then, the substrate cleaved in the bar shape is further divided into each mesa stripe and cut into laser chips (process P9). With respect to the laser chip thus cut into chips, the element characteristics such as the oscillation threshold are confirmed by pulse driving, and non-defective products are selected (process P1
0), only non-defective products are mounted on the laser element stem (process P11), and wiring is performed to complete the semiconductor laser element.

[0020]

By the way, the characteristics of the semiconductor laser device manufactured through the above-described steps have a high uniformity in the wafer and a low surface defect, and the yield of non-defective products in the wafer is extremely high. In this case, it is the yield of non-defective products between wafers that determines the reproducibility of characteristics and the overall yield of non-defective products.

However, defects due to the element structure and the like can be managed by inspecting with a microscope or the like during the element forming process, but the formation of the light emitting portion which is the first crystal growth step having the greatest effect on the element characteristics. Poor crystal quality in the process is difficult to inspect with a microscope or the like during the device forming process.

Further, the rate of occurrence of defects in crystal quality has become relatively low due to the development of growth techniques, but in rare cases defects due to deviation of growth conditions or deterioration of purity of growth material occur. There is.

If this occurs, the device yield is greatly affected. It is also a big problem that the occurrence of defects is not revealed until the pulse drive evaluation after chip division. Usually, the time required for crystal growth of the light emitting portion (process P2) in the manufacturing process of the semiconductor laser device is about 5
It takes about 40 hours or more in total from the subsequent stripe forming process (process P3) to chip division (process P9). For this reason, there is a delay in finding defects, and it is not possible to take measures against growth defects, so that defects are likely to occur in a large number of growth wafers.

The present invention has been made in order to solve the above problems, and early finds defects in the growth process of the light emitting portion, which greatly affects the productivity, and improves the yield of non-defective devices. It is an object of the present invention to obtain a method for manufacturing a semiconductor light emitting device that can be manufactured.

[0025]

A method for manufacturing a semiconductor light emitting device according to the present invention is an epitaxial growth on a semiconductor substrate.
A step of forming a light emitting portion including an active layer according to the length;
Photoexcitation of active layer formed on conductive substrate in wafer state
The fluorescence lifetime which is the decay time of the light emitted from the active layer.
Measure and determine if the threshold current density varies above the reference fluorescence lifetime value.
The correlation between the fluorescence lifetime and the threshold current density
And have a fluorescence lifetime of at least this standard fluorescence lifetime value
A process to judge non-defective products by selecting only non-defective products.
And a step of selecting a non-defective product of the substrate on which the epitaxial growth is performed, and then, for a substrate determined to be the non-defective product.
And a step of forming the element structure.

Further, after forming the light emitting portion, prior to the measurement of the fluorescence lifetime, including the step of selectively etching away a portion of the semiconductor layer constituting the surface portion of the light emitting portion,
In the step of measuring the fluorescence lifetime, the excitation light is introduced into the active layer from a portion of the semiconductor layer which is removed by etching.
Further, the excitation light for measuring the fluorescence lifetime has a wavelength that is absorbed by the light emitting layer and not absorbed by the cladding layer.

[0027]

In the present invention, the crystallinity of the light emitting portion epitaxially grown on the semiconductor substrate is evaluated by measuring the fluorescence lifetime which is the decay time of the emitted light from the active layer when the active layer is photoexcited. Since the measurement is performed, it is affected by factors that do not affect the device characteristics such as changes in the measurement layout, dirt on the surface of the material, abnormal surface conditions in layers that do not affect the light emitting layer, and subtle fluctuations in the layer structure. Without this, the crystallinity of the most important light emitting layer can be judged with good reproducibility.

Further, in the crystallinity evaluation method using the fluorescence lifetime measurement, the active layer emission light for crystallinity evaluation can be obtained only by irradiating the active layer of the light emitting portion with excitation light. Immediately after the semiconductor layer forming the light emitting portion is grown on the substrate, it can be carried out in a wafer state, the cause of the substrate defect can be grasped at an early stage, and the reduction in the wafer yield can be minimized. That is, it is possible to early find a defect in the growth process of the light emitting portion, which has a great influence on the productivity, and improve the yield of non-defective devices.

Further, in the present invention, after the formation of the light emitting portion and before the measurement of the fluorescence lifetime, a part of the semiconductor layer constituting the surface portion of the light emitting portion is selectively removed by etching to remove the fluorescent light. In the step of measuring the lifetime, the excitation light is introduced into the active layer from the portion of the semiconductor layer that has been removed by etching, so that it does not significantly affect the complexity of subsequent steps and the reduction in the number of chips that can be obtained due to wafer division or the like. , It is possible to partially remove the absorption layer of the excitation light on the surface side.
The excitation efficiency of the active layer as the light emitting layer can be increased and the measurement accuracy can be dramatically improved with almost no decrease in productivity in the manufacturing process.

[0030]

EXAMPLES Examples of the present invention will be described below.

(Embodiment 1) FIG. 1 is a diagram for explaining a manufacturing method of a red semiconductor laser according to a first embodiment of the present invention, wherein processes P1, P2, P2a,
The flow of P2b and P3 to P11 is shown.

The element structure of the red semiconductor laser manufactured by the manufacturing method of this embodiment is the same as that of the conventional manufacturing method shown in FIG. 2, and the description of the element structure is omitted here.

The manufacturing method will be described below.

First, similarly to the conventional method, the n-type GaAs substrate 1 is subjected to pretreatment P1 by chemical etching, and then the substrate 1 is mounted on a substrate holder and introduced into a molecular beam epitaxy apparatus. In this apparatus, after the GaAs substrate is thermally cleaned, processing including crystal growth of the light emitting portion 101a of the semiconductor laser shown in FIG. 2A is performed.

That is, in the same manner as the conventional method, n-type GaA is formed on an n-type GaAs substrate (wafer) 1 having a diameter of 2 inches.
s buffer layer 20, n-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5
P lower clad layer 21, Ga _0.4 In _0.6 P active layer 22, p
Type _{(Al 0.7 Ga 0.3) 0.5 In} 0 .5 P upper cladding layer 23,
GaInP etch stop layer 24, p-type (Al _0.7 Ga _0
.3 ) _0.5 In _0.5 P cladding layer 25, p-type Ga _0.5 In _0.5
The P thin layer 26 and the p-type GaAs contact layer 27 are sequentially crystal-grown (process 2). Here, the layer thickness of the active layer is 20.
nm.

After that, the growth substrate is taken out from the molecular beam epitaxy apparatus, and the crystallinity evaluation step is performed.

First, an etching process is performed on a grown wafer (substrate) having a diameter of 2 inches by using a photomask,
The p-type GaAs contact layer on the surface is removed by etching within a range of about 2 mm in diameter (process P2a). As the etching solution at this time, sulfuric acid, hydrogen peroxide solution, a mixture of water, a mixture of ammonia water and hydrogen peroxide solution, and the like are suitable.

Next, only the active layer is photoexcited with a pulsed dye laser having a wavelength of 580 nm in the portion where the p-type GaAs layer is removed, and the emission decay time of the active layer emission light generated therefrom is measured (process P2b). . The luminescence measurement device used here is a generally used time-resolved photoluminescence device. When the excitation wavelength is selected to be 580 nm, there is almost no light absorption in other layers on the surface side of the active layer, and the active layer can be excited efficiently. In this case, the emission wavelength of the active layer is 680 nm. Excitation light intensity of about 10 μJ / cm
^{When 2} , the decay time constant of the light emitted from the active layer is dominated by the non-radiative recombination lifetime of carriers in the crystal.

Therefore, in this crystallinity evaluation step, the crystallinity of the light emitting layer formed in the first crystal growth step can be accurately judged. FIG. 3 shows experimental values of the relationship between the emission lifetime of the active layer and the oscillation threshold current density of the device at this time. This is the result of measurement using a semiconductor laser device having stripe electrodes with a width of 100 μm for many wafers. As described above, it was found that the emission lifetime varies from wafer to wafer, which correlates very well with the most basic and practically important oscillation threshold current density of the laser device.

Therefore, in this evaluation step, it is desirable to judge a wafer having a light emission life of at least 4 ns as a non-defective product, and only the wafer judged to be a non-defective product in this way is moved to the subsequent steps to complete the semiconductor. It is possible to suppress variations in the oscillation threshold current density in the laser element. Since the variation of the light emission lifetime as described above is often caused by the deviation of the crystal growth conditions and the deterioration of the purity of the growth material family, the factors causing these device defects are promptly eliminated by the management in this evaluation process. be able to.

After that, the same process P as in the conventional manufacturing method is performed.
Perform 3 to P11.

Briefly, after forming a thin layer 28 such as Al ₂ O ₃ on the p-type GaAs contact layer 27, as shown in FIG. 2B, a width of about 5 μm is obtained by photolithography and chemical etching. The mesa stripe part 29
a is formed (process P3).

A of the mesa stripe portion 29a
As a result of selective growth using the l ₂ 0 ₃ thin layer 28 as a mask, as shown in FIG.
As shown in (c), n-type GaAs current confinement layers 29 are selectively grown on both sides of the mesa stripe portion 29a (process P4). Further, at this time, the polycrystalline GaAs layer 29b grown on the upper portion of the mesa stripe is chemically etched to form Al.
Removed with ₂ 0 ₃ thin layer 28 (process P5).

Further, after the wafer (substrate) is thinned to about 100 μm, Au / AuZ is formed on the mesa stripe portion 29a and the current constriction layer 29 as shown in FIG. 2 (d).
The n-type p-type ohmic electrode is formed on the back side of the substrate by AuGe.
/ Ni structure n-type ohmic electrode is formed (Process P
6).

Next, the substrate is cleaved in a direction perpendicular to the mesa stripe portion 29a so that the substrate has a bar shape (process P).
7) A laser resonator having a length of about 800 μm is formed, and a dielectric thin layer for controlling the reflectance is grown on both ends of the cleave by vacuum evaporation (Process P8).

The substrate cleaved in the bar shape is further divided into mesa stripes and cut into laser chips (process P9). With respect to the laser chips thus cut out, the oscillation threshold is generated by pulse driving. Confirm the element characteristics such as and select good products (Process 10),
Mount only the good product on the stem for laser device (Process 1
1), wiring is performed to complete the semiconductor laser device.

As described above, the light emitting layer in this embodiment can be evaluated only by etching a very small portion of the wafer having a diameter of 2 inches, so that it does not affect the subsequent manufacturing process. Although it is possible to use the intensity of photoluminescence as this evaluation step, it is difficult to maintain reproducibility as a production step. This is because the photoluminescence intensity is very sensitive to the intensity of the excitation light source, the layout of measurement, the surface condition of the sample, and the laminated structure.

On the other hand, in this embodiment, the crystallinity of the light emitting portion 101a epitaxially grown on the semiconductor substrate is evaluated when the active layer 22 is photoexcited.
Since the measurement is performed by measuring the fluorescence lifetime, which is the decay time of the emitted light from, the layout of the measurement is changed, the surface of the sample is dirty, the surface condition is abnormal in the layer that does not affect the light emitting layer, and the layer structure is The crystallinity of the active layer, which is the most important light emitting layer, can be determined with good reproducibility without being influenced by factors such as subtle fluctuations that do not significantly affect the device characteristics.

In the crystallinity evaluation method using the fluorescence lifetime measurement, the active layer emission light for crystallinity evaluation can be obtained only by irradiating the active layer 22 of the light emitting portion with excitation light. Immediately after the semiconductor layer forming the light emitting portion 101a is grown on the semiconductor substrate, it can be carried out in a wafer state, the cause of the substrate defect can be grasped at an early stage, and the reduction in the wafer yield can be minimized. That is, it is possible to early find a defect in the growth process of the light emitting portion, which has a great influence on the productivity, and improve the yield of non-defective devices.

(Embodiment 2) FIG. 4 is a diagram for explaining a manufacturing method of a red semiconductor laser according to a second embodiment of the present invention, wherein processes P1, P2 and P2 in the manufacturing method are performed.
The flow of c, P2d, P3a, P4a, and P6 to P11 is shown. Further, FIG. 5 is a cross-sectional view showing the element structure in the main steps of the method for manufacturing an infrared semiconductor laser of this embodiment.

In the figure, reference numeral 102 denotes a red semiconductor laser device of this embodiment, which has an n-type G on the n-type GaAs substrate 1.
The light emitting unit 102a is provided via the aAs buffer layer 20. The light emitting portion 102a is made of Al _0.1 Ga _0.9 As.
The active layer 31 has a structure in which it is sandwiched between an n-type Al _0.5 Ga _0.5 As lower cladding layer 30 on the lower side thereof and a p-type Al _0.5 Ga _0.5 As upper cladding layer 32 on the upper side thereof.

An n-type GaAs current confinement layer 33 having a stripe groove 33a at the center thereof is formed on the upper cladding layer 32, and the stripe groove 33a is formed on the current confinement layer 33. P-type Al to be embedded
_{A 0.5} Ga _0.5 As clad layer 34 is formed. A p-type GaAs contact layer 35 is formed on the clad layer 34.
The p-type electrode 3 is formed through the substrate, and the n-type electrode 2 is formed on the back surface side of the substrate.

Next, a method of manufacturing a 780 nm band semiconductor laser will be described.

First, the pretreatment P1 of the n-type GaAs substrate 1 is performed, and then the substrate 1 is introduced into the metal-organic vapor phase epitaxy apparatus, and the crystal growth process including the crystal growth of the light emitting portion of the semiconductor laser is performed.

That is, as shown in FIG. 5A, n-type Al _0.5 Ga _0.5 A is formed on an n-type GaAs substrate 1 having a diameter of 2 inches.
s lower clad layer 30, Al _0.1 Ga _0.9 As active layer 31,
p-type Al _0.5 Ga _0.5 As upper cladding layer 32 and n-type Ga
Successively grown an A s current blocking layer 33 (process P
2).

After that, the growth substrate is taken out from the metal-organic vapor phase epitaxy apparatus, and the crystallinity evaluation step is performed.

Etching is performed on the grown wafer having a diameter of 2 inches using a photomask, and the n- type G
The aAs current constriction layer 33 is removed by etching within a diameter range of about 2 mm (process P2c). At this time, when a mixture of sulfuric acid, hydrogen peroxide solution, water or a mixture of ammonia water and hydrogen peroxide solution is used as an etching solution, only a desired layer can be selectively etched.

Next, a pulse dye laser having a wavelength of 580 nm is used to optically excite only the active layer in the portion where the n-type GaAs layer is removed, and the emission decay time of the active layer emission generated therefrom is measured (process P2d). When the excitation wavelength is selected to be 580 nm, there is almost no light absorption in other semiconductor layers on the surface side of the active layer, and the active layer can be excited efficiently. In this case, the emission wavelength of the active layer is 780 nm.

When the intensity of the excitation light is set to about 10 μJ / cm ² , the decay time constant of the light emission of the active layer is dominated by the non-radiative recombination lifetime of carriers in the crystal.

Therefore, in this step, the crystallinity of the light emitting layer formed by the first crystal growth step can be accurately judged. Also in this case, the relationship between the emission lifetime of the active layer and the oscillation threshold current density of the device can be obtained as in the case shown in FIG. In this example, the oscillation threshold current density decreases as the emission lifetime (fluorescence lifetime) increases, and when the emission lifetime becomes 10 ns or more, the oscillation threshold current density has a substantially constant value. Therefore, for the device of this embodiment, it is desirable to move only the wafer having an emission lifetime of 10 ns or more to the subsequent process, and thereby suppress the variation of the oscillation threshold current density in the completed semiconductor laser device. it can.

The variation of the light emission lifetime as described above is often caused by the deviation of the crystal growth conditions and the deterioration of the purity of the growth material. Therefore, by controlling in this step, the factors of these element defects are promptly eliminated. be able to.

Next, as shown in FIG. 5B, the p-type AlGaAs layer 3 is formed by photolithography and chemical etching.
A 5 μm stripe groove 33a reaching 2 is formed (process P3a). Then, as shown in FIG. 5C, a p-type Al _0.5 Ga _0.5 As clad layer 3 was formed by a liquid phase growth apparatus.
4. P-type GaAs contact (cap) layer 35 is grown (process P4a).

Further, the wafer is processed from the back side to about 10
After thinning to 0 μm, vacuum deposition process
As shown in (d), Au / Au is formed on the contact layer 35.
A Zn-type p-type ohmic electrode 3 is formed on the back side of the substrate by Au.
An n-type ohmic electrode 2 having a Ge / Ni structure is formed (process P6).

Next, the substrate is cleaved in the direction perpendicular to the stripe grooves so that it becomes bar-shaped (process P7), and about 250
A μm laser resonator is formed, and a dielectric thin layer for protecting the end faces is grown on both ends of the cleave by vacuum deposition (Process P).
8).

Then, the substrate cleaved in the shape of the bar is further divided into stripe grooves and cut into laser chips (process P9). With respect to the laser chips thus cut, an oscillation threshold value is obtained by pulse driving. Check the device characteristics such as, and select good products (process P10), mount only good products on the laser device stem (process P1).
1), wiring is performed to complete the semiconductor laser device.

The second embodiment having such a structure also has the same effect as that of the first embodiment.

(Embodiment 3) FIG. 6 is a sectional view showing an element structure in a main step of a method of manufacturing a high brightness light emitting diode (LED) according to a third embodiment of the present invention, and FIG. Fluorescence lifetime and L of active layer of light emitting diode according to example
It is a figure which shows the relationship with ED chip brightness. In addition, FIG. 10 collectively shows the processing flow in the LED manufacturing process in which the crystallinity evaluation step is introduced in this embodiment and fourth and fifth embodiments described later.

In general, the structure of a high-brightness LED is roughly classified into three types. Therefore, in this example, the manufacturing method will be described for the first structure among them, that is, the device structure having a GaP current diffusion layer.

In FIG. 6, reference numeral 103 is a high-intensity light emitting diode of this embodiment, and a light emitting portion 103a is provided on the n type GaAs substrate 1 via an n type GaAs buffer layer 20. This light emitting portion 103a is made of non-doped (Al
_0.3 Ga _0.7 ) _0.5 In _0.5 P active layer 41 with n below
Type Al _0.5 In _0.5 P lower clad layer 40 and p above it
Type Al _0.5 In _0.5 P clad layer 42 and a p-type Ga layer on the upper clad layer 42.
The P current diffusion layer 43 is arranged. A p-type electrode 4 is formed on the diffusion layer 43, and an n-type electrode 2 is formed on the back surface side of the substrate 1.

Next, the manufacturing method will be described.

Pretreatment P1 of the n-type GaAs substrate 1 is performed,
The substrate 1 was introduced into a metal-organic vapor phase epitaxy apparatus, and as shown in FIG.
The light emitting layer of the double hetero type LED shown in FIG.

That is, first, after performing pretreatment P1 on the n-type GaAs substrate 1 having a diameter of 2 inches or 3 inches, the n-type GaAs buffer layer 20 is grown on the substrate 1, and then,
n-type Al _0.5 In _0.5 P cladding layer 40, non-doped (A
l _0.3 Ga _0.7 ) _0.5 In _0.5 P active layer 41, p-type Al _0.5
The In _0.5 P clad layer 42 is sequentially crystal-grown (process P
2) Then, the p-type GaP current diffusion layer 43 is further crystal-grown (process P4b).

After that, the growth substrate is taken out of the crystal growth apparatus and the crystallinity evaluation step is performed.

In the device structure of this embodiment described above, GaP
The current diffusion layer is for uniformly injecting current into the active layer so that light emission in the active layer is uniform, and is designed not to absorb light having an emission wavelength of 590 nm.

Here, in order to measure the fluorescence lifetime of the light-emitting layer in the high-brightness LED structure, only the active layer is selectively excited by using a pulsed dye laser beam of 550 nm, and the generated fluorescence decay time is measured. Since the GaP current diffusion layer 43 has an absorption edge of 547 nm and is an indirect transition absorption,
Even if the excitation wavelength is 550 nm, there is almost no light absorption in the current diffusion layer, and the active layer can be excited efficiently. The relationship between the emission lifetime of the active layer and the emission characteristics of the device in this case is as shown in FIG. 7, where the width of the active layer is 0.6 μm and the Al of the active layer is
It is a measurement result when the mixed crystal ratio is 0.3.

As described above, it was found that the light emission life may vary between wafers, and the light emission life greatly affects the light emission characteristics as in the laser device. Therefore, in this evaluation step, it is desirable that only wafers having a fluorescence lifetime of at least 15 ns be transferred to the subsequent steps, and those below that should be lot-out because of poor characteristics. This allows
A light emitting diode having a sufficient light emitting characteristic can be obtained.

Such variations in light emission life are often caused by a deviation in growth conditions, a decrease in the purity of the growth material, or a defect in the growth apparatus. Therefore, these element defects are caused by the management in this crystallinity evaluation step. The factor of can be eliminated immediately.

As described above, only on the wafer that has passed the crystallinity evaluation step, the p-type electrode 4 and the n-type electrode 3 are attached to the front surface side and the back surface side, respectively, as shown in FIG.
6) Enter the LED element process.

In this element formation process, LED chips are formed by wafer scribing process P7 and chip division process P9, and the element characteristics are confirmed by pulse driving of the LED chips to select good products (process P10). Is mounted on a lead frame (process P11a), and resin molding is performed (process P12) to complete the light emitting diode.

Also in this embodiment, by selecting the wafers to be put into the elementizing step in the crystallinity evaluation step by the above-described process, the yield after the elementizing process is improved and the characteristics and quality are improved. Stabilization can be achieved.

(Embodiment 4) FIG. 8 is a diagram for explaining a method of manufacturing a high-brightness LED having an AlGaAs current diffusion layer according to a fourth embodiment of the present invention, and elements in the main steps of the manufacturing method. The cross-sectional structure of is shown.

High brightness light emitting diode 104 of this embodiment
Instead of the p-type GaP current diffusion layer 43 in the high-intensity light-emitting diode 103 of the third embodiment, p-type Al
_0.7 Ga _0.3 As current diffusion layer 44 is used.
P-type (Al _0.5 Ga _0.5 ) _0.5 In _0.5 P protective layer 45 on
Is formed. In addition, in this embodiment, the p-type electrode 4
Are arranged on the protective layer 45 via a p-type GaAs cap layer 46. The other structure is the same as the element structure of the third embodiment.

Next, the manufacturing method will be described.

First, after performing pretreatment P1 on the n-type GaAs substrate 1, the substrate 1 is introduced into a metal-organic chemical vapor deposition apparatus,
A light emitting layer forming the double hetero LED shown in FIG. 8A is grown.

That is, the n-type GaAs buffer layer 20 is grown on the n-type GaAs substrate 1 having a diameter of 2 inches or 3 inches, and then the n-type Al _0.5 In _0.5 P clad layer 40 and the non-doped (Al _0.3 Ga _0.7 ) _{0.5 are formed.} In _0.5 P active layer 41, p
Type Al _0.5 In _0.5 P clad layer 42 is sequentially crystal-grown (process P2), and then p type Al _0.7 Ga _0.3 As
Crystal growth of the current diffusion layer 44 (process P4b) is performed, and crystal growth of the p-type (Al _0.5 Ga _0.5 ) _0.5 In _0.5 P protective layer 45 and the p-type GaAs cap layer 46 is performed.

Then, the p-type GaAs cap layer 46 is formed,
The crystallinity evaluation step is performed after selectively etching the surface of the p-type electrode 4 (process P4c) or partially etching only a part of the wafer surface.

In the crystallinity evaluation step, as in the device structure of the third embodiment, the excitation wavelength for fluorescence lifetime evaluation was 550.
nm is desirable, but the GaAs cap layer 46
Absorbs a wavelength of 550 nm, the light emitting layer is 550 n
In order to reach the excitation wavelength of m, it is necessary to partially etch the GaAs cap layer and then move to the evaluation step. However, if the GaAs cap layer is thin enough to have a thickness of about 500 angstroms, the absorption rate of excitation light will be low, and etching is not necessary. Also in this case, the relationship between the emission lifetime of the active layer and the emission characteristics of the device is as shown in FIG.

The high-brightness LED of this example also showed the same characteristics as the LED of the element structure of the third example, and it was found that the light emission life greatly affected the light emission characteristics.

Therefore, in this evaluation step, it is desirable that at least wafers having a fluorescence lifetime of 15 ns or more are moved to the subsequent steps, and if the wafers have a fluorescence lifetime of 15 ns or more, the wafers having a fluorescence lifetime of 15 ns or less are considered to be defective and are lot out.

Such variations in light emission lifetime are often caused by a shift in growth conditions, a reduction in the purity of the growth material, or a defect in the growth apparatus. Therefore, these element defects are caused by the management in this crystallinity evaluation step. The factor of can be eliminated immediately.

Thereafter, as described above, only the wafer that has passed the crystallinity evaluation step is subjected to an electrode forming process (process P6), and the p-type layer is formed on the cap layer 46 as shown in FIG. 8C. The electrode 4 is formed, and the n-type electrode 2 is formed on the back side of the one substrate.
Are formed and put into the LED element formation process. This LED
In the element forming process of step P7, the same process P7 as in the third embodiment is performed.
A light emitting diode is formed by P10, P11a, and P12.

Also in the present embodiment, the wafers to be put into the elementizing process are selected in the crystallinity evaluation step by the above-described process, so that the yield after the elementizing process is improved and the characteristics and quality are stabilized. Can be realized.

(Embodiment 5) FIG. 9 is a view for explaining a method of manufacturing a high-brightness LED having a current block layer inside according to a fifth embodiment of the present invention, and the main steps in the manufacturing method. 2 shows a cross-sectional structure of the element in FIG.

In the figure, reference numeral 105 denotes a high-intensity light emitting diode of this embodiment, which has an n-type G on the n-type GaAs substrate 1.
The light emitting unit 103a is provided via the aAs buffer layer 20. This light emitting portion 103a is made of non-doped (Al
_0.3 Ga _0.7 ) _0.5 In _0.5 P active layer 41 with n below
Type Al _0.5 In _0.5 P lower clad layer 40 and p above it
Has a structure comprising sandwiched by the type Al _0.5 In _0.5 P cladding layer 42, the central portion on the upper cladding layer 42, n-type _{(Al x Ga 1-x)} 0.5 In 0.5 P (x = 0.5~ 1.
0) The current blocking layer 47 is arranged.

The p-type Al _0.7 Ga _0.3 As current diffusion layer 4 is formed on the current blocking layer 47 and the upper cladding layer 42.
4 is provided on the surface of which is p-type (Al _0.5 Ga _0.5 ).
_{A 0.5} In _0.5 P protective layer 45 is formed.

Further, on the protective layer 45, p-type GaA is formed.
The p-type electrode 4 is arranged via the s cap layer 46, and the n-type electrode 2 is formed on the back surface side of the substrate 1.

Next, the manufacturing method will be described.

First, after performing pretreatment P1 on the n-type GaAs substrate 1, the substrate 1 is introduced into a metal-organic chemical vapor deposition apparatus,
A double hetero type light emitting layer for LED shown in FIG. 9A is grown.

That is, the n-type GaAs buffer layer 20 is crystal-grown on the n-type GaAs substrate 1 having a diameter of 2 inches or 3 inches, and then the n-type Al _0.5 In _0.5 P clad layer 4 is formed.
0, a non-doped (Al _0.3 Ga _0.7 ) _0.5 In _0.5 P active layer 41, and a p-type Al _0.5 In _0.5 P clad layer 42 are sequentially crystal-grown (process P2), followed by n-type (Al _x
The Ga _1-x ) _0.5 In _0.5 P current blocking layer 47 is crystal-grown.

Next, the growth substrate is taken out of the crystal growth apparatus and the crystallinity evaluation step (process P2c) is performed.

In the device structure of this embodiment, since the cap layer in the fourth embodiment is not provided, the pulse dye laser beam of 550 nm can selectively excite only the active layer without the etching step. The relationship between the active layer emission life and the emission characteristics of the device in this case is as shown in FIG.

Unlike the third and fourth embodiments described above, in the device structure of the present embodiment, since no current flows in the portion directly below the electrode 4, the external quantum efficiency is the same as that of the third and fourth embodiments. Although it is about 1.5 times higher than the structure, the correspondence between the fluorescence lifetime and the brightness of the LED is good, and the fluorescence lifetime greatly influences the light emission characteristics as in the case of the elements of the third and fourth embodiments. all right.

As described above, the emission lifetime may vary among the wafers, and like the laser device, only wafers having a fluorescence lifetime of 10 ns or more are moved to the subsequent steps in this evaluation process, and the wafers having a fluorescence lifetime of 10 ns or less are considered to have poor characteristics. Lot out is desirable.

In this embodiment, the light output value for the same emission lifetime value is higher than that of the elements of the third and fourth embodiments, and therefore the same as the elements of the third and fourth embodiments. If you want to obtain a certain level of brightness, the emission lifetime value is 1 as described above.
It is only necessary to determine that the product having a quality of 0 ns or more is a non-defective product. However, in order to obtain a device having higher brightness, it is necessary to raise the determination standard such that the device having a light emission lifetime value of 15 ns or more is determined to be a non-defective product.

[0105] For this variation of the light emission life is often attributed to malfunction of the reduction or growth device purity displacement or growth materials of the growth conditions, these defective elements by the management of this crystalline evaluation process The factor of can be eliminated immediately.

Then, as shown in FIG. 9B, the current blocking layer 47 was selectively etched so as to have the same pattern as the p-type electrode formed in the subsequent step (process P2d).
Later, as shown in FIG. 9 (c), the sequential crystal growth of the p-type Al _0.7 Ga _0.3 As current spreading layer 44, p-type _{(Al 0.5 Ga 0.5) 0.5 In} 0.5 P protective layer 45, p-type GaAs cap layer 46 (Process P4b). The p-type GaAs cap layer 46 may be patterned at this point so that it remains only on the current blocking layer 47 (process P4c).
However, here, the cap layer 46 is patterned after the electrodes are formed.

Next, as shown in FIG. 9D, after the p-type electrode 4 is formed on the cap layer 46 and the n-type electrode 3 is formed on the back surface side of the substrate (process P6), the p-type electrode is formed. The p-type GaAs cap layer 46 is selectively etched so as to have the same pattern as that of No. 3.

Thereafter, in the LED element forming process, the same processes P7 to P10, P11a, and P as in the third embodiment are performed.
A light emitting diode is formed by 12.

As described above, in this embodiment, since the step of evaluating the fluorescence lifetime can be inserted after growing the double hetero emission layer as shown in FIG. However, it is possible to prevent the substrate from having to be subjected to such a re-growth step, and to pass only the substrate having the double hetero layer having good light emission characteristics to the next step without waste. As a result, not only can yield improvement and uniformity of characteristics be achieved, but
The operation rate of the device is improved, which can contribute to productivity improvement and cost reduction.

[0110]

By the present invention as described above, according to the present invention lever, since it is determined the quality of the determination to the wafer crystallinity by the value of non-radiative recombination lifetime with a correlation between the fluorescence lifetime, productivity It is possible to detect defects in the growth process of the light emitting layer, which has a great influence, with good reproducibility, and to detect them early without destroying the shape of the wafer, and it is possible to significantly improve the yield of non-defective devices.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a manufacturing method of a red semiconductor laser according to a first embodiment of the present invention, showing a processing flow in the manufacturing method.

FIG. 2 is a cross-sectional view showing an element structure in main steps of the method for manufacturing a red semiconductor laser according to the first embodiment and the conventional technique.

FIG. 3 is a diagram showing a relationship between an active layer fluorescence lifetime and an oscillation threshold current density of a red semiconductor laser manufactured by the manufacturing method of the first embodiment.

FIG. 4 is a view for explaining the manufacturing method of the red semiconductor laser according to the second embodiment of the present invention, showing the flow of processing in the manufacturing method.

FIG. 5 is a sectional view showing an element structure in a main step of a method for manufacturing an infrared semiconductor laser according to a second embodiment of the present invention.

FIG. 6 is a sectional view showing an element structure in a main process of a method for manufacturing a light emitting diode according to a third embodiment of the present invention.

FIG. 7 is a graph showing the relationship between the active layer fluorescence lifetime and the LED chip brightness of the light emitting diode according to the third embodiment.

FIG. 8 is a sectional view showing an element structure in a main process of a method for manufacturing a light emitting diode according to a fourth embodiment of the present invention.

FIG. 9 is a sectional view showing an element structure in a main process of a method for manufacturing a light emitting diode according to a sixth embodiment of the present invention.

FIG. 10 is a diagram collectively showing a process flow in a manufacturing process of the light emitting diode of the third, fourth, and fifth embodiments.

FIG. 11 is a diagram showing a process flow in a conventional method for manufacturing a red semiconductor laser.

[Explanation of symbols]

1 n-type GaAs substrate 2 n-type electrode 3,4 p-type electrode 20 n-type GaAs buffer layer 21 n-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P clad layer 22 Ga _0.4 In _0.6 P active layer 23 p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P clad layer 24 GaInP etch stop layer 25 p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P clad layer 25 26 p-type Ga _0.5 In _0.5 P thin layer 27 p-type GaAs contact layer 28 Al ₂ 0 ₃ thin 29 n-type GaAs current narrowing layer 30 n-type Al _0.5 Ga _0.5 As cladding layer 31 Al _0.1 Ga _0.9 As active layer 32 p-type Al _0.5 Ga _0.5 As cladding layer 33 n-type GaA s current blocking layer 34 p-type Al _0.5 Ga _0.5 As clad layer 35 p-type GaAs contact layer 40 n-type Al _0.5 In _0.5 P clad layer 41 undoped (Al _0.3 Ga _0.7 ) _0.5 In _{0 .5} P active layer 42 p-type Al _0.5 In _0.5 P clad layer 43 p-type GaP current diffusion layer 44 p-type Al _0.7 Ga _0.3 As current diffusion layer 45 p-type (Al _0.5 Ga _0.5 ) _0.5 In _0.5 P protective layer 46 p Type GaAs cap layer 47 n-type (Al _x Ga _1-x ) _0.5 In _0.5 P (x = 0.5 to
1.0) Current blocking layers 101, 102 Semiconductor lasers 101a 102a, 103a Light emitting parts 103, 104, 105 High brightness light emitting diodes

Continuation of the front page (56) Reference JP-A-7-226564 (JP, A) JP-A-7-50331 (JP, A) JP-A-5-291624 (JP, A) (58) Fields investigated (Int .Cl. ⁷ , DB name) H01S 5/00-5/50

Claims (3)

(57) [Claims] 1. A step of forming a light emitting portion including an active layer on a semiconductor substrate by epitaxial growth, and the active layer formed on the semiconductor substrate is optically excited in a wafer state to attenuate light emitted from the active layer. The fluorescence lifetime, which is the time, is measured, and the fluorescence lifetime is equal to or greater than the reference fluorescence lifetime value, with respect to the correlation between the fluorescence lifetime and the threshold current density, which is a value at which the threshold current density does not vary above the reference fluorescence lifetime value. A step of determining a non-defective product by selecting only the non-defective product, a step of selecting a non-defective product of the substrate on which the epitaxial growth has been performed, and then performing a process for forming an element structure on the substrate judged to be the non-defective product. A method for manufacturing a semiconductor light emitting device, comprising: 2. The method includes the step of selectively etching away a part of a semiconductor layer forming a surface portion of the light emitting portion after forming the light emitting portion and before measuring the fluorescence lifetime. in the measuring step, the method for manufacturing a semiconductor light emitting device according to claim 1 for introducing the excitation light, the active layer from the etched portions of the semiconductor layer. Wherein the fluorescence lifetime excitation light for measuring is absorbed by the light-emitting layer, a method of manufacturing a semiconductor device as claimed in any of claims 1 to 2 is a wavelength not absorbed by the cladding layer .