JP3403844B2 - Method for manufacturing compound semiconductor substrate - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a composite compound semiconductor substrate in which different kinds of single crystals are grown on a single crystal substrate, and particularly to InP and GaAs compound semiconductors widely used as optical devices and high-speed electronic devices. And a method for producing a heteroepitaxial substrate in which a simple substance semiconductor that is widely used as an electronic device is compounded.

[0002]

2. Description of the Related Art InP-based compound semiconductors are widely used for long wavelength band optical devices and the like. And InP / Si
Is promising for producing a composite element of InP-based optical device and Si electronic device. InP / Si heteroepitaxial growth includes direct growth of InP, GaAs, GaP, Zn.
It has been manufactured by many approaches so far, such as a method of growing on a buffer layer such as Se and a method of inserting a strained superlattice. For example, as shown in FIG. 6, In having a crystal quality capable of manufacturing an LD (laser diode) is used.
P / Si is the Japanese Journal of Applied Physi
cs) As disclosed in Vol. 30, 1991, No. 12B, pages 3876 to 3878, it is obtained by a hybrid of MOCVD (metal organic chemical vapor deposition) method and VME (vapor phase mixed growth) method. Here, the MOCVD method is InP-GaA.
An InP-InGaAs strained superlattice (SLS) layer for mitigating s-lattice mismatch is needed at the heterointerface to improve the surface morphology of the InP layer. Also,
The VME method contributes to high quality by thickening the film by utilizing the high growth rate, which is a feature of the hydride VPE method (for example, vapor phase growth method using metal chloride as a group III source and hydride as a group V source). is doing. However, the growth without the SLS layer is also required to simplify the substrate structure.
In order to simplify the growth process, it is desired to grow a compound semiconductor by one growth method.

[0003]

In the prior art, from the viewpoint of simplifying the semiconductor thin film growth process, all MO
A method of growing by CVD and a method of growing all by hydride VPE can be considered. However, the former (MO
When it is formed by the CVD method (that is, when the InP thick film layer 14 shown in FIG. 6 is grown by MOCVD), I
Since the crystallinity of the nP thick film layer 14 is poor, as will be described later, PL
The intensity of (photoluminescence) is about 1/5, and the performance of the manufactured LD (laser diode) is deteriorated to the extent that it cannot continuously oscillate at room temperature [eg, Extended Abstracts of International Conference on Solid]. State Devices and Materials (Extended Abstracts of t
he 1992 International Conference on Solid State De
vices and Materials, Tsukuba, 1992, pp656-658)]. Further, in the case of being manufactured by the latter (hydride VPE method) (that is, when the InP-InGaAs strained superlattice (SLS) layer 13 shown in FIG. 6 is eliminated and all are grown by hydride VPE), as described later, There is a problem that the upper InP thick film layer 14 does not become a continuous film and the intended layer structure cannot be obtained.

An object of the present invention is to solve the above-mentioned problems in the prior art, and to manufacture a high quality InP / GaAs / Si hetero substrate capable of manufacturing an LD device by one growth method. High quality InP / GaAs / without SLS (strained superlattice) layer
This is a layer structure in which Si can be obtained, and by improving the yield and reproducibility of the product by simplifying the growth method and layer structure, a high-performance InP / GaAs / Si hetero substrate can be manufactured inexpensively and stably. Another object is to provide a method for manufacturing a compound semiconductor substrate that can be supplied as a substrate.

[0005]

In order to achieve the above-mentioned object of the present invention, the present invention has a constitution as set forth in the claims. That is, according to the present invention, as described in claim 1, a compound semiconductor substrate including a GaAs layer and an InP layer and heteroepitaxially grown on a Si substrate in that order is vapor-phase grown using a metal chloride and a hydride. In the method for manufacturing by the hydride VPE method described above, at least a step of directly growing the first InP layer on the GaAs layer and a step of forming the second InP layer after the first InP layer are included. The growth temperature of the InP layer is lower than 650 ° C, and the growth temperature of the second InP layer is higher than 650 ° C. Further, according to the present invention, as described in claim 2, in claim 1, the first I
The growth temperature of the nP layer is 590 ° C., and the growth temperature of the second InP layer is 685 ° C. to 690 ° C.

[0006]

According to the method of producing a compound semiconductor substrate of the present invention, that is, a composite semiconductor substrate, as described in claim 1, InP is formed on a GaAs layer epitaxially grown on a Si substrate.
When growing layers, all growth is done in hydride VP
By performing the method E (for example, a method of forming a film by vapor phase growth using a chloride of a group III element and a hydride of a group V element), a compound semiconductor substrate can be manufactured by one growth method. This makes it possible to significantly simplify the growth process. Moreover, as described in claim 1, the layer structure of the compound semiconductor substrate includes, for example, as shown in FIG. 1, an InP layer and a GaAs layer, and includes Si in that order.
When a compound semiconductor substrate heteroepitaxially grown on the substrate is grown by the hydride VPE method, at least two InP layers having different growth temperatures are formed on the InP layer.
By forming the first InP layer from the P layer,
Directly without G (strained superlattice) layer or graded layer
was grown on the aAs layer, and a second InP layer (hereinafter, also referred to as high-temperature InP layer), so as to be formed after the first InP layer, a growth temperature (650 ° C. of the first InP layer
Lower than the growth temperature of the high temperature InP layer (higher than 650 ° C).
Is achieved by lowering than have). That is,
As shown in FIG. 1, I is formed on the Si substrate through the GaAs layer.
The step of growing the nP layer includes a step of growing at least two InP layers having different growth conditions, and at least G
By growing the first InP layer in contact with the aAs layer at a temperature lower than that of the InP layer grown thereafter, the defect density of the defect density can be increased without the need for an SLS (strained superlattice) layer or a graded layer. Low quality continuous film I
An nP layer can be obtained. Further, as described in claim 2, the first InP layer growth temperature is 590 ° C.
By setting the nP layer growth temperature to 685 ° C. to 690 ° C., a continuous film single crystal InP layer can be obtained, and the defect density can be reduced, and the high temperature InP that is the second InP layer can be obtained. By making the layer growth temperature higher than 650 ° C., an InP layer with good light emission efficiency can be obtained. The compound semiconductor substrate of the present invention produced as described above is
A high-quality composite compound semiconductor substrate capable of producing an element such as D (laser diode) can be produced with a high yield by one growth method and with a simplified layer structure. In the hydride VPE method, a compound semiconductor thin film is formed by a vapor phase growth method using a metal chloride (GaCl, InCl, etc.) as a group III raw material and hydride (AsH ₃ , PH ₃ etc.) as a group V raw material. Is the way.

[0007]

Embodiments of the present invention will be described below in more detail with reference to the drawings. In this embodiment, an InP layer is directly grown on a GaAs / Si substrate without the SLS layer by the VME method. FIG. 2 shows the crystallinity (etch pit density / c of the InP layer depending on the growth temperature of the first InP layer).
m ² ) is shown. Further, in order to show that the crystallinity is device quality, an LD was formed on the above substrate. LD
Shows room temperature continuous wave oscillation, and has crystallinity having a device quality similar to that with a conventional SLS layer. For the growth, an apparatus capable of performing VME that enables low temperature growth based on hydride VPE was used. As this growth apparatus, a growth apparatus having a structure capable of performing both normal VPE and VME by changing growth conditions (temperature, gas flow rate, substrate position, etc.) was used. VME is, for example, Japanese Patent Publication No. 6-9102.
As described in Japanese Patent Application Laid-Open No. 61-28974, a source gas, Group III metal chloride (GaC).
l, InCl, etc.) and Group V hydrides (AsH ₃ , P
(H ₃ etc.) is introduced into the reaction chamber in a non-mixed state through another route and mixed directly on the growing substrate, which enables low temperature growth which has been impossible by the conventional VPE method. is there. As the Si substrate, an epitaxial substrate that does not require high temperature surface treatment in the growth apparatus is used. The plane orientation is deviated from the (100) direction by 2 degrees in the <011> direction.

In normal GaAs / Si growth,
A mechanically or chemically polished Si substrate is used, but in that case, it is necessary to perform high-temperature Si surface treatment in a growth apparatus immediately before growth. Epitaxial Si substrate is a mechanically and chemically polished Si substrate on which S
i is epitaxially grown, and by using this epitaxial Si substrate, high-temperature Si surface treatment in the above-mentioned growth apparatus is unnecessary [for example, Applied Physics Letter, Appl. Phys. Lett. 63. (14). 1963 (199
3)]. The GaAs layer has a film thickness of 2 μm by two-stage growth at 400 ° C. and 650 ° C. 1 μm thickness and 2 μm on the way
After the growth of the thickness was completed, a thermal cycle was added to improve the quality. After that, a first InP layer having a film thickness of about 0.5 μm was grown by changing the growth temperature. Next, by repeating the growth at 685 ° C. which is a normal growth temperature and repeating the heat cycle, the thickness of the InP layer was set to about 10 μm. Evaluation is HB
It was based on the etch pit density (EPD) with an r-based etchant and a planar TEM (transmission electron microscope). Further, using this InP / Si as a substrate, an LD structure was formed on the substrate, and the substrate quality was evaluated from the LD characteristics. First In
The growth temperature of the P layer is the same as the growth temperature of the subsequent layers.
When the temperature was 5 ° C., a mirror-finished InP film could not be obtained.
It is considered that this is due to the release of arsenic (As) from the GaAs substrate. Then, when the growth temperature of the first InP layer was lowered, a mirror-finished InP film was obtained at 650 ° C. or lower. Bulk for crystallinity evaluation
HBr used for evaluation of dislocation density of InP substrate:
The etch pits were evaluated using a H ₃ PO ₄ = 1: 1 solution. The etching was performed at room temperature for 5 seconds. As a result, it was found that there are two types of etch pits having different shapes. The small elliptical etch pit and the large rod-shaped etch pit are referred to as pit A and pit B, respectively. These pits correspond to threading dislocations and stacking faults, respectively. When the etching time was lengthened, the shapes of both pit A and pit B were increased, but the density was not changed. The EPDs by the above samples are
It was 6.1 × 10 ⁶ pieces / cm ² (pit A) and 7.6 × 10 ⁵ pieces / cm ² (pit B). FIG. 2 shows the results of examining the growth temperature dependency of these pits as an index for reducing the dislocation density. The pit B corresponding to the stacking fault has the first
Of the InP layer decreases exponentially with the decrease of the growth temperature. On the other hand, the density of the pit A corresponding to the threading dislocation has almost no dependency on the growth temperature and shows a high value of the sixth power. The stacking fault that forms the pit B is Ga
It is formed in the initial stage of growth of the first InP layer, which is a lattice mismatch system growth from the As layer to the InP layer. Bulk
The stacking fault formation energy of InP is smaller than that of other compound semiconductors, and stacking faults are relatively easily generated. Therefore, by lowering the growth temperature of the first InP layer, generation of stacking faults in the first InP layer is suppressed, and as shown in FIG. 2, the stacking fault density is reduced to a low value in the fourth power. It is thought that this was done. Further, the full width at half maximum of the 2-crystal X-ray rocking curve is
When the growth temperature of the P layer was 650 ° C., it was about 100 seconds, but in the growth at 590 ° C., it was improved to about 60 seconds. As described above, in the method for manufacturing a compound semiconductor substrate of the present invention, the growth temperature of the first InP layer is 650 ° C. or lower, and the lower the temperature (for example, 590 ° C.), the higher the crystallinity of the InP layer on the surface and It was revealed that the defect density and the half-width of the two-crystal X-ray rocking curve (XRC) were reduced. Next, in order to evaluate the crystallinity of the InP layer on the surface, PL (Photoluminescence) was used.
Was measured and the results are shown in FIG. The PL measurement method is
In addition to the stacking faults and threading dislocations described above, this is a measurement method that can detect microscopic defects (such as impurity contamination, atomic vacancies, and point defects such as antisite). Further, from the standpoint of application to optical devices, PL intensity can be regarded as the luminous efficiency as it is, and is a widely used measurement method for evaluation of optical device substrates. FIG. 3 shows In after the first InP layer.
The PL intensity dependence on the growth temperature Tg (° C.) of the P layer (from the second InP layer to the surface InP layer) is shown. In the figure, when the growth temperature is in the range of 590 ° C. to 690 ° C., the PL intensity increases as the growth temperature increases. When 685 ° C. to 690 ° C. at which the maximum PL intensity is obtained is standardized as 1, the PL intensity is reduced to about 1/10 at the growth temperature of 650 ° C., and the InP layer grown at the growth temperature of 650 ° C. or lower , It cannot be used as a substrate for a light emitting device. Here, the first In
The growth temperature of all P layers was 590 ° C. Next, a laser diode (LD) was manufactured in order to confirm the characteristics of the InP / Si substrate obtained by the above direct growth. L
D is a broad type, and the manufacturing method is almost the same as the conventional method. FIG. 4 shows I (current) -L (light output) characteristics in room temperature continuous oscillation. For comparison, conventional InP / SL
The LD characteristic on the S / GaAs / Si substrate is shown by the broken line. Device characteristics such as oscillation threshold current and internal quantum efficiency were almost the same as before. From this, it was clear that the InP / Si substrate which is an example of the present invention has high quality crystallinity of LD device grade. Figure 5
A substrate having a conventional SLS layer (InP / SLS / G
The transmittance of aAs / Si) and the direct growth substrate (InP / GaAs / Si) produced in this example are shown. here,
As the transmittance, a value obtained by standardizing the transmittance of the Si substrate not grown as 1 was used. The InP / GaAs / Si substrate of the direct growth of this example showed almost the same value as the Si substrate in the wavelength range of 1 to 2 μm. Absorption (or reflection) should occur due to the multilayer structure of films having different refractive indexes, but it is considered to be so small as not to be detected in the measurement range of this example. On the other hand, conventional SLS
The substrate with layers showed absorption at wavelengths shorter than about 1.5 μm. This is considered to correspond to the use of the 1.5 μm band superlattice for the SLS layer.

[0009]

As described in detail above, according to the method for manufacturing a compound semiconductor substrate of the present invention, two methods are required to obtain a high quality InP / GaAs / Si hetero substrate conventionally used for LD devices. Although it was necessary to use the growth method, the present invention can be realized by one growth method, and a high quality InP / GaAs / Si substrate can be obtained without inserting the SLS layer, which has been conventionally required. The production yield and reproducibility can be improved by simplifying the growth method and the layer structure. In addition, since only one growth device is required, both capital investment and running cost will be halved. For these reasons, it becomes possible to supply a high-quality InP / GaAs / Si substrate inexpensively and stably, and the effect is extremely large. Furthermore, in the compound semiconductor substrate manufacturing method of the present invention, since there is no SLS layer, InP,
A substrate having only absorption determined by the band gaps of GaAs and Si can be obtained. On the other hand, according to the conventional method, the absorption of the SLS layer is observed, and the wavelength of 1.
In the 3 μm band, SLS layer absorption is present. Therefore, in a device having a structure in which light is transmitted through the region of the SLS layer, light loss occurs, which limits the elements that can be manufactured in a substrate having a conventional structure including the SLS layer, such as a transmission type device or a waveguide near the SLS layer. Cannot be made. On the other hand, the compound semiconductor substrate manufactured by the method of the present invention absorbs light to about the same level as a widely used bulk InP substrate, and thus devices in those ranges can be manufactured. For the first time, the method of the present invention can realize a transmission type device, a waveguide (OEIC) near the SLS layer, and the like, which cannot be manufactured by the conventional technique.

[Brief description of drawings]

FIG. 1 is a schematic view showing an example of the configuration of a compound semiconductor substrate manufactured in an example of the present invention.

FIG. 2 is a graph showing the dependency of the etching pit density of the compound semiconductor substrate manufactured in the example of the present invention on the growth temperature of the first InP layer.

FIG. 3 shows In of the photoluminescence intensity of the first InP layer and the In of the compound semiconductor substrate manufactured in the example of the present invention.
The graph which shows the growth temperature dependence of P layer.

FIG. 4 is a graph showing current-light output characteristics of LD (laser diode) / Si manufactured in an example of the present invention in room temperature continuous oscillation in comparison with a conventional example.

FIG. 5 is a graph showing the wavelength dependence of the transmittance of the compound semiconductor substrate manufactured in the example of the present invention in comparison with the conventional example.

FIG. 6 is an explanatory diagram showing a configuration of a conventional compound semiconductor substrate and a growth method.

[Explanation of symbols]

1 ... Si substrate 2 ... GaAs layer 3 ... First InP layer 4 ... Second InP layer 5 ... i-th InP layer 6 ... n-1th InP layer 7 ... nth InP layer 11 ... Si substrate 12 ... GaAs layer 13 ... InP-InGaAs strained superlattice (SLS) layer 14 ... InP thick film layer

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toru Sasaki 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Inside Nippon Telegraph and Telephone Corporation (56) Reference JP-A-2-89306 (JP, A) J. Crystal Growth, 140, 291-298 (58) Fields investigated (Int.Cl. ⁷ , DB name) H01S 5/00-5/50

Claims (2)

(57) [Claims] 1. A method for producing a compound semiconductor substrate comprising a GaAs layer and an InP layer and heteroepitaxially grown on a Si substrate in that order by a hydride VPE method of vapor phase growth using a metal chloride and a hydride. And at least a step of directly growing the first InP layer on the GaAs layer and a step of forming the second InP layer after the first InP layer, wherein the growth temperature of the first InP layer is 650 ° C. A method for manufacturing a compound semiconductor substrate, which is lower and has a growth temperature of the second InP layer higher than 650 ° C. 2. The growth temperature of the first InP layer is 590 ° C. and the growth temperature of the second InP layer is 685 ° C.
A method for manufacturing a compound semiconductor substrate, wherein the temperature is ˜690 ° C.