JP3393688B2 - Image reading device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading apparatus, and more particularly, to an apparatus for reading images on a document such as a facsimile, an image scanner, a digital copying machine, an electronic blackboard in a time series.

[0002]

2. Description of the Related Art In recent years, a charge coupled device (CC) has been used in a document reading unit such as a facsimile.
An image reading apparatus generally called a contact image sensor is used instead of the image reading apparatus of the reduction optical system using D). This image reading apparatus has a plurality of one-dimensionally formed photoelectric conversion elements made of a thin film semiconductor such as amorphous silicon a-Si on a glass substrate, and can read an image on a document at the same size. A photodiode is usually used as the photoelectric conversion element, but since the photocurrent generated in the photodiode is extremely weak, the charge storage method in which this photocurrent is temporarily stored in the junction capacitance of the photodiode and then detected is widely adopted. ing. In addition, since the image reading apparatus has a very large number of photoelectric conversion elements, a matrix driving method which usually requires a small number of switching elements is adopted.

Here, an example of the image reading apparatus of the matrix drive system by the charge storage method will be briefly described with reference to the drawings.

As shown in FIG. 14, in a conventional image reading apparatus, a photodiode 1 as a photoelectric conversion element is m × n.
Blocking diodes 2 are connected in series to these photodiodes 1 with opposite polarities. The photodiode 1 and the blocking diode 2 forming the pair are divided into n blocks B _1, B _2, ... B _n every m blocks. The anode terminal of the blocking diode 2 is connected to each output terminal of the shift register 4 via the buffer gate 3 common to each block B _1, B _{2, ...} B _n .

On the other hand, the anode terminal of the photodiode 1 is located at a relatively same position among the blocks B _1, B _{2, ...} B _n , and the common current amplifying circuits IV _1, IV _{2 ,.} I
It is connected to the integration circuits IN _1, IN _{2, ...} IN _m via V _m . Further, sample-hold circuits SH _1, SH _{2, ...} SH _m , a multiplexer circuit MPX and an amplification circuit 5 are connected to the integration circuits IN _1, IN _{2, ...} IN _m , and these current amplification circuits are connected. IV _1, IV _{2, ...} IV _m , integration circuits IN _1, IN _{2, ...} IN _m , sample hold circuits SH _1, SH _{2, ...} SH _m , and multiplexer circuit MP
X and the amplifier circuit 5 constitute a signal processing circuit for time-integrating the currents I _1, I _{2, ...} I _m flowing out from the photodiode 1.

According to this image reading apparatus, as shown in the time chart of FIG. 15, the data input pulse Din input to the shift register 4 is sequentially shifted in the shift register 4 according to the clock pulse CLK, The signals are sequentially output from the respective output terminals. As a result, the drive voltage is sequentially applied to each photodiode 1 in units of blocks B _1, B _{2, ...} B _n . In the photodiode 1 to which the drive voltage is applied, currents I _1, I _{2, ...} I _m corresponding to the optical signals accumulated in the junction capacitance flow, and the current amplification circuits IV _1, IV _{2 are} generated. _{, ...} IV _m , and further integrated circuits IN _1, IN _{2, ...} IN _m , sample hold circuits SH _1, SH _{2, ...} SH _m , multiplexer circuit MPX, and amplification circuit 5 Current I _1, I flowing out from the photodiode 1 by the signal processing circuit including
_{2, ...} I _m are subjected to signal processing to obtain an output voltage Vout. In this way, the electric signal of each photodiode 1 is transferred to the blocks B _1, B _{2, ...} B by the shift register 4 and the like _.
The channels are sequentially scanned in units of _n , and the channels for one block are read out at the same time.

[0007]

As described above,
Drive voltage Vd of matrix drive method by charge storage method
Is a shift register output as shown in the time chart. For this reason, the number of elements is 1728 in an A4 size image reading apparatus of 8 elements / mm.
It is composed of either 32 channels x 54 blocks, 16 channels x 108 blocks or 8 channels x 216 blocks, usually 16 channels x
It is composed of 108 blocks. However, there is a problem that a large number of shift registers are required in any structure. Further, when integrated into an IC, analog circuit parts are expensive, and therefore it is necessary to use many inexpensive digital circuits.

Therefore, the inventors of the present invention have conducted extensive studies to reduce the number of drive gates and provide an efficient and inexpensive image reading apparatus, and as a result, an invention in which the number of gates on the drive side can be made extremely small And Japanese Patent Application No. 5-107
No. 505, it was disclosed. However, in the invention, the image reading apparatus in which the matrix driving unit is composed of the adding circuit including the resistors can be easily obtained by using the external resistors and soldering the external resistors. However, soldering a large number of external resistors is complicated,
The number of man-hours increases and the manufacturing cost is required.

Therefore, the inventors of the present invention have conducted intensive studies for the purpose of realizing the image reading apparatus of the invention at low cost, and as a result, the present invention has been achieved.

[0010]

The gist of an image reading apparatus according to the present invention is that a drive voltage is sequentially applied to a plurality of one-dimensionally arranged photoelectric conversion elements to generate an electric signal of the photoelectric conversion elements. In the image reading apparatus, the drive side for applying a drive voltage to the photoelectric conversion element is divided into y blocks for each x, and the x photoelectric conversion elements in the block are sequentially arranged as a unit. First applying means for applying a first driving voltage, second applying means for sequentially applying a second driving voltage in units of photoelectric conversion elements located at the same relative position between the blocks, and In an image reading apparatus including an addition circuit configured to apply a driving voltage for driving the photoelectric conversion element when the first driving voltage and the second driving voltage are simultaneously applied, an addition circuit configured to include the resistance is added. electrodeposition of the photoelectric conversion element Or that are formed in the layer constituting the semiconductor layer.

Another feature of the image reading apparatus according to the present invention is that a plurality of one-dimensionally arranged photoelectric conversion elements are divided into n first blocks every m . An image reading device in which a driving voltage is sequentially applied in units of m photoelectric conversion elements in a block to read an electric signal of the photoelectric conversion elements, and the driving voltage is applied to the n divided first blocks. Is further divided into y second blocks for each x, and the first drive voltage is sequentially applied for each x first block in the second block. Applying means, second applying means for sequentially applying a second drive voltage in units of the first blocks located at the same relative position between the second blocks, the first drive voltage and the second When the driving voltage is applied to the first block at the same time, In the image reading apparatus and an adding circuit composed of a resistor for applying the m driving voltage for driving the photoelectric conversion elements in the unit, the layer adding circuit consisting of the resistor constituting the electrode or a semiconductor layer of the photoelectric conversion element <br/> Being formed.

In the image reading apparatus of the present invention, the photoelectric conversion element is a photodiode and a blocking diode connected in series with opposite polarities.

[0013]

In such an image reading apparatus, the side for applying the driving voltage to the photoelectric conversion elements is formed into a matrix of x × y, and the driving voltage is applied for each photoelectric conversion element or in units of a plurality of blocked photoelectric conversion elements. It is applied in order. That is,
The driving side that applies the driving voltage to the photoelectric conversion element is y for every x number.
The first drive voltage is sequentially applied to each block in units of the photoelectric conversion elements in the block, and the photoelectric conversion elements in the blocks are relatively arranged in the second position in order. When the first drive voltage and the second drive voltage are simultaneously applied by the matrix drive unit configured by an adder circuit including resistors, the corresponding photoelectric conversion elements are driven. Is configured. Therefore, when the first drive voltage and the second drive voltage are sequentially applied by the matrixed applying means, the photoelectric conversion elements are driven in order.

Further, a plurality of one-dimensionally arranged photoelectric conversion elements are divided into n first blocks every m, and the driving voltage is sequentially arranged in units of m photoelectric conversion elements in the first block. In the image reading apparatus in which the electric signal of the photoelectric conversion element is read by being applied, similarly to the above, the driving side to which the driving voltage is sequentially applied is further divided into y second blocks every x. It is configured to drive m photoelectric conversion elements in one block as a unit. Therefore, the first driving voltage and the second driving voltage are sequentially applied to the adder circuit including the resistors by the matrixed applying unit, so that the m photoelectric conversion elements in the first block are sequentially arranged as a unit. Will be driven to.

[0015]

Embodiments of the image reading apparatus according to the present invention will now be described in detail with reference to the drawings.

First, FIG. 1 is a plan view of a main part of an image reading apparatus according to this embodiment, FIG. 2 is a cross-sectional view of the main part, and FIG. 3 is a circuit diagram.
As shown in these drawings, the image reading apparatus according to the present embodiment has a one-dimensional array of m × n photodiodes 10 as photoelectric conversion elements, and blocking diodes 12 connected in series to these with opposite polarities. , And is divided into n first blocks B _1, B _{2, ...} B _n with m photodiodes 10 and blocking diodes 12 as one unit. The photodiode 10 and the blocking diode 12 are made of amorphous silicon a-Si.
Is formed by stacking thin film semiconductors such as the above in a pin structure or the like, and may have the same structure or different structures.

The respective anode terminals of these photodiodes 10 which are at the same relative position between the first blocks B _1, B _{2, ...} B _n are common to each other in the matrix wiring 1.
4 is connected. In addition, these matrix wiring 1
A current amplification circuit, an integration circuit, a sample hold circuit, a multiplexer circuit, etc. are normally connected to the output terminal of 4, and the currents I _1, I _{2, ...}
I _m is time-integrated and serially output.

On the other hand, each anode terminal of the blocking diode 12 is connected to a common wiring 16 common to each of the first blocks B _1, B _{2, ...} B _n , and is further divided into n pieces. One block B _1, B _{2, ...} B _n is divided into y second blocks C _1, C _{2, ...} C _y for each x. Then, each of the second blocks _{C 1, C 2, ... C} y respectively in the x
Number of first blocks B _1, B _{2, ...} first in sequence B _x in the unit
So that the drive voltage of the first block B _1, B
The common wiring 16 of _{2, ...} B _x is input terminals D _1, D via a common input wiring D _(1-y) via a resistor Rd.
_{2, ...} Connected to D _y . Further, each of the second blocks C _1, C _{2, ...} C first block B ₁ is in the same relative position between _y, B _{2, ...} respectively common wiring 16 resistance R of B _x
input terminal E ₁ through the input lines E _(1-X) common through _e, E _{2, ...} are connected to the E _x, the second driving voltage second block C _1, C _{2,. ..} First block in C _y B _1, B _{2, ...}
B _x can be applied individually and sequentially.

The image reading apparatus having the above structure is generally manufactured as follows. First, an insulating substrate 18 such as a glass substrate is coated with chromium or the like to form a lower electrode film to serve as a lower electrode and, for example, amorphous silicon a-Si is pinned.
A semiconductor film sequentially deposited in a structure or the like and a transparent conductive film such as ITO serving as an upper transparent electrode are sequentially stacked. Here, the thickness of the lower electrode film is about 500 to 150.
0 Å, the thickness of the semiconductor film is about 7000 to 12000 Å, and the thickness of the transparent conductive film is about 200 to 800 Å, but the film thickness is to be set according to the resistance value to be set, and is not particularly limited. Not a thing.

Then, the upper transparent electrode 20 and the semiconductor layer 2 are etched in the reverse order by photolithography.
2 and the lower electrode 24 are formed to form the photodiode 1
0 and the blocking diode 12 are formed. And
When forming the lower electrode 24, a lead-out wiring 26 for connecting to the matrix wiring 14 at the same time as the lower electrode 24, a common wiring 16 and a resistor R that continues integrally therewith
The lead wires d and Re and the lead wires 28 and 30 connected to the input wires D _(1-y) and E _(1-X) are integrally formed. Since the resistors Rd and Re are formed of the same lower electrode film as the lower electrode 24 and the like, the line width is set to be sufficiently thin and the length is set to be sufficiently long so as to function as a resistor. The adding circuit composed of the resistors Rd and Re is made of the material of the lower electrode 24, and when chromium is used, for example, its specific resistance is 60 μΩ · cm, and if a resistor of width 10 μm × length 7 mm × thickness 1000 Å is created. 4.2
A resistance value of KΩ is obtained.

Next, a transparent interlayer insulating film 32 made of silicon oxide SiOx is deposited on the insulating substrate 18 on which the photodiode 10 and the like are formed, and then contact holes 34 are formed at predetermined positions by photolithography. Form. Then, after depositing a metal film made of aluminum or the like on the transparent interlayer insulating film 32, the metal film is etched by a photolithography method to connect the photodiode 10 and the blocking diode 12 with each other, and a connection electrode 36. Matrix wiring 14 and input wiring D
_(1-y) and E _(1-X) are formed. Finally, an insulating protective film 38 made of silicon nitride SiNx or the like is deposited,
The image reading device 40 according to the present embodiment is manufactured. Here, the thickness of the transparent interlayer insulating film 32 is about 12000.
~ 18000Å, the thickness of the metal film is about 12000 ~ 180
00Å, and the thickness of the insulating protective film 38 is about 3000 to 80
It is applied at about 00Å, but is not particularly limited.

Next, the operation of the image reading apparatus having the above configuration will be described. First, any first block B _1, B _{2, ...}
As shown in FIG. 4, a resistor Rd and a resistor Re are connected to an arbitrary pair of the photodiode 10 and the blocking diode 12 in B _n to form an adder circuit. Therefore, the first drive voltage D = 5V and the second drive voltage E = 5V from the input terminals D _(y) and E _(x) , respectively.
Is input, the potential Vd at the point B is 5 V, and the read state is set. Next, when the first drive voltage D = 0 V and the second drive voltage E = 0 V, the potential Vd at the point B is 0 V, and D = 0 V, E = 5 V or D = 5 V, E = 0V
Is input, the potential Vd at point B is 2.5V,
Both are in the storage state and are not read.

By the way, when the potential Vd at the point B is 2.5 V and the potential V _PD between the photodiode 10 and the blocking diode 12 is not lower than 2.5 V, no problem will occur. . Further, if the light incident on the photodiode 10 is too strong, it will be read even if the potential V _PD is 2.5V. However, even in this case, reading can be avoided by shortening the accumulation time, that is, by increasing the speed.

The output terminals of the shift register are connected to the input terminals D _1, D _{2, ...} D _y and the input terminals E _1, E _{2, ...} E _x via buffer gates (not shown). However, these constitute the first applying means and the second applying means, respectively. Therefore, the shift register used has a total of (x + y) stages of flip-flops, which is significantly larger than that of a conventional shift register having n (= x × y) stages of flip-flops. The number can be reduced.

In such an embodiment, the resistor R used
d and Re are input terminals D _1, D _{2, ...} D _y and input terminals E _1,
Corresponding to the number of E _{2, ...} E _x , the resistance Rd is y and the resistance R is
e is x and resistance is Rd = Re = R, the first or second
If the drive voltage of V is V, the consumption current is (y-1) / 2R × V on the input terminal D _(y) side and (x-1) / 2R × V on the input terminal E _(x) side. . So, for example, 8
ch analog (220 blocks) y = 10, x = 22
With a matrix of Rd = Re = R = 10
If KΩ and the first or second drive voltage is V = 5v, the current consumption on the input terminal E _(x) side is 5.25 mA, the input terminal D
_The current consumption on the _(y) side is 2.25 mA. Therefore, the resistors Rd and Re to be used are determined in reverse from this, and several KΩ ~
Several tens of KΩ is preferable.

Here, more specifically, the resistance values of the resistors Rd and Re used in the adder circuit of the image reading apparatus will be obtained. As shown in FIG. 5A, a case where an image reading apparatus of 1 block and 8 channels is driven by a driving voltage of 5V will be described as an example. First, a photodiode P which is a photoelectric conversion element
The size of D is 110 μm square, blocking diode B
The size of D is 33 μm square, the lower electrode is made of chromium, and the upper transparent electrode is made of ITO.
Amorphous silicon a-Si was deposited as a semiconductor at 9000Å to form a semiconductor layer. The obtained image reading device is 5
When the capacitance kick current I flowing in one block was actually measured when driven by a driving voltage of V, it was about 5.7 μA. Therefore, in the image reading device,
It is preferable to set the resistance values of the resistors Rd and Re so that the influence of the capacitance kick current I can be removed from the read current.

On the other hand, the image reading apparatus is driven in the mode shown in FIG. 5B, that is, when a driving voltage of 5 V is applied to the input terminal E _(x) and the input terminal D _(y) ,
In the mode shown in (c) of the figure, that is, the input terminal D
Drive voltage 5V is applied to _(y) while input terminal E _(x)
Is 0V, or in the mode shown in FIG. 7D, that is, when the input terminal E _(x) and the input terminal D _(y) are 0V, the image reading device is not driven. Here, when the image reading device is driven and the resistance is Re = Rd = R, the total resistance value in the adding circuit is R / 2. Total resistance value of the adder circuit (R /
When 2) is small, the driving power consumption becomes large, so that the resistance value is preferably large. However, if the resistance value is too large, the delay time becomes long. Therefore, the total resistance value (R / 2) of the adding circuit is preferably about 100 KΩ or less.

FIG. 3 is a diagram when the image reading device is not driven.
The mode shown in (c) occurs when the mode is switched from the mode shown in (b) during driving. At this time, the capacitance kick current I flows. Since the image reading apparatus should not be driven by the capacitance kick current I, it is necessary to select the resistor R which is a resistance value capable of flowing the capacitance kick current I to the ground in the mode shown in FIG. . For the sake of safety, it is preferable to set the resistance R so that a current several times or more of the capacitance kick current I (about 5.7 μA) can flow.
Therefore, assuming that a current five times as large as the capacitance kick current I can flow, the resistance value of the resistor R is about 88 KΩ, and similarly, assuming 10 times, about 4 times.
It becomes 4 KΩ. This resistance value satisfies the above condition of the resistance value of the resistor R when the image reading apparatus is driven, and when the resistance value of the resistor R is about 88 KΩ, the total resistance value when driven is about 44 K.
Ω, the capacitance kick current I can be sufficiently flown during driving, and this current I (about 5.7 μA)
Since the voltage drop due to is about 0.25 V, it is minute with respect to the driving voltage of 5 V and does not affect the characteristics. Therefore, it is preferable to select the resistor R having a resistance value capable of passing a current five times or more the capacitance kick current I in the mode shown in FIG.

Next, the operation of this image reading apparatus will be described with reference to FIG.
An example of the image reading device 42 in which the driving side shown in (a) is formed into a matrix of 3 × 3 will be described with reference to the time chart shown in FIG. The image reading device 42 is a simplified version of the image reading device shown in FIG. 1 to FIG. 3, and since the configuration is the same, the description thereof will be omitted.

Input terminals D1, D2, D3 and input terminal E constituting the first and second applying means of the image reading device 42.
1, E2 and E3 are connected to the output terminals of the shift register via the buffer gates respectively, and the data input pulse input to this shift register is sequentially shifted in the shift register in accordance with the clock pulse CLK. The signals are sequentially output from each output terminal of the shift register.

That is, the first drive voltage sequentially input from the input terminals D1, D2, D3 is passed through the resistor Rd to the first blocks B1, B2, B3, the first blocks B4, B5, B6 and the first blocks B1, B2, B6, respectively. The photoelectric conversion elements of one block B7, B8, B9 are applied. Here, the timing of sequentially inputting the first drive voltage is such that the rising edge and the falling edge coincide. On the other hand, the second drive voltage sequentially input from the input terminals E1, E2, E3 is passed through the resistor Re to the first blocks B1, B4, B7 and the first block B, respectively.
2, B5, B8 and the photoelectric conversion elements of the first blocks B3, B6, B9 are applied. Here, the timing of sequentially inputting the second drive voltage is such that the rising edge and the falling edge coincide.

As a result, the first drive voltage sequentially input from the input terminals D1, D2, D3 and the input terminals E1, E
The second drive voltage sequentially input from E2 and E3 are added by an adder circuit including resistors Rd and Re, respectively, and when a predetermined applied voltage is reached, the first block B
The photoelectric conversion elements 1, B1 ... B9 are driven. Therefore, for example, when the first drive voltage is input from the input terminal D1, the input terminals E1, E
By shifting and applying the second drive voltage in order from 2, E3, the photoelectric conversion elements in the first blocks B1, B2, B3 are driven in order. Similarly, when the first drive voltage is input from the input terminal D2, the second drive voltage is sequentially applied from the input terminals E1, E2, and E3 by shifting and applying the first drive voltage.
The photoelectric conversion elements in the blocks B4, B5, B6 are driven in order.

The image reading device 42 is driven in this manner. As described above, the rising and falling of the image reading device 42 are matched at the timings of the first and second driving voltages, and the resistances of the resistors Rd and Re are changed. When the values are made to coincide with each other, the change in the applied voltage between the first blocks B1 and B2, B2 and B3, etc. is shown in the lower part of Table 1 when sequentially shifting from T1 to T2 and from T2 to T3. It becomes as shown in. As a result, the first blocks B1, B1 ... B
The total change in applied voltage for each 9 is 0, that is, it is canceled between blocks, and noise is not output.

[0034]

[Table 1]

Although one embodiment of the image reading apparatus according to the present invention has been described in detail above, the present invention is not limited to the above-mentioned embodiment and can be implemented in other modes.

For example, as shown in FIG. 7 and FIG. 8, the image reading device 44 is connected in series to the photodiodes 10 as m × n photoelectric conversion elements and the reverse polarity to them, as in the above-described embodiment. And the blocking diodes 12 are arranged one-dimensionally. Each of the anode terminals of the photodiode 10 and each of the anode terminals of the blocking diode 12 have substantially the same configuration as that of the above-described embodiment, and the matrix wiring 14 and the input wirings D _(1-y) , E _{(1- X)} . That is, in the image reading device 44, the resistors Rd and Re and the input wirings D _(1-y) and E _(1-X) connected to the common wiring 16 of the blocking diode 12 are connected to the photodiode 10 and the blocking diode 12, respectively. It is formed at the same time as the connection electrode 36 that connects the upper transparent electrode, and these are connected to the extraction wirings 46 and 48 by the contact hole 34 formed in the transparent interlayer insulating film 32.

In the method of manufacturing the image reading apparatus 44 having the above-described structure, the photodiode 10 is formed on the insulating substrate 18 by a conventional method.
And a blocking diode 12 are formed,
A lead wire 26 is integrally formed from the lower electrode 24 of the photodiode 10, and the blocking diode 1
The extraction wiring 46 and the extraction wiring 48 extending from the second common wiring 16 are integrally formed. Then, the transparent interlayer insulating film 32 deposited on the photodiode 10 and the like.
After forming the contact hole 34 in the substrate, a metal film such as aluminum is deposited, and the metal film is further etched by a photolithography method or the like to connect the connection electrode 36 to the matrix wiring 14 and the contact hole 34. And an input circuit D _(1-y) and E _(1-X) are formed by the resistors Rd and Re. After that, the insulating protective film 38 is applied and the image reading device 44 is manufactured. The resistance R in the image reading device 44 having such a configuration
The adder circuit by d and Re is made of the material of the connection electrode 36, and when aluminum is used, for example, its specific resistance is 3 μΩ · cm, width 10 μm × length 7 mm ×
If a resistor with a thickness of 1000Å is created, a resistance value of 210Ω is obtained.

Next, as shown in FIG. 9 and FIG. 10, the adding circuit formed by the resistors Rd and Re in the image reading device 50 is provided on the semiconductor layer 22 made of amorphous silicon a-Si or the like and the upper portion of the photodiode 10 or the like. It is also possible to form the transparent electrode 20 with ITO or the like. That is, a lower electrode film forming the lower electrode 24 on the insulating substrate 18, a semiconductor film forming the semiconductor layer 22,
When a transparent conductive film for forming the upper transparent electrode 20 is deposited in order and then etched by a photolithography method in the reverse order to form the upper transparent electrode 20 and the like, the IT
The resistors Rd and Re are formed by the transparent conductive film made of O or the like. Since the transparent conductive film made of ITO or the like has a relatively high resistance value, there is an advantage that the resistances Rd and Re having desired resistance values can be easily formed. That is, for example, ITO has a specific resistance of 500 μΩ · cm and a width of 10 μm.
If you make a resistor with a length of 7 mm and a thickness of 1000 Å, 3
A resistance value of 5 KΩ is obtained.

In such a configuration, since the adder circuit including the resistors Rd and Re is laminated on the lower electrode film 52 forming the lower electrode 24 and the semiconductor layer 22, the resistor Rd and Re portions receive light. When incident, a photoelectromotive force will be generated. Therefore, a light shielding film 54 is provided above the resistors Rd and Re via the transparent interlayer insulating film 32.
Further, since the lower electrode film 52 exists as a common line in the adder circuit portion formed by the resistors Rd and Re, a terminal is provided on the lower electrode film 52 to apply a reverse bias voltage to the semiconductor layer 22 thereon, or 0 It is preferable to ground to (zero) V.

Further, in such a configuration, the resistors Rd, R
The semiconductor layer 2 formed under the adder circuit section composed of e
2 may be etched into a pattern different from the pattern of the resistors Rd and Re, as shown in FIG. 10, but the semiconductor layer 22 is simplified in order to simplify the resist film forming process.
Needless to say, it may be etched into the same pattern as the pattern of the resistors Rd and Re.

It should be noted that the image reading device 50 has the semiconductor layer 2
As shown in FIG. 10, the adder circuit formed of the resistors Rd and Re formed on the second layer 2 is covered with the transparent interlayer insulating film 32, and supplies a drive voltage to the resistors Rd and Re and the resistors Rd and Re. The input wirings D _(1-y) and E _(1-X) are connected by the contact holes 34 formed in the transparent interlayer insulating film 32, the extraction wirings 56 and 58, and the connection electrode 60. On the other hand, the common line 16 formed at the anode terminal of the blocking diode 12 and the resistors Rd and Re are connected by the connection electrode 60 via the contact hole 34 formed in the transparent interlayer insulating film 32.

Although the typical embodiments of the image reading apparatus according to the present invention have been described above in detail, the image reading apparatus according to the present invention is not limited to the above-described embodiments, and may be implemented in other modes. I will get it.

For example, as shown in FIG. 11, an image reading apparatus 70 according to the present invention has input wirings D _(1-y) and E on a summing circuit composed of resistors Rd and Re via a transparent interlayer insulating film.
It is also possible to provide _(1-X) . That is, the resistance R
The adder circuit composed of d and Re is integrally formed with the common wiring 16 of the blocking diode 12 on the insulating substrate 18, and the other end of the resistors Rd and Re extending from the common wiring 16 cannot function as a resistor. The part 72 is provided.
Next, after providing a contact hole 34 at a predetermined position of the terminal portion 72 in the transparent interlayer insulating film deposited on the resistors Rd and Re, etc., a connection electrode for connecting the photodiode 10 and the blocking diode 12 to each other. The input wirings D _(1-y) and E _(1-X) are formed together with 36, and the terminal portion 72 of the resistors Rd and Re and the input wirings D _(1-y) and E _(1-X) are connected to the contact hole 34. To connect through.

By adopting such a configuration, not only the image reading device 70 can be extremely miniaturized, but also the number of image reading devices 70 that can be manufactured from one insulating substrate can be increased, so that the manufacturing cost can be reduced. .

Next, as shown in FIGS. 12 and 13, the resistors Rd and Re forming the adding circuit of the image reading device 74 are used.
It is also possible to configure the counter electrode 76, 78 and a resistor 80 composed of a semiconductor layer such as amorphous silicon a-Si. That is, the counter electrodes 76 and 78 are formed integrally with, for example, the common wiring 16 and the like, and the semiconductor layers forming the photodiode 10 and the like are attached to the counter electrodes 76 and 78 to be used as resistors. . The electric conductivity of a semiconductor such as amorphous silicon a-Si is about 10 ³ to 10 ⁻⁸ (Ω · cm) ^−1, which is required by adjusting the distance between the opposing electrodes 76 and 78 and the opposing length. The resistance value to be applied can be set appropriately.

In the image reading apparatus having this structure, the counter electrode can be formed by the upper transparent electrode made of ITO or the like. The semiconductor used as a resistor p-type semiconductor may be any one such as n-type semiconductor or i-type semiconductor, but for example, electrical conductivity is ^{10 -3 ~10 0 (Ω · cm} ) of about ^-1 Alternatively, a semiconductor having a relatively high electric conductivity such as μC-n type hydrogenated amorphous silicon may be deposited and used. Note that μC-n type hydrogenated amorphous silicon is phosphorus P or the fifth element of the periodic table.
It is obtained by doping hydrogenated amorphous silicon with a group element.

Further, in the above-mentioned embodiment, the counter electrodes 76 and 78 constituting the resistance are formed by the lower electrode film deposited on the insulating substrate 18, but one of the counter electrodes is formed by the lower electrode film. It is also possible to form the other by the upper transparent electrode film. In this example, it is preferable that, for example, the i-type semiconductor layer or the like of the semiconductor layers forming the resistor, that is, the p-type semiconductor layer, the i-type semiconductor layer, or the n-type semiconductor layer is not deposited.

Although the image reading apparatus according to the present invention has been described above with reference to the drawings, it goes without saying that the present invention is not limited to the illustrated embodiments.

For example, in the above-described embodiment, the cathode terminals of the photodiode 10 and the blocking diode 12 are connected to each other, but conversely, the anode terminals of the photodiode 10 and the blocking diode 12 are connected to each other, and the photodiode 10 is connected. The cathode terminal of the blocking diode 12 may be connected to the resistor forming the adding circuit, and the cathode terminal of the blocking diode 12 may be connected to the current amplifying circuit. Also, instead of the blocking diode 12, TF
The present invention can be applied to a type selectively driven by T or the like, and needless to say, can be applied to not only a contact type but also a so-called perfect contact type image reading apparatus.

Further, as described above, the image reading apparatus according to the present invention resides in that the driving side of the photoelectric conversion element is formed into a matrix by using the addition circuit by the resistance and is driven, and various configurations are added to such apparatus. It is possible to carry out.

For example, as described above, the resistance value of the resistor forming the adder circuit is set to a sufficiently large value within a possible range,
Although it is preferable to configure so that the influence of the capacitance kick can be ignored, in addition to such a configuration, it is possible to provide a pseudo photoelectric conversion element in order to eliminate the influence of the capacitance kick at the start of reading. That is, in an image reading apparatus that sequentially applies a driving voltage to a plurality of one-dimensionally arranged photoelectric conversion elements according to the same configuration as the present invention to read out an electric signal of the photoelectric conversion elements, the photoelectric conversion elements are driven. It is possible to repeatedly apply the drive voltage to a plurality of pseudo photoelectric conversion elements having substantially the same characteristics as the photoelectric conversion element in sequence two times or more before applying the voltage.

Further, in the image reading apparatus according to the same configuration as that of the present invention, in which the driving voltage is sequentially applied to the plurality of one-dimensionally arranged photoelectric conversion elements to read the electric signal of the photoelectric conversion elements, A plurality of pseudo photoelectric conversion elements having almost the same characteristics as the conversion element are provided, and the driving voltage is sequentially applied to the pseudo photoelectric conversion elements two or more times before the driving voltage is applied to the photoelectric conversion elements. It may be configured by providing initialization means.

Further, the image reading apparatus according to the present invention applies a drive pulse to the photodiode at regular intervals,
An image reading device for reading out the amount of light incident on the photodiode within the certain period of time as an electric signal by time-integrating a current flowing out of the photodiode while the drive pulse is being applied. A pseudo drive pulse that falls when the drive pulse rises and rises when the drive pulse falls is applied to the pseudo photodiode that shares the output line,
The present invention can be applied to an image reading apparatus configured to perform time integration until after the drive pulse falls.

Further, the image reading apparatus according to the present invention sequentially applies a drive pulse to a plurality of photodiodes having a common output line at regular time intervals, and the photo pulse is applied while the drive pulse is being applied. In an image reading device configured to read the amount of light incident on the photodiode as an electric signal within the certain time by integrating the current flowing out from the diode, the photodiode to which the drive pulse has been applied is The auxiliary drive pulse that rises when the drive pulse applied to the photodiode of (3) falls and falls when the drive pulse applied to the next photodiode rises is applied, and time integration is performed until after the drive pulse falls. It can also be applied to an image reading device configured to That.

Further, in the image reading apparatus according to the present invention, the photodiode, the drive circuit for applying the drive pulse to the photodiode at regular time intervals, and the flow out of the photodiode while the drive pulse is being applied. In an image reading apparatus including a signal processing circuit that integrates a current with time, a pseudo photodiode that shares an output line with the photodiode, and rises when the drive pulse rises and falls when the drive pulse rises in the pseudo photodiode. The present invention can be applied to an image reading apparatus which is provided with a pseudo drive circuit for applying a pseudo drive pulse, and in which the signal processing circuit is configured to perform time integration until after the drive pulse falls.

In the image reading apparatus according to the present invention, a plurality of photodiodes having a common output line, a drive circuit for sequentially applying drive pulses to the photodiodes at regular intervals, and the drive pulses are provided. In an image reading apparatus including a signal processing circuit that time-integrates a current flowing out from the photodiode while being applied, to the photodiode to which the drive pulse has been applied,
An auxiliary drive circuit is provided that applies an auxiliary drive pulse that rises when the drive pulse applied to the next photodiode falls and that falls when the drive pulse applied to the next photodiode rises,
Moreover, it is also possible to apply the signal processing circuit to an image reading apparatus configured to perform time integration until after the drive pulse falls.

According to such an image reading apparatus, a drive circuit or the like applies a drive pulse to the photodiode at regular time intervals, and a pseudo drive circuit or the like applies a pseudo drive pulse to the pseudo photodiode. Since this pseudo drive pulse is designed to fall when the drive pulse rises and rise when it falls, the capacitance kick caused by the capacitance of the photodiode and the capacitance kick caused by the capacitance of the pseudo photodiode are Most of these are canceled out by becoming opposite to each other.

However, since there is a difference in these capacities, the capacitance kick is not completely canceled out, but remains a little. That is, when the capacitance of the photodiode is larger, the residual component of the capacitance kick appears as positive noise when the drive pulse rises and appears as negative noise when the drive pulse falls. On the contrary, when the capacitance of the pseudo photodiode is larger,
The residual component of the capacitance kick appears as negative noise when the drive pulse rises, and appears as positive noise when the drive pulse falls. Since the residual components of these capacitance kicks are not only reversed in polarity but also remain due to the capacitance difference between a certain photodiode and the pseudo photodiode, their magnitudes are exactly the same. become. Therefore, not only while the drive pulse is being applied by the signal processing circuit, but also when the current flowing out from the photodiode is integrated over time after the drive pulse falls, these residual components of the capacitance kick are completely offset. Then, only the amount of light incident on the photodiode within the fixed time is read out as an electric signal.

A drive pulse is sequentially applied to a plurality of photodiodes by a drive circuit or the like at regular intervals, and an auxiliary drive pulse is applied to the photodiodes after the application of these drive pulses by an auxiliary drive circuit or the like. It This auxiliary drive pulse rises when the drive pulse applied to the next photodiode falls and falls when the drive pulse applied to the next photodiode rises, so the drive pulse rises. The capacitance kick that sometimes occurs is canceled by the capacitance kick that occurs when the auxiliary drive pulse that is applied to the photodiode that precedes it falls, and the capacitance kick that occurs when the drive pulse falls is applied to the photodiode that precedes it. This is offset by the capacitance kick that occurs when the auxiliary drive pulse that rises is raised.

As described above, most of the capacitance kick is canceled and disappears. However, since the capacitances of these three photodiodes are different from each other, the capacitance kick is not completely canceled and remains a little. Not only the residual components of these capacitance kicks have opposite polarities,
They are almost the same in size because they remain due to the difference in capacitance between a particular photodiode and the one or two photodiodes before. Therefore, not only while the drive pulse is being applied by the signal processing circuit, but also when the current flowing out from the photodiode is integrated over time after the drive pulse falls, these residual components of the capacitance kick are almost completely canceled out. Then, only the amount of light incident on the photodiode within the fixed time is read out as an electric signal.

As described above, by adding the above-described configuration to the image reading apparatus according to the present invention, it is possible to easily reduce the noise associated with the driving voltage.

In addition, in the present invention, in addition to the charge storage type in which a capacitance kick is apt to occur, the photoelectric conversion element may be a CdS-C.
It can be applied to photoconductive type using dSe etc.
The present invention can be implemented in a mode in which various improvements, corrections, and modifications are added based on the knowledge of those skilled in the art without departing from the spirit of the invention.

[0063]

According to the image reading apparatus of the present invention, the drive side for applying the drive voltage to the photoelectric conversion element is divided into y blocks for each x, and the first drive voltage is determined by the x × y matrix. The number of gates on the driving side is extremely small because the second driving voltage is sequentially shifted to drive the photoelectric conversion elements or a fixed number of photoelectric conversion elements divided in blocks in order. It is possible to provide an inexpensive image reading apparatus that can be configured. Moreover, since the configuration of the analog section can be reduced,
A device resistant to noise can be configured. Further, since the driving voltage has a high noise margin, the design of the image reading device becomes simple. Further, the reading speed of the image reading apparatus is greatly affected by the performance of the drive-side shift register, but the addition of the configuration makes it possible to improve the reading speed regardless of the performance of the shift register. Further, in the image reading apparatus according to the present invention, the resistor forming the adder circuit is formed by using one of the constituent layers forming the photoelectric conversion element, that is, the lower electrode, the semiconductor layer, the upper transparent electrode, and the connection electrode. Therefore, it can be provided at a low cost with almost no increase in the manufacturing process.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of a main part showing an embodiment of an image reading apparatus according to the present invention.

2A is an AA cross-sectional explanatory view of the image reading apparatus shown in FIG. 1, and FIG. 2B is a BB cross-sectional explanatory view.

FIG. 3 is a circuit diagram of the image reading apparatus shown in FIG.

FIG. 4 (a) is an explanatory diagram showing a basic configuration of the image reading apparatus shown in FIGS. 1 to 3, and FIG. 4 (b) is a diagram for explaining its basic operation.

FIG. 5 is an explanatory diagram for obtaining an optimum resistance value of the resistance of the adder circuit included in the image reading apparatus according to the present invention.
(a) is a simplified circuit diagram of the image reading device, (b) is an addition circuit diagram showing the driving time, (c) and (d) are addition circuit diagrams showing the non-driving time. .

6A is a circuit diagram of an image reading apparatus in which the embodiment shown in FIG. 1 is simplified, and FIG. 6B is a time chart for explaining the operation.

FIG. 7 is a circuit diagram of a main part showing another embodiment of the image reading apparatus according to the present invention.

FIG. 8 is an AA cross-sectional explanatory view of the image reading apparatus shown in FIG.

FIG. 9 is a circuit diagram of a main part showing still another embodiment of the image reading apparatus according to the present invention.

10 (a) is an AA of the image reading apparatus shown in FIG.
It is sectional explanatory drawing, and the same figure (b) is BB sectional explanatory drawing.

FIG. 11 is a circuit configuration diagram of a main part showing still another embodiment of the image reading apparatus according to the present invention.

FIG. 12 is a circuit diagram of a main part showing still another embodiment of the image reading apparatus according to the present invention.

13 is an AA cross-sectional explanatory view of the image reading apparatus shown in FIG.

FIG. 14 is a circuit diagram showing an example of a conventional image reading apparatus.

FIG. 15 is a time chart for explaining the operation of the conventional example shown in FIG.

[Explanation of symbols]

10; Photodiode (photoelectric conversion element) 12; Blocking diode 16; Common wiring 18; Insulating substrate 20; Upper transparent electrode 22; Semiconductor layer 24; Lower electrode 26; Lead wiring 28, 30, 46, 48, 56, 58; Extraction wiring 32; transparent interlayer insulating film 34; contact holes 36, 60; connection electrodes 40, 42, 44, 50, 70, 74; image reading device 52; lower electrode film 54; light-shielding film 72; terminal portions 76, 78; Counter electrode 80; resistors B _1, B _{2, ...} B _n ; first block C _1, C _{2, ...} C _y ; second block D; first drive voltage E; second drive voltage Rd, Re, R; resistances D _1, D _{2, ...} D _y ; input terminals E _1, E _{2, ... Ex} ; input terminals D _(1-y) , E _(1-X) ; input wiring

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Claims (3)

(57) [Claims] 1. An image reading apparatus in which a driving voltage is sequentially applied to a plurality of one-dimensionally arranged photoelectric conversion elements to read an electric signal of the photoelectric conversion elements, and the driving voltage is applied to the photoelectric conversion elements. The driving side to be applied is divided into y blocks for every x, and first driving means for sequentially applying the first driving voltage in units of x photoelectric conversion elements in the block, and between each block. When the second applying means for applying the second drive voltage in sequence with the photoelectric conversion elements located at the same relative position and the first drive voltage and the second drive voltage are applied simultaneously, In an image reading apparatus including an adding circuit including a resistor that applies a driving voltage for driving the photoelectric conversion element, the adding circuit including the resistor is connected to an electrode of the photoelectric conversion element .
Or an image reading device formed on a layer that constitutes a semiconductor layer . 2. A plurality of one-dimensionally arranged photoelectric conversion elements are divided into n first blocks every m, and driving voltages are sequentially arranged in units of m photoelectric conversion elements in the first block. In the image reading apparatus, in which an electric signal of the photoelectric conversion element is read by being applied to each of the divided n first blocks, a driving side for sequentially applying a driving voltage to each of the n first blocks is further divided by y every x.
The second block is divided into a plurality of second blocks, and the first driving means for sequentially applying the first drive voltage in units of x first blocks in the second block is relatively the same between the second blocks. When the second drive means for sequentially applying the second drive voltage in units of the first block at the position and the first drive voltage and the second drive voltage are simultaneously applied to the first block, In an image reading apparatus including an adding circuit including a resistance that applies a driving voltage for driving m photoelectric conversion elements in the first block as a unit, the adding circuit including the resistance is connected to an electrode of the photoelectric conversion element .
Or an image reading device formed on a layer that constitutes a semiconductor layer . 3. The image reading apparatus according to claim 1, wherein the photoelectric conversion element is a photodiode and a blocking diode connected in series with opposite polarities.