JP3387407B2 - Digital modulation / demodulation method and digital communication device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital modulation / demodulation method and a digital communication device suitable for use in mobile communication.

[0002]

2. Description of the Related Art Conventionally, π / 4 shift QPSK (Quad
Rature Phase Shift Keying) is known as a digital modulation method suitable for mobile communication because it is not easily affected by fading and the like. This π / 4 shift QPSK is a type of QPSK that transmits information by providing four phase transition states in a carrier and associating each phase state with 2-bit digital data.

Signal arrangements in QPSK and π / 4 shift QPSK will be described with reference to FIGS. 10 (a) and 10 (b). 10 (a) and 10 (b) are signal space diagrams in which the modulation signals by QPSK and π / 4 shift QPSK are displayed in polar coordinates, respectively, in which the vertical axis Q represents the orthogonal component of the modulation signal and the horizontal axis I represents The modulation signal represents the level of the in-phase component. Further, hereinafter, the plot in the signal space diagram is referred to as a signal point.

First, in QPSK, four signal points having a phase difference of ± π / 4 and ± 3π / 4 with respect to a carrier wave are provided, and each signal point corresponds to 2-bit digital data. Therefore, there are four kinds of symbols in QPSK, that is, discrete states that a signal takes within a certain fixed time width. In QPSK, the phase difference between consecutive symbols is 0, ± π /
2, π. For example, in the case of FIG. 10A, if the symbol at a certain symbol time is at the signal point a, when the data to be transmitted at the next symbol time is “00”, the signal is transmitted as shown by the arrow in the figure. The phase status of the symbol changes to point a (that is, no phase change), to "01" to signal point b, to "11" to signal point c, and to "10" to signal point d. To do.

On the other hand, in π / 4 shift QPSK, the phase difference between consecutive symbols is ± π / 4, ± 3π.
It becomes / 4π. That is, for example, in the case of FIG. 10B, if the symbol at a certain symbol time is at the signal point a, when the data to be transmitted at the next symbol time is “00”, as indicated by the arrow in FIG. Is the signal point a '
, "01" changes to the signal point b ', "11" changes to the signal point c', and "10" changes to the signal point d '.

As described above, the signal points of π / 4 shift QPSK are represented by "○" or "●" in the figure at each symbol time.
Alternate the points indicated by. Therefore, π / 4 shift QP
In SK, there are apparently eight signal points in the signal space, but since the number of possible phase states after one symbol time is limited to four, two bits of information are transmitted per symbol. become.

Further, in the above-mentioned π / 4 shift QPSK, as shown in FIG. 10 (b), when the phase of the modulation signal changes, it does not pass through the origin of the signal space diagram.
For this reason, there are advantages that the amplitude fluctuation of the modulated wave envelope can be reduced, and the occurrence of nonlinear distortion in the power amplifier in the communication device can be suppressed. Further, unlike QPSK, even if the same data continues, a phase change of π / 4 radians always occurs, so that the phase of the modulation signal constantly changes, which has the advantage of facilitating the timing reproduction. .

Amplitude phase shift keying (APSK) is another digital modulation method.
There is. This amplitude / phase modulation method modulates two parameters of the amplitude and phase of a carrier wave according to the value of digital data to be transmitted. One example is 16QAM.
The signal constellation of (Quadrature Amplitude Modulation) is shown in the signal space diagram of FIG. As shown in this figure, 16Q
In multilevel digital modulation such as AM that modulates phase and amplitude, each symbol (in the figure,
The points indicated by "●" are arranged with a uniform Euclidean distance.

Such signal arrangements are, for example, 9 each other.
4-level ASK (Amplitude Shift Keying) based on 2-bit data for sine wave signals with 0 ° phase difference
After modulation, it is obtained by adding the two modulated signals. Thus, 16QAM will have 4 bits of data per symbol, so
It has an advantage that the transmission speed is improved as compared with QPSK and π / 4 shift QPSK.

Further, in multi-level digital modulation such as 16QAM, it is not possible to determine which level the symbol having the same phase information is, so the preamble signal (the point indicated by "○" in FIG. 11) is transmitted at a certain time interval. Then, the amplitude of the received signal is determined with reference to the amplitude of the signal.

[0011]

[Problems to be Solved by the Invention] However, π / 4
In the shift QPSK, when trying to transmit high-speed data, the occupied bandwidth becomes wide according to the speed, and there is a problem that the frequency band used for communication cannot be used efficiently. Also, when multi-valued by using amplitude phase modulation to transmit high-speed data, the dynamic range of the signal amplitude becomes wide, so that it is easily affected by the nonlinear distortion of the transmission power amplifier and linear up to large power. A power amplifier is needed. Therefore, there is a problem that the current consumption is large and the power efficiency is poor.

Further, since the Euclidean distance between the symbols, that is, the distance between the signal points displayed in polar coordinates is short, the multi-valued amplitude-phase modulated signal is vulnerable to fading and noise and cannot withstand high-speed movement. However, it is necessary to add a circuit on the receiving side to compensate for these effects. Therefore, the multi-valued amplitude-phase modulation is
Although it can be received at the target transmission speed in an environment with good radio wave propagation, the error rate is high in an environment with poor radio wave propagation, such as when moving, where multipath fading occurs, and the actual transmission speed is slow. π / 4 shift QP
In some cases, it was equal to or less than SK.

Further, as in the above-mentioned 16QAM, when a preamble signal is inserted at a certain time interval and the amplitude of the signal is used as a reference to judge the amplitude of the received signal in mobile communication, fading occurs. The following problems occur in the environment. When the amplitude of the radio field fluctuates sharply within the time interval of the preamble signal, there is a high possibility that an error will occur in the ASK determination depending on the setting of the time interval (see FIG. 12, the shaded area in the drawing). Is the preamble signal). If the insertion interval of the preamble signal is narrowed in order to cope with fading that occurs in a short time period, the amount of data actually transmitted will be reduced accordingly (FIG. 13).
reference).

The present invention has been made in view of the above circumstances, the performance required for the power amplifier of the transmitter is relaxed, and the receiver can be configured with a simple receiving circuit, and It is an object of the present invention to provide a digital modulation / demodulation method and a digital communication device capable of transmitting high-speed data without expanding an occupied bandwidth and capable of sufficiently transmitting data even in an environment where radio wave propagation is poor such as during movement.

Furthermore, it is not necessary to insert a preamble signal as in the conventional multi-level digital modulation system for modulating the phase and the amplitude, so that data can be exchanged accurately and efficiently even in an environment where fading can occur. It is an object of the present invention to provide a digital modulation / demodulation method and a digital communication device that can be performed.

[0016]

According to a first aspect of the present invention , phase amplitude modulation of a carrier wave is performed according to 3-bit information.
In the digital modulation method, the 3-bit information is displayed.
2 ³ symbols represented by amplitude and phase
2D signal space
Next, a symbol that represents "0" and a symbol that represents "1"
At a certain time, the minimum Euclidean distance between them is increased.
The symbol position in is the symbol one symbol time before
+ Π / 4 radian phase changes with respect to position, and amplitude
1st symbol position which becomes the level of 1 and -π / 4 radio
The second phase in which the unphase changes and the amplitude becomes the first level.
Symbol position of + 3π / 4 radian phase changes,
A third symbol position whose amplitude is the first level;
The -3π / 4 radian phase changes and the amplitude changes to the first level.
4th symbol position as bell and + 2π / 4 radians
The fifth phase where the phase changes and the amplitude reaches the first level.
Amplitude and -2π / 4 radian phase change, amplitude
The sixth symbol position where is the first level, and +2
π / 4 radian phase changes, amplitude is at the first level
A seventh symbol position, which is a second level lower than
-2π / 4 radian phase is changed and the amplitude is changed to the second level.
Symbol of any of the 8th symbol positions that become the bell
It is characterized in that

The invention according to claim 2 is 3 bits of information
Modulation method for phase-amplitude modulation of carrier wave according to frequency
, 2 ³ symbols representing the 3 bits of information
Is a two-dimensional signal space represented by amplitude and phase
, The bits that represent “0” in order from the bit with the highest weight.
The smallest Euclidean between the vol and the symbol representing "1"
Arranged with a long distance, 1 bit out of the 3 bits
Multiple groups of symbols with the same value for
Of these, noise, fading, attenuation of electric field strength, etc.
Depending on the degradation of signal quality
Belong to the group with the symbol with the shortest dead distance
Process of transmitting 2-bit information without using symbols
And, depending on the deterioration of the communication quality, it is used in the above process.
For the rest of the symbols, excluding the ones that were not
The above process is repeated, and the error of transmitting 1-bit information is exceeded.
And the symbol position at a certain time is 1
+ Π / 4 radians with respect to the symbol position before the time of Bol
First symbol with phase change and amplitude at first level
The position and -π / 4 radian phase change, and the amplitude is
The second symbol position at level 1 and + 3π / 4
The ian phase changes and the amplitude becomes the first level.
3 symbol position and -3π / 4 radian phase change
And the fourth symbol position where the amplitude becomes the first level.
And + 2π / 4 radian phase changes and the amplitude is the first
5th symbol position, which is the level of, and -2π / 4 radio
The sixth phase in which the unphase changes and the amplitude becomes the first level.
Symbol position of + 2π / 4 radian phase changes,
A second level whose amplitude is lower than the first level
7th symbol position and -2π / 4 radian phase change
And the eighth symbol position where the amplitude becomes the second level.
It is characterized by being set to one of the symbol positions
It

The invention described in claim 3 is the same as claim 1 or
2. The digital modulation method according to 2, wherein the second level
From the seventh symbol position to the first and third positions.
Each Euclidean distance to the position and the first
From each of the eight symbol positions to the second and fourth signals.
The closed distance is the fifth symbol position, respectively.
From each Euclidean distance from the first and third signals,
And from the sixth symbol position to the second and fourth
Determined to be equal to each Euclidean distance to the signal
It is characterized by being.

[0019]

[0020]

[0021]

According to a fourth aspect of the present invention, in a digital communication device that transmits and receives the digital data by discretely modulating and demodulating a carrier wave in accordance with digital data that is sequentially input, the digital data is converted into 3 Based on the conversion means for converting to parallel data of bits and the 3-bit parallel data converted by the conversion means, the state of the phase and amplitude of the modulation signal at a certain time is calculated as follows: A first state in which + π / 4 radian phase changes and the amplitude becomes a first level and a state in which −π / 4 radian phase changes and an amplitude reaches the first level with respect to the amplitude state And the + 3π / 4 radian phase change, and the amplitude is the first
Level, the third state changes, the -3π / 4 radian phase changes, the fourth state changes the amplitude to the first level, and the + 2π / 4 radian phase changes, the amplitude changes the first level.
Level, the second state is changed to −2π / 4 radian phase, the sixth level is changed to the first level, and + 2π / 4 radian phase is changed to the first level.
A seventh state, which is a second level lower than the level of
-2π / 4 radian phase is changed, and the modulation means for changing to any one of the eighth state in which the amplitude becomes the second level is provided.

According to a fifth aspect of the present invention, in the digital communication device according to the fourth aspect , the conversion means is
Depending on the deterioration of communication quality due to fading, attenuation of electric field strength, etc., a predetermined one of the 3-bit parallel data to be output is provided so that the modulated signal is always in one of the first to fourth states. Is fixed to a constant value, the sequentially input digital data is converted into 2-bit parallel data, and the value is combined with a fixed predetermined bit to output as 3-bit parallel data. To do.

According to a sixth aspect of the present invention, in the digital communication apparatus according to the fifth aspect , the conversion means is configured such that the modulation signal is always in the first or fourth state according to the deterioration of the communication quality. , Or output so as to be in the second or third state or the fifth or sixth state 3
Of the parallel data of bits, the predetermined bit is fixed to a constant value, and a predetermined bit of two bits except the predetermined bit is fixed to a constant value, and the sequentially input digital data is set to 1 It is characterized in that it is converted into bit data, and the value is combined with a fixed predetermined 2 bits and output as parallel data of 3 bits.

The invention according to claim 7 is the invention according to claims 4 to 4 .
6. The digital communication device according to any one of 6 , wherein the modulation means includes carrier generation means for generating a carrier wave, storage means for storing information on a phase difference of the current modulation signal with respect to the phase of the carrier wave, and the conversion means. Selecting one of the first to eighth states according to the value of each bit of the 3-bit parallel data output from the means,
From the phase change amount in the selected state and the information stored in the storage means, the phase difference of the phase of the modulated signal with respect to the phase of the carrier wave is obtained, and the obtained phase difference and the amplitude in the selected state are A phase amplitude instructing means, an information updating means for updating the phase difference information stored in the storage means to a phase difference instructed by the phase amplitude instructing means, and the phase amplitude instructing means It is characterized by comprising phase amplitude control means for controlling the phase and amplitude of the carrier wave so as to obtain the phase difference and the amplitude, and outputting as a modulation signal.

According to an eighth aspect of the present invention, in the digital communication apparatus according to the seventh aspect , the phase / amplitude instructing means outputs the 3-bit parallel data based on the 3-bit parallel data output from the converting means. A first for selecting one of the first, third, fifth, and seventh states or the second, fourth, sixth, and eighth states according to a predetermined 1-bit value After the first selection, according to the value of a predetermined one bit of the two bits excluding the first bit from the three bits, first, third, When the fifth and seventh states are selected, one of the first and third states or the fifth and seventh states is selected, and the second and the second states are selected by the first selection. If the fourth, sixth, and eighth states are selected, the
According to the value of the last 1 bit of the 3 bits after the second determination is performed, the second selection for selecting either the fourth state or the sixth or eighth state is performed. The second
One of the two states selected by
It is characterized by selecting one state.

According to a ninth aspect of the present invention, in the digital communication apparatus according to the eighth aspect , the phase amplitude control means is configured so that when the amplitude instructed by the phase amplitude instructing means is the first level. Controls the amplitude of the modulation signal to be at the same level as the amplitude of the carrier wave, and when the amplitude instructed by the phase amplitude instructing means is the second level, the amplitude of the modulation signal is 2 of the amplitude of the carrier
It is characterized in that it is controlled to be ^1/2 -1 times.

According to a tenth aspect of the present invention, there is provided a digital communication device according to any one of the fourth to ninth aspects, wherein the receiving means receives the modulated signal output from the modulating means. Detection means for performing envelope detection of the modulated signal received by the reception means, phase difference detection means for detecting a phase difference between consecutive symbols, level of the detection signal output from the detection means, and Demodulating means for demodulating into 3-bit digital data based on the phase difference detected by the phase difference detecting means, wherein the demodulating means detects the phase difference detected by the phase difference detecting means,
The value of one bit among the three bits is determined depending on whether the phase is advanced or delayed, and whether the phase difference detected by the phase difference detection means is either ± π / 4 or ± 3π / 4, When the value of 1 bit of the remaining 2 bits of the 3 bits is determined and the phase difference detected by the phase difference detecting means is either ± π / 4 or ± 3π / 4, the phase difference is detected. The value of the last bit is determined by the value of, and if it is neither ± π / 4 nor ± 3π / 4, the value of the last bit is determined based on the detection result of the detection means. Characterize.

[0029]

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described below with reference to the drawings. First, a symbol arrangement in an embodiment of a digital modulation method and a digital communication device according to the present invention will be described with reference to FIG. As for the symbol arrangement in the digital modulation method and the digital communication device described below, the symbol arrangement of 2 ³ pieces showing 3-bit information will be explained. Further, the digital modulation method and the digital communication device according to the present embodiment are set so that the phase and amplitude between consecutive symbols change as follows by amplitude phase modulation.

First, the phase change between consecutive symbols is
Signal points are arranged at positions of ± π / 4, ± 2π / 4, ± 3π / 4, and the phase change is ± 2π / 4, and the phase change is + 2π / 4 from the signal point, respectively. Each Euclidean distance to a signal point with a phase change of + π / 4, + 3π / 4, and from a signal point with a phase change of −2π / 4 to a signal point with a phase change of −π / 4, −3π / 4 A signal point of the ASK signal is arranged at a position where the same Euclidean distance is obtained as each Euclidean distance of.

Next, the above-mentioned signal arrangement will be described with reference to the signal space diagram of FIG. For example, as shown in FIG. 1A, when the signal one symbol time before is at the signal point SP in the figure, the signal position at the current symbol time has a phase change with respect to the signal point SP. , ± π /
4 (signal positions A and B), ± 2π / 4 (signal points C and D),
The position of ± 3π / 4 (signal points E and F) and the signal point E-
Euclidean distances between C and C-A, positions at which the same Euclidean distance is obtained (signal point G), signal points FD and
It is one of a total of eight signal positions, that is, each Euclidean distance between D and B and a position (signal point H) at which the same Euclidean distance is obtained (signal point H).

Further, as shown in FIG. 1B, even when the signal point SP ′ one symbol time before is the ASK signal with the amplitude changed, the signal position at the current symbol time is as shown in FIG. It is similar to (a).

Here, in the above-mentioned signal arrangement, among the phase modulations of constant amplitude (signal positions A to F) where the phase difference between each symbol is ± π / 4, ± 2π / 4, ± 3π / 4, It can be considered that this is a digital modulation method in which amplitude modulation (signal positions G and H) is added only in some phase modulation (phase difference of ± 2π / 4). Further, from another perspective, the signal position of the π / 4 shift QPSK in which the phase difference between consecutive symbols is ± π / 4 and ± 3π / 4 (in FIG. 1, signal points A, B, E, and Binary AS due to continuous phase change in F)
It can be said that the arrangement is such that K signals (signal points C, D, G, and H in FIG. 1) are added.

When the signal between consecutive symbols changes as described above, the number of signal points is apparently 16 but the amplitude / phase transition state that can be taken after one symbol time is limited to eight. Therefore, 3-bit information is transmitted per symbol.

Next, the symbols are assigned to these eight signal points by two-dimensional signals represented by the amplitude and the phase of 2 ⁿ symbols representing n-bit (n is a natural number of 3 or more) information. This is performed according to the general rule of the present invention in which, in order from a bit with a heavy weight, a minimum Euclidean distance between a symbol representing “0” and a symbol representing “1” is arranged in a space with a long length. Therefore, symbol allocation to each signal point shown in FIG. 1 is performed, for example, in the following procedure. In addition, regarding the 3-bit information represented by each symbol, it is assumed that the weighting of each bit is determined such that the weighting becomes lighter in the order of MSB → LSB → second bit (intermediate bit).

First, the four symbols whose LSB is "0" are set to π
Same as / 4 shift QPSK, phase change of ± π / 4, ± 3
It is arranged at π / 4 signal points A, B, E, and F. Also, MS
The symbol of B is "0", and the symbol of "1" is -π / 4, -3π at signal points A and E where the phase change is π / 4, 3π / 4.
It is arranged at signal points B and F of / 4.

Furthermore, the four symbols whose LSB is "1" are
It is arranged at the signal point of a binary ASK signal with a phase change of ± π / 2. At this time, the MSB is the same as when the LSB is “0”.
Symbols with "0" are placed at signal points with positive phase change (phase change of π / 2), and symbols with MSB of "1" are placed at signal points with negative phase change (-π / 2 phase change). To do.

Of the four symbols whose LSB is "1", two symbols are used as the origin and the phase change is ± π / 4.
And signal points A, B, E, and F of ± 3π / 4 are arranged at signal points C and D located on a concentric circle. In addition, the remaining 2 symbols are respectively π / 4 and 3π / 4,
And, the Euclidean distance from each of the signal points −π / 4 and −3π / 4 is the signal point C where the previous two symbols are arranged,
The signal points are arranged at signal points G and H having the same distance as D.

The position of each symbol arranged by the above-mentioned procedure is shown in FIG. As is apparent from this figure, the symbol (signal points A, C, E, G) in which the value of the most heavily weighted bit (MSB) represents "0" and the symbol (signal points B, C) in which "1" is represented. , F, H) is the minimum Euclidean distance (distance between signal points G-H) between the symbols (signal points A, B, B, E, F) and the symbol representing "1" (signal points C, D, G, H) is longer than the minimum Euclidean distance (between signal points A-C, signal points A-G, etc.). Has become.

The minimum Euclidean distance between the symbol whose LSB value is "0" and the symbol whose value is "1" is that the value of the bit weighted next (second bit) is "0". The minimum Euclidean distance (between signal points C-G, signal point D-) between the symbol (signal points A, B, C, D) and the symbol (1) that represents "1" (signal points E, F, G, H).
It is longer than the distance between H). Therefore, the minimum Euclidean distance between each symbol in the digital modulation method of this embodiment is as follows by weighting each bit. MSB>LSB> 2nd bit (intermediate bit)

In general, the main factor that deteriorates the error rate in digital modulation is the Euclidean distance between signals, so it is important how to widen this. As shown in FIG. 2, the ASK symbols (symbols assigned to the signals G and H in the case of FIG. 2) are set to two and are arranged at the positions satisfying the above-mentioned condition. Can be fully obtained. As a result, fading or noise does not significantly affect demodulation, so that the structure of the receiving circuit is simple and high-speed data can be transmitted. In addition, the error rate during the movement of the digital communication device can be kept low. Furthermore, by arranging each symbol by weighting the bits as described above, the redundant signal required for error correction is shortened, the compensation process on the receiving side is simplified, and at the same time, the effective data transmission rate is improved. .

By fixing LSB to "0",
In FIG. 2, among 3 bits, a plurality of groups of which one bit has the same value, that is, a plurality of groups (symbols (= signal points) A, C, E, and G (MSB value is “0”), symbol B) , D, F, H (both MSB values are "1"), symbols A, B, E, F (both LSB values are "0"), symbols C, D, G, H (both LSB values are "1"), symbols A, B, C, D (both values of the second bit are "0") and symbols E, F, G, H (both values of the second bit are "1") , Each group having a symbol having the shortest Euclidean distance between adjacent symbols (a group of symbols C, D, G, H. "Adjacent symbols" means symbols C, G and symbols D, H.
Symbol) is no longer placed in the signal space,
As a result, as shown in FIG. 3, the modulated signal becomes exactly the same as π / 4 shift QPSK.

Therefore, the conventional π / 4 shift QPSK
Can be shared with a wireless system that uses the digital modulation method described above, and when the state of radio wave propagation is poor, such as when radio waves are blocked while moving or between buildings, the digital modulation method described above can be used only by operating the transmission data. Therefore, it is possible to switch to π / 4 shift QPSK, and it is possible to secure a highly reliable transmission path. Depending on the arrangement of symbols, the number of bits whose value is fixed is not limited to 1 bit, but by fixing the value of more bits, information can be obtained by using only the symbols having a longer Euclidean distance between adjacent symbols. May be transmitted. In this case, although the transmission speed is reduced, it is possible to secure a highly reliable transmission path only by operating the transmission data.

The occupied frequency bandwidth in digital modulation is the value obtained by dividing the transmission rate by the number of bits per symbol, and the maximum amplitude / phase change (moving distance in polar coordinates).
Increases in proportion to. In the symbol arrangement described above,
Since both of them are smaller than the amplitude / phase change of π / 4 shift QPSK, the occupied bandwidth is the same as π / 4 shift QPSK and the transmission speed can be increased.

Here, in FIG. 4, π / 4 shift QPSK,
In the modulation method according to the present embodiment, “transmission rate /
The modulation spectrum when the number of bits per symbol is made equal is shown. From this figure, π / 4 shift QPSK
In this case, it can be seen that in the case of 4800 bps, the occupied bandwidths of both are almost the same, although it is 7200 bps in the modulation method of the present embodiment.

Next, FIG. 5 and FIG. 6 show block diagrams of a transceiver that realizes the above-mentioned modulation method. FIG. 5 is a block diagram showing a configuration of a transmitter that performs modulation by the above-described modulation method. In this figure, reference numeral 1 is a signal converter, which sequentially inputs a data stream bit by bit at 3 sampling intervals. It is converted into bit parallel data and converted into digital data for generating I and Q signals for quadrature amplitude conversion. The signal converter 1 can be realized by a serial-parallel conversion circuit and an 8-value-multivalue conversion circuit, or a serial-parallel conversion circuit and a circuit by reading from a ROM table. Further, the serial-parallel conversion circuit converts the input data stream into 2-bit parallel data, if necessary, and outputs the 3-bit output parallel data MSB and the second data.
It has the function of fixing the LSB to "0" as the bit.

For example, when the signal converter 1 is realized by a circuit by reading from the ROM table,
First, in the ROM table, the carrier wave phases are 0 °, 45 °, 90 °, 135 °, 180 ° and 225, respectively.
Changes by °, 270 °, 315 °, and the amplitude is 1 (=
Carrier level) and 2 ^1/2 -1 (= carrier level 2
The data of 16 types of I and Q signals, which is ^1/2 −1 times), is stored, and the previous symbol converted into 3-bit parallel data by the serial-parallel conversion circuit described above is If "010", the phase at the time of sampling is 45 °, the amplitude is 1, and the next symbol is "000", the signal converter 1 outputs the I and Q signals having the phase of 90 ° and the amplitude of 1. Data is read from the ROM table and output to the D / A converters 2 and 3, respectively.

Hereinafter, in Table 1, the previous symbol is "01".
When the sampling phase is 45 ° and the amplitude is 1 at 0 ", the phase and the amplitude of the modulation signal output according to each value of the next symbol are shown. Data of I and Q signals for obtaining the modulated signals shown in Table 1 corresponding to the symbols is output.

[Table 1]

In the serial-parallel conversion circuit, when the communication condition deteriorates, the LSB of the output 3-bit parallel data is fixed to "0", and the data stream is converted into 2-bit parallel data. After conversion, the data is switched so as to be output as the second bit and MSB. As a result, the output from the signal converter 1 is such that the amplitude of the finally output modulation signal is 1
Then, the I and Q signal data for performing the quadrature phase modulation similar to the conventional π / 4 shift QPSK in which the phase change is either ± π / 4 or ± 3π / 4 is output.

The D / A converters 2 and 3 are signal converters 1.
The digital data output from the converter is converted into an analog signal, which is output as I and Q signals. Reference numerals 4 and 5 are low-pass filters, for which low-pass filters having impulse responses that do not cause intersymbol interference, such as Nyquist filters, are used. The low-pass filters 4 and 5 limit the band of the analog signal output from the D / A converters 2 and 3, and remove the harmonic signal contained in a large amount in the analog signal.

Reference numeral 6 denotes an oscillator, which generates a carrier wave of the digital communication device in this embodiment. A phase shifter 7 delays the phase shift of the carrier wave output from the oscillator 6 by π / 2. Reference numerals 8 and 9 denote multipliers, respectively. The multiplier 8 multiplies the I ′ signal output from the low-pass filter 4 by the carrier wave output from the oscillator 6, and the multiplier 9 outputs Q ′ output from the low-pass filter 5. The signal is multiplied by the carrier wave whose phase is delayed by π / 2 and output from the phase shifter 7. Reference numeral 10 denotes an adder that adds the signals output from the multipliers 8 and 9 and outputs the result to the antenna ANT.

Next, the configuration of the receiver in the digital communication apparatus of this embodiment will be described with reference to FIG. In the figure, reference numeral 11 is a frequency converter, which is composed of a mixer 13, a local oscillator 14, and a bandpass filter 15, as shown in FIG. Then, the signal received by the antenna ANT of FIG. 6 is input to the input terminal IN, and after being multiplied by the local oscillator signal output from the local oscillator 14 in the mixer 13, the frequency of the received signal and the local The frequency component of the difference from the frequency of the outgoing signal is passed.

That is, the configuration of FIG. 7A is a down converter, and since it is generally difficult to directly perform signal processing on an RF signal having a high frequency, the signal is converted to an IF signal having a lower frequency. Therefore, when the signal received by the antenna ANT can be directly processed, the frequency converter 11 is not necessary. Returning to FIG. 6, the signal demodulator 12 includes an AM demodulator 16, as shown in FIG.
It comprises a DPSK demodulator 17 and a decoder 18.

Conventionally, in a modulation method using ASK such as QAM, it is necessary for the receiver side to perform a completely opposite operation to the transmitter shown in FIG. 5 to reproduce and decode the I and Q signals. Therefore, expensive circuits such as a quadrature demodulator and an A / D converter are required.

On the other hand, in the case of the digital modulation method in this embodiment, ± π / 4, ± 2π / 4, ± 3π / 4
Among the signal points having a constant signal level (for example, the signal points A to F in FIG. 2) for which the phase modulation is performed, there is an amplitude component only in the phase modulation of ± 2π / 4 (signal points G and H), ± π / 4, ±
The 3π / 4 phase modulation has no amplitude component. Therefore,
At the time of demodulation, the amplitude level of the symbol for which the phase information including the amplitude component is obtained may be determined with reference to the signal level when the phase difference does not include the amplitude component. Therefore, unlike the conventional multilevel digital modulation method, the preamble signal serving as the reference of the amplitude component is unnecessary.

As shown in FIG. 8, the fading occurs because the reference value (the shaded portion in FIG. 8) is updated at 1-symbol intervals in the shortest case in the transmitted / received data series. Therefore, even if a reference signal level is received while the electric field strength is fluctuating, the amount of change in the electric field strength becomes small (for example, a portion indicated by A in FIG. 8),
Therefore, good demodulation characteristics can be obtained in mobile communication in which the carrier level fluctuates momentarily due to fading.

In the above case, the differential phase modulation in which the phase transition is always added at the time of modulation is taken as an example.
Also in the case of QPSK shown in (a), signal points a to d
By making the signal level of a constant and adding a symbol in which an amplitude modulation component is added to any of ± π / 4 and ± 3π / 4 phases, and using the signal levels of the signal points a to d as a reference. ,
At least the effect that the preamble signal is unnecessary is obtained.

Therefore, as the demodulator used in this embodiment, as shown in FIG. 9A, the envelope detector 19 for detecting the signal level of the modulated wave, and the output from the envelope detector 19 It is possible to use a simple AM demodulator configured by a determination circuit 20 that samples a signal at predetermined time intervals according to a sampling signal supplied from the outside and determines the level thereof.

For phase determination, the DPSK demodulator 17 which has been widely used in the past can be used. As the DPSK demodulator, there is a differential detection system shown in FIG. 9B. In the DPSK demodulator shown in FIG. 9B, the output signal from the limit amplifier 21
The output signal and a signal delayed by 1 symbol by the 1-bit delay circuit 22 are subjected to complex multiplication in the mixer 23 to obtain a signal corresponding to the phase difference between 1 symbols. Then, after passing the signal through the low-pass filter 24, the determination circuit 25 determines the phase difference between one symbol every predetermined time according to the sampling signal supplied from the outside.

Then, the above-mentioned AM demodulators 16 and D
Based on the output of PSK demodulator 17, decoder 18 composites the transmitted digital data. That is, first, D
According to the output of the PSK demodulator 17, the MSB is set to "0" when the phase change is positive and the MSB is set to "1" when the phase change is negative. Next, the phase change is ± π /
If either of 4 and ± 3π / 4, the LSB is set to “0”, and the value of the second bit is determined according to the amount of phase change as in the case of π / 4 shift QPSK. When the phase change is neither ± π / 4 nor ± 3π / 4, the LSB is set to “1” and the value of the intermediate bit is determined according to the output of the AM demodulator 16.

As described above, in the digital communication device according to the present embodiment, the demodulator that has been used before can be used, so that a simple and inexpensive receiver can be constructed.

There is also an advantage in the decoder 18 shown in FIG. 7 (b). Conventionally, when a digital signal is transmitted, when an encoding technique for correcting an error generated during transmission is used, for example, when a BCH code is used, information bit 4
, The 3-bit error correction code is redundant. If all the bits are sent under the same conditions, a method capable of correcting all such bits is required. In the digital modulation method of this embodiment, symbols are arranged by weighting the bits as described above. Since all the bits are not sent under the same condition (Euclidean distance in this case), the load of error correction processing can be changed for the weighted bits. As a result, the processing capacity of the decoder 18 can be reduced and redundant signals can be reduced, and the information transmission amount can be increased with an inexpensive configuration.

In the serial-parallel conversion circuit which constitutes the signal converter 1 of FIG. 5, the LSB is fixed to "0", and the input data stream is converted into 2-bit parallel data, and then converted into 3-bit parallel data. It has a function of outputting together with the MSB of the output parallel data and the LSB (value is fixed to "0") as the second bit, but each symbol of the group having the symbol with the shortest Euclidean distance between adjacent symbols is a signal. Bit values other than LSB may be fixed to “0” or “1” according to the arrangement of symbols so that they are not arranged in space.

Further, in the serial-parallel conversion circuit value, the number of bits for fixing the value may be increased to perform digital modulation only on the symbol having a longer Euclidean distance between adjacent symbols. in this case,
Although the transmission speed is reduced, it is possible to secure a more reliable transmission path only by manipulating the transmission data.

[0065]

[0066]

As described above, according to the present invention,
Two- ^third symbols representing 3- bit information are sequentially arranged in a two-dimensional signal space represented by amplitude and phase from a bit with a heavy weight to a symbol representing “0” and a symbol representing “1”. Since the minimum Euclidean distance between them is arranged longer, the redundant signal required for error correction becomes shorter,
The compensation process on the receiving side can be simplified, and at the same time, the effective data transmission rate can be improved.

Further, among a plurality of groups of symbols in which one bit of the three bits represents the same value, adjacent symbols corresponding to deterioration of communication quality due to noise, fading, attenuation of electric field strength, etc. Transmitting 2- bit information without using symbols belonging to a group having a symbol having the shortest Euclidean distance between
When the communication quality is deteriorated, the process further includes repeating the above process for the remaining symbols excluding the symbols not used in the process and transmitting 1- bit information according to the deterioration of the communication quality. However, a large Euclidean distance between symbols used for transmission can be secured, and a more reliable transmission path can be secured.

[0068] Also, the change in phase and amplitude between symbols continue communicating, ± [pi / 4 is the phase, ± 2 [pi / 4, ±
Six symbols that change by 3π / 4 radians and have a first level of amplitude, and two symbols that change by ± 2π / 4 radians in phase and have a second level whose amplitude is lower than the first level. , Which is one of the symbols, and like the π / 4 shift QPSK, the signal locus does not pass through the origin in the signal space diagram and the dynamic range of the signal is narrow, so a high-performance linear amplifier is required. By not doing so, a simple and power efficient transmitter can be used.

Further, since the ASK symbols have two phases different in phase by π, discrimination in demodulation becomes easy,
The receiver can have a simple circuit configuration. further,
Since the amplitude / phase change is equal to or less than π / 4 shift QPSK, the number of bits per symbol can be increased by 1 even though the occupied bandwidth is the same. By this means, it is possible to transmit at a speed of about 1.5 times with the same occupied bandwidth as π / 4 shift QPSK.

The weighting of each bit of the 3-bit digital data with respect to the above eight signal points is performed for the first bit depending on whether or not the same signal point as the π / 4 shift QPSK, and the second bit. , For the third bit, for the same signal point as π / 4 shift QPSK,
Since the same weighting as in π / 4 shift QPSK is performed, it is possible to fix π / 4 shift QP by fixing any one bit.
Since the signal arrangement is the same as that of SK, this enables sharing with a wireless system using π / 4 shift QPSK, and modulation / demodulation is performed from the modulation method in the digital communication device of the present invention when the radio wave propagation state is poor. By switching to π / 4 shift QPSK, it is possible to secure a highly reliable transmission path.

Further, this switching can be performed by operating the transmission data, that is, by simply setting a predetermined bit of the 3-bit data to a constant value, so that the switching operation can be performed by a simple system. Furthermore, since the Euclidean distance between each symbol is sufficiently maintained, the multivalued Q
Compared to AM or the like, the influence of fading and noise upon reception is reduced, and stable reception can be performed even during communication during movement.

[Brief description of drawings]

FIG. 1 is a signal space diagram showing each signal position of a digital communication device according to an embodiment of the present invention.

FIG. 2 is a signal space diagram showing a symbol arrangement assigned to each signal position of the digital communication device.

FIG. 3 is a signal space diagram showing changes in amplitude and phase when 3-bit digital data input to the digital communication device is fixed to “0”.

FIG. 4 is a graph showing a modulation spectrum when the transmission method / the number of bits per symbol is the same in the modulation method of the digital communication device and in π / 4 shift QPSK.

FIG. 5 is a block diagram showing a configuration of a transmitter of the digital communication device.

FIG. 6 is a block diagram showing a configuration of a receiver of the digital communication device.

FIG. 7 is a block diagram showing a configuration of each unit constituting the receiver, (a) is a block diagram showing a configuration of a frequency converter, and (b) is a block diagram showing a configuration of a signal demodulator.

FIG. 8 is an explanatory diagram for explaining a relationship between a change in electric field strength due to fading and a reference signal level existing in a transmitted / received data sequence.

FIG. 9 is a block diagram showing a configuration of each part constituting the signal demodulator of FIG. 7B, in which FIG. 9A is an AM demodulator;
(B) is a block diagram showing a configuration of a DPSK demodulator.

FIG. 10 is a signal space diagram showing signal positions in QPSK and π / 4 shift QPSK.

FIG. 11 is a signal space diagram showing signal positions in 16QAM.

FIG. 12 is an explanatory diagram for explaining how the level of a preamble signal in a transmitted / received data sequence changes due to a change in electric field strength due to fading.

FIG. 13 is an explanatory diagram for explaining the relationship between the insertion interval of preamble signals and the amount of data actually transmitted.

[Explanation of symbols]

1 Signal converter 2,3 D / A converter 4,5 low pass filter 6 oscillators 7 Phase shifter 8,9 multiplier 10 adder

─────────────────────────────────────────────────── ─── Continuation of front page (56) Reference JP-A-8-32641 (JP, A) JP-A-5-276211 (JP, A) JP-A-3-283743 (JP, A) JP-A-7- 143185 (JP, A) JP 59-169255 (JP, A) JP 64-5135 (JP, A) JP-A 5-501190 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H04L 27/36 H04L 27/22

Claims (10)

(57) [Claims] 1. A digital modulation method for performing amplitude modulation of a carrier wave in accordance with the 3-bit information, 2 ³ representing the 3-bit information In the two-dimensional signal space represented by the amplitude and the phase, increasing the minimum Euclidean distance between the symbol representing “0” and the symbol representing “1” in order from the bit with a heavy weight. The symbol position at a certain time is
The + π / 4 radian phase changes with respect to the symbol position, and the amplitude becomes the first level.
The first symbol position is changed to −π / 4 radian phase, and the amplitude is changed to the first level.
And the second symbol position, which is a + 3π / 4 radian phase, is changed, and the amplitude is the first level.
The third symbol position, which is a bell, and -3π / 4 radian phase are changed, and the amplitude is the first level.
The fourth symbol position, which becomes a bell, and + 2π / 4 radian phase change, and the amplitude changes to the first level.
The fifth symbol position, which is a bell, and −2π / 4 radian phase are changed, and the amplitude is the first level.
The sixth symbol position, which is a bell, and the + 2π / 4 radian phase change, and the amplitude changes to the first level.
7th symbol position, second level lower than bell
And −2π / 4 radian phase is changed, and the amplitude is the second level.
Symbol of any of the 8th symbol positions that become the bell
The digital modulation method is characterized in that 2. A digital modulation method for performing amplitude modulation of a carrier wave in accordance with the 3-bit information, two ^three symbols representing the 3-bit information, two-dimensional signal represented by the amplitude and phase In the space, a symbol representing “0” and a “1” are displayed in order from the bit with a heavy weight.
Arranged longer minimum Euclidean distance between the symbol representing one bit of said 3 bits represent the same value Shi
Noise and phasing among multiple groups
Depending on deterioration of communication quality due to ringing, attenuation of electric field strength, etc.
The thinnest Euclidean distance between adjacent symbols
Without using symbols that belong to the group with
Depending on the process of transmitting 2-bit information and the deterioration of the communication quality, it may not be used in the process.
For the remaining symbols excluding the
And the process of transmitting 1-bit information
And the symbol position at a certain time is one symbol time before
The + π / 4 radian phase changes with respect to the symbol position, and the amplitude becomes the first level.
The first symbol position is changed to −π / 4 radian phase, and the amplitude is changed to the first level.
And the second symbol position, which is a + 3π / 4 radian phase, is changed, and the amplitude is the first level.
The third symbol position, which is a bell, and -3π / 4 radian phase are changed, and the amplitude is the first level.
The fourth symbol position, which becomes a bell, and + 2π / 4 radian phase change, and the amplitude changes to the first level.
The fifth symbol position, which is a bell, and −2π / 4 radian phase are changed, and the amplitude is the first level.
The sixth symbol position, which is a bell, and the + 2π / 4 radian phase change, and the amplitude changes to the first level.
7th symbol position, second level lower than bell
And −2π / 4 radian phase is changed, and the amplitude is the second level.
Symbol of any of the 8th symbol positions that become the bell
The digital modulation method is characterized in that 3. The Euclidean distances from the seventh symbol position to the first and third symbol positions, and the second and fourth levels from the eighth symbol position. The Euclidean distances to the signals are the Euclidean distances from the fifth symbol position to the first and third signals, and the Euclidean distances from the sixth symbol position to the second and fourth signals, respectively. 3. The digital modulation method according to claim 1, wherein the Euclidean distance is set to be equal to each Euclidean distance. 4. A digital communication device for transmitting and receiving the digital data by discretely amplitude-phase modulating and demodulating a carrier wave in accordance with sequentially input digital data, and converting the digital data into 3-bit parallel data. Based on the conversion means and the 3-bit parallel data converted by the conversion means, the phase and amplitude states of the modulated signal at a certain time are + π with respect to the phase and amplitude states of the modulated signal one symbol time before. / 4 radian phase is changed and the amplitude is at a first level in a first state, -π / 4 radian phase is changed and a second state is in which the amplitude is at the first level, and + 3π / 4 A third state in which the radian phase changes and the amplitude reaches the first level; and a third state in which the -3π / 4 radian phase changes and the amplitude reaches the first level. The fifth state in which the + 2π / 4 radian phase changes and the amplitude becomes the first level, and the second state in which the −2π / 4 radian phase changes and the amplitude reaches the first level And a seventh state in which the + 2π / 4 radian phase changes and the amplitude becomes a second level lower than the first level, and −2π / 4 radian phase changes and the amplitude changes to the second level. A digital communication device, comprising: a modulation means for changing to any one of an eighth state which is a level. 5. The conversion means comprises noise, fading,
A predetermined bit of the 3-bit parallel data to be output so that the modulated signal is always in one of the first to fourth states according to the deterioration of the communication quality due to the attenuation of the electric field strength or the like. with a fixed constant value, sequential digital data input is converted into 2-bit parallel data, and outputs the value as parallel data of 3 bits combined fixed and predetermined bits claims Item 4. The digital communication device according to item 4 . 6. The conversion means is configured such that the modulated signal is always in a first or fourth state in accordance with deterioration of the communication quality.
Alternatively, among the 3-bit parallel data to be output, the predetermined bit is fixed to a constant value and the predetermined bit is set so as to be in the second or third state or the fifth or sixth state. Of the two bits other than the above are fixed to a constant value, the sequentially input digital data is converted into 1-bit data, and the value is combined with the fixed two bits to obtain a 3-bit data. The digital communication device according to claim 5, wherein the digital communication device outputs the data as parallel data. 7. The modulation means includes a carrier generation means for generating a carrier wave, a storage means for storing information on a phase difference of the current modulation signal with respect to the phase of the carrier wave, and a 3-bit output from the conversion means. One of the first to eighth states is selected according to the value of each bit of the parallel data, and the phase change amount in the selected state and the information stored in the storage means are selected. From, the phase difference of the phase of the modulation signal with respect to the phase of the carrier wave is obtained, and the phase amplitude instructing means for instructing the obtained phase difference and the amplitude in the selected state, of the phase difference stored in the storage means. Information updating means for updating the information to the phase difference instructed by the phase amplitude instructing means, and the carrier so that the phase difference and the amplitude instructed by the phase amplitude instructing means are obtained. Of controlling the phase and amplitude, one of 6 to claims 4, characterized in that it consists of a phase amplitude control means for outputting a modulated signal 1
The digital communication device according to the item. 8. The phase / amplitude instructing means is based on the 3-bit parallel data output from the converting means, and in accordance with a value of a predetermined 1-bit of the 3-bits, the first, third and third bits. The first selection for selecting one of the fifth, seventh states or the second, fourth, sixth, and eighth states is performed, and after the first selection, the third bit to the third state are selected. If the first, the third, the fifth, and the seventh states are selected by the first selection according to the value of a predetermined one bit of the two bits except the one bit, If the third state or any one of the fifth and seventh states is selected and the second, fourth, sixth and eighth states are selected by the first selection, A second selection is performed to select one of the second and fourth states or the sixth and eighth states. After the determination, the 3 in accordance with the last bit value of the bit, to claim 7, characterized in that selecting one of states of the two state selected by said second selection The described digital communication device. 9. The phase amplitude control means, when the amplitude instructed by the phase amplitude instructing means is at the first level, the amplitude of the modulation signal becomes the same level as the amplitude of the carrier wave. When the amplitude instructed by the phase amplitude instructing means is at the second level, the amplitude of the modulated signal is controlled so as to be 2 ^1/2 −1 times the amplitude of the carrier wave. The digital communication device according to claim 8, wherein: 10. A receiving means for receiving the modulated signal output from the modulating means, a detecting means for performing envelope detection of the modulated signal received by the receiving means, and a phase difference between consecutive symbols is detected. Phase difference detection means, the level of the detection signal output from the detection means, based on the phase difference detected by the phase difference detection means,
Demodulation means for demodulating to 3-bit digital data, wherein the demodulation means sets a value of 1 bit among the 3 bits depending on whether the phase difference detected by the phase difference detection means is advanced or delayed. The phase difference detected by the phase difference detection means is ± π
The value of 1 bit of the remaining 2 bits of the 3 bits is determined depending on whether it is / 4 or ± 3π / 4, and the phase difference detected by the phase difference detecting means is ± π.
If it is either / 4 or ± 3π / 4, the value of the last 1 bit is determined by the value of the phase difference, and ± π / 4
And if not have been any of ± 3 [pi] / 4 is any one of claims 4 to 9, characterized in that to determine the value of the last bit on the basis of the detection result of said detecting means 1
The digital communication device according to the item.