JP3374685B2 - Phase synchronization controller - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronization control circuit for synchronizing the output voltage phase of an AC output power converter such as an inverter with the voltage phase of another AC power supply.

[0002]

2. Description of the Related Art FIG. 11 shows, for example, JP-A-55-3485.
FIG. 6 is a block diagram showing a conventional synchronization control circuit shown in Japanese Patent Laid-Open No. In the figure, 1 is a variable frequency oscillator whose oscillation frequency changes according to an input voltage (hereinafter referred to as VCO), and 2 is a phase signal θ obtained by counting output pulses of VCO 1.
A counter that generates ₀ , 21 is a two-phase signal generation circuit that generates two-phase signals V _0a and V _0b synchronized with the output of VCO ₁ based on the phase signal θ ₀ , and 22 is a three-phase signal R, S, and T A three-phase / two-phase conversion circuit for converting into two-phase signals V _a and V _b synchronized with, and 6 ′ is V _a , V _b and V _0a from the three-phase / two-phase conversion circuit 22 and the two-phase signal generation circuit 21. , V _0b and a phase difference detection circuit for generating a phase difference Δθ between them and 9 is a loop filter.

Next, the operation will be described. 3-phase / 2-phase conversion circuit 22 are three-phase signals R, S, the voltage of the T V _r, V _s, V
Convert _t into two-phase signals V _a and V _b based on the following equation. _{V a = V r (1)} V b = (V s -V t) / √3 (2) This conversion, for example _{V r = Vcosθ 1 (3)} V s = Vcos (θ 1 -2π / 3) ( 4) When V _t = V cos (θ ₁ + 2π / 3) (5) V _a = V cos θ ₁ (6) V _b = V sin θ ₁ (7) However, V is amplitude and θ ₁ is phase.

The two-phase signal generation circuit 21 generates two-phase signals V _0a and V _0b from the phase signal θ ₀ based on the following equation. V _0a = cos θ ₀ (8) V _0b = sin θ ₀ (9) The two-phase signals V _0a and V _0b are input to the phase difference detection circuit 6 ′ together with the two-phase signals V _a and V _b , and based on the following equation. Phase difference Δ
θ (= θ ₁ −θ ₀ ) is generated. Δθ = sin ⁻¹ ((V _0a V _b −V _0b V _a ) / √ (V _a ² + V _b ² )) (10)

This phase difference Δθ is added to the VCO 1 via the loop filter 9. The feedback loop is configured so that the phase difference signal Δθ becomes zero, and the VCO 1 generates a frequency pulse that synchronizes with the three-phase signals R, S, T, and this is used for synchronization control in an AC output power converter or the like. We are using.

[0006]

Since the conventional synchronous control circuit is constructed as described above, it has the following problems. First, since the phase difference detection circuit 6 ′ obtains the phase difference Δθ using the inverse sine function (sin ⁻¹ ), the phase difference Δθ
Is the principal value of the arc sine function, −π ≦ Δθ ≦ π (radian). Therefore, when the actual phase difference exceeds the range of ± π, the sign of the phase difference Δθ is inverted. Therefore, at the start of control, the frequencies of the three-phase signals R, S and T and the VCO
If the difference from the free-running oscillation frequency of 1 is large and the response of the control system is slow, the output frequency of VCO1 oscillates near the free-running oscillation frequency of VCO1 and the frequency of the synchronous control circuit is pulled in to the frequency of the three-phase signal. Therefore, stable synchronization control cannot be realized.

Secondly, if the phase difference detecting circuit 6'and the loop filter 9 are to be constructed by software in order to obtain Δθ from the two-phase signals V _a and V _b , trigonometric function calculation or trigonometric function numerical table is performed. Therefore, the load on the CPU increases or a large amount of data memory is required, and it becomes impossible for the CPU that performs control calculation in the power conversion device such as an inverter to bear these functions. It is necessary to add a CPU for sharing the above-mentioned functions.

The third problem is that if the three-phase signals R, S, and T to be synchronized have waveform distortion or three-phase imbalance, the three-phase / two-phase conversion circuit 22 outputs the three-phase signal R. , S, and T have a half cycle, and the input of VCO1 contains a ripple through the loop filter 7, so that the output of VCO1 does not become a stable cycle pulse, and the counter That is, the influence of the ripple appears on the phase signal θ ₀ which is the output of 2.

The present invention has been made to solve the above-mentioned problems, and the frequency difference between the output of the VCO 1 and the three-phase signals R, S, T at the start of control is large, or 3
Even if there is imbalance or waveform distortion in the phase signals R, S, T,
An object of the present invention is to provide a synchronization control circuit that can obtain stable phase synchronization with respect to three-phase signals R, S, and T.

[0010]

In a phase synchronization control device for generating a control reference phase of a three-phase power converter based on a voltage phase of a three-phase AC power supply, the voltage of the three-phase AC power supply is controlled by the three-phase power converter. It is converted into a DC component on the dq rotation coordinates synchronized with the output voltage phase, and a phase difference between the voltage phase of the three-phase AC power supply and the output voltage phase of the three-phase power converter is generated on the dq rotation coordinates. At the same time, the control reference phase is generated by inputting it to a variable frequency oscillator through a phase difference correction circuit and a loop filter that generate a corrected phase difference that limits this phase difference to a predetermined value.

Further, d- in which the voltage of the three-phase AC power supply and the output voltage of the three-phase power converter are synchronized with the output of the constant frequency oscillator
It is converted into a DC component on the q-rotational coordinate, a phase difference between the voltage of the three-phase AC power supply and the output voltage of the three-phase power converter is generated on the dq rotational coordinate, and this phase difference is limited to a predetermined value. The control reference phase is generated by inputting it to a variable frequency oscillator through a phase difference correction circuit that generates a corrected phase difference and a loop filter.

Furthermore, an approximation polynomial of trigonometric function is used for generating the phase difference.

Furthermore, in the phase difference correction circuit, the correction value is generated based on the history of the phase difference and its change amount.

Furthermore, a moving average circuit for generating a moving average value for one cycle of the three-phase AC power source is provided for the phase difference or the corrected phase difference.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a synchronization control device according to the present invention will be described below with reference to the drawings. The reference numerals used in each figure are the same as or equivalent to those of the conventional synchronization control device described in FIG. 11, and the same description is omitted.

Embodiment 1. 1 is a block diagram in a first embodiment of a synchronization control device according to the present invention, FIG. 2 is a characteristic diagram of a phase difference detection circuit, and FIG. 3 is a state transition diagram of a phase difference correction circuit. 3 is a three-phase sine wave generator circuit
The three-phase sine wave synchronized with the output of the VCO ₁ is generated from the phase signal θ ₀ generated by. 4 is a dq coordinate conversion circuit, 3
From the output of the phase sine wave generation circuit 3 and the three-phase signals R, S, and T, the d-axis and q-axis components V _d and V _q on the dq rotation coordinates, which are the synchronous rotation coordinates shown in the following equation, are generated. To do. V _d = √ (2/3) (V _r · sin (θ ₀ ) + V _s · sin (θ ₀ −2π / 3) + V _t · sin (θ ₀ + 2π / 3)) (11) V _q = √ ( 2/3) ( _Vr · cos (θ ₀ ) + V _s · cos (θ ₀ −2π / 3) + V _t · cos (θ ₀ + 2π / 3)) (12)

Reference numeral 5 is a low-pass filter (hereinafter referred to as LPF) provided in the subsequent stage of the dq coordinate conversion circuit 4 and removes waveform distortion of the three-phase signals R, S and T. Reference numeral 6 denotes a phase difference detection circuit, which is V _d and V _q generated by the dq coordinate conversion circuit 4.
To generate a phase difference Δθ obtained as the principal value of the arctangent function (tan ⁻¹ ) of V _q / V _d . Reference numeral 7 denotes a moving average circuit provided at the subsequent stage of the LPF 5 and the phase difference detection circuit 6 and a dq coordinate conversion circuit 4 caused by the imbalance of the three-phase signals R, S, and T.
Phase difference Δ to eliminate the periodic fluctuation that occurs in the output of
Take the moving average of θ. The dq coordinate conversion circuit 4
Since the fluctuation cycle of the output of is equal to the cycle of the three-phase signals R, S, T, the averaging section in the moving average of the phase difference Δθ may be set to 1/2 of the cycle of the three-phase signals R, S, T. A phase difference correction circuit 8 generates a corrected phase difference Δφ in which the phase difference Δθ is corrected based on the history of the phase difference Δθ. FIG. 2 shows the relationship between the phase difference Δθ and the corrected phase difference Δφ. Corrected phase difference Δφ
Is the phase difference Δθ limited by a predetermined limit value (± LMT). In the figure, based on the typical response of the system,
The case where the limit value is ± 1.2 is shown.

The phase correction circuit 8 has four operation modes as shown in FIG. 3, and transitions between the modes according to Δθ. The correction phase difference Δφ generated in each mode is as follows. Mode 1: Δφ = Δθ Mode 2: Δφ = Δθ Mode 3: Δφ = −LMT Mode 4: Δφ = + LMT The transition conditions between the modes are as shown in the arrows in FIG. 2: Δθ> 0 Mode 2 → Mode 1: Δθ <0 Mode 1 → Mode 3: Δθ = −LMT Mode 3 → Mode 1: −LMT <Δθ <0 Mode 2 → Mode 4: Δθ = + LMT Mode 4 → Mode 2 : 0 <Δθ <+ LMT.

Next, the operation of the synchronous control device configured as described above will be described. Now, the frequencies of the three-phase signals R, S, and T are lower than the output frequency of the VCO 1, the correction phase difference Δφ becomes + LMT at the start of control, and the phase signal θ ₀ generated by the counter 2 is the three-phase signals R and S. , T appear later than T. In this state, if the phase difference correction circuit 8 is not provided, the phase signal θ ₀ is advanced and the VCO
The output frequency of 1 becomes high and phase synchronization cannot be obtained.

Since Δθ> + LMT at the start of control, the phase difference correction circuit 8 is in the mode 4 state, and Δφ = + L
MT is generated and the output frequency of the VCO 1 is increased, but since the frequencies of the three-phase signals R, S, and T are low, θ decreases, and eventually Δθ <+ LMT, and the mode 2 shifts to Δθ.
When <0, the mode 1 is entered, and when Δθ = −LMT, the mode 3 is entered. Since the VCO 1 stays in the mode 1 or the mode 3 until the output frequency of the VCO 1 becomes lower than the frequencies of the three-phase signals R, S, and T, Δ regardless of the sign of Δθ.
φ becomes negative, and the output frequency of VCO1 decreases. VC
When the output frequency of O1 becomes lower than the frequencies of the three-phase signals R, S, and T, Δθ> 0, and therefore the mode 2 shifts to VC.
The output frequency of O1 becomes high. Then, the phases are gradually synchronized while transitioning between the mode 1 and the mode 2. By repeating such state transition, even when the frequency difference between the output of the AC power converter and the three-phase signals R, S, and T to be synchronized at the start of control is large and the response of the control system is slow. , The phases can be synchronized. In addition,
In this synchronization control circuit, if the loop filter 7 uses PI control, any frequency can be synchronized. Although the moving average circuit 7 is provided after the LPF 5 and the phase difference detection circuit 6, the same effect can be obtained by providing the moving average circuit 7 after the phase difference correction circuit 8.

In the configuration described with reference to FIGS. 1 to 3, the phase difference detection circuit 6 generates the phase difference Δθ obtained as the main value of the arctangent function of V _q / V _d , and the phase difference correction circuit 8 calculates the phase difference Δθ. The correction phase difference Δφ is generated by limiting the phase difference Δθ with a predetermined limit value. However, the approximate phase difference Δθ ′ is generated by the following approximate expression and the same phase difference as described using FIGS. The approximate correction phase difference Δφ ′ may be generated by the correction circuit. Δθ ′ = V _q / V _d (13) FIG. 4 shows the relationship between V _q / V _d and the phase difference Δθ, the approximate phase difference Δθ ′, and the approximate corrected phase difference Δφ ′. Approximate phase difference Δ
The calculation of θ ′ does not require the calculation of the inverse trigonometric function or the equipping of a function table, and the calculation can be performed at high speed.
It is almost the same as the one described by using 3 to 3. Although Equation 13 is shown as an arithmetic expression for obtaining the approximate phase difference Δθ ′, it goes without saying that an arbitrary polynomial for V _q / V _d that realizes the above-described operation may be used.

[0022] _{V q / V d (V q} / V d) as an example of the polynomial / √ (1+ (2 / π ) 2 (V q / V d) 2) in the case of using the (14) V _q / FIG. 5 shows the relationship between V _d , the approximate phase difference Δθ ″, and the approximate corrected phase difference Δφ ″. In the above description, the arctangent function is used to generate the phase difference, but it goes without saying that it can be configured using another trigonometric function or its approximate polynomial.

In the above synchronization control circuit, the three-phase signal R,
LPF to eliminate the influence of waveform distortion of S and T
Although 5 is provided, it can be omitted if the effect of waveform distortion can be ignored. Also, three-phase AC input R,
Although the moving average circuit 9 is provided in order to prevent the periodical fluctuation occurring in the output of the dq coordinate conversion circuit 4 due to the imbalance of S and T, the periodical fluctuation in the output of the dq coordinate conversion circuit 4 is provided. Can be omitted if is negligible. 7 and 8 show the case where only the LPF 5 is provided and the case where both the LPF 5 and the moving average circuit 7 are omitted.

In the above description, in the phase difference correction circuit 8, the transition from the mode 1 to the mode 3 and the transition from the mode 2 to the mode 4 are based only on the condition of Δθ <0 and Δθ> 0. In order to converge Δθ faster, the change rate (differential value) of the phase difference Δθ may be added to the condition of Δθ <0 and Δθ> 0 as a transition condition so that the control amount is large and stable. FIG. 6 shows the state transition conditions of the phase difference correction circuit configured as described above. The transition condition may be set as follows. Mode 1 → Mode 2: Δθ> 0 Mode 2 → Mode 1: Δθ <0 Mode 1 → Mode 3: Δθ <−LMT Mode 3 → Mode 1: −LMT <Δθ <0 and dΔθ /
dt> 0 Mode 2 → Mode 4: Δθ> + LMT Mode 4 → Mode 2: 0 <Δθ <+ LMT and dΔθ /
dt <0

Embodiment 2. In the first embodiment of the present invention, the case of using the dq rotational coordinate conversion synchronized with the output of the VCO 1 has been described, but the phase difference detection is performed on the asynchronous dq rotational coordinate. A block diagram of the synchronization control circuit is shown in FIG. In the figure, 10 is a three-phase power converter, which has a frequency of 3 depending on the output signal of the VCO 1.
Generate phase signals R ₀ , S ₀ , T ₀ . Reference numeral 11 is a reference frequency oscillator having a constant frequency.
To generate reference phases for the dq coordinate conversion circuits 4a and 4b. d-q coordinate converter 4a and 4b, three-phase signals R, respectively, S, the output R _0, S _0, T ₀ T and three-phase power converting apparatus 10 converts d-q rotational coordinate, V _d,
V _q and V _0d, generates a V _0q. The V _d, V _q and V _0d, input to the phase difference detection circuit 6a through LPF5a and 5b the V _0q, the phase difference detection circuit 6a generates a phase difference Δθ based on the following equation. This allows asynchronous d-
A synchronization control circuit having a wide frequency pull-in range can be configured even when q rotational coordinates are used. _{^{Δθ = sin -1 ((V 0d}} V q -V 0q V d) / (√ (V d 2 + V q 2) · √ (V 0d 2 + V 0q 2)) (15) In the calculation of the formula 15, When the argument of the inverse sine function is small, Δθ may be set equal to the argument.

[0026] In the above description, it is assumed to determine the phase difference Δθ using arc sine function, X-axis direction from the origin as shown in FIG. _{10 (V 0d, V 0q)} , a direction perpendicular thereto Take the Y-axis to define V _x and V _y as shown in the following equation,
By using V _x and V _y instead of V _d and V _q , the phase difference Δθ can be calculated at high speed by the phase difference detection circuit described in the first embodiment. _{V x = V d V 0d /} √ (V 0d 2 + V 0q 2) + V q V 0q / √ (V 0d 2 + V 0q 2) (16) V y = -V d V 0q / √ (V 0d 2 + V 0q ^{_{2) + V q V 0d /}} √ (V 0d 2 + V 0q 2) (17)

[0027]

According to the first aspect of the invention, in the phase synchronization control device for generating the control reference phase of the three-phase power converter based on the voltage phase of the three-phase AC power supply, the voltage of the three-phase AC power supply is set to three. D- synchronized with the output voltage phase of the phase power converter
The phase difference between the voltage phase of the three-phase AC power supply and the output voltage phase of the three-phase power converter is generated on the d-q rotation coordinates, and this phase difference is converted to a predetermined value. Since the control reference phase is generated by inputting it to the variable frequency oscillator through the phase difference correction circuit that generates the corrected phase difference limited to the value and the loop filter, the frequency of the phase synchronization controller is set to the voltage of the three-phase AC power supply. The frequency can be surely pulled in, and stable synchronization control can be realized.

According to the second aspect of the present invention, in the phase synchronization control device for generating the control reference phase of the three-phase power converter based on the voltage phase of the three-phase AC power supply, the voltage of the three-phase AC power supply and the three-phase power supply. The output voltage of the converter is converted into a direct current component on dq rotation coordinates synchronized with the output of the constant frequency oscillator, and d
A phase difference correction circuit and a loop that generate a phase difference between the voltage of the three-phase AC power supply and the output voltage of the three-phase power converter on the −q rotation coordinate and limit the phase difference to a predetermined value to generate a corrected phase difference. Since the control reference phase is generated by inputting it to the variable frequency oscillator through the filter, the frequency of the phase synchronization control device can be reliably pulled into the frequency of the voltage of the three-phase AC power supply, and stable synchronization control is realized. it can.

According to the invention of claim 3, since the approximation polynomial of the trigonometric function is used for the generation of the phase difference, the calculation of the phase difference does not require the calculation of the inverse trigonometric function or the equipping of the function table.
And it can be calculated at high speed.

According to the fourth aspect of the present invention, since the correction value is generated in the phase difference correction circuit based on the history of the phase difference and its change amount, the control amount is large and stable. The frequency of the control device can be reliably and quickly drawn into the frequency of the voltage of the three-phase AC power supply.

According to the invention of claim 5, since the moving average circuit is provided for generating the moving average value for one cycle of the three-phase AC power source with respect to the phase difference or the corrected phase difference, 3
Even if the phase AC power supply is unbalanced, the frequency of the phase synchronization control device can be reliably pulled into the frequency of the voltage of the three-phase AC power supply, and stable synchronization control can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of a synchronization control device showing a first embodiment of the present invention.

FIG. 2 is a characteristic diagram of the phase difference detection circuit 6 of FIG.

FIG. 3 is a state transition diagram in the phase difference correction circuit 8 of FIG.

FIG. 4 is a characteristic diagram of a modified example of the phase difference detection circuit of the synchronization control device according to the present invention.

FIG. 5 is a characteristic diagram of another modification of the phase difference detection circuit of the synchronization control device according to the present invention.

FIG. 6 is a state transition diagram in a modified example of the phase difference correction circuit of the synchronization control device according to the present invention.

FIG. 7 is a block diagram of a modification of the synchronization control device according to the present invention.

FIG. 8 is a block diagram showing another modification of the synchronization control device according to the present invention.

FIG. 9 is a block diagram of a synchronization control device showing a second embodiment of the present invention.

FIG. 10 is a voltage vector diagram for explaining the operation of the phase difference detection circuit 6a in FIG.

FIG. 11 is a block diagram of a conventional synchronization control device.

[Explanation of symbols]

1 Variable Frequency Oscillator (VCO) 2 Counter 3 3 Phase Sine Wave Generation Circuit 4 dq Coordinate Conversion Circuit 5 Low Pass Filter (LPF) 6 Phase Difference Detection Circuit 7 Moving Average Circuit 8 Phase Difference Correction Circuit 9 Loop Filter 10 3 Phase power converter 11 Reference frequency oscillator

Claims (5)

(57) [Claims] 1. A phase synchronization control device for generating a control reference phase of a three-phase power converter based on a voltage phase of a three-phase AC power supply, wherein the voltage of the three-phase AC power supply is an output voltage of the three-phase power converter. It is converted into a DC component on the dq rotation coordinates synchronized with the phase, and a phase difference between the voltage phase of the three-phase AC power supply and the output voltage phase of the three-phase power converter is generated on the dq rotation coordinates. At the same time, the phase synchronization control device is characterized in that the control reference phase is generated by inputting it to a variable frequency oscillator via a phase difference correction circuit for generating a corrected phase difference in which the phase difference is limited to a predetermined value and a loop filter. . 2. A phase synchronization control device for generating a control reference phase of a three-phase power converter based on a voltage phase of a three-phase AC power supply, the voltage of the three-phase AC power supply and an output voltage of the three-phase power converter. Is converted into a DC component on the dq rotation coordinate synchronized with the output of the constant frequency oscillator, and the 3 component is converted on the dq rotation coordinate.
A variable frequency is generated via a phase difference correction circuit and a loop filter that generate a phase difference between the voltage of the three-phase AC power supply and the output voltage of the three-phase power converter, and generate a corrected phase difference by limiting the phase difference to a predetermined value. A phase synchronization control device, characterized in that it is input to an oscillator to generate the control reference phase. 3. The phase synchronization control device according to claim 1, wherein an approximation polynomial of trigonometric function is used for generating the phase difference. 4. The phase according to claim 1, wherein the phase difference correction circuit is configured to generate a correction value based on a history of the phase difference and its change amount. Synchronous control device. 5. A moving average circuit for generating a moving average value for one cycle of the three-phase AC power source with respect to the phase difference or the corrected phase difference, according to claim 1 or 2. The phase synchronization control device according to any one.