JP3357869B2 - Disk recording device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk recording apparatus capable of additionally recording data on a disk,
In particular, the present invention relates to a disk recording apparatus which performs additional recording while ensuring continuity of recording data.

[0002]

2. Description of the Related Art As a disk recording apparatus for recording recording data on a disk, there is known an optical disk recording apparatus that performs recording by changing the reflectance of a recording layer of a disk by irradiating the disk with a light beam from an optical head. Has been
Such an optical disk recording apparatus handles a so-called write-once medium in which data once recorded cannot be physically erased, and is a CD (Compact Disc) family of CD-R ( Reco
rdable) drives are well known.

[0003]

In a write-once medium such as a CD-R, a buffer underrun occurs in which a data transfer rate of input data is slower than a data transfer rate of recording data on the medium. The recording data to be recorded is interrupted and the buffer underrun
If an error occurs, disc at once (disc at
When a group of files to be written in advance is designated, such as once at) or track at once, there is a problem that the recording medium cannot be used.

[0004] This buffer underrun error is caused by C
In the current environment, the recording speed of the DR drive has been increased to 4 times or 8 times the standard speed, and the number of opportunities to operate using the multitasking function on personal computers is increasing. The environment is more likely to occur, and a buffer underrun error becomes a serious problem.

On the other hand, since recording can be performed in packet units by using the packet write method, a buffer underrun error can be prevented from occurring by recording data after recording until the data to be recorded has a packet unit capacity.

Incidentally, it is necessary to maintain compatibility so that a disc recorded by a CD-R drive can be reproduced by a CD-ROM drive. However, it is not always true that a CD-ROM drive is compatible with packet writing. There was a problem in terms of compatibility as well.

[0007] When audio data is recorded in a CD-R drive corresponding to the CD-DA, the CD-DA
The packet write method cannot be adopted from the viewpoint of compatibility with the player.

[0008] In addition, since the packet write needs to form a link block for connection between packets, it is disadvantageous in terms of the storage capacity of the disk.

Therefore, even if the packet write method is not adopted, a disk on which recording data can be recorded continuously and substantially seamlessly so that a reproduction failure does not occur at a connection portion of recording data by additional recording. Although a recording device is desired, to realize such a disk recording device,
It is necessary to additionally record new recording data continuously to the recording data already recorded on the disc, and to start the additional recording in synchronization with the recorded recording data, which makes it difficult to process the connection portion of the recording data. Met.

[0010]

According to the present invention, a system clock generating circuit is constituted by a PLL circuit, and recording data recorded on a disk is read by a signal synchronizing means so as to synchronize the recording data by an encoder. Until the recording start position is detected by the recording start position detection means, a channel bit clock reproduced from the recorded data recorded on the disk is output as an operation clock to be supplied to the encoder. Thereby, the synchronization processing of the recording data by the encoder is performed in synchronization with the channel bit clock. The system clock generating circuit outputs a recording clock used when recording the recording data when the recording start position is detected by the recording start position detecting means. Then, when switching from the channel bit clock to the recording clock, the recording data to be additionally recorded on the disk is synchronized with the operation clock that gradually changes from the channel bit clock to the recording clock by the time constant of the PLL circuit.

[0011]

FIG. 1 is a circuit block diagram showing an example of a CD-R drive as an embodiment of a disk recording apparatus according to the present invention.

In FIG. 1, reference numeral 1 denotes an optical head which emits a laser beam for tracing a disk, and writes and reads recording data to and from a disk. An RF amplifier that amplifies an RF signal (high-frequency signal), binarizes the RF signal, and outputs it as digital data, 3 feeds back the output of the optical head 1 via the RF amplifier 2, and outputs a laser beam to a disk signal. A head servo circuit that performs focusing control for focusing on a surface and tracking control for causing a laser beam to follow a signal track of the disk, and also performs thread feed control for sending the optical head 1 itself in the radial direction of the disk.

Reference numeral 4 denotes a decoder for performing signal processing for demodulating digital data output from the RF amplifier 2, and reference numeral 5 denotes a subcode demodulation circuit for demodulating separated subcodes.

6 extracts a wobble component of 22.05 kHz from a pre-groove signal of the disk obtained through the RF amplifier 2, generates a component necessary for controlling the rotation of the disk, and generates a wobble component. ATI from ingredients
ATI that demodulates P (Absolute Time In Pre-groove)
This is a wobble decoder including a P demodulation circuit 7.

Reference numeral 8 denotes an interface for controlling the transfer of data to and from a personal computer 10 serving as a host connected to the outside via the connection terminal 9. Reference numeral 11 records the input data input via the interface 8 on a disk. An encoder 12 for modulating recording data is an input data RAM for storing input data modulated by the encoder 11.

When performing modulation based on the CD-ROM standard, the encoder 11 applies a sync, a header, and EDC (Er Er) of an error detection code for CD-ROM data to input data.
rorDetection Code) and ECC (Error
Correction Code), and then CIRC (Cross Interleaved Reed-Sol
omon Code (short for Eight to Fourteen Modulation)
Processing is performed, and a synchronization signal is added.

Reference numeral 13 denotes an internal RAM provided inside the encoder 11 and used for modulation processing by the encoder 11;
Reference numeral 14 denotes a laser driving circuit that drives the laser light source of the optical head 1 to perform recording on a disk based on the recording data of the EFM data output from the encoder 11.

Reference numeral 15 denotes a system control circuit for performing system control relating to recording and reproduction of a disk. The system control circuit 15 stores the subcode address of the absolute time information in the subcode (sub Q data) demodulated by the subcode demodulation circuit 5 and the ATIP address of the absolute time information in ATIP demodulated by the ATIP demodulation circuit 7. An access control means for selectively referring to and controlling access; and a data transfer rate for input data being higher than a data transfer rate for monitoring data capacity stored in the input data RAM and recording data on a disk. Buffer underrun determination means 17 for determining that a state in which a buffer underrun is delayed and a state in which a buffer underrun occurs is avoided.
A recording control unit 18 for controlling recording of recording data on a disk in accordance with the determination by the buffer underrun determining unit 17; and detecting a head of an unrecorded area where no recording data is recorded on the disk, and A recording start position detection unit 19 for detecting a recording start position at which recording of recording data is started by the control unit 18, a subcode synchronization signal extracted by the decoder 4, and a subcode demodulation circuit 5
And signal synchronizing means 20 for synchronizing recording data to be newly recorded on the disk with the recording data already recorded on the disk using the sub-Q data demodulated by.

Reference numeral 21 denotes an EFM output from the RF amplifier 2
It is used for system control of the entire operation related to the recording and reproduction of the disc by a two-system PLL (Phase Lock Loop) circuit that selectively synchronizes a reproduced clock from which data is reproduced, that is, a channel bit clock and a reference clock of crystal oscillation accuracy. This is a system clock generation circuit for generating an operation clock to be used.

As shown in FIG. 2, the system clock generating circuit 21 uses a first phase comparator 24 to compare the channel bit clock recovered and extracted by the clock recovery circuit 22 with the output of the VCO (voltage controlled oscillator) 23. The phase is compared, and the voltage output generated from the first phase comparator 24 in accordance with the phase shift between the channel bit clock and the output of the VCO 23 is converted to a DC voltage by a first LPF (low-pass filter) 25, and the DC voltage is switched. 26, a reproduction clock system used during a reproduction operation constituted by a PLL circuit that returns to the VCO 23 via the reference clock 26, a reference clock generated by the crystal oscillation circuit 27, and the VCO 2
3 is compared with the output of the VCO 23 by the second phase comparator 28, and the voltage output generated from the second phase comparator 28 according to the phase shift between the reference clock and the output of the VCO 23 is converted to the second LP.
A reference clock system used at the time of a recording operation constituted by a PLL circuit for converting a DC voltage into a DC voltage by the F29 and returning the DC voltage to the VCO 23 via the switch circuit 26 is provided.

In the thus configured disk recording apparatus, an operation for recording data on a disk is performed by the personal computer 10, a command corresponding to the operation is generated, and the command is transmitted to the interface 8.
Is recognized by the system control circuit 15 via the CPU, the recording operation is executed.

When the recording operation is executed, the system clock generating circuit 21 switches the switch circuit 26 so that the reference clock system is operated by the signal synchronizing means 20, and enters the state of generating the reference clock. Each circuit operates in synchronization with the reference clock.

The optical head 1 is controlled so as to read a pre-groove signal of the disc by a laser output for reproducing the disc. The pre-groove signal read from the optical head 1 is shaped by the RF amplifier 2 and then shaped into a wobble decoder 6. , A wobble component is extracted, and ATIP is demodulated by the ATIP demodulation circuit 7 from the wobble component.

Data output from the personal computer 10 to be recorded on the disk is supplied to the encoder 11 via the interface 8 and the encoder 1
1 modulates the recording data into a form to be recorded on the disk.

When the position traced by the laser beam of the optical head 1 reaches the write position on the disk, the recording data is sequentially output from the encoder 11 in EFM frame units, and an address indicating an address corresponding to the output recording data. The data is sequentially updated and stored in an address memory 15a provided in the system control circuit 15.

The laser drive circuit 14 drives the laser light source of the optical head 1 based on the recording data output from the encoder 11, so that the recording data is recorded on the disk.

At the time of recording on the disk, the system clock generating circuit 21 generates a reference clock, and the recording data is recorded in synchronization with the reference clock.

By the way, the transfer speed of the data output from the personal computer 10 cannot keep up with the write speed of the record data recorded on the disk,
When the data transfer rate input to the encoder 11 becomes lower than the data transfer rate output from the encoder 11, the amount of data stored in the RAM 12 decreases.

If this state continues, the amount of data stored in the RAM 12 will eventually become empty, and when this empty occurs, the buffer underrun determination means 17 will determine that the buffer underrun has occurred, and to that effect. Generates a judgment output. Then, the recording control means 18
Is determined to interrupt the recording on the disk, the output of the recording data from the encoder 11 is interrupted, the emission of the write beam from the optical head 1 is stopped, and the recording on the disk is interrupted. Is done.

[0030]

Here, when the output of the recording data from the encoder 11 is interrupted, the address data corresponding to the address of the last frame of the recording data output from the encoder 11 immediately before the interruption of the recording is stored in the system control circuit 1.
5 is stored in the address memory 15a, and the stored address data is the time information of the Q channel data (sub Q data) of the subcode and the E information in the time information.
The address information indicates the number of the FM frame. Then, the signal synchronizing means 20 determines whether the address of the recording data of the last frame recorded on the disk by the address data stored in the address memory 15a is the time information in the sub-Q data, when, what frame, what frame, and what time in the time information. It manages whether or not the frame is the EFM frame.

When the next data is input from the personal computer 10, the access control means 16 converts the data recorded on the disk to the ATIP just before the interruption.
Access is made by the ATIP demodulated by the demodulation circuit 7 and the tracing by the optical head 1 is started. This tracing is started, for example, before a predetermined block of the ATIP address corresponding to the address data stored in the address memory 15a.

When the recording data is recorded during the trace, the pit signal formed on the disk is simultaneously read. When the EFM data can be obtained from the pit signal, the system clock generating circuit 21 is controlled by the signal synchronizing means 20. EFM from the state that generates the reference clock
The state is switched to a state in which a channel bit clock reproduced from data is generated, and each circuit in FIG. 1 is operated in synchronization with the channel bit clock. The modulation process by the encoder 11 is also performed in synchronization with the channel bit clock. It is in a state where it is performed.

That is, the system clock generation circuit 21
Indicates that the encoder 11 is in a state of performing disk recording.
When a reference clock serving as a recording clock is supplied as an operation clock to the encoder 11 and the recording data already recorded on the disk is read by the encoder 11 to synchronize the recording data, the channel bit clock is changed from a state in which the reference clock is generated. Is switched to a state that causes
A channel bit clock is supplied to the encoder 11 as an operation clock. The state in which the channel bit clock is supplied to the encoder 11 as the operation clock is continued until the interruption of the output of the encoder 11 is released and the recording is restarted, as described later.

Here, the encoder 11 is provided with an internal RAM 13 for performing a modulation process, and the internal RAM 13 stores a CIRC interleave length (maximum in an EFM frame) required for newly input data. When the recording of the recording data is interrupted to secure 108 frames), the data necessary for the CIRC processing is secured.

When the modulation process by the encoder 11 is performed in synchronization with the channel bit clock, a signal is generated by using the sub-code synchronization signal extracted by the decoder 4 and the sub-Q data demodulated by the sub-code demodulation circuit 5. Synchronization means 20 synchronizes the recording data output from the encoder 11 with the recording data already recorded on the disk, and the encoder 11 refers to the address data stored in the address memory 15a, and the recording control means 18 It is in a standby state in which it waits for the output of the recording data of the frame next to the last frame recorded on the disk just before the recording interruption.

When the encoder 11 is in the standby state, the recording start position detecting means 19 refers to the address data stored in the address memory 15a to record the unrecorded area immediately after the already recorded area in which the recording data has already been recorded on the disk. The start position is detected.

The start position of the unrecorded area is detected based on the time information of the sub-Q data and the order of the EFM frame in the time information, and the sub-code frame (a set of 98 EFM frames) is determined. The unit is searched by the sub-Q data, the EFM frame unit is searched by the frame synchronization signal, and the channel bit unit is counted by counting the channel bit clock on the basis of the frame synchronization signal to obtain the last frame of the recording data recorded on the disk. This is done by judging the end.

When the start position of the unrecorded area is detected, the system clock generating circuit 21
Is immediately switched from a state in which a channel bit clock synchronized with EFM data is generated to a state in which a reference clock is generated, and the reference clock is
To be supplied as the operation clock of.

Here, the system clock generation circuit 21
Has the configuration shown in FIG. 2, when the switch circuit 26 is switched, the control voltage for controlling the VCO 23 becomes the first control voltage.
Due to the time constant of the LPF 25 or the second LPF 29, the voltage is gradually changed to the switched voltage.
Therefore, when switching from the state of generating the channel bit clock to the state of generating the reference clock is performed, the system clock generated from the system clock generation circuit 21 gradually changes from the channel bit clock to the reference clock. become.

When the state is switched from the channel bit clock to the state where the reference clock is generated, the recording control means 18
As a result, the output interruption state of the encoder 11 is released at the same time, the recording data is output from the encoder 11, and the recording on the disk is restarted.

In this case, the recording data already recorded on the disc is synchronized with the recording data output from the encoder 11 by the signal synchronizing means 20, and the recording from the encoder 11 is stopped immediately before the recording is interrupted. The recording data of the next frame recorded on the disk up to this point is output.

Accordingly, new recording data is recorded from a position that seamlessly follows the last recording data recorded on the disk immediately before the recording is interrupted, and a new frame of the frame following the frame of the last recording data is recorded. Recording data is recorded.

In the above-described embodiment, a reference clock is generated as a system clock used at the time of a recording operation because the configuration is such that the disk recorded by the constant linear velocity method is controlled to rotate by the method. However, in the case of controlling the rotation of a disk recorded with the constant linear velocity method using the constant angular velocity method, a clock synchronized with the wobble component extracted by the wobble decoder 6 is generated as a system clock used during the recording operation. Just do it.

[0045]

As described above, according to the present invention, the operation clock used for system control is used as the channel bit clock until the recording start position is detected, and the operation clock is used as the recording data when the recording start position is detected. Switching to the recording clock used for recording and switching the operation clock so that it gradually changes from the channel bit clock to the recording clock, so the operation of supplying the encoder to the encoder until the recording start position is detected Since the clock is the channel bit clock, the state where the recording data output from the encoder is synchronized with the recording data already recorded on the disk is maintained until the recording restart point, whereby the recording data with continuity is added seamlessly. As well as quickly switch to the recording clock when resuming recording. Recording operation is performed, in this case I, P
By the time constant of the LL circuit, the recording data to be additionally recorded on the disk can be written without any clock disturbance in synchronization with the operation clock that gradually changes from the channel bit clock to the recording clock.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram showing an example of a CD-R drive as an embodiment of a disk recording device according to the present invention.

FIG. 2 is a circuit block diagram showing a specific configuration of a system clock generation circuit 21.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Optical head 4 Decoder 5 Subcode demodulation circuit 6 Wobble decoder 8 Interface 11 Encoder 14 Laser drive circuit 15 System control circuit 16 Access control means 17 Buffer underrun determination means 18 Recording control means 19 Recording start position detection means 20 Signal synchronization means 21 System clock generation circuit

Claims (1)

(57) [Claims] An encoder for modulating input data into recording data to be recorded on a disk, a recording control means for controlling recording interruption and recording restart of recording data on the disk,
A recording start position detecting means for detecting, as a recording start position of a disk, a position continuous to the end of the recording data recorded immediately before the interruption of recording when the recording control is performed by the recording control means; A signal synchronizing means for synchronizing the recording data by the encoder so as to output from the encoder recording data continuous with the recording data recorded on the disk, and synchronizing the recording data output from the encoder with the recording data recorded on the disk; ,
A system clock generation circuit for selectively generating a channel bit clock for reproducing recorded data recorded on a disk and a recording clock used for recording on the disk as operation clocks used for system control including operation control of the encoder. The system clock generating circuit is constituted by a PLL circuit, and when the recording data already recorded on the disk is read by the signal synchronization means in order to perform the synchronization processing of the recording data by the encoder,
A recording bit clock is used to output a channel bit clock until the recording start position is detected by the recording start position detecting means and to record the recording data at the time when the recording start position is detected by the recording start position detecting means. And an operation clock supplied to the encoder is switched so as to gradually change from a channel bit clock to a recording clock.