JP3350439B2 - Elevator control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device comprising a semiconductor power device or an elevator control device provided with the inverter device and a converter device comprising the semiconductor power device.

[0002]

2. Description of the Related Art FIG. 17 shows a schematic configuration of an example of an elevator control device provided with a conventional inverter control device. In the figure, reference numeral 34 denotes a three-phase AC power supply , and reference numeral 35 denotes a rectifier for rectifying the three-phase AC power supply 34 and converting it to DC. 36 smoothing capacitor for smoothing a DC power source which is the output of the rectifier 35, 12 is an inverter device for converting into AC power by the inverter control of the variable voltage variable frequency as a DC power supply smoothing capacitor 36. 14 is driven by the inverter device 12
That is a three-phase induction motor (hereinafter referred to as motor). 30
Is a sheave which is directly connected to the electric motor 14 and rotates together via a speed reducer (not shown).

[0003] A counterweight 16 is constructed in such a manner that the elevator car 17 is suspended from the sheave 30 via a rope. 37 is the inverter device 12
(In the drawing, it represents in IGBT, intended limited thereto name have) semiconductor power elements constituting the a set temperature sensing thermostat attached to cooler.

As a general operation of such a configuration device, the AC of an AC power supply 34 is rectified by a rectifier 35 and the DC is stored in a smoothing capacitor 36. When the elevator is started, energy is supplied from the DC power supply to drive the motor 14 with the inverter device 12 so that the sheave 30
Rotates to move the car 17 and the counterweight 16 in the vertical direction. When the operation is continued, the heat loss of the IGBT is gradually accumulated, and the temperature of the IGBT radiating surface rises. Then, when the temperature reaches the set temperature of the thermostat 37 due to the influence of the operating conditions, the ambient temperature, and the like, the detection signal is output from the thermostat 37 to stop the elevator or land on the nearest floor to operate the elevator. Has been temporarily suspended.

Further, as a method of determining the set temperature of the thermostat, a rise in the junction temperature of the chip in the IGBT at the time of the maximum overload is specified so that the temperature becomes equal to or lower than the assurable maximum temperature of the IGBT .

Next, a method of calculating the junction temperature rise of the chip in the IGBT will be briefly described. The operation pattern of the elevator is as shown in FIG. In FIG. 18, reference numeral 31 denotes a speed pattern output from a speed setting device (described later), which includes an acceleration region A, a steady running (rated speed) region B, and a deceleration region C. In the figure, reference numeral 32 denotes a torque command signal obtained by adding a car load signal (described later) to a deviation signal between the output of the speed setting device and the output of the speed detector (described later). The size is determined. Inverter output current 33
When the left speed of the acceleration region A is 0, the frequency starts from 0 Hz and increases as the speed increases. When the rated speed is reached on the right side of the acceleration region A, the output current also becomes the rated frequency. Similarly, the frequency gradually decreases in the deceleration region C, and the frequency becomes 0 Hz when the vehicle stops.

The reason why the current is larger in the acceleration region A than in the steady traveling region B is that the sheave 3 directly connected to the
Since the counterweight 16 and the car 17 which are loaded with zero are accelerated together, a large current including their inertia force is required. When the acceleration torque T _FLACC is expressed by the following equation (1), T _FLACC = (GD _M ² + GD _S ² ) k · α + T _M (1) where _{G D M} ^{2 is the} moment of inertia of the motor 14, GD
_S ² : Moment of inertia of load (counter weight, car weight, loading) after sheave, k: axis conversion coefficient in rotation direction from motor shaft to sheave 30, α: acceleration,
T _M : Rated torque in steady running.

[0008]

When the elevator car is accelerated as described above, it is necessary to supply a large current to the rated value in order to _apply the driving torque of the T _FLACC to the electric motor. When the current is low, a low-frequency current flows, so that the load on the power element in the inverter device 12 increases.

[0009] Calculation of junction temperature rise in the IGBT chip when the current of the low-frequency, large current flows in the IGBT, the frequency will change with time, unclear when calculating the loss by the frequency reference For example, the loss (b) at the maximum current at a frequency near 0 Hz
When calculating the control frequency, the loss is obtained by almost DC-based calculation as the control frequency. Therefore, the average loss increases, and if the junction temperature at the average loss is to be kept below the maximum temperature that can be guaranteed, the cooling fins at the time of steady loss It is necessary to keep the temperature rise low and the cooling device becomes large.

Further, if the loss is calculated with the maximum current at a relatively high frequency, the average loss is 1 / π of the loss at the time of the direct current, which is calculated to be smaller. There is no margin when applying low frequency large current,
In some cases, the junction temperature exceeds the assurable maximum temperature, and the IGBT may be damaged due to thermal runaway.

Further, since the actual current changes from 0 A to the maximum current in a sinusoidal waveform at a cycle determined by the frequency, only an average loss can be obtained for a loss that changes instantaneously and instantaneously. The loss obtained when applying current was inaccurate, and it was not possible to judge whether it was a large value or a small value with respect to the actual loss, so when designing the cooler, a considerable thermal margin was taken. .

In addition to the above description, an intelligent power device (IPM) for detecting a chip temperature of an IGBT has recently appeared on the market. However, even the detection by the detector cannot follow a transient temperature rise at the junction. Therefore, when used in an elevator, the instantaneous temperature rise in the acceleration region A in FIG. 18 cannot be detected, and it is sufficiently considered that the temperature may exceed the assurable maximum temperature. It is not a complete function for detecting temperature.

An object of the present invention is to provide an elevator control device capable of suppressing a rise in junction temperature of a power element constituting a power conversion device such as an inverter device and preventing heat loss due to thermal runaway of a chip in the power element. Aim.

According to a first aspect of the present invention, there is provided an elevator control device having an inverter device for driving and controlling an AC motor for operating an elevator car in a vertical direction, wherein the semiconductor power element in the inverter device is provided. The time when the pulse edge when turning on enters
A switching loss calculator for calculating a switching loss by reading the instantaneous current at that time as a condition ;
An on-loss calculator for calculating an instantaneous on-loss when the semiconductor power element is turned on and a constant current is flowing, and adding these switching loss and on-loss ,
Calculates the total loss of the serial power element, thereby to estimate the instantaneous junction temperature rise, when the junction temperature exceeds the allowable temperature before Symbol power device, wherein
An elevator control device characterized in that an AC motor is stopped .

According to the first aspect of the present invention, it is possible to reduce the load on the power element according to the junction temperature by estimating the instantaneous rise in the junction temperature from the switching loss and the on-loss.

According to a second aspect of the present invention, there is provided an inverter device for driving and controlling an AC motor for operating an elevator car in a vertical direction, and a speed detector for detecting a rotation speed of the motor. Speed control device for performing speed minor loop control, current control device for providing current minor loop control by providing a current detector for detecting a current flowing in the electric motor, device and setting device for generating a triangular wave signal for performing PWM control A voltage control device that compares the output signal of the current control device and the triangular wave signal and creates a dead time of the signal; and a gate drive device that supplies the signal of the voltage control device to each semiconductor power element of the inverter device. In the elevator control device having a semiconductor power element in the inverter device
The trigger condition is when a pulse edge enters when
The relationship between the current and the loss at that time is represented by a first-order or higher approximation polynomial, a switching loss calculator for calculating an instantaneous switching loss from the output signal from the current detector and the approximation polynomial, and the semiconductor power element is turned on. Then, the relationship between the current and the main circuit saturation voltage between the power elements when a constant current flows is expressed by a first-order or higher approximation polynomial, and the instantaneous on-loss is calculated from the signal signal from the current detector and the approximation polynomial. An on-loss calculator, an average switching loss calculator that calculates an average of switching losses based on an output signal of the switching loss calculator and a frequency from the setting device, and an output signal of the on-loss calculator and detection from the speed detector. An average steady-state on-loss calculator for calculating an average value of on-loss based on an inverter output frequency to be obtained, An average loss per chip calculator for adding the output signals of the loss calculator and the average steady-state on-loss calculator to calculate an average loss per chip in the semiconductor power element; a transient thermal resistance between the chip and the heat radiation surface; and an average loss per chip A chip junction temperature rise adder that adds the junction temperature rise at the chip from the output of the arithmetic unit,
The output of the chip junction temperature rise adder
Exceeds the allowable temperature of the semiconductor power element.
An elevator control device characterized in that a flow motor is stopped .

According to the invention corresponding to claim 2, the following operation can be obtained. Even when a low-frequency large current is supplied during acceleration and deceleration during elevator operation, the loss of the power element for the instantaneous instantaneous current when the current flows in a sinusoidal form is calculated separately by switching loss and on-loss. By calculating the instantaneous rise in junction temperature, the absolute value of the power element chip junction temperature can be found by adding the temperature of the heat dissipation surface of the power element cooler. Power element chip junction temperature can always be guaranteed by lowering the carrier frequency, reducing the acceleration to reduce the maximum current value, or stopping the elevator.Inverter control and converter control can be performed below the alternative temperature. become able to.

According to a third aspect of the present invention, there is provided an elevator control apparatus as set forth in the second aspect, further comprising a thermistor mounted on a heat radiating surface of a cooler for mounting a semiconductor power element of the inverter device. A temperature detector capable of detecting temperature in linearity, a junction temperature adder for adding the output of the chip junction temperature rise adder and the output of the temperature detector, and a semiconductor power element can be guaranteed by inputting the output of the junction temperature adder And a junction temperature comparator for comparing with a maximum temperature.

According to a fourth aspect of the present invention, there is provided the elevator control device according to the third aspect, wherein the junction temperature comparator operates,
An elevator control device configured to change the setting so as to reduce the acceleration or deceleration of an elevator speed setting device included in the speed control device when detecting that the junction temperature exceeds the assurable maximum temperature.

According to a fifth aspect of the present invention, there is provided the elevator control device according to the third aspect, wherein the junction temperature comparator operates,
When it is detected that the junction temperature exceeds the maximum temperature that can be guaranteed, when the elevator is operating in the acceleration mode, the setting of the elevator speed setter included in the speed control device is set from the acceleration mode from the moment of detection. In the deceleration mode or by applying an electromagnetic brake to the electric motor to temporarily stop it, restarting after a lapse of a certain time or after the temperature output of the temperature detector has become equal to or less than a predetermined set value, the elevator operation is started. It is an elevator control device adapted to continue.

According to a sixth aspect of the present invention, there is provided an elevator control apparatus according to the second aspect, wherein an output of an elevator speed setting device included in the speed control device and an output of the speed detector are included. A power running / regenerative mode detector for detecting a power running / regenerative mode state in accordance with the polarity of the output deviation signal; and when the power running / regenerative mode detector detects the power running mode, the on-loss calculator In the above, the on-loss is calculated only in the section where the ON signal of the gate drive device is input, and when the powering / regenerative mode detector detects the regenerative mode, the ON loss is calculated only in the section where the OFF signal of the gate drive device is input. It is an elevator control device adapted to perform the following.

According to a seventh aspect of the present invention, there is provided the elevator control apparatus according to the second aspect, wherein the on-loss operation unit is operated in a digital mode by a gate in a powering mode. During the section in which the drive device receives the ON signal, the ON loss is calculated for each fixed calculation cycle, and the ON loss calculated for each cycle is added until the ON signal is completed. The elevator control device outputs an on-loss calculator as a total on-loss in the ON signal of the elevator.

In order to achieve the above object, an invention according to claim 8 is the elevator control apparatus according to claim 2, wherein the operation of the on-loss calculator is performed by an analog element in a powering mode. An analog element is composed of a detection current and a multiplier of a main circuit voltage of the semiconductor element when the current flows, and an integrator integrating the output of the multiplier, and a pulse edge of an ON signal entering the gate drive device. An elevator control device that starts the operation of the multiplier and the integrator, stops the integration operation at the pulse edge of the OFF signal, clears the output, and outputs the integrated output voltage to the on-loss calculator. It is.

According to a ninth aspect of the present invention, in the elevator control device according to the second aspect, an on signal or an off signal is supplied to the gate drive device as an operation method of the switching loss operation device. Switching on and switching off losses at the instantaneous detected current value are simultaneously calculated and added to the detected current at the time of entering, and the calculation result is regarded as a switching loss in one on pulse, and the switching loss calculator is used. This is an elevator control device configured to output more.

In order to achieve the above object, the invention according to claim 10 is the elevator control apparatus according to claim 2, wherein the switching loss calculator is turned on by a gate drive signal from the gate drive device. Calculates the switching on loss at the value of the detection current at the moment when the signal enters, and calculates the switching current at the moment when the off signal enters the gate drive signal. An elevator control device that calculates the switching off loss at the value of the detected current of the above, adds the switching on loss and the switching off loss calculated at the different times, and outputs the result as the switching loss from the switching loss calculator. It is.

In order to achieve the above object, an invention according to claim 11 is the elevator control device according to claim 2, wherein an input side of the inverter device is provided with a converter device for converting AC of an AC power supply to DC. A junction comprising the switching loss calculator, the on-loss calculator, the average switching loss calculator, the average steady-state on-loss calculator, the average loss per chip calculator, and the chip junction temperature rise adder. This is an elevator control device to which a temperature rise calculation device is added.

According to a twelfth aspect of the present invention, in the elevator control apparatus according to the second or third aspect, when the temperature reaches a set temperature of a thermostat or the like instead of the temperature detector of the thermistor or the like. A set temperature detector to be detected is attached to a heat radiation surface, and the set temperature is added to the junction temperature adder when the set temperature detector detects or during the detection to calculate a junction temperature. It is an elevator control device configured as described above.

According to a thirteenth aspect of the present invention, there is provided an elevator controller according to the second or third aspect, wherein a set of devices for calculating a junction temperature for only one phase of the AC motor is provided. The elevator control device is provided to monitor whether the junction temperature exceeds the maximum assurable temperature.

In order to achieve the above object, an invention according to claim 14 is the elevator control apparatus according to claim 2 or 3, wherein the junction temperature is calculated for all two or three phases of the AC motor. This is an elevator control device that is provided with a set and monitors whether or not the junction temperature exceeds the maximum temperature that can be guaranteed.

To achieve the above object, the invention according to claim 15 is the elevator control device according to claim 2 or 3, wherein the elevator control device has a large-capacity inverter device that individually configures a cooler for each phase. 4. An elevator apparatus in which a temperature detector such as a thermistor is mounted on a cooler having a comparator for comparing the output of each phase temperature detector to detect a maximum temperature of the temperature detector. The elevator control device is configured to calculate the junction temperature of only one of the three phases by inputting the junction temperature to the junction temperature adder described in (1).

In order to achieve the above object, an invention according to claim 16 is the elevator control device according to claim 2 or 3, wherein the elevator control device has a large-capacity inverter device that individually configures a cooler for each phase. In an elevator apparatus in which a temperature detector such as a thermistor is attached to each cooler, the output of each phase temperature detector is input to a junction temperature adder separately provided for three phases to calculate a junction temperature for each phase individually. It is an elevator control device configured as described above.

According to the invention described in any one of claims 3 to 16, it is possible to suppress a rise in junction temperature of a power element constituting a power conversion device such as an inverter device, and to prevent a heat runaway of a chip in the power element. Loss can be prevented

[0033]

DESCRIPTION OF THE PREFERRED EMBODIMENTS <First Embodiment: Corresponding to Claim 1> FIG. 1 is a block diagram showing a first embodiment, and FIG.
The same parts as in FIG. 7 are denoted by the same reference numerals and their description is omitted. In the figure, reference numeral 1 denotes an elevator speed setting device for generating the elevator speed pattern 31 described in FIG.
The speed adder 3 adds the output of the speed detector 15 for detecting the speed of 4 and the output of the elevator speed setting device 1 in a minor loop, and 3 inputs the deviation of the speed adder 2 to input proportional, integral, differential and vibration suppression. A speed calculator 4 for adjusting the speed response of the elevator car 17; a load signal adder for adding the detection signal of the load detector 18 for detecting the load of the elevator car 17 to the output of the speed calculator 3; A current adder for adding the output of the current detector 3 for detecting the output current and the output of the load signal adder 4 in a minor loop, and 6 for inputting the deviation signal of the current adder and adjusting the current response such as proportional and integral A current calculator 7 for generating a triangular wave for performing PWM control; 8, a triangular wave setting device for setting the amplitude and cycle (frequency) of the triangular wave generator 7; The comparator 10 which receives the outputs of the inverter 7 and the current calculator 6 to generate a voltage command signal sets the dead time of the upper arm and the lower arm of the inverter device 12 with respect to the voltage command signal which is the output of the comparator 9. A dead time corrector 11 is a gate drive device for generating a signal for driving each IGBT of the inverter device 12. The devices with the reference numerals described above are:
This is also configured in a conventional device.

In the figure, reference numeral 1 denotes an elevator speed setting device for generating the elevator speed pattern 31 described in FIG. 18, 2 denotes an output of a speed detector 15 for detecting the speed of the electric motor 14,
A speed adder for adding the output of the elevator speed setter 1 in a minor loop, a speed calculator 3 for inputting the deviation of the speed adder 2 and adjusting a speed response such as proportional, integral, derivative, vibration suppression, and 4 A load signal adder for adding the detection signal of the load detector 18 for detecting the load on the car 17 and the output of the speed calculator 3, 5 is the output of the current detector 3 for detecting the output current of the inverter device 12 and the load A current adder for adding the output of the signal adder 4 in a minor loop, a current calculator 6 for inputting a deviation signal of the current adder and adjusting a current response such as proportional and integral, and 7 for performing PWM control. A triangular wave generator for generating a triangular wave, 8 is a triangular wave setting device for setting the amplitude and period (frequency) of the triangular wave generator 7, 9 is a voltage input to the triangular wave generator 7 and the output of the current calculator 6. finger Comparator to create a signal, 10
Is a dead time corrector for setting the dead time of the upper arm and the lower arm of the inverter device 12 with respect to the voltage command signal output from the comparator 9, and 11 is a signal for driving each power element of the inverter device 12. It is a gate drive device. The devices with the reference numerals described above are also configured in conventional devices.

In this embodiment, newly added components are described below. Reference numeral 20 denotes a switching loss calculator for inputting a voltage command signal output from the comparator 9 and an output of the current detector 13 to calculate a switching loss of the IGBT.
0 Enter the same current signal and the voltage command signal, IGBT
An on-loss calculator for calculating an on-loss when a current is flowing through the switch; a triangular wave waveform frequency signal from the triangular wave setting device 8 and an output of the switching loss calculator 20 are input to the on-loss calculator 22 based on a carrier frequency of the triangular wave signal. Average switching loss calculator for calculating the average of switching loss, 2
Reference numeral 3 denotes an average steady-state on-loss calculator for calculating an average of on-loss based on the inverter output frequency output from the speed signal of the speed detector 15, and reference numeral 24 denotes an output of the average switching loss calculator 22 and the average steady-state on-loss calculator 23. An IGBT switching on-loss adder for outputting an instantaneous power element generation loss; 25, an average loss per chip calculator for inputting an output of the IGBT switching on-loss adder 24 and calculating an instantaneous generation loss per chip; 26 inputs the output of the average loss calculator per chip 25, converts the instantaneous loss to a junction temperature rise in the chip, and adds the instantaneous instantaneous junction temperature to the chip junction temperature rise addition. It is a vessel.

In addition, in addition to the above-described configuration, a temperature detector 27, a junction temperature adder 28, and a junction temperature comparator 29 required in an embodiment described later are provided.

Next, the operation of the first embodiment configured as described above will be described. Reference numerals 1 to 18, 30 in the figure
Are the same as those of the conventional elevator, and the description of these operations will be omitted. First, an operation and a calculation method of the switching calculator 20 will be described. IGB T is as shown in FIG. 2 to the gate drive requirements in one <br/> general
It has characteristics of a current I _C flowing through the IGBT and a loss mj.
2, when the horizontal axis represents the current flowing through the main circuit transistor IGBT, represent switching loss on the vertical axis for each of the current values, E _on the loss when switching on, the E _off is switched off Is a loss.

First, this characteristic is expressed by a first-order or higher-order polynomial, and a relational expression of the loss with respect to the current flowing through the IGBT is defined. For example, assuming that the expression is represented by a third-order polynomial, E _on and E _off are represented as follows.

[0039] ^{_{E on = aI C 3 + bI}} C 2 + cI C + d (2) E off = eI C 3 + fI C 2 + gI C + h Here, I _C: rated current flowing through the IGBT, to h: characteristics of FIG. 2 Is a constant when is represented by a third-order polynomial.

[0040] Thus, the signal by the pulse of the voltage command by the output of the comparator 9, by reading the instantaneous current at that time as a trigger condition when the pulse edge has entered when the IGBT is turned on, E _on at the instantaneous current, E _off is uniquely determined from equation (2). So determined E _on, switching loss when the trigger condition has entered is calculated by adding the E _off.
Then, when the come in the following IGBT on-pulse as shown in FIG. 3, read the instantaneous current in that moment again new E _on, a configuration such as that to calculate the E _{off. Assuming} that the addition signal of E _on and E _off is P _tsw ,

[0041]

(Equation 1) Holds, and switching is performed n times in one cycle of the inverter control current, and the switching loss is added as in the equation (3).

Next, the average switching loss calculator 22 will be described. By multiplying the signal output from the switching loss calculator 20 by the frequency of the triangular wave, an average switching loss P _{sw (W)} is calculated for the instantaneous switching loss P _tsw .

Further, as shown in FIG.
The current flowing to the IGBT in only one arm (for example, U-phase) is described. When a sine-wave current flows as shown in the figure to the U-phase load terminal, the current shown by the sine-wave solid line is the P-side IGBT3.
Although the current flows when the switch 8 is turned on, the current indicated by the broken line of the sine wave flows through the N-side IGBT 39 and does not flow through the P-side IGBT 38. Therefore, the loss occurs in the IGBT for only one half cycle with respect to one cycle of the sine wave.
The average switching loss for T38 is 、,
When P _{sw (w)} is expressed by an equation, it is as shown in equation (4).

∴P _sw = P _tsw × f _C × 1/2 (w) (4) P _sw : average switching loss at the moment when the IGBT on-pulse is input f _C : triangular wave carrier frequency Next, the on-loss calculator 21 explain. IGBT
When the semiconductor element is turned on and a current flows through the transistor, the semiconductor element has current and voltage characteristics as shown in FIG.
In FIG. 5, the horizontal axis represents the current flowing in the main circuit transistor of the IGBT, and the vertical axis represents the collector-emitter saturation voltage V _{CE (sat)} of the transistor for each current value. Therefore, as in the case of the switching loss calculation, the characteristic of FIG.
The relational expression of V _{CE (sat) with} respect to the current flowing through is defined.
For example, if it is assumed to be represented by a third-order polynomial, it is represented as follows.

[0045] _{V CE (sat) (V)} = kI C 3 + lI C 2 + mI C + n ... (5) where, k~h: constant when representing the characteristic of FIG. 3 in order polynomial. Therefore, the signal based on the pulse of the voltage command generated by the output of the comparator 9 is obtained by reading the instantaneous current at that instant under the condition that a pulse edge when the IGBT is turned on enters as a trigger condition.
_{CE (sat)} is uniquely determined from equation (5).

If it is assumed that an off-pulse has entered after Δt (s) from the on-pulse edge, then the Δt
The on-loss P _ton between (s) is expressed as follows. P _{ton (J)} = Δt × V _{CE (sat)} × I _C (6) (When the magnitude of I _C does not change during Δt) Or, the current when an ON pulse is applied and the current when an OFF pulse is applied When the currents are different, the trapezoidal approximation as shown in FIG. 6 is used to calculate the on-loss at Δt (s) as follows.

P _1ton = V _{CE (sat) 1} × I _C1 P _2ton = V _{CE (sat) 2} × I _C2 (7) ∴P _{ton (J)} = Δt × (P _1ton + P _2ton ) / 2 As described above, the calculation is performed by either of the equations (6) and (7) to obtain the output signal of the on-loss calculator 21.

Next, the average steady-state on-loss calculator 23 will be described. By multiplying the output signal of the on-loss calculator 21 by the frequency f of the inverter control current detected from the speed signal of the speed detector 15, the average steady-state on-loss P _{on (W)} is calculated as follows.

P _{on (W)} = P _ton × f (8) The value calculated by the equation (8) is the average steady-state on-loss calculator 23.
Output. Then, by adding the average switching on-loss and the average steady-state on-loss calculated by the equations (4) and (8) by the IGBT switching / on-loss adder 24, the IGBT on signal shown by the pulse train in FIG. The total loss P _LOSS of the IGBT in one switching operation until the ON signal is _input is calculated.

Further, considering the current imbalance between the chips in the IGBT, etc., with respect to the total loss P _LOSS ,
The chip loss Q for the chip having the worst current imbalance or the like is calculated as follows and output from the average loss calculator per chip 25.

Q (W) = A × P _LOSS / N (9) where A: current imbalance in the chip, N: IG
Total number of chips configured in the BT.

Finally, the total loss Q generated in the chip
In contrast, the total loss is input to the thermal network including the thermal resistance P _{th (fc)} existing on the chip-heat radiating surface and the thermal capacity C _{igbt of the} IGBT chip every time the IGBT is switched, and the junction temperature rises at that time. Are sequentially added and output from the chip junction temperature rise adder 26.

As described above, since the junction temperature rise is calculated while calculating the IGBT loss for the instantaneous instantaneous current with respect to the low-frequency current generated in a sine wave shape , the calculation can be performed accurately for the junction temperature rise. become.

According to the first embodiment described above, FIG.
Even when a low-frequency large current flows as in the area A of FIG. 8, by calculating the instantaneous IGBT loss and junction temperature rise, it is instantaneously calculated that the junction temperature of the chip in the IGBT can be guaranteed and reaches the maximum temperature. However, it is possible to prevent the increase in loss by lowering the control current, lowering the carrier frequency, or stopping the elevator so that the junction temperature does not further rise, and prevent the chip in the IGBT power element from being damaged by thermal runaway. . <Second Embodiment: Corresponding to Claim 2> In a second embodiment, a method for protecting an elevator based on the IGBT chip junction temperature rise signal shown in FIG. 1 against the junction temperature will be described.

In FIG. 1, reference numeral 27 denotes an I in the inverter device.
A temperature detector capable of detecting a temperature in a linearity such as a thermistor mounted on the heat radiating surface of the GBT. Reference numeral 28 denotes a chip junction temperature rise adder 26 and an output of the temperature detector 27. The absolute value of the chip junction temperature is inputted. The junction temperature adder to be operated and 29 receive the output of the junction temperature adder 28, compare it with the maximum assurable temperature which is the junction temperature guaranteed as an IGBT, and input an output exceeding the maximum temperature. The output of the comparator 9 is a junction temperature comparator which outputs a detection signal.

FIG. 7 shows a specific circuit example for changing the triangular wave carrier frequency when the junction temperature comparator is output. In FIG. 7, 40 is a pull-up resistor, 41 is a NAND gate, and 42 is an inverter gate. Reference numerals 43 and 44 denote reference numerals 6 to 6 shown in FIG.
This is a circuit that performs operations after current control by digital control with a gate array and DSP (digital signal processor) when up to 10 devices are integrated into one IC.

Next, the operation of this embodiment will be described with reference to FIGS.
This will be described with reference to FIG. When the elevator is operated continuously, the loss generated from the IGBT becomes heat at the radiation fins, and as the temperature of the cooling fins increases, the output of the temperature detector 27 attached to the radiation surface of the cooling fins increases. It is becoming. The output of the temperature detector 27 and the output of the chip junction temperature rise adder 26 are input to the junction temperature adder 28, and the maximum junction temperature absolute value Δt _{j of the} chip is calculated as follows.

Δt _j = t _a + t _igbt (10) where t _a is an output signal of the temperature detector, and t _igbt is an output signal of the chip junction temperature rise adder.

When this Δt _j is input to the next junction temperature comparator 29 and exceeds the _assurable maximum temperature T _j (T _j <Δt _j ), the comparator 29 outputs an “H” signal. Further, the output of the comparator 29 is input to the portion 29 in FIG. 7, when f ₁ terminal of the gate array 43 is "H" is f ₁
Triangular wave carrier frequency of the f ₂ terminal is set in the GA is set to a triangular wave carrier frequency f ₂ in the GA becomes to "H". N when comparator 29 is not detecting
Of the inputs of the AND gate 41, the signal of the comparator 29 is "L" and the other input is always "H" by the pull-up resistor 40.
1 output becomes "H", f ₁ terminal "H", f ₂ pin contains a "L", the normal triangular wave carrier frequency f
Suppressed by ₁ .

[0060] However, if the detected output comparator 29 becomes "H", the output of NAND gate 41 becomes "L", the output of the inverter gate 42 is f ₁ terminal by becomes "H""L" , f ₂ terminal becomes "H" triangular wave carrier frequency is modified set to f _2. f
Comparator 29 detects that the relationship between ₁ and f ₂ is f ₁ > f _2, and the chip junction temperature becomes T _j <Δ
With the relationship of t _j , it is possible to lower the triangular wave carrier frequency. A decrease in the triangular wave carrier frequency means a decrease in f _C shown in equation (4).
Eventually, by reducing the average switching loss P _sw , the average loss Q per chip is reduced, and the junction temperature rise is suppressed, and the absolute junction temperature Δt _j can be reduced.

As described above, the absolute temperature of Δt _j can be suppressed by lowering the triangular wave carrier frequency and suppressing the loss from the moment detected by the comparator 29. Note that the circuit in FIG. 7 can also be realized by using an analog element such as an operational amplifier.

<Third Embodiment: Corresponding to Claim 3> Third Embodiment
The second embodiment will be described with reference to FIG. 1. This is a method of lowering the absolute junction temperature by a method other than the triangular carrier frequency described in the second embodiment. This will be described below.

The junction temperature comparator 2 in FIG.
9 is the same as that of the second embodiment up to the method of detecting the relationship of T _j <Δt _j , but here the output is input to the elevator speed setting device.

The operation in this case will be described with reference to FIG. When the elevator speed pattern 31 issues an acceleration command and the elevator attempts to accelerate, if the comparator 29 outputs “H” after the time of D has elapsed, the acceleration setting is changed from the current α ₁ to the broken line from that point. by changing the alpha ₂ shown in, in which the lower the junction temperature rise by suppressing an output current of the acceleration.

When the acceleration is changed from α ₁ to α ₂ , (1)
Since the acceleration torque T _FLACC shown in the equation decreases, the peak value of the acceleration current decreases and the switching loss P _sw and the on-loss P _on
And the junction temperature absolute value can be suppressed.

<Fourth Embodiment: Corresponding to Claim 4>
This embodiment can be configured in the same manner as the third embodiment,
The difference from the third embodiment is that the elevator speed setting device 1
Is switched from the acceleration mode to the deceleration mode from the point in time when the comparator 29 detects the speed pattern from, and the elevator is stopped at the nearest floor.

The operation of the fourth embodiment having such a configuration will be described with reference to FIG. In FIG. 9 (a), when the comparator 29 detects that the speed pattern is being accelerated and the F time has elapsed, the speed setting device 1 switches the mode from the acceleration mode to the deceleration mode (G) from that point and arrives at the nearest floor. Let it. As the current flowing through the IGBT, the F period is the same as that of the U-phase
Although the current flows to the T transistor, the comparator 29 changes to the deceleration pattern after the detection, so that the regenerative mode is set and the current flows to the FWD side of the IGBT as indicated by the broken line.
There is no loss to the transistor side chip, and the junction temperature can be reduced.

In the fourth embodiment, since the output current is zero and the IGBT switching operation is stopped from the moment when the method of applying the brake is detected, the absolute value of the junction temperature can be naturally reduced.

<Fifth Embodiment: Corresponding to Claim 5> Fifth Embodiment
This embodiment has almost the same configuration as the embodiment shown in FIG. 1, and differs from the embodiment shown in FIG.
_This is a calculation method in the powering / regeneration mode for the calculation of on.
This will be described below. 1 in FIG. 1 is a speed setting device 1
And the output of the speed detector 15 and the output of the speed adder 2 for outputting the deviation signal. The output of the mode detector 19 is a powering / regenerative mode detector for detecting the powering / regenerative mode. The data is input to the arithmetic unit 21.

The calculation method in this embodiment is as follows.
This will be described with reference to FIG. When the powering / regeneration mode detector 19 detects that it is in the powering mode, FIG.
(B) and (c) are obtained. That is, the U-phase P-side IGBT
38, the solid line of the I _U current flows in the direction of the arrow,
Flows dashed current I _U is in the direction of arrow against GBT39.

For example, the current of the solid line will be described.
The triangular wave output of the triangular wave generator 7 and the current command value of the current calculator 6 are compared with the output of the comparator 9 (the firing signal of the U-phase P-side IGBT 38) output through the comparator 9 when the output of the comparator 9 is turned on. An IGBT current flows on the transistor side of the IGBT 38 [a convex portion having a large pulse width in FIG. 10C].

When the output of the comparator 9 is off, a current flows through the FWD of the V-phase N-side IGBT 39 [FIG.
(C) Projection with narrow pulse width]. Therefore, in this case, the ON period of the output of the comparator 9 and the IGBT ON are combined, so that the ON loss is calculated while the output of the comparator 9 is ON.

Further, when the powering / regenerative mode detector 19 detects the regenerative mode, FIG. 10 (d), (e),
(F). That is, I for the IGBT 38
Flow dashed _U current in the direction of arrows, flows in the direction of the solid line I _U current arrow for IGBT39. For example, the current indicated by the broken line will be described.
The firing signal of the IGBT 39 is an inverted signal of the firing signal of the BT 38. When the ignition signal of the IGBT 39 is an ON command, the IGB 39
A T current flows [a convex portion having a wide pulse width in FIG. 10 (f)]. When the ignition signal of the IGBT 39 is an OFF command,
A current flows through the FWD of the BT 38 [a convex portion having a narrow pulse width in FIG. 10 (f)].

This corresponds to the output of the comparator 9
When the output of the comparator 9 is off, the IGBT 3
9 will flow. Therefore, in the case of the regenerative mode, the off period of the output of the comparator 9 and the IGBT on are at the same timing, so that the on-loss when the output of the comparator 9 is off is calculated.

As described above, the ON loss can be accurately calculated in both power running and regeneration using only one signal of the output of the comparator 9 as a trigger condition. <Sixth Embodiment: Corresponding to Claim 6> The sixth embodiment has a configuration substantially the same as that of FIG. 1, but differs in an on-loss calculation method, which will be described with reference to FIG. I do. When calculating on-loss by digital control, continuous on-loss calculation cannot be performed because the calculation cycle is discrete. Therefore, as shown in FIG. 11, the on-loss calculation cycle is performed for each Δt, and the on-loss calculated in each calculation cycle is added, so that the total loss P _{ton (J)} for the on-pulse at the output of the comparator 9 is obtained. Is calculated. The calculation method in the mode of FIG. 11 is described below using equation (6).

[0076]

(Equation 2)

The on-loss calculation by digital control according to this calculation method can also be performed relatively accurately. <Seventh Embodiment: Corresponding to Claim 7> The seventh embodiment has substantially the same configuration as that of FIG. 1, but differs in an on-loss calculation method. Hereinafter, this will be described with reference to FIG. explain. Unlike the sixth embodiment, the on-loss calculation method is a method of calculating the on-loss by an analog circuit. In the figure, 45 is an inverter gate, 46 and 52 are analog switches such as FETs for inputting analog signals, 48 is a pull-down resistor connected to 0 V, 47 and 5
6 is a pull-down resistor connected to the negative voltage V _EE , 49 is a function generator that outputs the relationship between I _C and V _CE as shown in FIG.
0 is a multiplier for calculating instantaneous on-loss, 51 is an input resistance of an operational amplifier 55, and 53 is a discharge resistance of a capacitor 54.

The operation of the circuit shown in FIG. 12 will be described. When the output of the comparator 9 becomes “H”, the analog switch 46 is turned on and the analog switch 52 is turned off. When the analog switch 46 is turned on, the signal of the current detector 13 is input to the function generator 49, and the V _{CE (sat)} voltage shown in FIG. 5 is output.
The V _{CE (sat)} voltage and the signal of the current detector 13 are input to the multiplier 50, and P _t = I _C × V _{CE (sat)} is calculated.
_t is calculated and _Pt is output.

[0079] to continue the integration and functions that are turned on in input to the integration circuit constituting the signal of the P _t in 51,54,55. Then, when the output of the comparator 9 is turned off, the analog switch 46 is turned off, so that the signal from the current detector 13 disappears. When the output becomes 0 V and the output of the multiplier 50 becomes 0, the integration is stopped. At the same time, since the analog switch 52 is turned on, the electric charge charged in the capacitor 54 is discharged through the discharge resistor 53, and the output of the operational amplifier 55 is cleared. If the output current of the current detector 13 changes during the integration, the output of the multiplier 50 changes accordingly, so that accurate on-loss calculation can be performed.

<Eighth Embodiment: Corresponding to Claim 8>
Although the configuration of this embodiment is almost the same as that of FIG. 1, a different point is a switching loss calculation method, which will be described below with reference to FIG.

The current value at the moment when the output of the comparator 9 issues the ON command is read, and based _{on the} current value, E _on1 ,
Calculates the E _off1 simultaneously determine the switching loss P _TSW1 for the on-pulse by _{P tsw = E on1 + E off1} . When the output of the comparator 9 turns off, no operation is performed. Then also, when the on-pulse comes in a new switching loss _P tsw2 determined by _{P tsw2 = E on2 + E off2} . In this way, the calculation can be simplified.

<Ninth Embodiment: Corresponding to Claim 9> Ninth Embodiment
Although the configuration of this embodiment is almost the same as that of FIG. 1, a different point is a switching loss calculation method, which will be described below with reference to FIG.

The current actually output from the inverter device 12 slightly increases and decreases as shown in FIG. 13, although it depends on the inductance on the load side. Here, therefore, the switching-on losses E _on to current when falling etch of the output of the comparator 9, also with respect to current at the rising etch of the output of the comparator 9 so as to calculate the switching-off losses. The arithmetic expression is as follows from Expression (2).

[0084] ^{_{E on1 = aI 1 3 + bI}} 1 2 + cI 1 + d E off1 = eI 2 3 + fI 2 2 + gI 2 + h E on 2 = aI 3 3 + bI 3 2 + cI 3 + d E off2 = eI 4 3 + fI 4 2 + gI ₄ + h As a result, the calculation results of E _on and E _off become accurate, and a highly accurate switching loss can be calculated.

<Tenth Embodiment: Corresponding to Claim 10>
The tenth embodiment is a converter device that performs boosting, regeneration, and constant voltage control used in an elevator control device.
A power element such as a BT is provided with the junction temperature rise calculation device of the inverter device described in the above embodiment.

More specifically, the converter shown in FIG. 17 has a converter device that performs step-up, regeneration, and constant voltage control in place of the rectifier 35. Switching loss calculator 20, on-loss calculator 21, average switching loss calculator 22,
Junction temperature rise calculation device including average steady-state on-loss calculator 23, switching on-loss adder 24, average loss per chip calculator 25, chip junction temperature rise adder 26, thermistor 27, junction temperature adder 28, junction temperature comparator 29 Is provided. Other points are the same as those in FIG.

In the tenth embodiment described above,
The reliability improvement device can be downsized not only for the inverter device but also for the converter device. <Eleventh Embodiment: Corresponding to Claim 11> The eleventh embodiment is provided with a junction temperature only when a set temperature detector for detecting a set temperature such as a thermostat is provided instead of a temperature detector such as a thermistor. By calculating the absolute value, a detection circuit for an output such as a thermistor is not required, so that the circuit can be simplified and the cost of the detector itself can be reduced.

<Twelfth Embodiment: Corresponding to Claim 12>
In the twelfth embodiment, the devices indicated by reference numerals 19 to 29 shown in FIG. 1 are provided for only one phase, and when the chip junction temperature exceeds the assurable maximum temperature in the provided phase, the junction temperature for all phases is increased. Means to lower As a result, protection against the junction temperature shown in the present patent can be achieved with a simple circuit configuration of only one phase.

<Thirteenth Embodiment: Corresponding to Claim 13>
The thirteenth embodiment is shown in FIG. In the figure, the same parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In the figure, 5
Reference numeral 6 denotes a U-phase junction temperature calculation device including components 20 to 29 in FIG. 1, and similarly, 57 denotes a V-phase junction temperature calculation device and 58 denotes a W-phase junction temperature calculation device. 59 is OR
The gate 60 has two of the output currents of the inverter device 12.
This is a detection current two-phase / three-phase conversion device that converts an output to a current detector 13 that detects a phase current into two-phase / three-phase. The operation of this circuit will be described. The U-phase voltage output command among the outputs of the comparator 9 is input to the U-phase junction temperature calculating device, and when the chip junction temperature exceeds the assurable maximum temperature, an "H" signal is output from 56, which is the OR gate 5
9, the output becomes "H" and the means for lowering the junction temperature is implemented assuming that the junction temperature exceeds the allowable value.

The same applies to the V phase and the W phase. In this way, even when a current imbalance occurs due to a phase, all the phases are simultaneously monitored, so that an abnormal junction temperature can be reliably detected.

<Fourteenth Embodiment: Corresponding to Claim 14>
The fourteenth embodiment is shown in FIG. In the figure, reference numeral 61 denotes a U-phase inverter stack mounted with a U-phase arm IGBT, 6
2 is a V-phase inverter stack, and 63 is a W-phase inverter stack.

Further, reference numeral 64 denotes a U attached to the heat radiation surface of the U-phase cooler.
A phase temperature detector, 65 is a V-phase temperature detector, and 66 is a W-phase temperature detector. Reference numeral 67 denotes a maximum signal detector which receives the signals of the 64, 65, and 66 temperature detectors and outputs the largest value, and 68 denotes a junction temperature calculator having 19 to 29 components. This operation is 64,
A maximum value is selected at 67 with respect to the detected temperatures from 65 and 66, and the maximum detected temperature is input to a junction temperature calculator provided in one of the U-W phases to calculate the junction temperature. is there. Thus, when there is variation in the coolers provided separately for each phase, the junction temperature can be calculated based on the temperature of the cooler having the highest temperature.

<Fifteenth Embodiment: Corresponding to Claim 15>
The fifteenth embodiment is shown in FIG. This is a combination of the circuits of FIG. 14 and FIG. 16. For the U-phase, the output of the U-phase temperature detector 64 is input to the V-phase junction temperature calculator 56 to calculate the junction temperature. It was done. The same applies to the V phase and the W phase. This makes it possible to individually monitor the junction temperature due to the cooler temperature variation and the current variation for each phase.

According to the embodiment of the present invention described above , instantaneous instantaneous on-loss and switching loss are obtained for a transient junction temperature when a low-frequency large current is applied during acceleration of an elevator, and the instantaneous on-loss and switching loss are obtained from the total loss. Ri by the adding the temperature of the junction temperature rise further IGBT mounting surface by calculating in, by calculating the absolute temperature of the junk <br/> sucrose emissions at instantaneous, the computed junction temperature can guarantee When the temperature exceeds the maximum temperature, the carrier frequency of the triangular wave can be reduced or the acceleration can be reduced to reduce the energizing current to lower the absolute value of the junction temperature. As a result, it is possible to prevent breakage due to thermal runaway caused by abnormal heating of the IGBT chip, thereby improving reliability with the inverter device and
Against the radiator, because that makes it possible to use up to the I GBT chip temperature barely, it is possible also to achieve a low-cost, compact can be downsized discharge heat sink itself.

According to the present invention, the power of an inverter device or the like can be obtained.
Junction of power element that constitutes force converter
Temperature rise can be suppressed and thermal runaway of the chip inside the power device
To provide an elevator control device capable of preventing heat loss
Can be.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an elevator control device according to the present invention.

FIG. 2 is a diagram showing a loss characteristic curve at the time of switching of the IGBT of the inverter of FIG. 1;

FIG. 3 is a diagram for explaining a switching loss calculation method in FIG. 1;

FIG. 4 is a diagram showing a current flowing through one arm of the inverter of FIG. 1;

FIG. 5 shows a V _CE -I _C characteristic curve when IGBT ON of FIG.

FIG. 6 is a diagram for explaining the on-loss calculation method of FIG. 1;

FIG. 7 is a diagram showing an example of a triangular wave carrier frequency setting change circuit for describing an elevator control device according to a second embodiment of the present invention.

FIG. 8 is an explanatory diagram of a method of changing a speed pattern for describing an elevator control device according to a third embodiment of the present invention.

FIG. 9 is a diagram for explaining a fourth embodiment of the elevator control device according to the present invention.

FIG. 10 is a diagram for explaining a fifth embodiment of the elevator control device according to the present invention.

FIG. 11 is an explanatory diagram of a method for calculating an on-loss by digital control for explaining a sixth embodiment of the elevator control device according to the present invention.

FIG. 12 is a diagram showing a configuration for calculating an on-loss by an analog element for explaining a seventh embodiment of the elevator control device according to the present invention.

FIG. 13 is an explanatory diagram of a method of calculating a switching loss for explaining a ninth embodiment of the elevator control device according to the present invention.

FIG. 14 is a block diagram showing only essential parts for explaining a thirteenth embodiment of the elevator control device according to the present invention.

FIG. 15 is a block diagram showing only essential parts for explaining a fourteenth embodiment of the elevator control device according to the present invention.

FIG. 16 is a block diagram showing only essential parts for explaining a fifteenth embodiment of the elevator control device according to the present invention.

FIG. 17 is a schematic configuration diagram showing an example of a conventional elevator control device.

18 is a diagram showing operating characteristic data of the elevator control device according to FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Elevator speed setter, 2 ... Speed adder, 3 ... Speed calculator, 4 ... Load signal adder, 5 ... Current adder, 6 ... Current calculator, 7 ... Triangle wave generator, 8 ... Triangle wave setter, 9 ...
Comparator, 10 dead time corrector, 11 gate drive device, 12 inverter device, 13 current detector, 14 three-phase induction motor, 15 speed detector, 16
... Counter weight, 17 ... Elevator car, 18 ... Load detector, 19 ... Powering / regenerative mode detector, 20 ... Switching loss calculator, 21 ... On-loss calculator, 22 ... Average switching loss calculator, 23 ... Average steady on-loss Arithmetic unit, 24 IGBT switching on-loss adder, 2
5: Average loss per chip calculator, 26: Chip junction temperature rise adder, 27: Thermistor, 28: Junction temperature adder, 29: Junction temperature comparator, 30: Sheave, 31: Elevator speed pattern, 32: Torque command signal 33, output current, 34, three-phase AC power supply, 35, rectifier, 36, smoothing capacitor, 3
7 ... Thermostat.

──────────────────────────────────────────────────続 き Continuation of front page (58) Field surveyed (Int. Cl. ⁷ , DB name) B66B 1/00-1/52 H02P 7/63 302

Claims (16)

(57) [Claims] 1. An elevator control device having an inverter device for driving and controlling an AC motor for operating an elevator car in a vertical direction, wherein a semiconductor power element in the inverter device is turned on.
A switching loss calculator that calculates a switching loss by reading the instantaneous current at that time when the bird enters the pulse edge as a condition, and the instantaneous state when the semiconductor power element is turned on and a constant current flows. And an on-loss calculator that calculates on-loss, and adds these switching loss and on-loss.
Then, the total loss of the power element is calculated, and
Ri and estimates the instantaneous junction temperature rise, the junction temperature exceeds the allowable temperature before Symbol power element
Wherein the AC motor is stopped . 2. An inverter device for driving and controlling an AC motor for operating an elevator car in a vertical direction; a speed control device for providing a speed detector for detecting a rotation speed of the motor to perform a speed minor loop control; A current control device for performing a current minor loop control by providing a current detector for detecting a flowing current; a device and a setting device for generating a triangular wave signal for performing PWM control; and compiling an output signal and a triangular wave signal of the current control device. An elevator control device comprising: a voltage control device for generating a signal; and a gate drive device for supplying a signal of the voltage control device to each semiconductor power device of the inverter device. Turns on
The relationship between the current and the loss at that time is defined as a first-order or higher approximation polynomial, and the instantaneous switching loss is calculated from the output signal from the current detector and the approximation polynomial. An arithmetic unit and the semiconductor power element is turned on, and the relation between the current and the main circuit saturation voltage between the power elements when a constant current is flowing is represented by a first-order or higher approximation polynomial, and a signal signal from the current detector and An on-loss calculator for calculating an instantaneous on-loss from the approximation polynomial; an average switching loss calculator for calculating an average of switching losses based on an output signal of the switching loss calculator and a frequency from the setting device; and the on-loss calculator. Average value for calculating an average value of on-loss based on the output signal of the inverter and the inverter output frequency detected from the speed detector. An on-loss calculator, an average loss-per-chip calculator that adds output signals of the average switching loss calculator and the average steady-state on-loss calculator and calculates an average loss per chip in the semiconductor power element; A chip junction temperature rise adder for adding the junction temperature rise at the chip from the thermal resistance and the output of the average loss calculator per chip , and the output of the chip junction temperature rise adder
The exchange time but exceeding the allowable temperature of the semiconductor power element
An elevator control device characterized by stopping a flow motor . 3. The elevator control device according to claim 2, wherein a temperature detector capable of linearly detecting a temperature of a thermistor or the like mounted on a heat radiating surface of a cooler for mounting the semiconductor power element of the inverter device, and the chip junction. A junction temperature adder for adding the output of the temperature rise adder and the output of the temperature detector, and a junction temperature comparator for receiving the output of the junction temperature adder and comparing the output with the assurable maximum temperature of the semiconductor power device. When the junction temperature comparator detects that the temperature exceeds the assurable maximum temperature, the switching loss is reduced by changing the setting so as to lower the frequency setting value of the setting device, thereby reducing the junction temperature. An elevator control device characterized by the above-mentioned. 4. The elevator control device according to claim 3, wherein the junction temperature comparator operates and detects that the junction temperature exceeds a maximum assurable temperature, and the elevator included in the speed control device. Switching loss and ON loss are reduced by changing the setting so as to lower the acceleration or deceleration of the speed setting device,
An elevator control device characterized by lowering a junction temperature. 5. The elevator control device according to claim 3, wherein the junction temperature comparator operates to detect that the junction temperature exceeds a maximum assurable temperature, and the elevator is operated in an acceleration mode. In the case, from the moment of detection, the setting of the elevator speed setting device included in the speed control device is changed from the acceleration mode to the deceleration mode, or the electric motor is electromagnetically braked so as to temporarily stop, and after a certain period of time or the temperature An elevator control device wherein restart is performed after the temperature output of the detector has become equal to or less than a predetermined set value, and elevator operation is continued. 6. The power control / regeneration mode according to claim 2, wherein an output of an elevator speed setting device included in the speed control device and a polarity of a deviation signal of an output of the speed detector are included. Has a powering / regenerative mode detector for detecting that the powering / regenerative mode detector detects the powering mode, only when the ON signal of the gate drive device is included in the on-loss calculator. An elevator control device, wherein an on-loss is calculated, and when the powering / regenerative mode detector detects a regenerative mode, the on-loss is calculated only in a section where an off signal of the gate drive device is input. 7. The elevator control device according to claim 2, wherein the operation of the on-loss calculator is a digital operation, and in the case of a power running mode, the operation is constant during a section in which the ON signal is input to the gate drive device. The on-loss is calculated for each calculation cycle, and the on-loss calculated for each cycle is added until the on-signal ends. When the on-signal ends, the on-loss calculator outputs the total on-loss in the on-signal at that time. An elevator control device characterized in that: 8. The elevator control device according to claim 2, wherein the on-loss calculator is operated by an analog element using a method of detecting a semiconductor current when the analog element detects a current and the current flows in a powering mode. A multiplier for the main circuit voltage of the element and an integrator for integrating the output of the multiplier. The multiplier and the integrator start operating at a pulse edge of an ON signal entering the gate drive device, and a pulse of an OFF signal is provided. An elevator control device, wherein the integration operation is stopped and cleared at an edge, and the integrated output voltage is output to the on-loss calculator. 9. The elevator control device according to claim 2, wherein a detection current at a time when an ON signal or an OFF signal is input to the gate drive device is detected as an operation method of the switching loss calculator. An elevator control device wherein a switching-on and a switching-off loss at a current value are simultaneously calculated and added, and the calculation result is output from the switching loss calculator as a switching loss in one on-pulse. . 10. The elevator control device according to claim 2, wherein the switching loss calculator calculates an instantaneous detection current at a point in time when an ON signal is input to a gate drive signal from the gate drive device. Calculates the switching on-loss at the value of the detection current at, and calculates the switching off-loss at the value of the detection current at that moment with respect to the detection current at the time when the off signal is input to the gate drive signal, An elevator control device, wherein the switching on-loss and the switching off-loss calculated at the different times are added and output as switching loss from the switching loss calculator. 11. The elevator control device according to claim 2, wherein a converter device for converting AC of an AC power supply to DC is connected to an input side of the inverter device, wherein the switching loss calculator, An elevator control characterized by adding a junction temperature rise calculating device including an on-loss calculator, the average switching loss calculator, the average steady-state on-loss calculator, the average loss per chip calculator, and the chip junction temperature rise adder. apparatus. 12. The elevator control device according to claim 2, wherein a set temperature detector for detecting when the temperature reaches a set temperature of a thermostat or the like is attached to the heat radiation surface instead of the temperature detector of the thermistor or the like. An elevator control apparatus, wherein the junction temperature is calculated by adding the set temperature to the junction temperature adder when the set temperature detector detects or during the detection. 13. The elevator control device according to claim 2, wherein a set of devices for calculating a junction temperature for only one phase of the AC motor is provided to determine whether or not the junction temperature exceeds a guaranteeable maximum temperature. An elevator control device characterized in that the elevator control is monitored. 14. The elevator control device according to claim 2, wherein a set of devices for calculating a junction temperature for all of the two or three phases of the AC motor is provided so that the junction temperature exceeds the maximum temperature that can be guaranteed. An elevator control device characterized in that it is monitored whether or not the elevator is present. 15. The elevator control device according to claim 2, wherein a temperature detector such as a thermistor is attached to a cooler having a large-capacity inverter device that individually forms a cooler for each phase. In the elevator apparatus, a value for detecting the maximum temperature of the temperature detector having a comparator for comparing the output of each phase temperature detector is input to the junction temperature adder according to claim 3, and the three-phase value is inputted. An elevator control device characterized in that a junction temperature of only one phase is calculated. 16. The elevator control device according to claim 2, further comprising a large-capacity inverter device that individually configures a cooler for each phase, and a temperature detector such as a thermistor is attached to each cooler. An elevator control device, wherein an output of each phase temperature detector is input to a junction temperature adder provided separately for three phases to calculate a junction temperature for each phase individually.