JP3333883B2 - PWM controller for three-level inverter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PWM control device for a three-level inverter for converting DC to AC, and more particularly to a PWM control suitable for continuous control of AC voltage.

[0002]

2. Description of the Related Art A three-level inverter divides a DC power supply voltage (an overhead line voltage) into two DC voltages by using a capacitor connected in series, so that a positive (high potential), a zero (intermediate potential) and a negative (low potential). ), And these three voltage levels are generated by turning on and off the main circuit switching elements.
The output voltage is controlled by selectively deriving the level voltage to the inverter output terminal. As a PWM control method of the output voltage of the three-level inverter, for example, a dipolar modulation disclosed in Japanese Patent Laid-Open No. 5-146160 (output is performed by alternately outputting positive and negative pulses via a zero voltage within a half cycle of the output voltage). Uses voltage, unipolar modulation (expresses the output voltage by outputting a pulse of a single polarity during the half cycle of the output voltage), and partial dipolar modulation (the above dipolar modulation and unipolar modulation are mixed in one cycle) The method used was known.

[0003]

The above prior art PWM
In the control, a continuous transition between dipolar modulation and unipolar modulation is realized through partial dipolar modulation by continuously varying the bias B corresponding to the shift amount of the two modulated waves shifted to the positive and negative sides. This partial dipolar modulation is a mode in which dipolar modulation and unipolar modulation are alternately mixed in the same cycle.

FIG. 3 shows an example of a modulated wave and an output voltage waveform in a dipolar modulation region. In this PWM control, the positive / negative bias modulation waves abp and abn (FIG. 3) in which the basic modulation wave a (FIG. 3 (a)) proportional to the output voltage fundamental wave is divided into two, and the amplitude is 1/2 and the bias B is shifted positive and negative by the bias B. 3 (b)) is used as an instantaneous command (instantaneous output voltage command) of the positive / negative output voltage pulse (FIG. 3 (c)).

Here, the range of ± ΔA in FIG. 3B is a region where the output pulse is narrower than the minimum on-pulse width determined by the characteristics of the switching elements constituting the main circuit. Even if a command is received, the pulse width is limited to the minimum on-pulse width in this area, and the PWM control device is configured to avoid element failure. For this reason, the voltage of the shaded portion in FIG. 3B cannot be controlled, and the output voltage is reduced by the voltage shown in FIG. 3D in total. Such a voltage drop occurs when shifting from dipolar modulation to partial dipolar modulation. In particular, the amount of voltage drop is greatest immediately before shifting from dipolar modulation to partial dipolar modulation. For example, a carrier frequency of 3 kHz and an output voltage of 30% by dipolar modulation
Assuming that up to (a single pulse that becomes a square-wave voltage output is assumed to be an output voltage of 100%), this voltage drop amount is about 3% at the maximum. Such a voltage drop causes problems such as fluctuations in output current and torque.

An object of the present invention is to provide a PWM control apparatus for a three-level inverter capable of continuously controlling an output voltage faithfully in response to an instantaneous voltage command in a case where dipolar modulation and partial dipolar modulation are used as PWM control. It is in.

[0007]

SUMMARY OF THE INVENTION An object of the present invention is to convert a DC voltage into an AC phase voltage having three potentials of a positive voltage pulse, a negative voltage pulse and zero voltage by PWM control, and to lead the AC voltage to an AC terminal. A control device for a three-level inverter having a PWM control for generating a positive voltage pulse and a negative voltage pulse alternately via a zero voltage within a half cycle of the AC phase voltage by a dipolar modulation, wherein the positive or negative one is provided. When the command of the output voltage pulse becomes equal to or less than the predetermined pulse width, the predetermined pulse width is secured in the pulse width of the command, and the width of the command of the voltage pulse on the opposite polarity side is reduced to zero voltage period. This is achieved by providing correction means for adjusting the pulse width so as to increase in the direction.

[0008]

The above-mentioned correcting means is generated by the limitation of the pulse width in a period where the output pulse subjected to the PWM control is limited to the minimum pulse width during a period in which the positive and negative voltage pulses are alternately output via the zero voltage. Adjust the pulse width on the opposite polarity side to compensate for the voltage shortage. As a result, it is possible to control the output voltage faithfully according to the instantaneous output voltage command.

[0009]

FIG. 1 shows an embodiment of the present invention.

In FIG. 1, G is a train line (a wire) which is a DC voltage source, and 61 and 62 generate an intermediate voltage (neutral point voltage) corresponding to zero potential on the AC output side from the voltage of the DC voltage source G. Therefore, it is a capacitor (voltage dividing capacitor) divided. Here, the voltage of the voltage dividing capacitor is assumed to be Ed / 2. Reference numerals 70 to 73 denote self-extinguishing switching elements having a rectifying element for reflux (in this example, IGBTs, but GTOs, transistors, etc.), 74, 75
Is an auxiliary rectifying element for deriving the neutral point voltage of the capacitor, and a switching arm for one phase of the U phase is constituted by 7a. 7b and 7c are the same as 7a, and constitute a V phase component and a W phase component, respectively. Numeral 8 denotes an induction motor, which shows the case of an induction motor load.

The switching arms 7a to 7c can operate independently for each phase, and generate three levels of output voltages by selective on / off control of switching elements.

The details of the main circuit of the three-level inverter are described in JP-A-51-47848 and JP-A-56-74088, and the details of PWM control are described in Japanese Patent Application No. 3-301512. Have been.

Next, the PWM control unit will be described.

In FIG. 1, a fundamental wave voltage command generator 1 receives a frequency command Fi * of an inverter output voltage, an output voltage effective value command E *, and a DC voltage Ed to obtain an instantaneous inverter output voltage command A · sin θ and an amplitude. Output to the command distributor 2.

The amplitude command distributor 2 halves the inverter output voltage command A · sin θ and further sets the bias setter 2
By adding or subtracting the bias amount B set according to 1 in accordance with the fundamental wave amplitude command value A (modulation rate), a positive bias command abp and a negative bias command abn are generated.

The polarity discriminating distributor 3 outputs a positive bias command ab.
p and the negative bias command abn are distributed to positive and negative voltage commands ap and an for positive and negative pulses, and the pulse generator 4 generates PWM signals for the main circuit switching elements 70 and 73,
These signals are inverted to provide one-phase PWM signals S1 to S4.
make.

In response to these PWM signals, the gate logic unit 5 generates a PWM pulse train in which a minimum on / off time is secured and a non-wrap time for preventing a short circuit of the element is managed, and the gate pulse is transmitted via a gate driver (not shown). Sends a gate signal to the main circuit switching element.

In the present embodiment, 3
The effects of the present invention are exerted by the functions of the polarity discriminating distributors 0, 31, 33, and 34. FIG. 2 shows a configuration example of the polarity discriminating distributor 3. Signal distributors 30, 31, 33
And 34 are positive bias commands a within the range of ± ΔA.
bp or the invalid part of the negative bias command abn is superimposed on the reverse polarity bias command. As a result, the positive / negative bias command becomes equivalent to a waveform as shown in FIG.
In a region where the positive / negative bias command falls within the range of ± ΔA, the invalid voltage is corrected by the reverse-polarity side pulse train while securing a predetermined pulse width. As a result, the error between the voltage command and the actual voltage is reduced, and the sinusoidal property of the output voltage is maintained (the sum of the positive and negative bias modulation waves matches the basic modulation wave in FIG. 3A). On the other hand, the same correction can be made by directly adjusting the PWM signals S1 to S4. FIG. 4 shows an example of correcting the pulse width. In this example, a case where the pulse width on the negative side becomes equal to or smaller than a predetermined minimum on-pulse width Ton is shown. When a narrow pulse as shown in FIG. 4A is generated in the PWM signals S1 to S4, the narrow pulse is reduced to a predetermined minimum on-pulse width Ton by the gate logic unit 5 provided at the subsequent stage of the pulse generator 4. Limited. Therefore, the negative voltage increases more than the actual command voltage. Therefore, in the present embodiment, as shown in FIG. 4B, the pulse width on the opposite side (the positive side in this example) is corrected by the pulse width ΔT adjusted to secure the minimum on-pulse width. As a result, an output voltage according to the voltage command can be realized.

Although the above embodiment has been described taking an induction motor as an example, the same applies to other AC motors. Also,
Although the embodiments of the inverters are shown here, the output terminals of these inverters can be connected to an AC power supply via a reactance element to operate as a self-excited converter that converts AC to DC (regeneration operation). . In this case, the same effect as that of the inverter can be expected.

Naturally, if a microprocessor or the like is used, a part or all of the pulse generating means can be programmed and realized as software.

[0021]

According to the present invention, during the period in which the positive and negative voltage pulses are alternately output via the zero voltage, the PWM-controlled output pulse is limited to the minimum pulse width, and the pulse width of this pulse width is set to the minimum pulse width. By adjusting the pulse width on the opposite polarity side to compensate for the voltage shortage caused by the limitation, the output voltage can be controlled faithfully in response to the instantaneous output voltage command, and continuous control of the output voltage can be realized.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing one embodiment of the present invention.

FIG. 2 is a diagram showing a configuration example of a polarity discrimination distributor of FIG. 1;

FIG. 3 is a view for explaining a principle of correcting a pulse width according to the present invention.

FIG. 4 is a diagram showing a second embodiment of the present invention.

[Explanation of symbols]

1. Basic wave voltage command generator, 2. Amplitude command distributor, 3.
Polarity discriminating distributor, 4 pulse generator, 5 gate logic unit, G DC voltage source (overhead wire), 7a, 7b, 7c switching arm, 8 induction motor, 21 bias setting device, 30, 31, 33, 34 ... signal distributors, 61, 62
... voltage dividing capacitors, 70-73 ... switching elements, 7
4,75 ... Auxiliary rectifying element.

────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-6-98559 (JP, A) JP-A-5-49263 (JP, A) JP-A-5-146160 (JP, A) JP-A-6-98559 311759 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) H02M 7/48 H03K 7/08

Claims (3)

(57) [Claims] 1. A three-level inverter for converting a DC voltage into an AC phase voltage having three potentials of a positive voltage pulse, a negative voltage pulse, and a zero voltage by PWM control and leading the AC voltage to an AC terminal, wherein the dipolar modulation is performed. In the control device for a three-level inverter having PWM control for alternately generating a positive voltage pulse and a negative voltage pulse via a zero voltage within a half cycle of the AC phase voltage, a command of one of the positive and negative output voltage pulses is When the pulse width becomes equal to or less than the predetermined pulse width, the predetermined pulse width is secured for the pulse width of the command, and the width of the command of the voltage pulse on the opposite polarity side is increased in a direction in which the zero voltage period becomes shorter. PWM control device for a three-level inverter, comprising: 2. The PWM control device for a three-level inverter according to claim 1, wherein the width of the voltage pulse is adjusted such that the sum of the adjustments of the positive and negative output voltage pulses becomes zero. 3. A three-level inverter for converting a DC voltage into an AC phase voltage having three potentials of a positive voltage pulse, a negative voltage pulse, and a zero voltage by PWM control and leading the AC voltage to an AC terminal, wherein the inverter is a dipolar modulation. In the control device of the three-level inverter having the PWM control in which the positive and negative voltage pulses are alternately generated via the zero voltage within the half cycle of the AC phase voltage, the positive moment for generating the positive output voltage pulse A voltage command and a negative instantaneous voltage command for generating a negative output voltage pulse are provided, and when the absolute value of either the positive or negative instantaneous output voltage command becomes less than or equal to a predetermined value, the instantaneous voltage command on the opposite polarity side is output. A PWM controller for a three-level inverter, comprising: means for adjusting so as to increase by an amount exceeding the predetermined value.