JP3333317B2 - Antenna switch duplexer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an antenna switch duplexer used for a radio communication device such as a TDMA system which performs radio communication by selectively switching between transmission and reception, typically represented by a digital cellular phone. It is.

[0002]

2. Description of the Related Art Conventionally, a method of sharing an antenna for transmission and reception in a mobile communication device is based on an antenna duplexer formed by a filter or a single pole double throw switch (hereinafter referred to as an SPDT switch) formed by a semiconductor switch element. Abbreviation)
Was used. However, in order to improve the performance of the mobile communication device, it is easy to reduce the size, to perform transmission and reception with lower loss, and to improve the reception quality, an antenna switch compatible with the antenna switching diversity reception system. There is a need for a duplexer.

Hereinafter, an example of the above-described conventional antenna duplexer and SPDT switch will be described with reference to the drawings.

FIG . 4 shows the configuration of a conventional antenna duplexer. In FIG. 4 , reference numeral 601 denotes a transmission terminal;
Is an antenna terminal, 603 is a reception terminal, 604, 605,
Reference numerals 606, 607, 608, and 609 denote the short-circuited dielectric coaxial resonators at the tip ends,
15, 616 and 617 are capacitors. Here, the tip short-circuited dielectric coaxial resonators 604, 605, 606 and the capacitors 610, 611, 612, 613 constitute a transmission filter 618 having a pass band at the transmission frequency and an attenuation band at the reception frequency. Short-circuit dielectric coaxial resonators 607, 608, 609, capacitor 61
4, 615, 616, and 617 constitute a reception filter 619 having a pass band at the reception frequency and an attenuation band at the transmission frequency.

[0005] The operation of the conventional antenna duplexer configured as described above will be described below.

At the transmission frequency, the impedance of the transmission filter 618 viewed from the transmission terminal 601 side is low, and the impedance of the reception filter 619 viewed from the antenna terminal 602 is high impedance. The transmitted signal is output from the antenna terminal 602 and is not output to the reception terminal 603. Also, at the reception frequency, the antenna terminal 6
Since the impedance when the transmission filter 618 is viewed from the 02 side is high impedance and the impedance when the reception filter 619 is viewed from the antenna terminal 602 is low impedance, the reception signal input from the antenna terminal 602 is output from the reception terminal 603. And the transmission terminal 601
Is not output to

FIG . 5 shows the configuration of a conventional SPDT switch. In FIG. 5 , reference numeral 701 denotes a first signal terminal;
02 is a second signal terminal, 703 is a third signal terminal, 70
4 is a control terminal, 705 and 706 are PIN diodes, 7
07 is a strip line having a quarter wavelength in signal frequency, 708 is a resistor, 709 is an inductor, 710,
711, 712, 713 are capacitors. here,
The resistor 708, the inductor 709, and the capacitor 711 constitute a control circuit.
Is grounded at a high frequency. Also, the capacitor 7
Reference numerals 10, 712, and 713 perform a function of blocking direct current.

[0008] The conventional SPDT switch configured as described above can be used as a transmission / reception switch and an antenna switch, respectively.

First, the operation when the SPDT switch is used as a transmission / reception changeover switch will be described.
In this case, the first signal terminal 701 becomes the transmission terminal 701, the second signal terminal 702 becomes the antenna terminal 702, and the third signal terminal 703 becomes the reception terminal 703.

At the time of transmission, a positive voltage is applied to the control terminal 704. The control current flows through the control terminal 704, the resistor 708, the inductor 709, the PIN diode 705, the strip line 707, and the PIN diode 706 in the stated order. Accordingly, a low impedance state is established between the anode and the cathode of the PIN diodes 705 and 706. P
Since the impedance between the anode and the cathode of the IN diode 706 is in a low impedance state, one end of the strip line 707 connected to the anode of the PIN diode 706 is substantially connected to the ground potential point. The impedance at the other end of the strip line 707 becomes extremely high. As a result, the transmission signal input from the transmission terminal 701 is
And is not output to the receiving terminal 703.

When receiving, no voltage is applied to control terminal 704. Therefore, no control current flows, and a high impedance state is established between the anodes and cathodes of the PIN diodes 705 and 706. As a result, the antenna terminal 70
2 is output from the reception terminal 703 and is not output to the transmission terminal 701.

Next, the operation when the SPDT switch is used as an antenna switch will be described. In this case, the first signal terminal 701 becomes the first antenna terminal 701, the second signal terminal 702 becomes the reception terminal 702, and the third signal terminal 703 becomes the second antenna terminal 703.

When receiving from the first antenna, a positive voltage is applied to the control terminal 704. The control current is applied to the control terminal 7
04, resistor 708, inductor 709, PIN diode 705, strip line 707, PIN diode 7
06 flows in the order described. Accordingly, a low impedance state is established between the anode and the cathode of the PIN diodes 705 and 706. When the impedance between the anode and the cathode of the PIN diode 706 is in a low impedance state, one end of the strip line 707 connected to the anode of the PIN diode 706 is substantially connected to the ground potential point, and thus, when viewed from the antenna terminal 702 side. The impedance at the other end of the strip line 707 becomes extremely high. As a result, the reception signal input from the first antenna terminal 701 is output from the reception terminal 702. At this time,
Since the second antenna terminal 703 is grounded via the PIN diode 706, it is not received from the second antenna terminal 703.

When receiving from the second antenna terminal, no voltage is applied to the control terminal 704. Therefore, no control current flows, and a high impedance state is established between the anodes and cathodes of the PIN diodes 705 and 706. As a result, the reception signal input from the second antenna terminal 703 is output from the reception terminal 702 and is not received from the first antenna terminal.

To simultaneously switch between transmission and reception and switch antennas, two SPDT switches are used, one for switching between transmission and reception, and the other for switching antennas. .

As described above, the conventional antenna duplexer can share the antenna for transmission and reception. Further, the antenna can be shared for transmission and reception by the conventional SPDT switch, and the antenna can be switched.

[0017]

However, in the conventional antenna duplexer, when transmission and reception frequencies are allocated at narrow intervals, a steep attenuation characteristic is required for the reception filter and the transmission filter. Since the number of stages of the filter is increased, there is a problem that a loss of a signal increases and it is difficult to reduce a shape.

Further, when transmission and antenna switching diversity reception are performed by combining two conventional SPDT switches, a received signal received from at least one antenna passes through two SPDT switches. There is a problem that loss is large and miniaturization is difficult.

SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a low-loss and small antenna switch duplexer having an antenna switching diversity receiving function.

[0020]

In order to solve the above problems, an antenna switch duplexer according to the present invention has a first configuration in which a first switch device is electrically connected between a transmission terminal and a first antenna terminal. And a second switch device is electrically connected between the first antenna terminal and the reception terminal, and a third switch device is electrically connected between the reception terminal and the second antenna terminal. A transmission filter is electrically connected between the transmission terminal and the first antenna terminal as a second configuration, and a first switch device is electrically connected between the first antenna terminal and the reception terminal. The second switch device is electrically connected between the receiving terminal and the second antenna terminal.

[0021]

According to the present invention, the paths from the transmission terminal to the first antenna terminal, the path from the first antenna terminal to the reception terminal, and the path from the second antenna terminal to the reception terminal are each constituted by one switch device. In addition, the loss and size of the antenna switch duplexer can be reduced.

[0022]

EXAMPLES (Example 1) Hereinafter, an example of an antenna switch duplexer of the present invention, described with reference to the drawings.

FIG . 1 shows a circuit configuration of an antenna switch duplexer according to a first embodiment of the present invention. Figure 1
, 301 is a transmission terminal, 302 is a first antenna terminal, 303 is a second antenna terminal, 304 is a reception terminal, 305 is a first control terminal, 306 is a second control terminal, and 307 is a third control. A terminal 308 is a fourth control terminal, and 309 is a fifth control terminal. 310 is a PIN diode, 311, 312, 313, and 314 are field-effect transistors, 315 and 316 are short-circuited dielectric coaxial resonators at the tip, 317, 318, 319, 320, 321, and 32.
2 is an inductor, 323 is a strip line, 324, 3
25, 326, 327, 328 are resistors, 329, 33
0, 331, 332, 333, 334, 335, 33
6, 337, 338, and 339 are capacitors.

Here, the strip line 323 has a characteristic impedance of 50Ω and has a length of a quarter wavelength at the transmission frequency.

Inductors 317 and 318, capacitor 3
Reference numerals 29, 330, and 331 constitute a low-pass filter 340 that passes signals in the transmission frequency band and lower in frequency, and has high impedance with respect to harmonics of the transmission signal. In addition, the tip short-circuited dielectric coaxial resonator 3
15, 316, inductor 322, capacitor 337,
338 and 339 constitute a band-pass filter 341, which has a pass band within the reception frequency band and has a high impedance at other frequencies. Further, the PIN diode 310, the inductor 320, and the capacitor 334 are the first
, The field effect transistors 311, 312, the strip line 323, and the control terminal 30.
6, 307 and resistors 325, 326 constitute a second switch device 343. As for the impedance of the second switch device 343 viewed from the first antenna terminal 302 side, no voltage is applied to the second control terminal 306, the drain-source of the field effect transistor 311 is in a low impedance state, and the strip line 323 Becomes extremely high when one end of the terminal is connected to a substantially ground potential point.

Note that the second switch device 343 is
One end of a strip line 323 having a length of a quarter wavelength is electrically connected to the input / output terminal of the
3, the drain terminal of the field effect transistor 311 and the drain terminal of the field effect transistor 312 are electrically connected, the source terminal of the field effect transistor 311 is grounded, and the field effect transistor 31 is connected to the second input / output terminal.
The second switch device 343 is configured to make the power consumption of the second switch device 343 substantially zero, and the first antenna terminal 302 and the reception terminal when the transmission output is large. This has the effect of preventing deterioration of the isolation between the 304s. Here, the same effect can be obtained by replacing the strip line 323 with a capacitor connected in parallel with an inductor connected in series and having one end grounded.

Further, the field effect transistors 313, 3
14, the control terminals 308 and 309, the inductor 321, and the resistors 327 and 328 form a third switch device 344. Here, the resistance value between the drain terminal and the source terminal in the low impedance state of the field effect transistor 313 is substantially equal to the matching load.

The third switching device 344 makes the resistance between the drain terminal and the source terminal of the field effect transistor 313 in a low impedance state substantially equal to the matching load, and connects the first input / output terminal to the field effect transistor. 31
3 and the drain terminal of the field effect transistor 314 are electrically connected to each other,
3 is grounded, and the source terminal of the field effect transistor 314 is electrically connected to the second input / output terminal, so that the drain-source of the field effect transistor 313 is in a low impedance state. When the impedance between the drain and the source of the field effect transistor 314 is in a high impedance state, the second antenna terminal 30
3 is almost terminated with a matching load, and when transmitting and receiving from the first antenna terminal 302, the first antenna terminal 3
02 and the second antenna terminal 30
3 has an effect of preventing unnecessary interference of the antenna connected to the antenna 3.

Further, by making the resistance value between the drain terminal and the source terminal of the field effect transistor 313 in the low impedance state substantially equal to the matching load, the terminal resistance connected to the source terminal of the field effect transistor 313 becomes unnecessary. The effect that the antenna switch duplexer can be miniaturized can be obtained.

When the resistance between the drain terminal and the source terminal of the field effect transistor 313 in the low impedance state is not substantially equal to the matching load but is substantially zero, the second antenna terminal 303 is connected to the second antenna terminal 303. The effect of terminating with a matched load is lost, but has the effect of increasing the isolation when the switch device 344 is cut off.

Further, even if the field-effect transistor 313 is removed from the switch device 344, the above-mentioned effect is lost, but the function required for the switch device can be realized.

In the third switch device 344, one end of the inductor 321 is connected to the drain terminal of the field-effect transistor 314, and the other end of the inductor 321 is connected to the source terminal. 3
The third switch device 3 when the third switch device 344 is shut off.
The purpose of the present invention is to increase the impedance between the input and output terminals of 44, and even if the inductor 321 is removed, the impedance between the input and output terminals is reduced, but the same function can be realized.

The circuit constituted by the inductor 319, the resistor 324, and the capacitors 332, 333 also functions as the input matching circuit and the control circuit of the first switch device 342.

Further, by configuring the second switch device 343 and the third switch device 344 using a field effect transistor, an effect is obtained that power consumption at the time of reception becomes almost zero.

The first switch device 342 has a PIN
The reason why the diode 310 is used is that signal distortion when a large signal passes is generally smaller than that of a field effect transistor.

The operation of the antenna switch duplexer configured as described above will be described below with reference to FIG.

At the time of transmission, a positive voltage is applied to the first control terminal 305, a negative voltage equal to or less than the pinch-off voltage is applied to the third control terminal 307 and the fifth control terminal 309, and the second control terminal 306 and the fourth No voltage is applied to the control terminal 308. The control current is supplied to the first control terminal 305, the resistor 324,
The current flows through the inductor 319, the first switch device 342, the strip line 323, and the field-effect transistor 311 in the stated order. By the application of the control voltages, the impedance between the input / output terminals of the first switch device 347 and the drain-source of the field effect transistors 311 and 313 becomes low, and the state of the field effect transistors 312 and 314 becomes low. A high impedance state is established between the drain and the source. Field effect transistor 31
The low impedance state between the drain and source of the first switching device causes the one end of the strip line 323 to be substantially close to the ground potential, so that the impedance of the second switch device 343 viewed from the first antenna terminal 302 side is extremely high. Become.

As a result, the transmission signal input from the transmission terminal 301 is output from the first antenna terminal 302 and is not output to other terminals.

At this time, the impedance between the drain and source of the field effect transistor 313 is in a low impedance state, and the impedance between the drain and source of the field effect transistor 314 is in a high impedance state. Terminated at the load.

The antenna switch duplexer of this embodiment has two reception modes. That is, a mode for receiving from the first antenna terminal and a mode for receiving from the second antenna terminal.

First, an operation in a mode in which reception is performed from the first antenna terminal 302 will be described. When reception is performed from the first antenna terminal 302, a negative voltage equal to or less than the pinch-off voltage is applied to the second control terminal 306 and the fifth control terminal 309, and the first control terminal 305, the third control terminal 307, No voltage is applied to the fourth control terminal 308. By applying the control voltages, the high impedance state is established between the input / output terminals of the first switch device 342 and the drain-source of the field effect transistors 311 and 314.
The low impedance state is established between the drain and the source of the transistors 12 and 313. As a result, the reception signal input from the first antenna terminal 302 is output from the reception terminal 304 and is not output to other terminals.

At this time, the impedance between the drain and the source of the field effect transistor 313 is in a low impedance state, and the impedance between the drain and the source of the field effect transistor 314 is in the high impedance state. Terminated at the load.

Next, an operation in a mode in which reception is performed from the second antenna terminal 303 will be described. When reception is performed from the second antenna terminal 303, a negative voltage equal to or less than the pinch-off voltage is applied to the third control terminal 307 and the fourth control terminal 308, and the first control terminal 305, the second control terminal 306, No voltage is applied to the fifth control terminal 309. By applying the control voltages, the impedance between the input / output terminal of the first switch device 342 and the drain-source of the field effect transistors 312 and 313 becomes high, and the drain of the field effect transistors 311 and 314 becomes high. A low impedance state between the sources. As a result, the second antenna terminal 30
The received signal input from 3 is output from the receiving terminal 304 and is not output to other terminals.

As described above, according to the first embodiment of the present invention, from the first antenna terminal 302 to the transmission terminal 304.
Two conventional antenna switches in the signal path at
Compared to the configuration used, at least one PIN diode
Transmission and reception switching function, transmission signal
Filter that suppresses higher harmonics and removes unnecessary waves from the received signal
Function and antenna switching diversity reception function
Antenna switch duplexer with small size and low loss
And an antenna switch duplexer that consumes almost no power at the time of reception can be realized.

(Embodiment 2) FIG. 2 shows a circuit configuration of an antenna switch duplexer according to a second embodiment of the present invention. In FIG. 2 , 4
01 is a transmission terminal, 402 is a first antenna terminal, 403
Denotes a second antenna terminal, 404 denotes a reception terminal, and 405 denotes a control terminal. 408 and 409 are PIN diodes, 4
13, 414, 415 are dielectric coaxial resonators each having a short-circuited tip.
16, 417, 418, 419, 420, 421 are inductors, 426 is a resistor, 429, 430, 431, 43
2,433,434,435,436,437,43
8, 439, 440 and 441 are capacitors.

The short-circuited dielectric coaxial resonator 413, inductors 416, 417, capacitors 429, 430, 43
Reference numeral 1 denotes a transmission filter 445, which passes a signal in a transmission frequency band and has a high impedance with respect to a reception signal. In addition, the tip short-circuited dielectric coaxial resonator 41
4, 415, inductor 421, capacitor 439, 4
40 and 441 are band-pass filters 4 as reception filters.
46, and the reception frequency band is a pass band,
It has high impedance for other frequencies. Further, a PIN diode 408, inductors 418, 41
9. The capacitors 432, 433, 434 and 438 are the first
And the PIN diode 40
9, the inductor 420, and the capacitor 436 constitute a second switch device 448.

In the first switch device 447, the PIN diode 408 is applied with a voltage in the forward direction, the state between the anode and the cathode is in a low impedance state, and the inductor 41
When the junction between the inductor 8 and the inductor 419 is connected to a substantially ground potential point, the inductor 418 and the capacitor 432 and the inductor 419 and the capacitor 438 resonate in parallel, and the impedance between the input and output terminals becomes extremely high. Here, the capacitor 433 is a DC blocking capacitor.

[0048] The above-configured antenna switch duplexer as, its operation will be described with reference to the following Figure 2.

At the time of transmission, a positive voltage is applied to the control terminal 405. The control current includes a control terminal 405, a resistor 426,
Second switch device 448, inductor 419, PIN
It flows through the diode 408 in the order described. Accordingly, a low impedance state is established between the input / output terminals of the second switch device 448 and the anode-cathode of the PIN diode 408. Anode of PIN diode 408-
By the low impedance state between the cathodes,
Since the junction between the inductor 418 and the inductor 419 is connected to a substantially ground potential point, the inductor 418 and the capacitor 432 and the inductor 419 and the capacitor 438
Resonate in parallel, and the impedance between the input and output terminals of the first switch device 447 becomes extremely high. Further, the transmission filter 445 allows signals in the transmission frequency band to pass. As a result, the transmission signal input from the transmission terminal 401 passes through the transmission filter 445, is output from the first antenna terminal 402, and is not output to other terminals.

The antenna switch duplexer of this embodiment has two reception modes. That is, a mode for receiving from the first antenna terminal and a mode for receiving from the second antenna terminal.

First, the operation in the mode of receiving from the first antenna terminal 402 will be described. When receiving from the first antenna terminal 402, the control terminal 405
No voltage is applied to. Therefore, the control current does not flow, and both the input / output terminals of the second switch device 448 and the anode-cathode of the PIN diode 408 enter a high impedance state. Also, the transmission filter 445 is set to the first
Of the antenna terminal 402 is extremely high in the reception frequency band. As a result, the first
The reception signal input from the antenna terminal 402 is output from the reception terminal 404 and is not output to other terminals.

Next, an operation in a mode in which reception is performed from the second antenna terminal 403 will be described. When receiving from the second antenna terminal 403, the control terminal 40
5, a positive voltage is applied. The control current is supplied to the control terminal 405,
Resistor 426, second switch device 448, inductor 4
19. Flow through the PIN diode 408 in the order described. Accordingly, a low impedance state is established between the input / output terminals of the second switch device 448 and the anode-cathode of the PIN diode 408. PIN diode 408
Is in a low impedance state between the anode and the cathode, the junction between the inductor 418 and the inductor 419 is almost coupled to the ground potential point.
18 and the capacitor 432 and the inductor 419 and the capacitor 438 resonate in parallel, and the first switch device 447
The impedance between the input and output terminals becomes extremely high. As a result, the reception signal input from the second antenna terminal 403 is output from the reception terminal 404 and is not output to other terminals.

As described above, according to the second embodiment of the present invention, the same function as the antenna switch duplexer in the first embodiment of the present invention can be realized with a smaller number of PIN diodes. it can.

(Embodiment 3) FIG. 3 shows a circuit configuration of an antenna switch duplexer according to a third embodiment of the present invention. In FIG. 3 , 5
01 is a transmission terminal, 502 is a first antenna terminal, 503
Is a second antenna terminal, 504 is a reception terminal, 505 is a first control terminal, 506 is a second control terminal, and 507 is a third control terminal.
And 508 is a fourth control terminal. 509,
510, 511, 512 are field effect transistors, 51
3, 514 and 515 are short-circuited dielectric coaxial resonators at the tip, 51
6, 517, 518 and 519 are inductors 520 and 5
21, 522, 523 and 524 are resistors 525 and 52
6, 527, 528, 529, 530, 531, 532
Is a capacitor.

The short-circuited dielectric coaxial resonator 513, inductors 516, 517, capacitors 525, 526, 52
Reference numeral 7 denotes a transmission filter 533 that allows signals in the transmission frequency band to pass therethrough and has a high impedance with respect to the reception signal. In addition, the tip short-circuited dielectric coaxial resonator 51
4, 515, inductor 519, capacitor 530, 5
31 and 532 are band-pass filters 5 as reception filters.
34, and the pass band is within the reception frequency band.
It has high impedance for other frequencies. Further, field effect transistors 509 and 510, inductor 518, resistors 520 and 521, capacitors 528 and 52
9 constitutes a first switch device 535, and includes field effect transistors 511, 512, resistors 522, 523, 524
Constitutes the second switch device 536.

In the first switch device 535, when the impedance between the drain terminal and the source terminal of the field effect transistor 509 becomes low and one end of the inductor 518 is connected to a substantially ground potential point, the inductor 518 and the capacitor 528 are connected. The switch device 535 is configured to resonate in parallel and have an extremely high impedance as viewed from the first antenna terminal 502.

Note that the first switch device 535 is
And the other end of the capacitor 528 is grounded, and the other end of the inductor 518 is connected to the other end of the inductor 518.
09 and the drain terminal of the field effect transistor 510 are electrically connected to each other.
09 is grounded, and the source terminal of the field effect transistor 510 is electrically connected to the second input / output terminal. This reduces the power consumption of the first switch device 535 to almost zero. In addition, there is an effect that deterioration of isolation between the first antenna terminal 502 and the reception terminal 504 when the transmission output is large is prevented. Here, the same effect can be obtained even if the inductor 518 and the capacitor 528 are replaced with quarter-wave transmission lines.

Also, in the second switch device 536, the resistor 522 has a resistance value substantially equal to the matching load, and the second antenna terminal 503 when not in use is terminated with a substantially matching load. And at the time of reception from the first antenna terminal 502,
And the antenna connected to the second antenna terminal 503 has an effect of preventing unnecessary interference. However, even if the field effect transistor 511 and the resistor 522 are removed from the switch device 536, the above-described effects are lost, but the functions required for the switch device can be realized.

Also, instead of making the resistance between the drain terminal and the source terminal of the field effect transistor 511 at the time of low impedance substantially equal to the matching load, the resistance 522 having the resistance substantially equal to the matching load is changed by the field effect transistor 511. The connection to the source terminal of the transistor 511 has an effect that it is easier to adjust the resistance 522 to be equal to the matching load.

[0060] The constructed antenna switch duplexer as described above, the operation will be described with reference to FIG. 3 below.

At the time of transmission, the second control terminal 506 and the fourth
, A negative voltage equal to or lower than the pinch-off voltage is applied to the first control terminal 505 and the third control terminal 507.
Is grounded. By the application of the control voltages, the impedance between the drain and the source of the field effect transistors 510 and 512 is in a high impedance state, and the impedance between the drain and the source of the field effect transistors 509 and 511 is in a low impedance state. Field effect transistor 5
09 is in a low impedance state between the drain and the source, and one end of the inductor 518 is connected to a substantially ground potential point.
28 resonate in parallel, and the impedance when the first switch device 535 is viewed from the first antenna terminal 502 becomes extremely high. Further, the transmission filter 533 allows signals in the transmission frequency band to pass. As a result, the transmission signal input from the transmission terminal 501 passes through the transmission filter 533, is output from the first antenna terminal 502, and is not output to other terminals.

At this time, a low impedance state is established between the drain and source of the field effect transistor 511, and the second
Is connected to a resistor 522 having one end grounded, and the drain terminal of the
The second antenna terminal 503 is almost terminated by a matching load by the high impedance state between the sources.

The antenna switch duplexer of this embodiment has two reception modes. That is, a mode for receiving from the first antenna terminal and a mode for receiving from the second antenna terminal.

First, the operation in the mode of receiving from the first antenna terminal 502 will be described. When receiving signals from the first antenna terminal 502, a negative voltage equal to or less than the pinch-off voltage is applied to the first control terminal 505 and the fourth control terminal 508, and the second control terminal 506 and the third control terminal 507 are provided. Is grounded. Each of the above-described control voltages is applied, so that the field-effect transistor 50
9 and 512 are in a high impedance state, and the field effect transistors 510 and 511 are in a low impedance state between the drain and source. Accordingly, the input / output terminals of the first switch device 535 are in a low impedance state, and the impedance of the second switch device 536 as viewed from the first switch device 535 is in a high impedance state. Also, the transmission filter 533
When viewed from the first antenna terminal 502 side is extremely high in the reception frequency band. As a result, the reception signal input from the first antenna terminal 502 is output from the reception terminal 504 and is not output to other terminals. At this time, the state between the drain and source of the field effect transistor 511 is in a low impedance state, the second antenna terminal 503 is connected to the resistor 522 having one end grounded, and the state between the drain and source of the field effect transistor 512 is in a high impedance state. As a result, the second antenna terminal 503 is almost terminated with a matching load.

Next, an operation in a mode in which reception is performed from the second antenna terminal 503 will be described. When reception is performed from the second antenna terminal 503, a negative voltage equal to or lower than the pinch-off voltage is applied to the second control terminal 506 and the third control terminal 507, and the first control terminal 505 and the fourth
Control terminal 508 is grounded. Each of the above-described control voltages is applied, so that the field-effect transistor 51
0 and 511 are in a high impedance state, and the field effect transistors 509 and 512 are in a low impedance state. Therefore, the first switch device 535 is connected to the second switch device 5
The impedance as viewed from the 36 side is in a high impedance state, and the input / output terminals of the second switch device 536 are in a low impedance state. As a result, the reception signal input from the second antenna terminal 503 is output from the reception terminal 504 and is not output to other terminals.

As described above, according to the third embodiment of the present invention, an antenna having the same function as the antenna switch duplexer in the first embodiment of the present invention and consuming almost zero power is provided. A switch duplexer can be realized.

Next, effects and modifications of the specific circuit configuration in each of the above embodiments will be described. The first
In the embodiment of the present invention, the first switch device 342 includes a series connection of an inductor 320 and a capacitor 334 and a diode.
310 are connected in parallel.
The of the time interruption of the switch device 342 1 of the switch device 3
The purpose is to increase the impedance between the input and output terminals of the inductor 320 and the capacitor 33.
Even if the number 4 is removed, the impedance between the input and output terminals is reduced, but the same function can be realized. This is the second real
The same applies to the second switch device 448 in the embodiment .

[0068] In the second embodiment, the first switch device 447, electrically connected to one end of the inductor 418 and capacitor 432 to the input-output terminal, the capacitor 4
32 is grounded, and the other end of the inductor 418 is PIN
Attach one end of the diode 408 and the inductor 419 electrically, grounded and the other end of the PIN diode 408, and electrically connecting one end of the other end and the capacitor 438 of the inductor 419 to the input-output terminal, the other end of the capacitor 438 Is grounded, it is easy to reduce the size of the first switch device. Further, the inductor 418 and the capacitor 432 and the inductor 419 and the capacitor 43
By replacing one or both of the 8 quarter wave transmission line, Ru can reduce the loss of the received signal when received from the first antenna terminal 402.

In the second embodiment, the capacitor
434, by selecting the capacitance value appropriately, when performing reception from the first antenna terminal 402, which contributes to the improvement of the impedance matching at the first antenna terminal 402 and reception terminal 404. This is similar to the third embodiment.
The same applies to the capacitor 529 in this case.

[0070] In the first embodiment, by the input coupling element of the band-pass filter 341 and a capacitor 337, a DC blocking capacitor bandpass filter 341 and is required for connection of the third switching device 344 Becomes unnecessary. This is similar to the second and third embodiments .
The same applies to the band-pass filters 446 and 534 in FIG.

[0071] In the first embodiment, by the transmission filter and the low pass filter 340, Ru can be prevented radiation harmonics.

Further, in the first embodiment, by using the bandpass filter 341 as the reception filter, reception of an unnecessary signal can be prevented. This is the same as the band pass filters 446, 546 in the second and third embodiments.
The same applies to 34 .

[0073] In the first embodiment, a band-pass filter 341, by the Yukyokugata bandpass filter can be reduced even if not more polar type resonators number of the band-pass filter 341. This is the same as the band pass filters 446, 546 in the second and third embodiments.
The same applies to 34 .

The transmission filter 445 of the second embodiment
Is configured to have a pass band at the transmission frequency and an attenuation band at the reception frequency, whereby the transmission signal input from the transmission terminal 401 is output from the first antenna terminal 402, The received signal input from the first antenna terminal 402 is
Is not output to Also, by giving the transmission filter 445 a low-pass characteristic in addition to the above-described transfer characteristic,
The effect of preventing the emission of harmonics of the transmission signal is obtained. This corresponds to the transmission filter 533 in the third embodiment.
The same applies to.

Further, the transmission filter 445 of the second embodiment
Is composed of a band-elimination filter using a short-circuited dielectric coaxial resonator at the tip and a low-pass filter. This makes it possible to reduce the transmission signal loss more than when a band-pass filter is used as a transmission filter. And the size can be reduced. This is the same for the transmission filter 533 in the third embodiment.

Next, the configuration of each switch device in the first embodiment will be listed together.

As the first switch device and / or the third switch device, a switch circuit in which a PIN diode is connected in series between input and output terminals is used.

As the first switch device and / or the third switch device, a circuit including a PIN diode, an inductor, and a capacitor, and a circuit in which the inductor and the capacitor are connected in series and the PIN diode is connected in parallel is provided between the input and output terminals. A switch circuit that is electrically connected is used.

As the first switch device and / or the third switch device, a switch circuit in which a drain terminal and a source terminal of a field effect transistor are electrically connected between an input / output terminal and a gate terminal is a control terminal is used.

As a first switch device and / or a third switch device, a drain terminal and a source terminal of a field effect transistor are electrically connected between input and output terminals, and one end of an inductor is connected to the drain terminal of the field effect transistor. A switch circuit is used in which the other end of the inductor is connected to the source terminal and the gate terminal is a control terminal.

As a second switch device, a first input / output terminal, a second input / output terminal, a first inductor, a second inductor, a first capacitor, a second capacitor, A first diode, and a first input / output terminal electrically connected to the first inductor and one end of the first capacitor; the other end of the first capacitor is grounded; and the other end of the first inductor is connected to the other end of the first inductor. One end of the PIN diode is electrically connected to one end of the second inductor, the other end of the PIN diode is grounded, and the other end of the second inductor and one end of the second capacitor are electrically connected to the second input / output terminal. A switch circuit is used which is connected and the other end of the second capacitor is grounded.

As a second switch device, a first input / output terminal, a second input / output terminal, a first quarter wavelength transmission line, a second quarter wavelength transmission line, A first input / output terminal electrically connected to one end of the first quarter-wave transmission line, and a PIN diode and the other end connected to the other end of the first quarter-wave transmission line. One end of the second quarter-wave transmission line is electrically connected, the other end of the PIN diode is grounded, and the other end of the second quarter-wave transmission line is electrically connected to the second input / output terminal. A switch circuit that is electrically connected is used.

As a second switch device, there is provided a switch circuit including a PIN diode, an inductor, and a capacitor, wherein a circuit in which an inductor and a PIN diode are connected in series and a capacitor is connected in parallel is electrically connected between input and output terminals. Used.

The second switch device comprises a first input / output terminal, a second input / output terminal, an inductor, a capacitor, a first field-effect transistor, and a second field-effect transistor. One end of an inductor and a capacitor are electrically connected to a first input / output terminal, the other end of the capacitor is grounded, and the other end of the inductor has a drain terminal of a first field effect transistor and a drain terminal of a second field effect transistor. Terminals are electrically connected, the source terminal of the first field effect transistor is grounded, and the second input / output terminal is connected to the second input / output terminal.
A switch circuit is used in which the source terminals of the field effect transistors are electrically connected.

As a second switch device, a first input / output terminal, a second input / output terminal, a quarter wavelength transmission line, a first field effect transistor, a second field effect transistor, The first input / output terminal is electrically connected to one end of the quarter-wave transmission line, and the other end of the quarter-wave transmission line is connected to the drain terminal of the first field-effect transistor and the second A switch circuit in which a drain terminal of a field effect transistor is electrically connected, a source terminal of a first field effect transistor is grounded, and a source terminal of a second field effect transistor is electrically connected to a second input / output terminal. Is used.

A third switch device includes a first input / output terminal, a second input / output terminal, a first field effect transistor, and a second field effect transistor. , A drain terminal of the first field-effect transistor is electrically connected to a drain terminal of the second field-effect transistor, a source terminal of the first field-effect transistor is grounded, and a second input / output terminal is connected to the second input / output terminal. A switch circuit in which the source terminals of the field-effect transistors are electrically connected is used.

As a third switch device, a first input / output terminal, a second input / output terminal, a first field effect transistor, a second field effect transistor, and a resistance value substantially equal to a matching load are set. A first input / output terminal, a drain terminal of the first field effect transistor, and a second input / output terminal.
, A drain terminal of the first field-effect transistor is electrically connected, a source terminal of the first field-effect transistor is connected to one end of the resistor, the other end of the resistor is grounded, and a second electric field is connected to the second input / output terminal. A switch circuit in which the source terminals of the effect transistor are electrically connected is used.

As a third switching device, a first input / output terminal, a second input / output terminal, and a first field-effect transistor in which a resistance value between a drain terminal and a source terminal when turned on is substantially equal to a matched load. And a second field-effect transistor, wherein the first input / output terminal is electrically connected to a drain terminal of the first field-effect transistor and a drain terminal of the second field-effect transistor. A switch circuit is used in which the source terminal of the transistor is grounded and the source terminal of the second field-effect transistor is electrically connected to the second input / output terminal.

Next, the configuration of each switch device in the second embodiment and the third embodiment will be listed together.

As the second switch device, a switch circuit in which a PIN diode is connected in series between input and output terminals is used.

As a second switch device, a switch circuit including a PIN diode, an inductor, and a capacitor, wherein a circuit in which an inductor and a capacitor are connected in series and the PIN diode is connected in parallel is electrically connected between input and output terminals. Is used.

As a second switch device, a switch circuit in which a drain terminal and a source terminal of a field effect transistor are electrically connected between an input / output terminal and a gate terminal is a control terminal is used.

As a second switch device, the drain terminal and the source terminal of the field effect transistor are electrically connected between the input and output terminals, one end of the inductor is connected to the drain terminal of the field effect transistor, and the other end of the inductor is connected. Is connected to the source terminal, and a switch circuit using the gate terminal as the control terminal is used.

As a first switch device, a first input / output terminal, a second input / output terminal, a first inductor, a second inductor, a first capacitor, a second capacitor, A first diode, and a first input / output terminal electrically connected to the first inductor and one end of the first capacitor; the other end of the first capacitor is grounded; and the other end of the first inductor is connected to the other end of the first inductor. The PIN diode and one end of the second inductor are electrically connected, the other end of the PIN diode is grounded, and the other end of the second inductor and one end of the second capacitor are electrically connected to the second input / output terminal. Connected to the second
A switch circuit in which the other end of the capacitor is grounded is used.

As a first switch device, a first input / output terminal, a second input / output terminal, a first quarter wavelength transmission line, a second quarter wavelength transmission line, A first input / output terminal electrically connected to one end of the first quarter-wave transmission line, and a PIN diode and a second input terminal connected to the other end of the first quarter-wave transmission line. The other end of the second quarter-wave transmission line is electrically connected to the other end of the PIN diode, and the other end of the second quarter-wave transmission line is electrically connected to the second input / output terminal. Is used.

As a first switch device, a switch circuit including a PIN diode, an inductor, and a capacitor, and a circuit in which an inductor and the PIN diode are connected in series and a capacitor is electrically connected between input and output terminals. Is used.

The first switch device includes a first input / output terminal, a second input / output terminal, an inductor, a capacitor, a first field-effect transistor, and a second field-effect transistor. One end of an inductor and a capacitor are electrically connected to a first input / output terminal, the other end of the capacitor is grounded, and the other end of the inductor has a drain terminal of a first field effect transistor and a drain terminal of a second field effect transistor. Terminals are electrically connected, the source terminal of the first field effect transistor is grounded, and the second input / output terminal is connected to the second input / output terminal.
A switch circuit is used in which the source terminals of the field effect transistors are electrically connected.

As a first switch device, a first input / output terminal, a second input / output terminal, a quarter wavelength transmission line,
A first field-effect transistor and a second field-effect transistor, one end of the quarter-wave transmission line is electrically connected to a first input / output terminal; The other end is electrically connected to the drain terminal of the first field effect transistor and the drain terminal of the second field effect transistor, the source terminal of the first field effect transistor is grounded, and the second input / output terminal is connected to the second input / output terminal. A switch circuit in which the source terminals of the two field-effect transistors are electrically connected is used.

The second switch device includes a first input / output terminal, a second input / output terminal, a first field-effect transistor, and a second field-effect transistor. , A drain terminal of the first field-effect transistor is electrically connected to a drain terminal of the second field-effect transistor, a source terminal of the first field-effect transistor is grounded, and a second input / output terminal is connected to the second input / output terminal. A switch circuit in which the source terminals of the field-effect transistors are electrically connected is used.

As a second switch device, a first input / output terminal, a second input / output terminal, a first field effect transistor, a second field effect transistor, and a resistance value substantially equal to a matched load are set. A first input / output terminal, a drain terminal of the first field effect transistor, and a second input / output terminal.
, A drain terminal of the first field-effect transistor is electrically connected, a source terminal of the first field-effect transistor is connected to one end of the resistor, the other end of the resistor is grounded, and a second electric field is connected to the second input / output terminal. A switch circuit in which the source terminals of the effect transistor are electrically connected is used.

As a second switch device, a first field-effect transistor in which a resistance between a first input / output terminal, a second input / output terminal, and a drain terminal and a source terminal when turned on is substantially equal to a matched load. And a second field-effect transistor, wherein the first input / output terminal is electrically connected to a drain terminal of the first field-effect transistor and a drain terminal of the second field-effect transistor. A switch circuit is used in which the source terminal of the transistor is grounded and the source terminal of the second field-effect transistor is electrically connected to the second input / output terminal.

[0102]

As described above, according to the present invention, the transmitting terminal
From the first antenna terminal and from the first antenna terminal.
From the communication terminal and the second antenna terminal to the reception terminal.
By configuring each with one switch device,
Reduce the loss and reduce the size of the antenna switch duplexer.
And the first antenna terminal and the second antenna
A second switch device electrically connected between the tener terminals;
And a signal between the first input / output terminal and the second input / output terminal
The first switch element is connected to the signal transmission path with respect to the transmission path.
And the ground, and the second switch element is
With a configuration that is inserted in series in the signal transmission path,
The first antenna terminal and the receiving
Deterioration of isolation between terminals can be prevented
You. In addition, as a third switch device, a first input / output terminal
For the signal transmission path between the terminal and the second input / output terminal.
One switch element is connected in parallel between the signal transmission path and ground.
And the second switch element is inserted in series with the signal transmission path.
By adopting a configuration in which the first switch element is inserted,
When the resistance value in the low impedance state of
If the third switch device is disconnected,
Can be enhanced. Further, the transmission terminal and the first
The transmission cable is not inserted between the antenna terminals without using a switch device.
Electrically connect the filter to the first antenna terminal
Operation using the selected antenna and the first antenna end
To the antenna or second antenna terminal connected to the
The receiving operation using the connected antenna is performed by the first switch.
Switch and the second switch device.
By adopting an alternative configuration, a smaller number of switches
The same function can be realized with the switch device.
You. Thus, provided with a transmission and switching function of receiving and diversity receiving function, a low loss, small size, it is possible to realize an antenna switch duplexer having respectively the features called low power.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an antenna switch duplexer according to a first embodiment of the present invention.

FIG. 2 shows an antenna switch according to a second embodiment of the present invention.
H Circuit diagram

FIG. 3 is a circuit diagram of an antenna switch duplexer according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram of a conventional antenna duplexer.

FIG. 5 is a circuit diagram of a conventional SPDT switch.

[Description of Signs ] 301, 401, 501 Transmission terminals 302, 402, 502 First antenna terminals 303, 403, 503 Second antenna terminals 304, 404, 504 Receiving terminals 340 Low-pass filters 341, 446, 534 bands Pass filter 342, 447, 535 First switch device 343, 448, 536 Second switch device 344 Third switch device 445, 533 Transmission filter

──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Toru Sakurakawa 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electronics Parts Co., Ltd. Hama 55-12 Matsushita Nitto Denki Co., Ltd. (72) Inventor Toshiro Ota Tanabecho, Kyoto Prefecture Matsushita Nitto Denki Co., Ltd. (72) Inventor Naoki Yuda 1006 Oji Kadoma, Kadoma City, Osaka Prefecture Matsushita Electronic Parts Co., Ltd. (72) Inventor Mori Yoichi Naga, 4-3-1 Tsunashima Higashi, Kohoku-ku, Yokohama, Kanagawa Prefecture Examiner, Matsushita Communication Industrial Co., Ltd. Yasunobu Mizomoto (56) References JP-A-63-60628 (JP, A) JP-A-6- 237101 ( JP, A) JP-A-6-268635 (JP, A) JP-A-7-74607 (JP, A) JP-A-1-67840 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , (DB name) H04B 1/38-1/58 H01P 1/15 H03K 17/76

Claims (28)

(57) [Claims] A transmitting terminal, a receiving terminal, a first antenna terminal, a second antenna terminal, a first switch device, a second switch device, and a third switch device; The first switch device is electrically connected between the transmission terminal and the first antenna terminal, and the second switch device is electrically connected between the first antenna terminal and the reception terminal. And electrically connecting the third switch device between the receiving terminal and the second antenna terminal;
As the second switch device, a first switch is provided for a signal transmission path between a first input / output terminal and a second input / output terminal .
Switch element is inserted in parallel between the signal transmission path and ground.
And a second switch element is connected in series with the signal transmission path.
An antenna switch duplexer, wherein the antenna switch duplexer is inserted into the antenna switch. 2. The method according to claim 1, wherein the first and second switch elements are electrically connected.
2. A field effect transistor.
On-board antenna switch duplexer. 3. The method according to claim 1 , further comprising:
I / O terminal and signal transmission path side of the first switch element
Between the terminals, one end of the capacitor and the inductor
One end is electrically connected to the first input / output terminal, and
The other end of the capacitor is grounded, and the other end of the inductor is
It is noted that the first switch element is electrically connected and inserted.
The antenna switch duplexer according to claim 1, wherein: 4. The quarter wavelength transmission line is connected to the first input line.
An output terminal and a signal transmission path side end of the first switch element;
It is characterized by being electrically connected in series and inserted between children
The antenna switch duplexer according to claim 1, wherein 5. The transmission terminal and the first switch device.
The transmission filter is electrically connected during the second switch.
A receiving filter between the switching device and the receiving terminal.
The antenna switch duplexer according to claim 1, wherein the antenna switch duplexer is connected. 6. A transmitting terminal, a receiving terminal, and a first antenna.
Terminal, a second antenna terminal, and a first switch device
, A second switch device, and a third switch device.
Between the transmitting terminal and the first antenna terminal.
A first switch device is electrically connected to the first switch device.
The second switch device between a tener terminal and the reception terminal
Are electrically connected to each other, and the receiving terminal and the second antenna
Electrically connecting the third switch device between terminals ;
As the third switch device, a first input / output terminal and a
The first switch is connected to the signal transmission path between the two input / output terminals.
Switch element is inserted in parallel between the signal transmission path and ground.
And a second switch element is connected in series with the signal transmission path.
An antenna switch duplexer, wherein the antenna switch duplexer is inserted into the antenna switch. 7. The power supply according to claim 1, wherein said first and second switch elements are electrically connected.
7. A field effect transistor according to claim 6, wherein said transistor is a field effect transistor.
On-board antenna switch duplexer. 8. A ground terminal of the first switch element and a ground terminal.
A resistor between the lands with a resistance value approximately equal to the matched load
7. The device according to claim 6, wherein the device is inserted and electrically connected.
On-board antenna switch duplexer. 9. A resistance when the first switch element is turned on.
The resistance is approximately equal to the matched load.
An antenna switch duplexer according to claim 6 . 10. The transmission terminal and the first switch device.
The transmission filter is electrically connected between the second switch and the second switch.
Electrically connect a receiving filter between the switch device and the receiving terminal.
7. The antenna switch duplexer according to claim 6, wherein the antenna switch duplexer is connected to the antenna switch. 11. A transmission filter having a transmission terminal, a reception terminal, a first antenna terminal, a second antenna terminal, a pass band at a transmission frequency and an attenuation band at a reception frequency, and a first filter. A switch device, and a second switch device, wherein the transmission filter is electrically connected between the transmission terminal and the first antenna terminal without a switch device therebetween, and the first antenna terminal and the first antenna terminal are connected to each other. An antenna switch, wherein the first switch device is electrically connected between reception terminals, and the second switch device is electrically connected between the reception terminal and the second antenna terminal. Shared device. 12. The antenna switch duplexer according to claim 11 , wherein a reception filter is connected between said first switch device and said reception terminal. 13. The antenna switch duplexer according to claim 11 or claim 12, wherein the having both the transmission filter further low-pass characteristic. 14. The duplexer according to claim 13 , wherein said transmission filter comprises a band elimination filter and a low-pass filter. As claimed in claim 15 wherein said second switch device, PI
Claim characterized by using a switch circuit connected in series with N diodes between the input and output terminals 11 or claim 1
2. The antenna switch duplexer according to 2 . As claimed in claim 16 wherein said second switch device, PI
Comprising an N diode, an inductor, and a capacitor,
Series connection of the inductor and the capacitor and the PI
Antenna switch duplexer according to claim 11 or claim 12, wherein the using a switching circuit electrically connected to the circuit connected in parallel to N diode between the input and output terminals. As claimed in claim 17 wherein said second switching device, and characterized in that electrically connects the drain and source terminals of the field effect transistor between the input and output terminals, using the switching circuit in which the gate terminal and the control terminal The antenna switch duplexer according to claim 11 or 12, wherein 18. The second switch device, wherein a drain terminal and a source terminal of a field effect transistor are electrically connected between input and output terminals, one end of an inductor is connected to the drain terminal of the field effect transistor, wherein the other end of the inductor connected to the source terminal, the antenna switch duplexer according to claim 11 or claim 12, wherein the using a switching circuit in which the gate terminal and the control terminal. 19. The first switch device according to claim 1, wherein :
, A second input / output terminal, a first inductor, a second inductor, a first capacitor, and a second
And a PIN diode.
The first inductor and one end of the first capacitor are electrically connected to the input / output terminal of the first capacitor, the other end of the first capacitor is grounded, and the other end of the first inductor is connected to the P terminal.
An IN diode and one end of the second inductor are electrically connected, the other end of the PIN diode is grounded, and the second input / output terminal is connected to the other end of the second inductor and the second capacitor. one end electrically connected to an antenna switch duplexer according to claim 11 or claim 12, wherein the using a switching circuit which is grounded and the other end of said second capacitor. 20. The first switch device, comprising :
Input / output terminal, second input / output terminal, and first quarter
A wavelength transmission line, a second quarter wavelength transmission line, PI
An N-diode, one end of the first quarter-wave transmission line is electrically connected to the first input / output terminal, and the other end of the first quarter-wave transmission line is connected to the other end of the first quarter-wave transmission line. A PIN diode is electrically connected to one end of the second quarter-wave transmission line, the other end of the PIN diode is grounded, and the second input / output terminal is connected to the second quarter-wavelength transmission line. antenna switch duplexer according to claim 11 or claim 12 characterized by using a switching circuit for electrically connecting the other end of the transmission line. 21. The first switch device comprising a PI
Comprising an N diode, an inductor, and a capacitor,
Antenna switch according to claim 11 or claim 12 characterized by using a switch circuit electrically connected to the circuit connected in parallel to the series connection with the capacitor between the input and output terminals of said inductor and said PIN diode Shared device. 22. The antenna switch duplexer according to claim 12, wherein said reception filter is a band-pass filter. 23. The antenna switch duplexer according to claim 12 , wherein said reception filter is a polarized band-pass filter. 24. The first switch device, wherein :
An input / output terminal, a second input / output terminal, an inductor,
A capacitor, a first field-effect transistor, and a second field-effect transistor, wherein the inductor and one end of the capacitor are electrically connected to the first input / output terminal, and the other end of the capacitor is grounded. A drain terminal of the first field-effect transistor and a drain terminal of the second field-effect transistor are electrically connected to the other end of the inductor; a source terminal of the first field-effect transistor is grounded; antenna switch duplexer according to claim 11 or claim 12 characterized by using a switch circuit electrically connected to the source terminal of said second field effect transistor to said second input terminal. 25. The first switch device, wherein:
, A second input / output terminal, a quarter-wavelength transmission line, a first field-effect transistor, and a second field-effect transistor. One end of the one-wavelength transmission line is electrically connected,
A drain terminal of the first field-effect transistor and a drain terminal of the second field-effect transistor are electrically connected to the other end of the one-half wavelength transmission line, and a source terminal of the first field-effect transistor is grounded. and antenna switch duplexer according to claim 11 or claim 12 characterized by using a switch circuit electrically connected to the source terminal of said second field effect transistor to said second input terminal . 26. A method according to claim 26, wherein the second switch device comprises a first
, A second input / output terminal, a first field effect transistor, and a second field effect transistor, wherein the first input / output terminal has a drain terminal of the first field effect transistor. And a drain terminal of the second field-effect transistor, a source terminal of the first field-effect transistor is grounded, and a source terminal of the second field-effect transistor is connected to the second input / output terminal. antenna switch duplexer according to claim 11 or claim 12 characterized by using a switch circuit electrically connected to. 27. A method according to claim 27, wherein said second switch device comprises a first
A first input / output terminal, a second input / output terminal, a first field effect transistor, a second field effect transistor, and a resistor having a resistance value substantially equal to a matched load. electrically connecting the drain terminal of the second field effect transistor and the drain terminal of the first field effect transistor to the terminal, the source terminal of the first field effect transistor is connected to one end of said resistor, said the other end of the resistor is grounded, to claim 11 or claim 12 characterized by using a switch circuit electrically connected to the source terminal of said second field effect transistor to said second input terminal An antenna switch duplexer as described. 28. A method according to claim 28, wherein :
An input / output terminal, a second input / output terminal, a first field effect transistor having a resistance value between a drain terminal and a source terminal when turned on substantially equal to a matched load, and a second field effect transistor. A drain terminal of the first field-effect transistor and a drain terminal of the second field-effect transistor are electrically connected to the first input / output terminal, and a source terminal of the first field-effect transistor is grounded; antenna switch duplexer according to claim 11 or claim 12 characterized by using a switch circuit electrically connected to the source terminal of said second field effect transistor to said second input terminal.