JP3324863B2 - DC / DC converter device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC / DC converter, and more particularly to a DC / DC converter in which a plurality of DC / DC converters are operated in parallel by synchronizing switching timing.
The present invention relates to a DC converter device.

[0002]

2. Description of the Related Art FIG. 5 is a circuit diagram showing an example of a conventional DC / DC converter. In the figure, in the DC / DC converter device, a first DC / DC converter A and a second DC / DC converter B are each provided with a power switch S
In this configuration, the power supply is connected to the voltage source E _IN via W and connected to the load 10 via terminals 11 and 12.

A first DC / DC converter A is an NPN
A transistor Q1, a PWM (pulse width modulation) control unit 1 for switching-controlling the transistor Q1,
Diode C to which the output signal of transistor Q1 is input
R1, a coil L1, and a smoothing capacitor C1.
The second DC / DC converter B has the same configuration as the first DC / DC converter A, and includes an NPN transistor Q2
And a PWM control unit 2 for switching-controlling the transistor Q2, a diode CR2 to which an output signal of the transistor Q2 is input, a coil L2, and a smoothing capacitor C2. A common connection point between the coils L1 and L2, the capacitors C1 and C2, and the terminal 11 is connected to the PWM control unit 2. The PWM control units 1 and 2 are connected to each other for synchronization.

Next, the operation of this conventional non-insulated DC / DC converter will be described. Power switch S
When W is turned on, the pulse width modulated (PWM) pulse is generated and output from the PWM control units 1 and 2, and supplied to the bases of the transistors Q1 and Q2, respectively. The pulse width of the PWM pulse is set to gradually increase with the passage of time, and is the minimum pulse width immediately after the power switch SW is turned on.

The transistors Q1 and Q2 are switched on when the PWM pulse input to the base is at a high level and off when the PWM pulse is at a low level. While the transistors Q1 and Q2 are on, the DC voltage from the DC voltage source E _IN via the power switch SW is applied to the choke coils L1, L2 and the capacitors C1, C2 via the collectors and emitters of the transistors Q1, Q2. And averaged.

On the other hand, while the transistors Q1 and Q2 are off, the output to the smoothing circuit is cut off. The diodes CR1 and CR2 are flywheel diodes for releasing the energy stored in the choke coils L1 and L2 when the transistors Q1 and Q2 are on when the transistors Q1 and Q2 are off.

Here, PWM control units 1 and 2
Are connected to each other, and operate in synchronism with each other so as to increase the output pulse width when the output voltage is lower than the set value and to narrow the output pulse width when the output voltage is higher than the set value. As a result, a stable voltage determined by the ratio (duty cycle) between the ON time and the OFF time of the transistors Q1 and Q2 can be output to the load 10.

Further, in this conventional device, a DC having the same configuration is used.
/ DC converters A and B are connected in parallel, and their outputs are simultaneously output to the load 10. That is, a so-called parallel operation (operation) is performed.
Even when the output current is insufficient in the C converter, a sufficient output current can be obtained.

FIG. 6 is a circuit diagram showing another example of the conventional DC / DC converter device. This conventional device has a first DC
/ DC converter C and a second DC / DC converter D are connected to a DC voltage source E _IN via a power switch SW and commonly connected to a load 20 via terminals 21 and 22. Thus, the two DC / DC converters C and D are operated in parallel.

The first DC / DC converter C has an input / output insulation type configuration, and includes an N-channel field effect transistor (FET) Q3, a PWM control unit 3 for supplying a PWM pulse to the gate of the FET Q3, and an FET Q3.
One end of a primary winding is connected to the drain of the transformer T1, and the other end of the primary winding is composed of a transformer T1 connected to the power switch SW, a capacitor C6, a resistor R1, and a diode CR7 connected to the primary winding of the transformer T1. A snubber circuit and a diode C connected to the secondary winding of the transformer T1.
R3, CR4, choke coil L3 and capacitor C
4 is provided.

The second DC / DC converter D is also an input / output insulated type DC / DC converter having the same circuit configuration as the first DC / DC converter C, and includes an N-channel field effect transistor (FET) Q4 and a PWM. Control part 4
And a transformer T2 having one end of a primary winding connected to the drain of the FET Q4 and the other end of the primary winding connected to the power switch SW; a capacitor C7, a resistor R2, and a diode connected to the primary winding of the transformer T2. It comprises a snubber circuit consisting of CR8 and a rectifier circuit consisting of diodes CR5 and CR6, a choke coil L4 and a capacitor C5 connected to the secondary winding of the transformer T2.

A common connection point between the choke coils L3 and L4, the capacitors C4 and C5, and the terminal 21 is connected to the PWM control unit 4 via the error detector 5, and further connected to the PWM control unit 3 to perform PWM control. The units 3 and 4 are configured to output synchronized switching PWM pulses based on the output signal of the error detection circuit 5, respectively.

Next, this conventional input / output insulation type DC / D
The operation of the C converter will be described. When the power switch SW is turned on, a PWM pulse is output from the PWM control units 3 and 4, and the FETs Q3 and Q
4 respectively. As a result, the DC voltage from the DC voltage source E _IN is intermittently applied to the primary windings of the transformers T1 and T2.
A pulse voltage is induced in the secondary winding 2. The pulse voltage is rectified by diodes CR3 and CR5, respectively, further smoothed through diodes CR4 and CR6, choke coils L3 and L4, and capacitors C4 and C5, and applied to the load 20 via a terminal 21. You.

This conventional device also has a PWM control unit 3
And 4 synchronize with each other based on the error detection output of the error detection circuit 5 so as to widen the output pulse width when the output voltage is lower than the set value and narrow the output pulse width when the output voltage is higher than the set value. Works. As a result, a stable voltage determined by the ratio (duty cycle) between the ON time and the OFF time of the FETs Q3 and Q4 can be output to the load 20 from the pulse voltage induced in the secondary windings of the transformers T1 and T2. . In addition, since this conventional device also performs parallel operation (operation), a sufficient output current can be obtained even when the output current is insufficient with a single DC / DC converter.

[0015]

In the non-insulated DC / DC converter shown in FIG. 5, the DC / DC converters A and B have the same configuration, and the transistors Q1 and Q2 have the same type. You are using
However, in practice, the DC current amplification factors h _FE and the rise times of the transistors Q1 and Q2 vary, and the output power of the PWM control units 1 and 2 is limited. However, if the DC current amplification factor h _FE and the rise time are larger than the other, the rise of the output PWM pulse changes, thereby causing a difference between the currents _Ia and _Ib1 flowing through the coils L1 and L2. .

For example, assuming that the DC current amplification factor h _FE and the rise time of the transistor Q1 are larger than those of the transistor Q2, the output pulse of the PWM control unit 1 becomes as shown by a in FIG. Naru, PWM
The output pulse of the control unit 2 is as shown by b in FIG. As a result, the voltages generated at both ends of the diodes CR1 and CR2 become the voltages V shown in FIG.
_a , the voltage V _b1 shown in FIG.
Current I _a flowing through the first and L2, I _b1, since the integrated value at the time the voltage across the coil L1 and L2 respectively and divided by the inductance value, shown in FIG. 3 (F) and (G) It looks like this.

That is, in this case, as can be seen from FIGS. 3F and 3G, since the currents I _a and I _b1 flowing through the coils L1 and L2 are different, the difference between the current values even in the steady state is obtained. Then, the uniformity of the transmission power between the DC / DC converters A and B operating in parallel is impaired.

Further, the conventional DC / DC converter shown in FIG.
Also in the DC converter device, FETs Q3 and Q4
Because there is variation in the gate-source input capacitance (C _iss ) and the gate threshold voltage, for example, FE
Assuming that C _{iss of} TQ3 is smaller than that of FET Q4 and that the gate threshold voltage is low,
Similarly, the output pulses of the PWM control units 3 and 4 have different waveforms as shown by a and b in FIGS. 3A and 3B, respectively.

Therefore, the voltages generated at both ends of the diodes CR4 and CR6 are the voltages V _a and V _a shown in FIG.
The voltage V _b2 shown in FIG. _9E is obtained, and the currents I _a and I _b2 flowing through the coils L3 and L4 are respectively changed by the coil L
Since the value obtained by integrating the voltage at both ends of L3 and L4 with time is divided by the inductance value, the result is as shown in FIGS. 3 (F) and 3 (H). The uniformity of the transmission power between the DC / DC converters C and D is impaired.

For this reason, in the above-mentioned conventional devices, a DC / DC converter having a sufficient transmission power must be used, or an element whose characteristics are carefully selected and managed as Q1 to Q4 must be used. .

An object of the present invention is to provide a plurality of Ds operating in parallel.
An object of the present invention is to provide a DC / DC converter device that equalizes the transmission power of each DC / DC converter by equalizing the voltage between the terminals of each flywheel diode of the C / DC converter.

Another object of the present invention is to equalize the output power of a plurality of DC / DC converters operating in parallel, thereby making the heat generation of each DC / DC converter uniform and improving the reliability. An object of the present invention is to provide a DC / DC converter device.

[0023]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a plurality of DC power supplies commonly connected to a DC power supply.
In a DC / DC converter device in which a DC / DC converter is driven in parallel by synchronizing switching timings to drive a common load, a plurality of DC / DC converters are connected via a capacitor between power transmission driving units by switching. It is configured.

The plurality of DC / DC converters each generate a switching transistor, a switching pulse for switching the switching transistor, and a pulse generating circuit whose output pulse width is controlled by a control input; It is composed of a choke coil, a flywheel diode, and a smoothing capacitor for power transmission of the output of the power supply. It is preferable because it can be applied to a non-insulated DC / DC converter of the ground.

In the power transmission drive section, a cathode is connected to an emitter of the switching transistor,
The flywheel diode having an anode grounded; the choke coil having one end connected to a connection point between the flywheel diode and the emitter of the switching transistor; and the smoothing connected between the other end of the choke coil and ground. The present invention provides a non-insulated DC / DC converter, comprising a capacitor and connecting a capacitor between a common connection point of the emitters of switching transistors of a plurality of DC / DC converters, a cathode of a flywheel diode, and a choke coil. Is preferably applied.

Each of the plurality of DC / DC converters generates a switching transistor, a switching pulse for switching the switching transistor, and a pulse generating circuit whose output pulse width is controlled by a control input; A transformer having a primary winding connected to the output terminal of the transformer, a rectifying diode having an anode connected to the secondary winding of the transformer, a choke coil having one end connected to a cathode of the rectifying diode, and a rectifying diode. It consists of a flywheel diode whose cathode is connected to the connection point with the choke coil, and a smoothing capacitor connected between the other end of the choke coil and the ground.The transformer, rectifier diode, choke coil, flywheel diode and smoothing capacitor Constitutes the power transmission drive unit,
Any one of a plurality of DC / DC converters
An error detection circuit that detects an error from an output taken from a connection point between a choke coil and a smoothing capacitor in a converter and that variably controls an output pulse width of the pulse generation circuit based on the detection error, The present invention can be applied to an input / output insulated DC / DC converter, which is preferable.

[0027] Further, a configuration is provided in which a capacitor is connected between the common connection points of the rectifying diode, the choke coil and the fuller diode of the plurality of DC / DC converters. The present invention can be preferably applied to the present invention.

Further, a configuration in which a capacitor is connected between a common connection point of the primary winding of the transformer and the switching transistor of the plurality of DC / DC converters is provided in the input / output isolated DC / DC converter. The present invention can be applied and is preferable.

[0029]

According to the present invention, since the power transmission drive units by switching of a plurality of DC / DC converters are connected via a capacitor, the voltage generated in the power transmission drive unit of a certain DC / DC converter is converted to the corresponding power. The voltage can be supplied to the power transmission drive unit of another DC / DC converter in which no voltage is generated in the transmission drive unit.
/ DC converters.

[0030]

Next, an embodiment of the present invention will be described.

FIG. 1 is a circuit diagram of a first embodiment of the present invention. 5, the same components as those in FIG. 5 are denoted by the same reference numerals.

Referring to FIG. 1, a converter device according to the present embodiment includes a first DC / DC converter A and a second DC / D converter.
It has a C converter B and an error detection circuit 5. The converters A and B are connected to the voltage source E _IN via the power switch SW. The load 10 is connected to the common terminals 11 and 12.

Here, DC / DC converters A and B
Are input / output non-isolated DC / DC converters having the same configuration as the DC / DC converters A and B shown in FIG. That is, the DC / DC converter A uses the PWM
The control unit 1 includes a switching transistor Q1 that is controlled to be turned on and off by the control unit 1, and a power transmission driving unit Pa. The DC / DC converter B includes a PWM control unit 2, a switching transistor Q2 that is turned on / off by the control unit 2, and a power transmission drive unit Pb. In this embodiment, the switching transistor Q1 and the power transmission driver P
This is characterized in that a capacitor _C01 is connected between a connection point of the switching transistor Q2 and the connection point of the switching transistor Q2 and the power transmission drive unit Pb.

The power transmission driver Pa includes a flywheel diode CR1 having a cathode connected to the emitter of the switching transistor Q1 and an anode grounded; a choke coil L1 having one end connected to the emitter of the switching transistor Q1; It comprises a smoothing capacitor C1 connected between the other end of L1 and ground. A capacitor C ₀₁ is connected between the common connection point of the emitter of the switching transistor Q1, the cathode of the flywheel diode CR1 and the choke coil L1.
Are connected at one end.

The power transmission driver Pb includes a flywheel diode CR2 having a cathode connected to the emitter of the switching transistor Q2 and an anode grounded; a choke coil L2 having one end connected to the emitter of the switching transistor Q2; It comprises a smoothing capacitor C2 connected between the other end of L2 and ground. A capacitor C ₀₁ is connected between the emitter of the switching transistor Q2, the cathode of the flywheel diode CR2 and the common connection point of the choke coil L2.
Are connected to each other.

Next, the operation of this embodiment will be described.
This embodiment basically operates in the same manner as the apparatus shown in FIG. The PWM control units 1 and 2, which are pulse generation circuits, branch and input the voltage output to the load 10, and widen the output pulse width when the output voltage is lower than the set value, and increase the output pulse width when the output voltage is higher than the set value. They operate in synchronization with each other so as to reduce the output pulse width. As a result, DC /
By simultaneously outputting the outputs of the DC converters A and B to the load 10, a sufficient output current can be obtained.

Here, similarly to the conventional device, the transistor Q1 has a DC current amplification factor h higher than that of the transistor Q2.
_Assuming that the _FE and the rise time are large, each output pulse of the PWM control units 1 and 2 has a time interval as shown by a and b in FIGS. 3A and 3B by the soft start operation. As the pulse width increases with the lapse of time, the rise of the output pulse b is equal to the output pulse a.
Becomes a waveform that is inclined compared to the rising edge of.

[0038] Thus, the voltage developed across the diode CR1 is a voltage V _a shown in Figure 3 (C). On the other hand, according to this embodiment, immediately after the output pulse of the PWM controller 1 and 2 occurs, even the voltage V _a generated, yet time voltage across diode CR2 is hardly generated, the capacitor C ₀₁ the current due to the voltage V _a flow to the emitter of the transistor Q2 through, to charge the capacitor C _01.

When the output pulses of the PWM control units 1 and 2 are lost (at the time of low level),
The electric charge charged in the capacitor C _01, a diode CR2
→ Capacitor C ₀₁ → Coil L1 → Discharged on the path of capacitor C1. Hereinafter, the same operation as described above is repeated. Thereby, the voltage V _b10 across the diode CR2 is obtained.
As shown in FIG. 3 (I), the same as the voltage _{V a.}

Accordingly, the currents _Ia and _Ib10 flowing through the coils L1 and L2 are values obtained by dividing the values obtained by integrating the voltages at both ends of the coils L1 and L2 with time by the inductance value. Since the voltages at both ends are equal, the currents I _a and I _b10 are also equal as shown in FIGS. 3 (F) and (K). Therefore, according to the present embodiment, the transmission powers of the DC / DC converters A and B can be made equal.

Next, a second embodiment of the present invention will be described with reference to FIG.
It will be described together with the circuit diagram of FIG. 6, the same components as those in FIG. 6 are denoted by the same reference numerals. In FIG. 2, DC / DC
Converters C and D respectively correspond to the D of the device shown in FIG.
This is an input / output insulated DC / DC converter having the same configuration as the C / DC converters C and D.

In FIG. 2, a converter device according to the present embodiment includes a first DC / DC converter C and a second DC / D converter.
It has a C converter D and an error detection circuit 5. These converters C and D are connected to a voltage source E _IN via a power switch SW. The load 20 is connected to the common terminals 21 and 22.

Here, DC / DC converters C and D
Are input / output non-isolated DC / DC converters having the same configuration as the DC / DC converters C and D shown in FIG. That is, the DC / DC converter C includes a PWM control unit 3 and an FET Q that is a switching transistor that is turned on and off by the control unit 3.
3 and a power transmission driver Pc. DC / D
The C converter D includes a PWM control unit 4, an FET Q4 that is a switching transistor that is turned on and off by the control unit 4, and a power transmission drive unit Pd
And The present embodiment is characterized in that a capacitor _C02 is connected between a connection point between the FET Q3 and the power transmission driver Pc and a connection point between the FET Q4 and the power transmission driver Pd.

The power transmission driver Pc includes a transformer T1 having a primary winding connected to the drain of a switching transistor FET Q3, a rectifying diode CR3 having an anode connected to a secondary winding of the transformer T1, and a rectifier. A choke coil L3 having one end connected to the cathode of the diode CR3 for use, a full-wheel diode CR4 having a cathode connected to a connection point between the rectifier diode CR3 and the choke coil L3, and between the other end of the choke coil L3 and ground. , And a smoothing capacitor C4 connected to Between the common connection point of the cathode of the diode CR3, the cathode of the diode CR4, and the coil L3,
One end of the capacitor C ₀₂ is connected.

The power transmission driver Pd includes a transformer T2 having a primary winding connected to the drain of an FET Q4 serving as a switching transistor, a rectifying diode CR5 having an anode connected to a secondary winding of the transformer T2, and a rectifier. Choke coil L4 having one end connected to the cathode of diode CR5 for use, flywheel diode CR6 having a cathode connected to the connection point between diode CR5 for rectification and choke coil L4, and between the other end of choke coil L4 and ground. And a connected smoothing capacitor C5. Between the common connection point of the cathode of the diode CR5, the cathode of the diode CR5, and the coil L5,
The other end of the capacitor C ₀₂ is connected.

The primary winding of the transformer T1 and the FET Q
A diode CR7 whose anode is connected to the connection point with the drain of the transistor CR3 and a resistor R1 and a capacitor C6 which are connected in parallel between the cathode of the diode CR7 and the other end of the primary winding of the transformer T1 are connected to the FET Q3 , And Q4 constitute a snubber circuit for preventing breakage due to generation of a high voltage when turned off. Similarly, the diode CR8, the resistor R2, and the capacitor C6 each constitute a snubber circuit. The other ends of the transformers T1 and T2 are commonly connected to a terminal 22.

Next, the operation of this embodiment will be described.
This embodiment basically operates in the same manner as the apparatus shown in FIG. That is, the PWM control units 3 and 4, which are pulse generation circuits, operate synchronously with each other based on the error detection output from the error detection circuit 5 into which the voltage output to the load 20 is branched and input. When the FETs Q3 and Q4 are turned on by the high-level pulses output from the PWM control units 3 and 4, the transformer T
The DC voltage from the DC voltage source E _IN is applied to the primary winding of the transformers T1 and T2, and the transformer T is applied to the secondary windings of the transformers T1 and T2.
1, a voltage corresponding to the turns ratio of T2 is generated.

When the PWM pulse goes low and the FETs Q3 and Q4 are turned off, the diodes CR7 and CR8 are turned on by the energy stored in the primary windings of the transformers T1 and T2, and the transformer T1 is turned on. , T2 have a voltage across the capacitor C6,
It becomes equal to the terminal voltage of C7. At this time, the rectifying diodes CR3 and CR5 are reverse-biased and turned off,
The energy stored in the coils L3 and L4 is supplied to the load 20 through the diodes CR4 and CR6. Less than,
The same operation as described above is repeated.

Therefore, the terminal voltage (output voltage) of the capacitors C4 and C5 is a value obtained by averaging the voltage generated in the secondary winding when the FETs Q3 and Q4 are on during the on-period and off-period of the FETs Q3 and Q4. Becomes In this way,
Also in the present embodiment, since the outputs of the DC / DC converters C and D can be simultaneously output to the load 20, a sufficient output current can be supplied to the load 20.

Here, C _{iss of} FET Q3 is _{equal to} that of FET Q4.
If the gate threshold voltage is lower than that of the PWM control units 3, 4
3A and 3B show output pulses a and b, respectively.
As shown in the figure, the rising of the output pulse b is the output pulse a
Becomes a waveform that is inclined compared to the rising edge of.

[0051] Thus, the voltage developed across the diode CR4 is a voltage V _a shown in Figure 3 (C). on the other hand,
According to this embodiment, immediately after the output pulse of the PWM control section 3 and 4 has occurred, even the voltage V _a generated,
Still time voltage across diode CR6 is hardly generated, a current flows due to the voltage V _a via a capacitor C _02, for charging the capacitor C _02, a diode CR
The voltage across the 6 also becomes the voltage V _a.

When the output pulses of the PWM control units 3 and 4 are lost (at a low level),
Electric charge charged in the capacitor C _02, the diode CR6
→ Capacitor C ₀₂ → Coil L3 → Discharged on the path of capacitor C4. Hereinafter, the same operation as described above is repeated. Thereby, the voltage V _b20 across the diode CR6 is obtained.
Is the same as the voltage _{V a} as shown in FIG. 3 (J).

Therefore, the current I flowing through the coils L3 and L4
_a and I _b20 become equal as shown in FIGS. 3 (F) and (K), respectively. Therefore, in the present embodiment, similarly to the first embodiment, the transmission powers of the DC / DC converters C and D can be made equal.

Next, a third embodiment of the present invention will be described with reference to the circuit diagram of FIG. 2, the same components as those in FIG. 2 are denoted by the same reference numerals, and the description thereof will be omitted. In this embodiment,
The DC / DC converter device of the input / output isolation type shown in FIG. 6 is characterized in that a capacitor _C03 is connected between the drain of the primary side FET Q3 of the transformer T1 and the drain of the primary side FET Q4 of the transformer T2. Having.

In this embodiment, the _Ciss of the FET and the gate
Assume that the threshold voltage varies between the FETs Q3 and Q4, and the drain voltage of the FET Q3 is generated immediately after the output pulses of the PWM control units 3 and 4 are generated, but the voltage is hardly generated at the drain of the Q4. , FETQ this time, via a capacitor C ₀₃
Since the current flows due to the drain voltage of the FET ₃ and charges the capacitor C03, the drain voltage of the FET Q4 also
Becomes equal to

Thus, the transformers T1 and T2
Equalizing the voltage on the primary side of the transformer T1
And the turn ratio between the respective primary and secondary windings of T2 are assumed to be equal, the voltage V _a and V _b2 of the secondary side of the transformer T1 and T2 are equal, respectively. As a result, the currents flowing through the coils L3 and L4 can be equalized.

In the above case, the electric charge charged in the capacitor C ₀₃ at the time of the pulse generation is equal to that of the transformer T ₀₃ when the pulse is turned off.
1 primary winding → CR8 → discharged via C7, R2. The same operation is repeated in the next cycle.

[0058] In the above embodiment, the capacitance value of the capacitor C ₀₁ larger the difference between the current Ia and Ib1, Ib2 is greatly. This is because the energy of the difference between the current Ia and Ib1, Ib2 must be compensated. 2 and 4, the DC voltage E _IN and
The withstand voltage of the capacitors C ₀₂ and C ₀₃ is determined based on the secondary voltage of the transformer and used. When the voltage E _IN on the primary side is high and the voltage on the secondary side is low, the withstand voltage of the capacitor C ₀₂ may be lower than that of C ₀₃ .

Note that the present invention is not limited to the above-described embodiment. For example, transistors Q3 and Q4
Can of course be a bipolar transistor. Further, the present invention can be applied to a non-insulated DC / DC converter having a configuration other than the DC / DC converters A and B. For example, the coil L1 and the diode CR1 in FIG.
2, the cathode of the diode may be connected to the emitter of the transistor.

Further, the present invention can be applied to an insulation type DC / DC converter having a configuration other than the DC / DC converters C and D. For example, in FIG.
4 is connected between the anodes of the diodes CR4 and CR6 and the connection points of the capacitors C4 and C5 and the terminal 22, and the capacitor can be applied between the anodes of the diodes CR4 and CR6. Further, the present invention can be applied to a configuration in which the snubber circuit is eliminated and a series circuit of a resistor and a capacitor is connected between the drain and source of the FETs Q3 and Q4 or between the collector and the emitter of the bipolar transistor.

[0061]

As described above, according to the present invention,
By supplying a voltage generated in a power transmission driving unit of a certain DC / DC converter to a power transmission driving unit of another DC / DC converter in which almost no voltage is generated via a capacitor, an output of the power transmission driving unit is obtained. The voltage and the output current can be made equal among a plurality of DC / DC converters. For this reason, the power margin of the plurality of DC / DC converters operating in parallel can be reduced as compared with the conventional case,
In addition, elements that are not strictly controlled as conventional circuit elements can be used.

Further, according to the present invention, the output power of each DC / DC converter can be equalized. For this reason, the heat generation of each DC / DC converter is also equalized, the heat radiation is easy, and the reliability can be improved. Accordingly, the size and weight of the entire apparatus can be reduced as described above.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a second embodiment of the present invention.

FIG. 3 is a time chart for explaining the operation of each unit of FIGS. 1 and 2, and FIGS. 5 and 6;

FIG. 4 is a circuit diagram of a third embodiment of the present invention.

FIG. 5 is a circuit diagram of a conventional example.

FIG. 6 is a circuit diagram of another example of the related art.

[Explanation of symbols]

A, B: non-insulated DC / DC converter C, D: isolated DC / DC converter Q1, Q2: switching NPN transistor Q3, Q4: switching N-channel field effect transistor CR1, CR2, CR4, CR6: flywheel diodes L1, L2, L3, L4 ... choke coils C1, C2, C4, C5 ... smoothing capacitor _{C 01, C 02, C 03} ... capacitors 1 to 4 ... PWM control unit 10, 20 ... load

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H02M 3/00

Claims (6)

(57) [Claims] A plurality of DCs commonly connected to a DC power supply
In a DC / DC converter device that drives a common load by operating a DC / DC converter in parallel by synchronizing switching timing, a power transmission drive unit by switching of the plurality of DC / DC converters is connected via a capacitor. A DC / DC converter device which is connected. 2. The non-isolated DC / DC converter having a common input / output ground, wherein each of the plurality of DC / DC converters is a non-insulated DC / DC converter having a common input / output ground. A pulse generating circuit that generates a switching pulse for switching the transistor and whose output pulse width is controlled by a control input; and a choke coil, a flywheel diode, and a smoothing capacitor for transmitting the output of the switching transistor. 2. The DC / DC converter according to claim 1, further comprising: a power transmission drive unit that outputs DC power and supplies the control input to the pulse generation circuit.
DC converter device. 3. The power transmission drive unit, comprising: a flywheel diode having a cathode connected to an emitter of the switching transistor and an anode grounded; and one end connected to a connection point between the flywheel diode and the emitter of the switching transistor. And the smoothing capacitor connected between the other end of the choke coil and ground. The emitter of the switching transistor of the plurality of DC / DC converters and the flywheel diode 3. The DC / DC converter according to claim 2, wherein a capacitor is connected between a common connection point of the cathode and the choke coil.
DC converter device. 4. The plurality of DC / DC converters are input / output isolated DC / DC converters, respectively. The input / output isolated DC / DC converter includes a switching transistor and a switching pulse for switching the switching transistor. And a pulse generator circuit whose output pulse width is controlled by a control input, a transformer having a primary winding connected to an output terminal of the switching transistor, and an anode connected to a secondary winding of the transformer. A rectifier diode, a choke coil having one end connected to the cathode of the rectifier diode, a hula wheel diode having a cathode connected to a connection point between the rectifier diode and the choke coil, and the other end of the choke coil. An electrode with a smoothing capacitor connected between grounds A transmission drive unit, the constructed, any one of the DC of the plurality of DC / DC converter
An error detected from an output taken from a connection point between the choke coil and the smoothing capacitor in the DC / DC converter,
2. The DC / DC converter device according to claim 1, wherein said DC / DC converter is an input / output isolated type DC / DC converter having an error detection circuit for variably controlling an output pulse width of said pulse generation circuit based on the detection error. 5. The DC / DC converter according to claim 4, wherein a capacitor is connected between a common connection point of the rectifying diode, the choke coil and the fuller diode of the plurality of DC / DC converters. apparatus. 6. The DC / DC converter device according to claim 4, wherein a capacitor is connected between a common connection point between a primary winding of the transformer of the plurality of DC / DC converters and a switching transistor.