JP3319172B2 - Signal conversion method and signal conversion device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a color signal converter for converting color signals, such as a color printer, a color copier, and a color scanner, and coordinates for converting coordinate signals in three-dimensional graphics and three-dimensional CAD. The present invention relates to a signal conversion method for converting three input signals into one output signal, such as a signal conversion device, and a signal conversion device.

[0002]

2. Description of the Related Art Conventionally, as in color image signals, 3
When conversion from one input signal to one output signal is complicated, a signal conversion method using a three-dimensional table method is known. However, for example, three input signals X, Y,
Assuming that the value of Z is 241 steps of 0-240, the converted signal requires a table having 241 ³ = 13997521 data, which makes the storage means expensive and impractical.

To reduce the amount of data in the storage means, there is a signal conversion method using a three-dimensional table interpolation method as shown in FIG. In this method, a large cube having three values of the input signals X, Y, and Z as orthogonal axes is formed.
A large cube is divided into a predetermined size, that is, a unit cube, and a unit cube ABCDEF containing a conversion signal to be obtained is included.
The GH is cut out, and the data of the lattice point is subjected to interpolation processing to obtain a converted signal. For example, if the grid points of the three input signals X, Y, and Z have 16 levels of 0, 16, 32,..., 240, respectively, 16 ³ = 4096 data are prepared in order to obtain a converted signal. This is good, and the data amount is about 1/3400 of that of the three-dimensional table method.

In this method, there are various interpolation methods depending on the number of grid points and the like. However, as the number of grid points used for interpolation is smaller, the scale of hardware such as interpolation processing means is smaller. The five 4
Japanese Patent Application Laid-Open No. 53-123201 discloses a method of performing interpolation processing from data of four grid points by dividing the data into four planes.

In FIG. 12, a point to be interpolated is a tetrahedron A
Which of the BCG, ABDE, BEFG, DEHG, and BDEG is included is determined, and the data of the converted signal is obtained by linearly interpolating the data of the four vertices of the determined tetrahedron.

[0006]

In such a signal conversion method, the four outer tetrahedrons ABDE, ABCG, BE are used.
While the volume of FG and DEGH is 1/6 of the unit cube, the volume of the central tetrahedron ABDE is 3/3 of the unit cube.
The difference between the long side and the short side of the four tetrahedrons that are one-fourth or outside is large. Due to such a geometrical bias, there is a problem that an error of a signal to be converted is large in the above-mentioned division method.

When high-speed processing of such a signal conversion method is realized by a digital circuit, it is necessary to simultaneously read data of four different grid points, so that four storage means for storing grid point data are required. there were. Having four storage means for grid point data with the same contents is inefficient,
The accuracy of the converted signal was not good for the size of the storage means as a whole.

The present invention has been made in view of the above-mentioned problems, and has a tetrahedral division method having no geometrical deviation.
It is an object of the present invention to provide a signal conversion method in which the accuracy of a signal to be converted is good and the signal accuracy is small for each area of a tetrahedron.

It is another object of the present invention to provide a signal conversion apparatus in which the variation in signal accuracy for each tetrahedral region is small by using two types of grid point storage means and interpolation means by the above method.

It is another object of the present invention to provide a low-cost signal conversion device which has a small variation in signal accuracy for each tetrahedral region by using four kinds of grid point storage means and interpolation means by the above method.

[0011]

In order to achieve the above object, a signal conversion method according to the present invention interpolates data of lattice points of a body-centered cubic lattice composed of upper bits of three input signals. A signal conversion method for obtaining an output signal,
Two body-centered lattice points of two unit cubes adjacent to each other and two adjacent unit cubes located at the boundary between the two unit cubes
The data is divided into tetrahedrons having two basic lattice points as vertices, and the data in the tetrahedron is configured to interpolate the data of the four vertices.

Further, the signal conversion device of the present invention is a signal conversion device for obtaining an output signal by interpolating data of lattice points of a body-centered cubic lattice composed of upper bits of three input signals, respectively. Two unit cubes adjacent to each other
Dividing into four tetrahedrons having two basic lattice points adjacent to each other at the boundary between two body-center lattice points and the two unit cubes, and determining which of the three input signals exists in the tetrahedron A tetrahedron discriminating means, an address generating means for generating an address of a vertex of the discriminated tetrahedron, a basic grid point data storing means storing basic grid point data, and a data of a body center grid point. A stored body-center grid point data storage means, a weight coefficient calculating means for calculating a weight coefficient of the vertex for interpolating data of the determined tetrahedron, a basic grid point data storage means, and a body-center lattice
It has a configuration comprising an interpolation means for performing interpolation processing each two vertices data from point data storage means on the basis of the weighting factors from the heavy <br/> viewed coefficient calculating means.

Further, in the signal converter of the present invention, in the configuration of the first embodiment, the basic grid point data storage means stores even basic grid point data storing data of even basic grid points; An odd-numbered basic lattice point data storage unit storing odd-numbered basic lattice point data, wherein the body-centered lattice point data interpolation unit stores even-numbered body-centered lattice point data; And odd-numbered body-centered grid point data storage means for storing data of odd-numbered body-centered grid points. However, the coordinates of the basic lattice point and the body-center lattice point are (l, m, n) and (l-0.
5, m-0.5, n-0.5) {1, m, n: integer}, where l + m + n is an even point when l + m + n is even, and an odd point when l + m + n is odd.

[0014]

According to the above arrangement, since the size and shape of the tetrahedron are not deviated, a highly accurate converted signal can be obtained.

Further, the basic grid point data storage means and the body physique
A high-precision signal conversion device can be obtained without increasing the cost by the child point data storage means .

Further, the even basic data storage means, the odd basic data storage means, the even body data storage means and the odd body data storage means provide a low cost and high precision signal conversion device as compared with the prior art.

[0017]

FIG. 1 shows a first embodiment of the present invention.
This will be described with reference to FIG.

FIG. 1 is a diagram illustrating the principle of tetrahedral division of a signal conversion apparatus according to a first embodiment of the present invention. In the three-dimensional table interpolation method described in the prior art, a unit cube ABCD is used.
EFGH and its adjacent unit cube EFGHIJKL
think of. In FIG. 1, the unit cube ABCDEFGH
Assuming that the respective body-center points of EGFHIJKL and EFGHIJKL are P and Q, the octahedron EFGHQ is cut out and further divided into four tetrahedrons FEQP, FGQP, HGQP, and HEQP. The present invention divides into two tetrahedrons having two body-center lattice points of two unit cubes adjacent to each other and two basic lattice points adjacent to each other at the boundary between the two unit cubes and having two vertices as vertices. The data in the body is obtained by interpolating the data of the four vertices.

In FIG. 1, a unit cube EFGHIJKL formed on an adjacent unit cube ABCDEFGH is formed by 8
Although we considered the face EFGHQP, in actuality, FIG.
(8) As shown in (b) and (c), six 8
Faced ABCDRP, EFGHQP, ADHESP, BC
There are GFTP, ABFEUP, and CDHGVP, and a total of 24 tetrahedral ABs obtained by dividing each octahedron into four are provided.
RP, CBRP, CDRP, ADRP, FEQP, FG
QP, HGQP, HEQP, ADSP, HDSP, HE
SP, AESP, CBTP, CGTP, FGTP, FB
TP, ABUP, FBUP, FEUP, AEUP, CD
There are VP, CGVP, HGVP, and HDVP.

All points in the unit cube ABCDEFGH belong to any of the above 24 tetrahedrons. In this division method, the size of the tetrahedron is smaller than that of the conventional tetrahedron division method shown in FIG.
Moreover, since the size and shape are all the same, the accuracy of the signal to be converted is good, and the variation in accuracy between regions is small.

FIG. 3 is a block diagram of the signal conversion apparatus according to the first embodiment of the present invention, in which the tetrahedron to which the point to be determined by the tetrahedron determination means 2 belongs is specified, and the table address generation means is specified. The coordinates of the vertices of the tetrahedron specified in 3 are calculated, and are converted into the addresses of the basic grid point data storage unit 4 and the body center grid point data storage unit 5. The basic grid point data storage unit 4 and the body center grid point data storage unit 5 output the data of the vertices of the tetrahedron from the address signal. The weight coefficient calculating means 6 calculates a weight coefficient of a vertex of the specified tetrahedron for generating data of a point to be interpolated. The interpolation means 7 is 4
Interpolation processing is performed on data DA of a point to be obtained from the data of the vertices of the face and the weight coefficient.

Hereinafter, the configuration and operation of the signal conversion device 1 will be described in detail. In FIG. 3, three 8-bit input signals X, Y, and Z are higher-order 4-bit signals X ', Y',
Z 'and the lower 4-bit signals x, y, z are input to the tetrahedron determination means 2, and the upper 4-bit signals X', Y ', Z' are output to the address generation means. 3 is input. In the present invention, for convenience of explanation, the input signal is a fixed-point number, the upper 4 bits are an integer part, and the lower 4 bits.
Let bits be the fractional part.

The tetrahedron judging means 2 judges whether the point to be determined in the unit cube belongs to any of the 24 tetrahedrons. The lower 4-bit signals x, y, and
Six relational expressions of z: yx, y + x-1, zx, z + x
It is determined whether -1, zy, z + y-1 is positive (+) or negative (-), and the determination result is a 5-bit tetrahedron determination signal T.
E is output together with the lower 4-bit signals x, y, and z. However, when the value of the relational expression is 0, it does not matter which of the determination is made, but here, it is set to positive (+).

[0024]

[Table 1]

The address generating means 3 calculates the four upper bit signals X ', Y', Z 'of the input signal and the tetrahedron determination signal TE
A table address corresponding to the coordinates of the four tetrahedrons is output.

[0026]

[Table 2]

[0027]

[Table 3]

The four grid point addresses of the tetrahedron consist of two basic grid point addresses AD0 and AD1 and two body center grid point addresses AD2 and AD3, and are shown in Table 2 according to the tetrahedron determination signal TE. This is the address of the grid point. The grid point address has four values X "n, Y" n, Z "n (n = 0) generated by the upper 4 bits X ', Y', Z 'of the input signal by the operation shown in (Table 3). , 1, 2, 3).

By the processing described above, basic grid point addresses AD0 and AD1 and body-center grid point addresses AD2 and AD3 are generated, and two basic grid point data storage means 4 are provided.
Is input to the two body-center grid point data storage means 5.

The basic lattice point data storage means 4 and the body center lattice point data storage means 5 are composed of semiconductor memories, and when an address signal AD0, AD1, AD2, AD3 is input, data DA0, DA1, DA2, DA3
Is read. The data of the basic grid point data storage means 4 and the body center grid point data storage means 5 are stored in accordance with the addresses shown in FIG.
Is stored. The basic lattice point addresses AD0 and AD1 correspond to the coordinates of the basic lattice points as they are, but the body-center lattice point addresses AD2 and AD3 are values obtained by adding 0.5 to the coordinates X, Y and Z of the body-center lattice points. . Basic grid point data storage means 3 and body center grid point data storage means 4
Output signals DA0, DA1, DA2, and DA3 are values of each vertex of the tetrahedron, and are sent to the interpolation means 7.

The weight coefficient calculating means 6 calculates the tetrahedron determination signal TE from the tetrahedron determination means 2 and the lower 4-bit signals x, y, z.
Required from.

For example, a coefficient when the tetrahedron is determined to be ABRP will be obtained. As shown in FIG. 5, the coordinates of each vertex of A, B, R, and P are (0, 0, 0), (1, 0, 0),
(0.5, 0.5, -0.5), (0.5, 0.5,
0.5). Since the inside of the tetrahedron can be linearly interpolated,
The value DA of the internal point (x, y, z) to be obtained is a function f (x,
y, z), a linear function of three variables

[0033]

(Equation 1)

Can be represented by Here, a, b, c, and d are constants. The values of the vertices A, B, R, and P of the tetrahedron are shown in FIG.
Are DA0, DA1, DA2, and DA3, respectively, and the respective weight coefficients are WH0, WH1, WH2, W
Assuming that H3, the value DA of the point inside the tetrahedron can be expressed by (Equation 2).

[0035]

(Equation 2)

By substituting the coordinates and values of the vertices of the tetrahedron into (Equation 1), (Equation 3) is converted to (Equation 6).

[0037]

(Equation 3)

[0038]

(Equation 4)

[0039]

(Equation 5)

[0040]

(Equation 6)

When this is solved for a, b, c, and d, (equation 7) becomes (equation 10).

[0042]

(Equation 7)

[0043]

(Equation 8)

[0044]

(Equation 9)

[0045]

(Equation 10)

Therefore, (Equation 1) is

[0047]

[Equation 11]

When this is arranged for DA0, DA1, DA2, and DA3,

[0049]

(Equation 12)

From the correspondence with (Equation 2), the weight coefficient W
H0, WH1, WH2, and WH3 are respectively (Expression 13) to (Expression 16).

[0051]

(Equation 13)

[0052]

[Equation 14]

[0053]

(Equation 15)

[0054]

(Equation 16)

Although the above example is a coefficient when the tetrahedron is the ABRP, it can be obtained in the same manner when the other tetrahedron is used. The results are shown in (Table 4). Weight coefficient calculation means 6
Outputs four weighting coefficients WH0, WH1, WH2, WH3 to the interpolation means 7.

[0056]

[Table 4]

The interpolation processing means 7 receives the vertex data DA 0, DA 1, DA 2, DA 3 from the two basic grid point data storage means 4 and the two body center grid point data interpolation storage means 5, and the weight coefficient from the weight coefficient calculation means 6. WH0, WH1, WH2, WH3
Is calculated by the following equation (2). FIG.
The data of each vertex and the weight coefficient are 4
The products are obtained by the two multipliers 8, the respective products are summed by the adder 9, the data inside the tetrahedron are obtained by interpolation, and the conversion signal DA is output.

Thus, the first embodiment of the present invention is completed. FIGS. 7 to 10 show a second embodiment in which the first embodiment of the present invention is improved and the capacity of the data storage means is reduced.
This will be described with reference to FIG. In the second embodiment, the method of dividing the tetrahedron is the same as that of the first embodiment, so that the description is omitted.

FIG. 7 is a block diagram of a signal conversion apparatus according to a second embodiment of the present invention, in which the tetrahedron to which the point to be determined by the tetrahedron determination means 2 belongs is specified. , The coordinates of the vertices of the tetrahedron are calculated, and the even basic lattice point data storage unit 12 and the odd basic lattice point data storage unit 1 are calculated.
3. The address is output to the even-numbered body-centered lattice point data storage means 14 and the odd-numbered body-centered lattice point data storage means 14. The even basic lattice point data storage unit 12, the odd basic lattice point data storage unit 13, the body center lattice point data storage unit 14, and the body center lattice point data storage unit 15 output the data of the vertices of the tetrahedron from the address signal. Even-odd weight coefficient calculating means 16
Is the specified 4 to generate the data for the point to be interpolated.
Calculate the weight coefficients of the vertices of the face. Interpolation processing means 6
Interpolation processing is performed on the data DT of points to be obtained from the data of the vertices of the face and the weighting coefficients. Hereinafter, the configuration and operation of the signal conversion device 10 will be described in detail.

In FIG. 7, the tetrahedron determination means 2 has the same configuration as that of the first embodiment and outputs a tetrahedron determination signal TE together with the lower four bits x, y, and z.

FIG. 8 is a block diagram of the even / odd address generation means of the signal conversion device according to the second embodiment of the present invention. The address generation means 2 has the same configuration as that of the first embodiment. One basic grid point address AD0, AD1 and two body center grid point addresses AD2, AD3 are generated.

Now, the coordinates of the basic lattice point and the body-center lattice point are respectively (l, m, n), (l-0.5, m-0.5, n
−0.5) {l, m, n: integer}, where l + m + n is an even number when l + m + n is an even number and an odd number when l + m + n is an odd number. In FIG. 2, when the point A is an even number point, the basic lattice points C,
F and H and the body-center lattice points R, Q, S, T, U, and V are even-numbered points, and the basic lattice points B, D, E, and G and the body-centered lattice point P are odd-numbered points. When the point A is an odd number, the basic lattice point C,
F and H and the body-center lattice points R, Q, S, T, U, and V are odd-numbered points, and the basic lattice points B, D, E, and G and the body-centered lattice point P are even-numbered points. As described above, whether the point A is an even-numbered point or an odd-numbered point is determined depending on whether the point A is an even-numbered point or an odd-numbered point.

For this reason, the even / odd discriminating means 17 in FIG. 8 determines whether the point A is an even-numbered point or an odd-numbered point, as shown in (Table 5), the least significant bit of each of the upper 4-bit signals X ', Y' and Z '. X '
Judgment is made based on the values of 0, Y'0, and Z'0, and 0 is output as an even-odd determination signal EO when point A is an even-numbered point and 1 when point A is an odd-numbered point.

[0064]

[Table 5]

The even-odd address conversion means 18 in FIG. 8 sends address signals to the even-numbered basic lattice point data storage means 12, the odd-numbered basic lattice point data storage means 13, the body-centered lattice point data storage means 14, and the body-centered lattice point data storage means 15. AR0, AR
1, AR2 and AR3, as shown in Table 6 below. The two basic grid point addresses AD0 and AD1 and the two body center grid point addresses AD2 and AD3 from the table address generator 3 are shown in Table 6. The least significant bits are discarded, and the four multiplexers 19 perform an exchange process based on the even / odd determination signal EO from the even / odd determination means 17, and the address signals AR0,
Generate AR1, AR2, AR3.

[0066]

[Table 6]

FIG. 9 shows an even basic lattice point data storage means 1.
2. Odd basic grid point data storage means 13, body center grid point data storage means 14, and body center grid point data storage means 15
A predetermined grid point data is stored in each storage means, and the even / odd address conversion means 18 outputs four vertices necessary for the interpolation processing by the address signals AR0, AR1, AR2, AR3. Data DT0, DT1, DT
2, DT3 is output.

FIG. 10 shows the configuration of the even-odd weight coefficient calculating means 16. The weight coefficient calculating means 6 having the same structure as that of the first embodiment is provided with a tetrahedron determination signal TE from the tetrahedron determination means 2. Weighting coefficients WH0, WH1, WH2, WH3 are generated from the lower 4-bit signals x, y, z, and the weighting coefficient exchange means 20 outputs the weighting coefficients WH0, WH1,. WH2 and WH3 are subjected to the exchange processing shown in (Table 7) by the four multiplexers 19, and the exchanged weighting coefficients WT0, WT1, WT
2. Output WT3 to the interpolation means 7.

[0069]

[Table 7]

The interpolation means 8 of FIG. 7 has the same configuration as that of the first embodiment, and includes even basic grid point data storage means 12, odd basic grid point data storage means 13, body center grid point data storage means 14, and body data. The vertex data DT0, DT1, DT2, DT3 from each of the heart lattice point data storage means 15 and the weight coefficients WT0, WT1,
WT2 and WT3 are subjected to a product-sum operation as in (Equation 17), and a converted signal DT is output.

[0071]

[Equation 17]

Although the above two embodiments have shown a hardware configuration, they can also be realized by software using a general-purpose CPU or DSP. Further, the method of the present invention can be realized by sharing both of hardware and software.

[0073]

As is clear from the above embodiments, according to the present invention, an excellent signal conversion device capable of performing low-cost, high-precision three-dimensional signal conversion with a simple configuration can be realized. It is.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of tetrahedral division of a signal converter according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating the principle of tetrahedral division of the signal converter according to the first embodiment of the present invention;

FIG. 3 is a configuration diagram of a signal conversion device according to a first embodiment of the present invention.

FIG. 4 is an explanatory diagram of grid point data of the signal conversion device according to the first embodiment of the present invention.

FIG. 5 is an explanatory diagram of a signal conversion device according to the first embodiment of the present invention.

FIG. 6 is a configuration diagram of an interpolation means of the signal conversion device according to the first embodiment of the present invention.

FIG. 7 is a configuration diagram of a signal conversion device according to a second embodiment of the present invention.

FIG. 8 is a configuration diagram of an even-odd address generation means of the signal conversion device according to the second embodiment of the present invention.

FIG. 9 is an explanatory diagram of grid point data of the signal conversion device according to the second embodiment of the present invention.

FIG. 10 is a configuration diagram of an even-odd weight coefficient calculation unit of the signal conversion device according to the second embodiment of the present invention.

FIG. 11 is a principle diagram of a conventional table interpolation method.

FIG. 12 is an explanatory view of a conventional table-type tetrahedron division.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st signal conversion apparatus 2 tetrahedron discrimination means 3 address generation means 4 basic lattice point data storage means 5 body center lattice point data storage means 6 weight coefficient calculation means 7 interpolation means 10 1st signal conversion apparatus 11 even-odd address generation Means 12 Even basic lattice point data storage means 13 Odd basic lattice point data storage means 14 Even body center lattice point data storage means 15 Odd body center lattice point data storage means 16 Even odd weight coefficient calculation means

Continuation of the front page (51) Int.Cl. ⁷ Identification symbol FI H04N 1/60 H04N 1/46 Z (56) References JP-A-3-13066 (JP, A) JP-A-5-110840 (JP, A) JP-A-5-227421 (JP, A) JP-A-8-321956 (JP, A) JP-B-58-16180 (JP, B2) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06T 11/60 120 H04N 1/46 H04N 1/60 Patent file (PATOLIS) JICST file (JOIS)

Claims (3)

(57) [Claims] 1. A three respective signal conversion method of obtaining an output signal by interpolating the data of lattice points of the constructed body centered cubic lattice from upper bits of the input signal, the two unit cubes that are adjacent to each other It is divided into tetrahedrons whose vertices are two basic lattice points located on the boundary between two body-center lattice points and the two unit cubes, and the data in the tetrahedron is the data of the four vertices. A signal conversion method obtained by performing an interpolation process. 2. A three signal conversion apparatus for obtaining an output signal by interpolating the data of lattice points of the constructed body centered cubic lattice, respectively from upper bits of the input signal, the two unit cubes that are adjacent to each other It is divided into tetrahedrons having two body lattice points and two basic lattice points adjacent to each other at the boundary between the two unit cubes, and the three input signals are present in any of the tetrahedrons Tetrahedron discriminating means for judging whether or not, an address generating means for generating an address of a vertex of the discriminated tetrahedron, basic grid point data storage means for storing basic grid point data, and data of body center grid points A weight coefficient calculating means for calculating a weight coefficient of the vertex for interpolating the data of the determined tetrahedron, and a basic grid point data.
A signal conversion device comprising interpolation means for performing an interpolation process on each of two vertex data from the data storage means and the body-center grid point data storage means based on the weighting factor from the weighting factor calculation means. 3. An even-numbered basic grid point data storage means in which the basic grid point data storage means stores even-numbered basic grid point data, and an odd-numbered basic grid inverted data storage in which odd-numbered basic grid point data is stored. Means for storing data of even-numbered body-centered lattice points, wherein the body-centered lattice point data interpolating means stores data of even-numbered body-centered lattice points; and odd-numbered body centers storing data of odd-numbered body-centered lattice points. 3. The signal converter according to claim 2, comprising a grid point data storage unit. Here, the coordinates of the basic lattice point and the body-center lattice point are respectively (l, m, n), (l-0.5, m-0.5, n-0.
5) Expressed as [l, m, n: integer], where l + m + n is an even point when l + m + n is an even number, and an odd point when l + m + n is an odd number.