JP3303760B2 - PRINTED CIRCUIT BOARD, DESIGN METHOD THEREOF, AND WIRING PATTERN PREPARATION DEVICE FOR PRINTED CIRCUIT BOARD - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a printed circuit board for suppressing unnecessary electromagnetic wave radiation, a design method for manufacturing the printed circuit board, and a wiring pattern manufacturing apparatus for automatically realizing the design method.

[0002]

2. Description of the Related Art Conventionally, a printed circuit board which has a signal layer, a power layer, and a ground layer and has a power layer or a ground layer in a layer adjacent to the signal layer and which does not emit unnecessary electromagnetic waves is designed. As a method and a structure of a printed circuit board that does not emit unnecessary electromagnetic waves, there is known a method described in “Design Method of Printed Wiring Board” in JP-A-6-203102.

A method of designing a printed circuit board described in the above publication will be described with reference to FIG. 9 and a structure of the printed circuit board will be described with reference to FIG.

FIG. 9A shows whether a signal pattern intersects with a non-conductive region (hereinafter, referred to as a clearance) formed around a via hole in a power supply layer or a ground layer.
This shows a design method of moving the clearance to a position that does not intersect with the signal pattern when it crosses.

FIG. 9B shows a design method in which, when a non-conductive area including the clearance intersects with the signal pattern, the signal pattern is moved to a position not intersecting with the non-conductive area.

By using these methods, a conductor can be secured immediately below the signal pattern, and the return current of the current flowing through the signal pattern can flow immediately below the signal pattern, so that the current is radiated from the printed circuit board. Unnecessary electromagnetic waves can be suppressed.

FIG. 10 shows that the power supply and the ground are on the same layer, and the non-conductive region formed at the boundary between the power supply and the ground intersects with the signal pattern on the signal layer adjacent to the layer having the non-conductive region. In this case, a structure in which a capacitor having good high-frequency characteristics is mounted as a bypass capacitor in a layer immediately below or immediately above a signal pattern between non-conductive regions. By using this structure, the power supply and the ground can be connected in an alternating current by the capacitor, and the return current of the current flowing through the signal pattern can be passed near the signal pattern, thereby suppressing unnecessary electromagnetic waves generated from the printed circuit board. it can.

[0008]

However, as shown in FIG. 11, a plurality of signal patterns 5 (5a to 5d) are provided in parallel, and the same number of via holes 6 on each signal pattern 5 are provided.
, The via hole 6 cannot move, and is connected to a signal pattern of another signal layer.
Since the signal pattern cannot move, the conventional design method described above cannot be applied.

Further, as can be seen from FIG. 11, the clearances provided in the power supply layer or the ground layer accompanying the via holes overlap each other, and a clearance row slit 7 crossing the signal pattern is generated. In the signal patterns 5b and 5c passing through the center of the clearance row slit 7, the return current flows so as to bypass both sides of the clearance row slit 7, and the area of the loop formed by the path of the signal pattern and the return current becomes large, thereby causing unnecessary electromagnetic waves. Radiation increases.

When the provided clearance row slit 7 is not connected to the signal pattern, the clearance is changed to the signal pattern as shown in FIG. 9A every time the signal pattern 5 and the clearance row slit 7 intersect. It is necessary to move the signal pattern to a position where it does not intersect or to move the signal pattern so that the signal pattern comes to the end of the clearance row slit as shown in FIG. 9B. However, on printed circuit boards with a high mounting density,
The signal pattern often intersects with the other clearance row slits, and the clearance or the signal pattern is moved each time, so that there is a drawback that the design takes time.

A layer adjacent to the signal pattern is a layer composed of a power supply having a plurality of different voltages or a power supply and a ground, and the signal pattern is wired across a plurality of power supplies or grounds in the layer adjacent to the signal pattern. In this case, according to the conventional design method, it is necessary to arrange the return current path and the signal pattern as close as possible.
As shown in FIG. 12, the signal pattern 14 is arranged so as to bypass the power supply so as to avoid discontinuity. Or, FIG.
As shown in (2), when the signal pattern cannot be bypassed, the capacitor 100 is arranged at the boundary of the power supply region.

However, the structure shown in FIG. 12 has a drawback that when the detour path of the signal pattern 14 is long, the wiring of other signal patterns is greatly restricted. In the structure as shown in FIG.
Each time 0 crosses the power supply region, the capacitor 100 must be mounted, which has disadvantages such as an increase in the number of components and a failure in high-density mounting.

An object of the present invention is to solve such a conventional problem and to provide a clearance structure for reducing a loop area formed by a signal pattern and a return current path, and a method of designing this printed circuit board. To avoid the restriction on wiring of the signal pattern, the increase in the number of components, and the obstacle to high-density mounting when the signal pattern is routed long or when the signal pattern crosses the boundary of multiple power supply areas. An object of the present invention is to provide a structure of a printed circuit board and a method for designing the printed circuit board.

[0014]

According to the present invention, there is provided a printed circuit board having a signal layer, a power supply layer, and a ground layer, wherein a signal pattern is formed at an interval larger than a clearance radius. A via hole is arranged on each of the signal patterns, and the signal patterns are considered as a set of two, and the via holes in the same set are arranged on the signal pattern so as to be close enough to insulate the via holes from each other. For a different set of via holes, the distance between the centers of the via holes is arranged on the signal pattern at an interval longer than the sum of the diameter of the clearance and the width of one signal pattern, and a clearance is provided around each via hole. It is characterized by.

In the design method, a region in which a clearance is to be formed is determined by a large frame, signal patterns are arranged apart from each other by at least the radius of the clearance in the region, and then the signal patterns are formed into a bundle of two pairs. The via holes on the signal patterns are temporarily arranged so that they do not touch each other, and the distance between the centers of the via holes on the adjacent signal patterns of different sets is the clearance Are arranged to be longer than the sum of the diameter of the signal pattern and the width of one signal pattern.

Further, the apparatus for producing a wiring pattern of a printed circuit board is characterized in that an apparatus for automatically mounting a signal pattern on a printed circuit board determines a region where a clearance is to be formed in a large frame, and separates the signal pattern within the region by a radius of the clearance or more. And the function of temporarily arranging the via holes on the signal pattern so that the signal patterns do not touch each other, and the function of temporarily arranging the via holes on the signal pattern so that the signal patterns do not contact each other. The via holes are arranged so that the distance between the centers of adjacent via holes is longer than the sum of the diameter of the clearance and the width of one signal pattern.

In the structure of the via hole according to the present invention, a signal pattern disposed at an interval of at least the radius of the clearance, and this signal pattern is considered as a set of two, and the signal patterns in the same set are insulated. Via holes placed on the signal pattern as close as possible,
In the signal patterns of different sets, by configuring via holes arranged on the signal pattern at intervals longer than the sum of the diameter of the clearance and the width of one signal pattern, and the clearance provided around each via hole,
Since the conductor region can always be left between the adjacent clearances on one side of the signal pattern, the return current of the current flowing through the signal pattern can flow near the signal pattern.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIGS.
An embodiment will be described.

FIG. 1 is a partially cutaway view of a part of a four-layer printed circuit board having a signal layer 1, a power supply layer 2, a ground layer 3, and a signal layer 4 when viewed from the signal layer 1 side. The clearance 7 is provided in the power supply layer 2 and the ground layer 3 and exists around the through via hole 6.

On the signal layer 1, four signal patterns 5 (5
a to 5d) are arranged in parallel, and are branched into signal patterns provided in the fourth signal layer 4 via via holes 6 penetrating the power supply layer 2 and the ground layer 3.

The power supply layer 2 and the ground layer 3 are provided with a clearance 7 which is a non-conductive area around the through via hole 6 to prevent electrical contact between the via hole 6 and the power supply layer 2 and the ground layer 3. In.

The signal patterns 5 are arranged at intervals larger than the radius of the clearance. Adjacent signal patterns are paired, and among via holes connected to four signal patterns 5, 6a and 6b and 6c and 6d in the same pair
Are arranged close to each other so as not to cause dielectric breakdown, and the clearance around each is unified to form two clearances 7a and 7b.

By making the distance between the centers of the via holes 6b and 6c of different sets longer than the sum of the diameter of the clearance and the width of one signal pattern, the clearance 7a,
7b, there is a conductor portion, and the signal patterns 5b, 5b
The path of the return current to c is ensured, and unnecessary electromagnetic wave radiation caused by the current loop constituted by the signal pattern and the return current can be suppressed.

The same applies to the case where there are five or more signal patterns. The same effect can be obtained by combining two via holes into a set and providing a clearance around the pair.

The width of the conductor region left between adjacent clearances is equal to or larger than the signal pattern in consideration of securing a return current path and providing another wiring pattern in the vicinity thereof. It is better to provide the width.

The present embodiment is not limited to a four-layer printed circuit board, but can be applied to a case where a plurality of signal patterns are connected to other signal layers by using via holes in a printed circuit board having six or more layers.

Although the structure in which the power layer and the ground layer are sandwiched between the two signal layers has been described, the present invention can also be applied to a printed circuit board having a structure in which signal layers surround the power layer or the ground layer above and below.

FIG. 2 is a flowchart for designing the printed circuit board of FIG. 1 according to the present invention.

When a plurality of signal patterns are arranged in parallel and connected to another signal layer using via holes, first, a region where a clearance is to be formed is determined in a large frame. Next, signal patterns are arranged in this area at a distance equal to or larger than the radius of the clearance (step 1).

The signal patterns are bundled into pairs (step 2), and via holes are provisionally arranged on each signal pattern so that the via holes of each signal pattern do not touch each other (step 3).

The via holes of different sets are arranged such that the distance between the centers of adjacent via holes of different sets is longer than the sum of the diameter of the clearance and the width of one signal pattern (step 4). Here, when an odd number of signal patterns running in parallel are handled, only one set of signal patterns and via holes may be considered as one set or one set.

By using the apparatus for designing a printed circuit board of the present invention according to the flow shown in FIG. 2, a printed circuit board capable of flowing the return current of the wiring pattern to the side of the clearance around the via hole can be designed.

FIG. 2 shows a device for automatically mounting a wiring pattern on a printed circuit board, a function of arranging a plurality of signal patterns in parallel to determine a region in which a clearance is to be formed, in a broad frame. The function of arranging signal patterns separated by a distance equal to or greater than the clearance radius, the function of temporarily arranging signal patterns as a set of two pieces so as not to contact via holes, and the function of arranging different pairs of via holes at the center of different adjacent via holes. The function of arranging via holes so that the distance between them is longer than the sum of the diameter of the clearance and the width of one signal pattern allows the return current of the wiring pattern to flow beside the clearance around the via hole And an apparatus for producing a wiring pattern of a printed circuit board.

Next, a reference example will be described with reference to FIGS.

FIG. 3 is a partially cutaway view of a part of the four-layer printed circuit board having the signal layer 8, the power supply layer 9, the ground layer 10, and the signal layer 11, as viewed from the signal layer 8 side.

In this printed circuit board, there are power supply regions 12 and 13 having different voltages in the power supply layer 9, and the signal patterns 14 wired in the signal layer 8 cross the boundaries of the power supply regions. In the signal layer 8, in addition to the signal pattern 14, a wiring pattern 16 that is arranged in parallel with the signal pattern 14 and connects the power supply region 12 across the power supply region 13 using the via holes 15 at the start and end points is arranged. I have.

By arranging the wiring pattern 16 near the signal pattern 14, the wiring pattern 16 functions as a return current path for the signal pattern, and emits unnecessary electromagnetic wave radiation generated when the signal pattern crosses the boundary of the power supply region. Can be suppressed.

FIG. 4 shows a printed circuit board having the same four-layer structure as in FIG. 3, in which the power supply layer 9 has power supply regions 17 and 19 having the same voltage,
This is a printed circuit board composed of power supply regions 18 and 18 'having different voltages. In the signal layer 8, a signal pattern 20 is wired from the power supply region 17 to the power supply region 18 'across the power supply regions 18 and 19. Signal pattern 20
On both sides, a wiring pattern 22 whose both ends are connected to the power supply regions 17 and 19 using via holes 21 is arranged. For the power supply region 18 ′ having a different voltage that does not connect to or cross the previous wiring pattern 22, the capacitor 100 is provided between the power supply region 19 connected to the previous wiring pattern 22 and near the signal pattern 20. ing.

By arranging the wiring pattern 22 near the signal pattern 20 in the same manner as in FIG. 3, the wiring pattern 22 functions as a return current path of the signal pattern, and unnecessary wiring generated when the signal pattern crosses the boundary of the power supply region. Electromagnetic radiation can be suppressed.

Although a four-layer printed circuit board has been described here, similar effects can be expected if a multilayer printed circuit board is used in which the power supply layer and the signal layer are adjacent to each other. Although the power layer and the signal layer adjacent to the power layer have been described above, similar effects can be expected by considering a layer including a power source and a ground instead of the power layer.

FIG. 5 is a flowchart showing a procedure for designing the printed circuit board shown in FIGS.

First, it is checked whether or not the signal pattern intersects a boundary between a plurality of power supply regions (step 1). If so, it is checked whether or not there is a region of the same voltage in the intersecting power supply regions (step 2).

If there is no power supply region of the same voltage, a capacitor is arranged beside the signal pattern between the power supply regions. If there is a power supply region of the same voltage, a power supply of the same voltage is formed by a wiring pattern arranged in parallel with the signal pattern. At least one of the regions
Are connected (step 3).

Further, for a power supply region having a different voltage that is not connected or intersected with the previous wiring pattern, a capacitor is arranged between the power supply region connected to the previous wiring pattern and near the signal pattern. (Step 4). The layout of the wiring patterns is selected so as to minimize the number of capacitors. Next, if there is another signal pattern to be wired, this operation is repeated until there is no more signal pattern to be wired (step 5).

According to the design apparatus of the present invention, a printed circuit board is designed to allow a return current to flow near a signal pattern without dividing a return path of a return current of a signal pattern by a non-conductive region formed at a boundary of a power supply region. be able to.

Further, an apparatus for automatically mounting a wiring pattern on a printed circuit board is checked for whether or not a signal pattern crosses a boundary between a plurality of power supply regions.
A function to check if there is the same voltage area in the crossing power supply areas.If there is no power supply area with the same voltage, place a capacitor beside the signal pattern between the power supply areas, and if there is a power supply area with the same voltage, A function of connecting at least one of the power supply regions of the same voltage with a wiring pattern arranged in parallel with the pattern; for a different power supply region of a voltage not connected to or intersecting with the wiring pattern, the power supply region is connected to the wiring pattern; Between the power supply region, and the function of arranging a capacitor in the vicinity of the signal pattern, the arrangement of the wiring pattern is a function of selecting the number of capacitors as small as possible, if there is another signal pattern to be wired,
By providing a function that repeats this work until there is no signal pattern to be wired, the non-conductive area that can be the boundary of the power supply area can close the return current to the signal pattern without breaking the return current of the current flowing through the signal pattern. A flowing wiring pattern manufacturing apparatus can be constructed.

FIGS. 6 to 8 show the effect of suppressing the radiated electric field when the present invention is applied.

FIG. 6 is a view of the microstrip line substrate 29 prepared for examining the effect of suppressing the radiated electric field as viewed from the ground plane 30 side. The size is 230
The dimensions are mm × 150 mm × 1.6 mm, and the material is glass epoxy resin having a relative dielectric constant of about 4.8.

In the vicinity of the center of the ground plane 30, 40
There is an opening 31 of mm × 40 mm. Ground plane 30
In the signal layer on the opposite side to the above, a signal pattern 32 and a wiring pattern 33 are arranged in parallel with the signal pattern 32 over the opening. The pattern 33 has the same width as the signal pattern, and is wired with a distance of 1 mm from the signal pattern.
Both ends of the wiring pattern 33 are connected to the ground plane 30.

FIG. 7 shows a configuration of an apparatus used for measuring a radiation electric field. The measurement was performed in a small simple dark room, and the radiated electric field was measured by a network analyzer 35 using a biconical antenna 36. The antenna 36 has a height of 12
It was fixed in a horizontal direction of 0 cm, and the substrate 29 was placed on a wooden desk such that the signal pattern 32 was parallel to the antenna 36. The distance between the antenna 36 and the substrate 29 was about 2.4 m.

FIG. 8 shows the result of measuring the radiated electric field.
The solid line represents the result when the opening 31 of the ground plane 30 is covered with the copper foil and the wiring pattern 33 is not attached, and the wavy line represents the result when the opening 31 is not covered and the wiring pattern 33 is not attached. The dashed line indicates the radiated electric field in the case where the opening 31 is not closed and the wiring pattern 33 is attached according to the present invention.

Comparing the solid line with the wavy line, the presence of the opening 31 increased the radiated electric field. On the other hand, comparing the dashed line with the one-point dashed line, when the opening 31 is provided, the radiation pattern is reduced by about 10 dB in the range of 10 MHz to 200 MHz by attaching the wiring pattern 33. This is opening 3
This is because when there is 1, the return current of the signal pattern 32 cannot flow through the ground plane immediately below the signal pattern, bypasses the opening, and the loop area formed by the signal pattern and the path of this return current increases. On the other hand, when the printed circuit board of the present invention to which the wiring pattern 33 is attached is used, since the return current flows through the pattern 33, the loop area formed by the signal pattern and the return current path is reduced.

[0053]

The current flowing through the signal pattern and its return current are denoted by I ₁ and I ₂ respectively, the area of the loop formed by I ₁ and I ₂ is A, the distance in the direction perpendicular to the loop surface is r, and the frequency is f Then, the electric field E radiated in the direction perpendicular to the loop surface is E = 131.6 × 10 ⁻¹⁶ × (f ² AI) (1 / r) [V / m] (1) where | I | = | I ₁ | = | I ₂ |.

Equation (1) is a loop formed by the signal pattern and the return current, for example, when three clearances are arranged side by side and the signal pattern passes through the center of the clearance row slit, compared with the case where the clearance does not overlap. This indicates that the area is increased about three times and the radiated electric field is also tripled.

Therefore, by using the structure of the present invention, by leaving a conductor region between the clearances, the loop formed by the signal pattern and the return current path can be reduced, and a printed circuit board in which unnecessary electromagnetic wave radiation is suppressed can be manufactured. it can.

Further, according to the present invention, since three or more clearances do not overlap, unnecessary electromagnetic waves radiated even when the clearance intersects with another signal pattern can be small, so that the clearance and the signal pattern overlap. It is possible to save time for checking and rearranging.

Further, according to the present invention, since the conductor region is provided in the power supply layer or the ground layer between the clearances, it is possible to wire a signal pattern on the signal layer thereabove.

According to the second printed circuit board of the present invention, by arranging a wiring pattern connecting at least one of the power supply regions of the same voltage in parallel with the signal pattern, the path of the signal pattern and the return current can be changed. The loop to be made can be made smaller, and a printed circuit board with less unnecessary radiation of electromagnetic waves can be manufactured.

Further, according to the printed circuit board of the reference example, the restriction on the place where the signal pattern is arranged is reduced as compared with the case where the signal pattern is bypassed. In addition, this structure is suitable for high-density mounting of printed circuit boards because it is not necessary to place a capacitor at the boundary every time the signal pattern crosses the boundary of the power supply area, and it can be applied to the inner signal layer. Are suitable.

[Brief description of the drawings]

FIG. 1 is a partially cut-away configuration diagram of a printed circuit board according to a first embodiment of the present invention.

FIG. 2 is a flowchart of a printed circuit board design showing the first embodiment of the present invention.

FIG. 3 is a partially cutaway configuration diagram of a printed circuit board showing a reference example of the present invention.

FIG. 4 is a partially cut-away configuration view of a printed circuit board showing another example of the reference example of the present invention.

FIG. 5 is a flowchart of a printed circuit board design showing a reference example of the present invention.

FIG. 6 is a diagram showing a configuration of a printed circuit board according to the present invention.

FIG. 7 is a configuration diagram of a radiation electric field measuring device.

FIG. 8 is a diagram showing a result of measuring a radiation electric field according to the present invention.

FIG. 9 is a diagram showing a conventional method for designing a printed circuit board.

FIG. 10 is a diagram showing a structure of a conventional printed circuit board.

FIG. 11 is a diagram showing a configuration of a printed circuit board according to a conventional technique.

FIG. 12 is a diagram illustrating a configuration of a printed circuit board according to the related art.

FIG. 13 is a diagram showing a configuration of a printed circuit board according to a conventional technique.

[Explanation of symbols]

 1, 4, 8, 11 Signal layer 2, 9 Power layer 3, 10 Ground layer 5, 14, 20, 32 Signal pattern 6, 15, 21 Via hole 7 Clearance 12, 13, 17, 18, 19 Power region 16, 22 , 33 Wiring pattern 29 Microstrip line 30 Ground plane 31 Opening 35 Network analyzer 36 Antenna 100 Capacitor

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int. Cl. ⁷ , DB name) H05K 3/46

Claims (3)

(57) [Claims] 1. A printed circuit board having a signal layer, a power supply layer, and a ground layer, wherein signal patterns are arranged at intervals larger than a radius of a clearance, via holes are arranged on each of the signal patterns, and 2 patterns 1
Think of the bundle as a set, the via holes in the same set should be close enough to isolate the via holes from each other, and
The clearance of the surroundings is unified and arranged on the signal pattern, and the distance between the centers of the via holes of the different sets of via holes is longer than the sum of the diameter of the clearance and the width of one signal pattern. A printed circuit board, wherein the printed circuit board is disposed on the upper side and a clearance is provided around each of the via holes. 2. A method for designing a printed circuit board having a signal layer, a power supply layer, and a ground layer, wherein a region where a clearance is to be formed is determined by a large frame, and a signal pattern is disposed within the region at a distance equal to or larger than the clearance radius. then the signal pattern and a set of two bundles, via holes on the signal patterns in the same set should be close degree the via hole with each other not in contact 且
The clearances around each of the three adjacent signal patterns are unified and temporarily arranged, and the distance between the centers of the via holes on the adjacent signal patterns in the different pairs is the diameter of the clearance and the signal pattern 1. A method for designing a printed circuit board, wherein the printed circuit board is disposed so as to be longer than the sum of the width of the printed circuit board. 3. A device for automatically mounting a signal pattern on a printed circuit board, a function of deciding a region where a clearance is to be formed in a large frame, and arranging a signal pattern in said region at a distance equal to or greater than the radius of the clearance; 2 patterns 1
A pair of flux, the bi via holes on the signal pattern
Close the holes so that they do not touch each other and
The function of temporarily disposing the clearance of the enclosure and temporarily disposing it. For the via holes of different sets, the distance between the centers of adjacent via holes of different sets is longer than the sum of the diameter of the clearance and the width of one signal pattern. An apparatus for producing a wiring pattern on a printed circuit board, said apparatus having a function of arranging via holes so as to form a via hole.