JP3302253B2 - Information encoding / decoding method and apparatus - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information encoding / decoding method for encoding and compressing information and decoding the compressed code to restore the information.

[0002]

2. Description of the Related Art A facsimile using data transmission, especially using a telephone network, has been used in various fields because of its convenience. A facsimile encodes a target image, transmits the image, and decodes the image again to obtain an original image. The image is usually treated as a binary image, and the image is compressed on the transmitting side and decompressed on the receiving side by encoding / decoding processing to obtain an information amount suitable for transmission.

In a host-based printer that creates an image by a host computer and transfers the image to a printer, the host compresses the image and decompresses the image on the printer to obtain an information amount suitable for transfer. .

An arithmetic code maps a symbol sequence to be coded on a probability number line obtained by dividing the symbol sequence in accordance with the appearance probability of the symbol, expresses the position as a binary decimal number, and outputs it as a code sequence. .

As for the concept of arithmetic coding, Yasuda (author)
"International Standard for Multimedia Coding" (Maruzen Co., Ltd.)
Is described in That is, the arithmetic code is a method in which a corresponding section on the number line (0, 1) is divided into unequal lengths according to the occurrence probability of each symbol, and the target symbol sequence is assigned to the corresponding partial section, and recursively. Coordinates of points included in the section obtained by repeating the division are expressed as at least binary decimal numbers that can be distinguished from other sections, and used as codes.

Therefore, the arithmetic code is used for encoding a binary image, and an arithmetic coder for generating the arithmetic code decomposes a target image into necessary pixels to obtain an example of a one-pixel encoding model. This will be explained. The arithmetic encoder supplies the target symbol sequence to the one-pixel coding model unit and also supplies the symbol sequence to the one-pixel arithmetic coding unit.
The output of the pixel coding model unit is input to a one-pixel arithmetic coding unit, and the one-pixel arithmetic coding unit generates an arithmetic code based on the information.

In other words, the one-pixel coding model unit sets the positive integer m> 1, and determines the one pixel of interest as a symbol “0” or a symbol “0” from the state of neighboring m pixels that appear before the pixel of interest to be encoded. Assuming that the probability of the symbol “1” is a conditional probability P, each of the P (target pixel “0”:
(State) or P (pixel of interest “1”: state). The one-pixel arithmetic coding unit performs a division selection process of a number line on a target symbol sequence using the conditional probability P as a coding parameter to generate an arithmetic code.

[0008]

However, in such conventional arithmetic coding, neighboring pixel data is accessed for each target pixel, a predicted state corresponding to the neighboring pixel pattern is calculated, and the predicted state is calculated. The symbol appearance probability must be calculated for each pixel, and the encoding operation must be performed for each pixel.
The compression ratio per unit time considering the processing time is small,
Therefore, it takes a long time to process an image in which pixels are integrated, which is not technically satisfactory. The same applies to the decoding of the compressed code.

[0009]

SUMMARY OF THE INVENTION Accordingly, in an information encoding method for predicting and arithmetically encoding information of interest from reference information that appeared before the information of interest, a method of encoding information of interest and reference information each comprising a plurality of pieces of information. The pattern of the information sequence of interest, which is composed of sequences and is predicted corresponding to the reference information sequence, is compared with the pattern of the information sequence of interest to be predicted, and if each pattern matches, the arithmetic code corresponding to the match Was generated. Further, in a decoding method of information that predicts the target information from the reference information that appeared before the target information and decodes the arithmetic code, the target information and the reference information are each configured by an information sequence including a plurality of pieces of information. Determining whether the symbol corresponding to the information sequence matches the divided section, and if so, decoding the pattern of the information sequence of interest predicted corresponding to the reference information sequence as an arithmetic code And

[0010]

In particular, since the information of interest is composed of an information sequence composed of a plurality of pieces of information to form an information sequence, when compared with a reference information sequence composed of an information sequence of a plurality of pieces of information, the target information sequence of interest becomes Is compared with the predicted pattern of the information sequence of interest, the processing of the information sequence of interest is performed collectively, and the processing amount per unit time increases.

[0011] Further, the information of interest and the reference information are each composed of an information sequence composed of a plurality of information, and it is determined whether or not the symbol corresponding to the reference information sequence matches the divided section. Since the pattern of the information sequence of interest predicted corresponding to the reference information sequence is decoded as an arithmetic code, the processing amount per unit time similarly increases.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a conceptual diagram of arithmetic coding for explaining this embodiment.

As information, it is assumed that the Markov information source is represented by binarized symbols for the pixels constituting the image, and in FIG. 1, a number line (0.0...
0, 1.0... 0) are divided into unequal lengths according to the occurrence probabilities of the respective symbols, and the target symbol sequence is assigned to the corresponding sub-period. And sequential encoding of a matching symbol sequence.

In FIG. 1, the number line is divided into two parts (0.0 ...
0) is assigned to the corresponding corresponding section, and (1.0...
The one closer to 0) is assigned to the corresponding section that does not match. When the non-coincidence symbol sequence is an n-bit pattern, the encoding is performed when the non-coincidence corresponding section is equally divided into (2 n) powers.
This is performed by allocating a corresponding section to a divided section whose binary coordinates whose origin is the starting point of the non-matching corresponding section and whose starting point is a coordinate that matches the n-bit pattern.

FIG. 2 is an example of an image specifically explaining the arithmetic coding. One square represents one pixel, a blank square indicates the symbol "0", and a hatched square indicates the symbol "
1 ". Therefore, the prediction of the target pixel for encoding in units of n pixels is performed by setting the state of the reference pixel of m pixels to the prediction state. Here, as an example, m = n =
Eight, that is, 1-byte pixels of 8 bits are used as a symbol sequence, and prediction is performed using a reference pixel indicated on a reference line located immediately above a coding line indicating a target pixel.

FIG. 3 is an encoding block diagram showing the present embodiment. In the image memory 1, a binary pixel to be encoded is stored as a target symbol in accordance with an address. The buffer unit 2 is provided with a reference buffer 21 for reading the contents of the image memory 1 by designating an address and storing the read data as a reference symbol sequence, and a register of interest 22 for storing the reference symbol sequence.

The encoding model unit 3A includes a reference buffer 2
1, a state predicting unit 31 for predicting a symbol sequence of interest based on the reference symbol sequence and selecting a symbol sequence to be used for comparison, and storing the pattern of the symbol sequence selected by the state prediction unit 31 and the register 22 of interest. The pattern matching determination unit 32 that compares the patterns of the selected symbol sequence of interest and determines whether or not they match, and the state prediction unit 31 that selects the pattern of the symbol sequence to be used for comparison when they do not match. And a prediction rule learning unit 33 that issues an instruction to change the prediction rule.

The arithmetic code encoder 4A forms an arithmetic code from the symbol sequence of interest stored in the register of interest 22 based on the coincidence information when the pattern coincidence judging unit judges that they match. Note that the encoding model unit 3A
Is also provided with a division ratio learning unit 34 that learns the division ratio of the divided section for the match / mismatch.

Further, m and n will be described in detail as positive integers. The state prediction unit 31 predicts the Markov state of the pattern of the symbol sequence of n pixels from the pattern of the symbol sequence of m pixels, and predicts the pattern of the prediction table set according to the count [state value] of the update counter. With reference to pattern [state value], in each of the states (2 m) that the reference pixel m can take, appearance is predicted with the highest probability among the states (2 n) that the target pixel n can take. Select the pattern of the symbol series. The prediction rule learning unit 33 has an update counter, and issues an instruction to update the prediction table of the state prediction unit 31 in the course of encoding based on the value of the update counter. The arithmetic coding unit 4A includes a section register A described later to store a symbol sequence of a section corresponding to coding, and a code register C described later to store a symbol to be coded.
Note that the section register A has a number of bits corresponding to the accuracy of dividing the number line, and the code register C has the (2 * register A
Bit number).

It is to be noted that, assuming that the reference pixel is m = 7 and the pixel of interest is n = 8, a value obtained by dividing the compression rate obtained by encoding the symbol sequence by the time required for this compression, that is, the unit time compression rate is obtained. And 8.33 in the present embodiment, whereas in the conventional JBIGQM-coder, the value is 2.33.
66, which is about three times higher.

FIG. 4 is a flowchart of an encoding process showing the operation of the present embodiment. The binary image is scanned in the address order with respect to the image memory, and the reference m pixels are encoded in units of n pixels of interest. Things. This will be described with reference to FIG.

In step s1, the arithmetic coding unit 4A
, The section register A and the sign register C are initialized.
In step s2, the register of interest 22 is initialized. In step s3, the prediction table pat of the state prediction unit 31
turn and the update counter co of the prediction rule learning unit 33
Unt is initialized, and the division parameter K of the division ratio learning unit 34 is set to 1.

In step s4, the position of the pixel of interest is initialized. In step s5, the image memory 1 is accessed,
The n pixels to be encoded are read, and the symbol series of interest is stored in the register of interest 22. In step s6,
Further, the image memory 1 is accessed, and m pixels of the reference symbol sequence are read out and stored in the reference buffer 21.

In step s7, the state prediction unit 31
Based on the pattern of the prediction table, the target n-pixel is predicted from the reference m-pixel, with the state value of the target n-pixel = pattern [state value of the reference m-pixel]. The state value of the n-pixel of interest takes a value from 1 to (2 to the n-th power) and is associated with the pattern of the n-pixel in advance, and the state value of the reference m-pixel is 1 to (2 to the m-th power). The value is taken and associated in advance with the m pixel pattern. In step s8, the pattern matching determination unit 32 compares the predicted n-pixel pattern with the focused n-pixel pattern and determines whether there is a match.

In step s9, since the predictions match, the arithmetic coding unit 4A performs arithmetic coding on the target pixel with a symbol indicating the match. Step s10 is a case where the predictions do not match.
Arithmetic coding is performed on the target pixel with a symbol indicating mismatch, and n-bit mismatch information is encoded.
In step s11, the prediction rule learning unit 33 updates the prediction rule based on the mismatched n-bit information.

In step s12, it is determined whether or not the encoding has been completed for all pixels subjected to arithmetic encoding. In step s13, since the coding has not been completed, the next position of interest is set, and the same coding process is repeated.

FIG. 5 is a processing flowchart showing the encoding of the matching symbol sequence described in step s9 of FIG.
In FIG. 1, the matching symbol sequence corresponds to the section having the smaller divided coordinates, and the non-matching symbol sequence is
It corresponds to the section with the larger divided coordinates. Further, K and M are each a positive integer.

In step s21, in the arithmetic coding unit, for the section register A, the section already selected is re-divided, and the calculation is performed as the section of the coincident symbol, and ｛A− (2−K power) ) Store｝. Steps
Reference numeral 22 determines whether or not the section register A is shifted to the left by an appropriate number of bits K in the msb direction and terminated by an appropriate number of digits. Return if unnecessary. Step s2
3 is a necessary case, the section register A and the sign register C are shifted in the direction of K bits msb to normalize the section.

In step s24, the division ratio learning section determines whether or not the shift has been performed in the interval register A and the code register C M times in the direction of K bits msb in the matching symbol sequence encoding process. . If not, return. Since step s25 is a case where K is performed, K is incremented by 1 to increase the corresponding section of the matching symbol.

FIG. 6 is a flowchart of the encoding process of the mismatched symbol sequence described in step s10 of FIG.

In FIG. 1, it is assumed that the coincident symbol corresponds to the section having the smaller divided coordinates, and the non-matching symbol corresponds to the section having the larger divided coordinates. B is a positive integer.

In step s31, the arithmetic coding unit 4A
In the code register C, the content of C is {A-
(2Kth power)} is added and stored, and the code point is shifted to the start point of the corresponding section of the mismatched symbol. In step s32, the code register C is shifted in the K-bit msb direction and normalized. In step s33, K bits m
It is determined whether or not the shift has been continuously performed M times in the sb direction. Step s34 is a case where the operation is continuously performed, in which K is decremented by 1 and the corresponding section of the mismatched symbol is increased.

In step s35, even if the processing is not performed continuously, the unmatched n bits B are added and stored in the code register C, and the code point is shifted to the start point of the corresponding section of the unmatched n bits. I do. In step s36, the code register C is shifted in the direction of n bits msb and normalized. Step s37 is for the section register A,
FIG. 7 is a flowchart of updating the prediction rule described in step s11 of FIG. Note that an arbitrary fixed value, a state value of a reference m pixel, and a state value of an n-pixel of interest are shown as an integer S and positive integers Vm and Vn, respectively.

At step s41, the count value count
It is determined whether [Vm] is smaller than the fixed value S to determine whether to update the prediction rule. Step s42,
In the case of updating, in the prediction table, the state value pattern [Vm] of the reference m pixel is set to the state value Vn of the focused n pixel, and the count value count [Vm] is cleared. Step s43 is a case where updating is not performed, and the count value count [Vm] of the state of the m-pixel of interest is set by decrementing the count value count [Vm] by one.

FIG. 8 is a block diagram of an encoder showing a specific example of this embodiment.

An n-bit register RE is stored in an image memory h1 in which a binary pixel to be encoded according to an address is stored.
Gh2 and an n-bit buffer RAMh3 are connected. Register REGh2 has table RAMh4,
The comparator COMPh5 and the selector SELh6 are connected. The table RAM is stored in the buffer RAMh3.
h4 is connected. The table RAMh4 is a prediction table for performing Markov state prediction of m pixels to n pixels. The table RAMh4 obtains contents as prediction values by using addresses as table reference indexes.

The section register AREGh7 has a subtractor SUB.
h8 is connected to one input of the selector SELh6 and the other input of the subtractor SUBh8 is connected to the division register RE.
Gh9 is connected, and the output of the subtractor SUBh8 is input to the section register AREGh7. The division register AREGh9 stores the ratio (2−K) for dividing the section A.
), The operation of (K−1) is performed by shifting in the direction of the most significant bit MSB, and the operation of (K + 1) is performed by shifting in the direction of the least significant bit LSB.

The selector SELh6 is connected to one input of the adder h10, and the output of the adder h10 is connected to the other input of the adder h10 via the code register CREGh11. 8-bit code register CREGh11
Has a shift-out function and supplies an arithmetic code to the code memory h12 by overflow from the most significant bit MSB. The control unit CONTh13 controls each unit as appropriate. The function of the division ratio learning unit 34 is CONTh1
3 is incorporated.

Now, taking the image shown in FIG. 2 as an example, the operation of a specific example configured as described above will be described with reference to FIGS. 4, 5 and 6. The hexadecimal representation of the one-byte pattern is represented by () HEX. The current state of the prediction table in the encoding process is as follows.

(F0) HEX = pattern [(E0) HEX] (EE) HEX = pattern [(DE) HEX] where m = n = 8, A = S = K = 1, count [] =
0, C = 0.

First, from CONTh13 to the image memory h1
And designates an address, and inputs data (F0) HEX of the pixel of interest on the encoding line to REGh2. Further, an address is designated from the CONTh 13 to the image memory h1, and the image memory h1 is accessed, and the data (E0) HEX of the reference pixel on the reference line is input to the RAM h3.

The data (E0) HEX is read from the RAMh3 and used as an address of the RAMh4, and the data (F0) HEX is read from the RAMh4. By COMPh5,
The output (FO) HEX of REGh12 and the output (FO) HEX of RAMh4 are compared. In this case, the comparison results match. Therefore, from COMPh5 to CON
A match control signal is output toward Th13. SUB
In h8, the ratio of REGh9 (2-1 power) is subtracted from the initial value 1 of AREGh7. The result is ARE again
Gh7.

AREGh7 and CREGh11 are each shifted by one bit in the direction of the most significant bit MSB. As a result, the value of AREGh7 is normalized to 1,
The symbol “0” is output from CREGh11 as a code and stored in the code memory h12. CONTh13
Makes an end determination, and since the processing has not been completed, the encoding is continued for the next pixel.

[0044] An address is designated from CONTh13 to the image memory h1, and the data (EF) HEX of the pixel of interest on the encoding line is input to REGh2. In addition, CO
An address is designated from NTh13 to the image memory h1 to access the same, and the data (DE) of the reference pixel on the reference line
HEX is input to RAMh3.

The data (DE) HEX is read from the RAMh3 to be an address of the RAMh4, and the data (EE) HEX is read from the RAMh4. By COMPh5,
The output (EF) HEX of REGh2 and the output (EE) HEX of RAMh4 are compared. In this case, the comparison results do not match. Therefore, from COMPh5 to CONT
The mismatch control signal is output toward h13. SUB
In h8, the ratio of REGh9 (2-1 power) is subtracted from the initial value 1 of AREGh7. The result is ARE again
Gh7.

Current state: A ... 0.1000 SELh6 selects AREGh7 as an input and CRE
The content of Gh11 and the content of AREGh7 are added in ADDh10 and stored in CREGh11.

Current state: C ... 0.1000000000 CREGh11 is shifted by one bit toward MSB.
As a result, the symbol “1” is output from CREGh11.

Current state: C: 01.000000000 Code memory: 01 SELh6 selects REGh2 as input, and CREG
The content of h11 and the content of REGh2 are added in ADDh10 and stored in CREGh11.

Current state: state of C... 01.11101111 CREGh11 is shifted by n bits in the MSB direction.

Current state: C: 01111101111.000000000 Code memory: 0111101111 The mismatch writing signal from COMPh5 sets the writing of RAMh4 to write enable we, and rewrites RAMh4 with the contents (EF) HEX of REGh2. The CONT determines the end and continues the process until all the encoding is completed.

According to these examples, the pixels of interest are collectively encoded as a symbol sequence, so that the time required to output the code can be reduced.

FIG. 9 is a decoding block diagram showing the present embodiment. The decoded binary pixels are stored as target symbols in the image memory 1 in accordance with the addresses. The buffer unit 2 is provided with a target register 22 for reading the contents of the image memory by designating an address and storing the read contents as a target symbol sequence, and a reference buffer 21 for storing the reference symbol sequence.

The decoding model unit 3B includes a reference buffer 2
State predicting unit 3 that predicts a symbol sequence of interest based on the reference symbol sequence stored in No. 1 and selects a symbol sequence.
1 and a section match determination unit 35 for determining whether the symbol of the code to be predicted is in a matching corresponding section or a non-matching corresponding section. And a prediction rule learning unit 33 that issues an instruction to change the prediction rule.

When it is determined by the section match determination section 35 that the symbols match, the arithmetic code decoding section 4B converts the symbol sequence predicted by the state prediction section 31 based on the match information into the symbol of the symbol series of interest. And stored in the image memory 1. Note that the decoding model unit 3B is also provided with a division ratio learning unit 34 that learns the division ratio of the divided section for the match / mismatch.

Further, m and n will be described in detail as positive integers. The state prediction unit 31 predicts a Markov state of a pattern of a symbol sequence of n pixels from a pattern of a symbol sequence of m pixels.
[State value] of the prediction table set in accordance with the count [state value] of the update counter of
, And in each of the states (2 m) that the reference pixel m can take, the symbol sequence pattern that is expected to appear with the highest probability among the states (2 n) that the pixel of interest n can take Select The prediction rule learning unit 33 provides an update counter, and issues an update instruction in the process of encoding the prediction table of the state prediction unit 31 based on the value of the update counter. Arithmetic code decoding section 4B is provided with a section register A described later to store a symbol sequence of a section corresponding to decoding,
A decoding register C described later is provided to store a symbol sequence to be decoded. The section register A has a number of bits corresponding to the accuracy of dividing the number line, and the decoding register C has an accuracy of (2 * the number of bits of the register A) or more.

FIG. 10 is a flowchart of a decoding process showing the operation of the present embodiment. The target code is decoded in units of n pixels of interest with respect to m reference pixels, and the binary image is stored in the image memory. On the other hand, they are stored in address order. This will be described with reference to FIG.

In step s41, the section register A of the arithmetic code decoding section is initialized and stored in the decoding register C from the head of the target code. Note that the decryption register C is m
The code is shifted in from lsb by the shift in the sb direction. In step s42, the register of interest 22 and the reference buffer 21 are initialized. In step s43, the update counter of the prediction rule learning unit 33 is initialized in the prediction table of the state prediction unit 31, and the division parameter K of the division ratio learning unit 34 is set to 1.

In step s44, the pixel position of interest is initialized. In step s45, the image memory 1 in which the reference symbol sequence is already stored is accessed, and the reference m-pixel symbol sequence used for decoding prediction is read and stored in the reference buffer 21.

In step s46, the section match determination section 35
It is determined whether the target code is in a divided section indicating a matching symbol sequence or a mismatching symbol sequence. If the content of the decoding register C is smaller than (the value obtained by subtracting the power of 2−K from the content of the section register A), this code exists in the division section of the matching symbol, otherwise it exists in the non-matching section. It will be.

In step s47, the state prediction unit 31 determines that the state value of the n-pixel of interest = pattern [state value of the reference m-pixel] based on the pattern of the pattern table, since the state exists in the matching symbol section. The target n pixel is predicted from the reference m pixel. The state value of the n-pixel of interest takes a value from 1 to (2 to the n-th power) and is associated with the pattern of the n-pixel in advance, and the state value of the reference m-pixel is 1 to (2 to the m-th power). The value is taken and associated in advance with the m pixel pattern.

In step s48, the arithmetic code decoding unit 4
At B, since the prediction matches, the decoding is performed with the symbol indicating the match for the pixel of interest. In step s49, since the prediction is mismatched, decoding is performed with a symbol indicating mismatch for the target pixel, and mismatch n-bit information is transmitted. In step s50, the prediction rule learning unit 33 updates the prediction rule based on the mismatched n-bit information.

In step s51, it is determined whether or not decoding has been completed for all pixels subjected to arithmetic code decoding. In step s52, since decoding has not been completed, decoding is performed for all pixels in the same manner.

FIG. 11 is a processing flowchart showing decoding of the matched symbol sequence described in step s48 of FIG. In FIG. 1, a matching symbol corresponds to a section having a smaller divided coordinate, and a non-matching symbol corresponds to a section having a larger divided coordinate. K is a positive integer.

Step s61 is the same as that of the arithmetic code decoder 4B.
In the section register A, the section already selected is re-divided, a calculation is performed as a section of a matching symbol, and {A- (2−K power)} is stored. In step s62, the section register A is shifted in the msb direction by the number of bits K, and it is determined whether or not the section register A is to be terminated with an appropriate number of digits. Return if unnecessary. Step s63
Is necessary, the section register A and the decoding register C are shifted in the direction of K bits msb to normalize the section.

In step s64, in the division ratio learning unit, the shift in the direction of K bits msb in the position decoding process is performed on the section register A and the code register C by M.
It is determined whether the operation has been performed consecutively. If not, return. Since step s65 is a case where K is performed, K is incremented by 1 to increase the corresponding section of the matching symbol.

FIG. 12 is a flowchart of the decoding process of the mismatched symbol sequence described in step s49 of FIG. In FIG. 1, a matching symbol corresponds to a section having a smaller divided coordinate, and a non-matching symbol corresponds to a section having a larger divided coordinate.
B is a positive integer.

Step s71 is an arithmetic code decoding section 4B
In the decoding register C, {A- (2K)} is subtracted from C and stored, and the code point is shifted to the start point of the corresponding section of the mismatched symbol. In step s72, the decoding register C is shifted by K bits in the msb direction and normalized. A step s73 decides whether or not the shift in the direction of the K-bit msb in the non-coincidence decoding process has been continuously performed M times in the decoding register C. Step s74 is a case where the operation is continuously performed, in which K is decremented by 1 and the corresponding section of the mismatched symbol is increased.

In step s75, the lower n bits of the contents of the decoding register C are obtained as decoded n bits. Step s76 subtracts n bits B that do not match from the decoding register C and stores the result, even if they are not performed consecutively. In step s77, the decoding register C is shifted in the direction of n bits msb and normalized.
A step s78 stores 1 in the section register A.

FIG. 13 is a block diagram of a decoder showing a specific example of this embodiment. The output of the image memory 1 in which the binary pixels decoded according to the target code are stored,
n-bit register REGh2 and buffer RAMh
The output of the table RAMh4 connected to the buffer RAMh3 to which the selector 3 is connected is one input of the selector SELh14. The table RAMh4 is a table for performing Markov state prediction of m pixels to n pixels, and obtains the contents as addresses and the contents thereof as prediction values. Here, m = n = 8, that is, 8 bits.

The section register AREGh7 has a subtractor SUB.
h8 is connected to one input of the selector SELh6 and the other input of the subtractor SUBh8 is connected to the division register RE.
Gh9 is connected, and the output of the subtractor SUBh8 is input to the section register AREGh7. The division register AREGh9 stores the ratio (2−K) for dividing the section A.
), The operation of (K−1) is performed by shifting in the direction of the most significant bit MSB, and the operation of (K + 1) is performed by shifting in the direction of the least significant bit LSB.

The selector SELh6 is a subtractor SUBh15
, And the result of the subtraction is applied to the decoding register C
The other input to the subtractor SUBh15 via REGh11, and the positive / negative sign is supplied to the control unit CONTh13. An 8-bit code register CREGh11 stores a code of a target image in a code memory h12.
And supplies the decoded symbol sequence to the other input of the selector SELh14 with the lower 8 bits as decoded 8 bits. The control unit CONTh13 controls each unit as appropriate. The function of the division ratio learning unit 34 is incorporated in the control unit CONTh13.

Now, taking the image shown in FIG. 2 as an example, the operation of the concrete example thus constructed will be described with reference to FIGS. 10, 11 and 12. FIG. The hexadecimal representation of the one-byte pattern is represented by () HEX. The current state of the prediction pattern table in the encoding process is as follows.

(F0) HEX = pattern [(E0) HEX] (EE) HEX = pattern [(DE) HEX] where m = n = 8, A = S = K = 1, count [] =
Set to 0.

First, the code memory h12 is stored in CREGh11.
, The target code is stored from the beginning of the code.

An address is designated from the CONTh 13 to the image memory h1, and the data (E0) HEX of the reference pixel on the reference line is input to the RAM h3. SU
The content 1 of AREGh7 is input to Bh8, and the content of REGh9 (2-1 power) is subtracted.
To be stored.

Current state: A: 0.1000 AREGh7 is selected by SELh6, and its contents are set to SUB.
h15, subtracted from the contents of CREGh11,
As a result, a negative sign is supplied to CONTh13. CO
In NTh13, it is determined that the target code exists in the matching section.

Therefore, the contents of RAMh3 (E0) HEX
(F0) HEX is read using the address of RAMh4 as an address. CONTh13 has already determined that the target code is present in the matching section,
AMh4 is selected, the address of the image memory h1 is designated, and the (F0) HEX symbol is stored at the pixel position of interest and decoded.

The contents of AREGh7 and the contents of CREGh11 are each shifted by one bit in the direction of the MSB.

[0079] The CONTh 13 determines the end of the decoding, and since the decoding is not completed, the decoding continues for the next code.

An address is designated from the CONTh 13 to the image memory h 1 to access the same, and the data (DE) HEX of the reference pixel on the reference line is input to the RAM h 3. SU
The content 1 of AREGh7 is input to Bh8, and the content of REGh9 (2-1 power) is subtracted.
To be stored.

Current state: A: 0.1000 AREGh7 is selected by SELh6, and its contents are set to SUB
h15, subtracted from the contents of CREGh11,
As a result, a positive sign is supplied to CONTh13. CO
In NTh13, it is determined that the target code exists in the mismatched section.

The result of SUBh15 is stored in CREGh11.

Current state: C ... 0.01110111 The contents of CREGh11 are shifted by one bit toward the MSB.

Current state: C... 0.11101111 Because of mismatch processing, SELh14 is CREGh11
Is selected, the lower 8 bits of CREGh11 are decoded to 8 bits, the address of the image memory is designated, the (EF) HEX symbol is stored and decoded at the pixel position of interest, and further stored in REGh2.

REGh2 is selected by SELh6, and SUB
At h15, the content (EF) HEX of REGh2 is subtracted from the content of CREGh11 and stored in CREGh11.

Current state: C: 0.000000000000 The contents of CREGh11 are shifted by 8 bits toward the MSB, and 1 is input from CONTh13 to AREGh7.

[0087] The CONTh 13 makes an end determination, and continues the same processing until all decoding is completed.

According to these examples, the target pixel to be decoded is grouped into a symbol sequence, and the decoding process is performed.
The time required to output the decoded image can be reduced.

FIG. 14 shows an example of the configuration of a copy code used in another embodiment of the present invention. The copy code consists of a copy pattern area following the header area. In the header area, a bit indicating the number of matches as a continuous offset pattern is stored after a bit indicating the number of mismatches in prediction as a continuous copy pattern. In the copy pattern area, the bit pattern in the prediction mismatch is inserted by the number of times of mismatch.

When the mismatch following the prediction match does not continue, a copy code is formed in the same manner, and the copy codes are sequentially connected. Here, the mismatch pattern of prediction is called a copy pattern, and the matching pattern is called an offset pattern. Note that the same reference numerals are given to the units having the same functions as those of the present embodiment represented by FIG. 3 and FIG.

FIG. 15 is an encoding block diagram showing a modified example according to the first embodiment. In the encoding block diagram shown in FIG. 3, an arithmetic encoding unit 4A is provided. , A copy code encoding unit 6A. The code memory 7 stores the copy code shown in FIG. The other components are the same as those in FIG.

When the pattern match judging unit 32 judges that the codes match, the copy code encoding unit 6A forms a copy code from the symbol sequence of interest stored in the register of interest 22 based on the coincidence information. .

FIG. 16 is a flowchart of an encoding process showing an operation of a modification according to the first embodiment. In the coding processing flow chart shown in FIG. 4, the matching symbol coding processing is performed in step s9, and the mismatching symbol and mismatching n-bit coding processing are performed in step s10. The n-pixel of interest is encoded as an offset, and in step s89, the n-pixel of interest is encoded as a copy pattern. Other steps are the same as those in FIG. Although the encoding process has been described with reference to FIG. 4, steps different from those in FIG. 4 will be described.

In step s88, since the predictions match, the copy code encoding unit 7 encodes the copy code as an offset pattern for the pixel of interest. In step s89, since the prediction does not match, a copy code is encoded as a copy pattern for the pixel of interest.

In particular, the operation of steps s88 and s89 will be described with reference to the image shown in FIG. The hexadecimal representation of the one-byte pattern is represented by () HEX. The current state of the prediction pattern table in the encoding process is as follows.

(F0) HEX = pattern [(E0) HEX] (EE) HEX = pattern [(DE) HEX] Note that m = n = 8, A = B = K = 1, and C = 0.

In step s88, after receiving the processing in step s87, the pixel of interest is encoded as an offset pattern, and is passed to the processing in step s91. The copy code is composed of only 8 bits in the header area. The upper four bits indicate the number of mismatches, and the lower four bits indicate the number of matches.

Current state: copy code 00000001 In step s89, after receiving the process in step s87, the pixel of interest is encoded as a copy pattern, and is passed to the process in step s90. The copy code is composed of a header area 8 bits and a copy pattern area 8 bits (E
F) HEX.

Current state: copy code ... 0001000111101111 FIG. 17 is a decoding block diagram showing a modified example according to the first embodiment. In the coding block diagram shown in FIG. However, a copy code decoding unit 6B is provided instead. The code memory 7 stores the copy code shown in FIG. The other parts are the same as those in FIG.

Now, in the copy code decoding section 6B, when it is determined by the section match determination section 36 that there is a match, the symbol sequence predicted by the state prediction section 31 based on the match information is used as the symbol sequence of interest. It is stored in the image memory 1 as a symbol.

FIG. 18 is a flow chart of the decoding process showing the operation of the modified example according to the first embodiment. The target code is decoded for the reference m pixels in units of n pixels of interest.
The binary image is stored in the image memory 1 in address order. In the flowchart of the decryption process shown in FIG.
At 48, decoding is performed with a symbol indicating a match for the target pixel. Instead, the n-pixel pattern predicted at step s108 is decoded to the target pixel position.
Similarly, in step s49, decoding is performed using a symbol indicating mismatch for the target pixel. Instead, in step s109, the n pixels in the copy pattern are decoded to the target pixel position. Other steps are the same as the steps in FIG. Although the decoding process has been described with reference to FIG. 10, the contents of steps different from those in FIG. 10 will be described.

In step s108, since the predictions match, the copy code decoding unit 6B decodes the target pixel with a symbol indicating the match. In step s49, since the prediction is mismatched, the pixel of interest is decoded with a copy pattern indicating the mismatch, and the mismatched n-bit information is transmitted.

In particular, the operation of a specific example relating to steps s108 and 109 will be described with reference to the image shown in FIG. The hexadecimal representation of the one-byte pattern is represented by () HEX. The current state of the prediction pattern table in the encoding process is as follows.

(F0) HEX = pattern [(E0) HEX] (EE) HEX = pattern [(DE) HEX] where m = n = 8, A = K = 1, count [] = 0,
Let C = 0.

In step s108, step s107
, The predicted n-pixel pattern is decoded to the pixel position of interest, and is passed to the process of step s111. (F
0) HEX is decoded.

In step s109, after receiving the process in step, the n pixels of the copy pattern are decoded to the position of the pixel of interest, and the process passes to step s110. (EF) H
EX is decrypted.

Now, a second embodiment of the present invention will be described with reference to the drawings. The second embodiment is different from the first embodiment in that each element is provided as shown in each drawing. For the same functions as those in the first embodiment, the same elements are used. Description is omitted. When the drawings referred to in the first embodiment are used, the description will be made with reference to the corresponding drawings and partially modified.

FIG. 19 is an example of an image specifically explaining the arithmetic coding. In the example of the image described with reference to FIG. 2, the arrangement of the pixels is partially changed.

FIG. 20 is an encoding block diagram showing a specific example according to the second embodiment. A block update determination unit 8 is provided for the block diagram described with reference to FIG.

The pattern update determining section 8 includes a state predicting section 31
When the condition related to the pattern update set between the pattern of the symbol series selected in step 2 and the pattern of the target symbol series stored in the target register 22 is satisfied, the pattern of the target symbol series stored in the target register 22 is It is determined whether or not to rewrite with the pattern of the symbol sequence predicted by the prediction unit 31.

FIG. 21 is a flowchart of an encoding process showing the operation of the second embodiment. The flowchart shown in FIG. 4 is provided with a step s14 for determining the replacement of the n-bit pattern of interest and a step s15 for performing the replacement.

Step s14 is the case where the prediction is not matched, and if the condition for replacing the n-bit pattern of interest with the predicted pattern is satisfied, step s15
Performs the replacement of the n-bit pattern of interest, and branches to step s9. If the replacement condition is not satisfied in step s14, the flow branches to step s10.

FIG. 22 is a block diagram of an encoder showing a specific example of the second embodiment. The block diagram illustrated in FIG. 8 is provided with a subtractor h13, a table RAMh14, a table RAMh15, and a logical product ANDh16.

The table REGh2 is stored in the table REGh2.
4, one input of the comparator COMPh5, the selector SELh6, and the subtractor SUBh13 and the table RAMh15
Is connected. The output of table RAMh4 is RE
Gh2, comparator COMPh5, and subtractor SUBh14
Is connected to the other input. The output of the subtractor SUBh14 is connected to the table RAMh15. Outputs of the table RAMh15 and the table RAMh16 are integrated by a logical product ANDh17, and the control unit CONTh
13 is output. The table RAMh15 is a table used to output a signal indicating whether or not a difference (difference pattern) between the value of the register REGh2 and the value of the table RAMh4 permits updating of the pixel pattern of interest. The table RAMh16 stores the register REGh2.
Is a table used to look at the target pixel pattern and output a signal indicating whether or not the pattern can be updated.

Now, taking the image shown in FIG. 19 as an example, the operation of a specific example configured in this way will be described with reference to FIGS. 21, 5 and 6. The hexadecimal representation of the one-byte pattern is represented by () HEX. The current state of the prediction table in the encoding process is as follows.

(F2) HEX = pattern [(E2) HEX] (FE) HEX = pattern [(DE) HEX] Note that m = n = 8, A = S = K = 1, and count [] =
0, C = 0.

The table RAMh14 stores the register R
When the bit pattern of EGh2 and the bit pattern of table RAMh4 are different by one bit, a signal for permitting the update is output. Table RAMh15 permits the update when the bit pattern of register REGh2 switches white and black three or more times. It shall output a signal.

First, from CONTh13 to the image memory h1
And designates an address, and inputs data (F6) HEX of the pixel of interest on the encoding line to REGh2. Further, an address is designated from the CONTh 13 to the image memory h1, and the image memory h1 is accessed, and the data (E2) HEX of the reference pixel on the reference line is input to the RAM h3.

The data (E2) HEX is read from the RAMh3 and used as an address of the RAMh4, and the data (F2) HEX is read from the RAMh4. By COMPh5,
The output (F6) HEX of REGh12 and the output (F2) HEX of RAMh4 are compared. In this case, the comparison results do not match. Then, when the difference between the output (F6) HEX of the register REGh2 and the output (F2) HEX of the RAMh is obtained by SUBh14, the pattern of the difference is 1 bit, and the RAMh15 outputs an update permission signal.

The output of the register REGh2 (F6)
In the HEX pattern, white and black are switched three or more times, so that a signal permitting updating is output from the RAMh16. These two outputs are combined by ANDh17 to generate CO2.
The content of REGh2 is input to NTh13 and is rewritten by the output of RAMh4 based on the control of CONTh13. In this case, REGh2 and R
Since the outputs of AMh4 coincide, the coincidence control is performed by CONTh13. In SUBh8, the ratio (2-1 power) of REGh9 is subtracted from the initial value 1 of AREGh7.
The result is stored again in AREGh7.

AREGh7 and CREGh11 are each shifted by one bit in the direction of the most significant bit MSB. As a result, the value of AREGh7 is normalized to 1,
The symbol “0” is output from CREGh11 as a code and stored in the code memory h12. CONTh13
Makes an end determination, and since the processing has not been completed, the encoding is continued for the next pixel.

[0122] An address is designated from CONTh13 to the image memory h1, and the data (EF) HEX of the pixel of interest on the encoding line is input to REGh2. In addition, CO
An address is designated from NTh13 to the image memory h1 to access the same, and the data (DE) of the reference pixel on the reference line
HEX is input to RAMh3.

The data (DE) HEX is read from the RAMh3 and used as an address of the RAMh4, and the data (FE) HEX is read from the RAMh4. By COMPh5,
The output (EF) HEX of REGh2 and the output (FE) HEX of RAMh4 are compared. In this case, the comparison results do not match. Therefore, from COMPh5 to CONT
The mismatch control signal is output toward h13.

When the difference between the output (EF) HEX of REGh2 and the output (FE) HEX of RAMh4 is obtained by SUBh14, the pattern of the difference is 2 bits.
An update rejection signal is output from h15. Therefore C
In ONTh13, mismatch control is performed. SUBh8
Then, the ratio of REGh9 (2-1 power) is subtracted from the initial value 1 of AREGh7. The result is again AREG
h7.

Current state: A ... 0.1000 SELh6 selects AREGh7 as input, and CRE
The content of Gh11 and the content of AREGh7 are added in ADDh10 and stored in CREGh11.

Current state: C ... 0.1000000000 CREGh11 is shifted by one bit toward the MSB.
As a result, the symbol “1” is output from CREGh11.

Current state: C ... 01.0000000000 Code memory ... 01 SELh6 selects REGh2 as an input, and CREG
The content of h11 and the content of REGh2 are added in ADDh10 and stored in CREGh11.

Current state: state of C... 01.11101111 CREGh11 is shifted by n bits in the MSB direction.

Current state: C: 01111101111.000000000 Code memory: 0111101111 By the mismatch signal from COMPh5, writing to RAMh4 is set to write enable we, and RAMh4 is rewritten with the contents (EF) HEX of REGh2. CONTh
In step S13, the end is determined, and the processing is continued in the same manner until the encoding is completed.

When the image shown in FIG. 19 is encoded according to the first embodiment, the code stored in the code memory is 18 bits. However, when the image is encoded according to the second embodiment. By updating the first information sequence of interest (F6) to (F2), the predictive accuracy is increased, and the code stored in the code memory is reduced to 10 bits.

Therefore, since image reconstruction is adaptively performed in the course of encoding, the predictive accuracy for the information sequence of interest is improved, the encoding efficiency is increased, and the output code amount is small. Become.

Now, with reference to FIGS. 10, 11 and 12, the operation of a specific example configured as shown in FIG. 13 using the image shown in FIG. 19 as an example will be described. In addition, 1
The hexadecimal representation of the byte pattern is represented by () HEX. The current state of the prediction pattern table in the encoding process is as follows.

(F2) HEX = pattern [(E2) HEX] (FE) HEX = pattern [(DE) HEX] Note that m = n = 8, A = S = K = 1, and count [] =
Set to 0.

First, code memory h12 is stored in CREGh11.
, The target code is stored from the beginning of the code.

An address is designated from the CONTh 13 to the image memory h1, and the data (E2) HEX of the reference pixel on the reference line is input to the RAM h3. SU
The content 1 of AREGh7 is input to Bh8, and the content of REGh9 (2-1 power) is subtracted.
To be stored.

Current state: A: 0.1000 AREGh7 is selected by SELh6, and its contents are set to SUB.
h15, subtracted from the contents of CREGh11,
As a result, a negative sign is supplied to CONTh13. CO
In NTh13, it is determined that the target code exists in the matching section.

Therefore, the contents of RAMh3 (E2) HEX
(F2) HEX is read with the address of RAMh4. CONTh13 has already determined that the target code is present in the matching section,
AMh4 is selected, the address of the image memory h1 is designated, and the (F2) HEX symbol is stored at the pixel position of interest and decoded.

The contents of AREGh7 and the contents of CREGh11 are each shifted by one bit in the direction of MSB.

[0139] The CONTh 13 determines the end of the decoding, and since the decoding is not completed, the decoding continues for the next code.

An address is designated from the CONTh 13 to the image memory h1, and the data (DE) HEX of the reference pixel on the reference line is input to the RAM h3. SU
The content 1 of AREGh7 is input to Bh8, and the content of REGh9 (2-1 power) is subtracted.
To be stored.

Current state: A: 0.1000 AREGh7 is selected by SELh6, and its contents are set to SUB.
h15, subtracted from the contents of CREGh11,
As a result, a positive sign is supplied to CONTh13. CO
In NTh13, it is determined that the target code exists in the mismatched section.

The result of SUBh15 is stored in CREGh11.

Current state: C ... 0.01110111 The contents of CREGh11 are shifted by one bit toward the MSB.

Current state: C... 0.11101111 Because of mismatch processing, SELh14 is CREGh11
Is selected, the lower 8 bits of CREGh11 are decoded to 8 bits, the address of the image memory is designated, the (EF) HEX symbol is stored and decoded at the pixel position of interest, and further stored in REGh2.

REGh2 is selected by SELh6, and SUB
At h15, the content (EF) HEX of REGh2 is subtracted from the content of CREGh11 and stored in CREGh11.

Current state: C: 0.000000000000 The contents of CREGh11 are shifted by 8 bits toward the MSB, and 1 is input from CONTh13 to AREGh7.

[0147] The CONTh 13 makes an end determination, and continues the same processing until all decoding is completed.

According to these examples, the target pixel to be decoded is grouped into a symbol sequence, and the decoding process is performed.
The time required to output the decoded image can be reduced.

FIG. 14 shows a configuration example of a copy code used in the second embodiment of the present invention. The copy code consists of a copy pattern area following the header area. In the header area,
After the bit indicating the number of times of prediction mismatch as a continuous copy pattern, a bit indicating the number of matches as a continuous offset pattern is stored. In the copy pattern area, the bit pattern in the prediction mismatch is inserted by the number of times of mismatch.

When the mismatch following the prediction match does not continue, the copy codes are formed in the same manner, and the copy codes are sequentially connected. Here, the mismatch pattern of prediction is called a copy pattern, and the matching pattern is called an offset pattern. Note that the same reference numerals are given to the units having the same functions as those of the present embodiment represented by FIG. 3 and FIG.

FIG. 23 is an encoding block diagram showing a specific example according to the second embodiment. In the encoding block diagram shown in FIG. 20, an arithmetic encoding unit 4A is provided. , A copy code encoding unit 6A. The code memory 7 stores the copy code shown in FIG. The other parts are the same as those in FIG.

When the pattern match judging unit 32 judges that there is a match, the copy code encoding unit 6A forms a copy code from the symbol sequence of interest stored in the register of interest 22 based on this match information. .

FIG. 24 is a flowchart of an encoding process showing an operation according to the second embodiment. In the encoding process flow diagram shown in FIG. 21, the matching symbol encoding process is performed in step s9, and in step s14, the prediction is mismatched. The condition for replacing the n-bit pattern of interest with the prediction pattern is as follows. If so, in step s15, the n-bit pattern of interest is replaced, and the flow branches to step s9. If the replacement condition is not satisfied in step s14, the flow branches to step s10 to perform a mismatched symbol and a mismatched n-bit encoding process.

Instead, at step s88, the target n
The pixel is encoded as an offset, and in step s89, the n pixels of interest are encoded as a copy pattern. However, the processing of step s93 and step s94 corresponding to step s14 and step s15, respectively, is performed. Other steps are the same as the steps in FIG. Although the encoding process has been described with reference to FIG. 21, steps different from those in FIG. 21 will be described.

At step s88, since the predictions match, the copy code encoding unit 7 encodes a copy code as an offset pattern for the pixel of interest. In step s89, since the prediction does not match, a copy code is encoded as a copy pattern for the pixel of interest.

The operation of a specific example relating to steps s88 and s89 will be described with reference to the image shown in FIG. The hexadecimal representation of the one-byte pattern is represented by () HEX. The current state of the prediction pattern table in the encoding process is as follows.

(F2) HEX = pattern [(E2) HEX] (FE) HEX = pattern [(DE) HEX] Note that m = n = 8, S = K = 1, and C = 0.

In step s88, after receiving the processing in steps s87 and s93, in step s94, the n-bit pattern of interest (F6) HEX is updated to (F2) HEX.
The target pixel is encoded as an offset pattern, and is passed to the process of step s91. The copy code is composed of only 8 bits in the header area. The upper four bits indicate the number of mismatches, and the lower four bits indicate the number of matches.

Current state: copy code ... 00000001 In step s89, steps s87 and s
After receiving the process of step 93, the pixel of interest is encoded as a copy pattern, and the process passes to step s90. The copy code is composed of a header area of 8 bits and a copy pattern area of 8 bits (EF) HEX following the header area.

Current state: copy code... 0001000111101111 Further, the decoding processing flow chart shown in FIG. 18 is also referred to.

In step s108, since the predictions match, the copy code decoding unit 6B decodes the target pixel with a symbol indicating the match. In step s49, since the prediction is mismatched, the pixel of interest is decoded with a copy pattern indicating the mismatch, and the mismatched n-bit information is transmitted.

The operation of a specific example relating to steps s108 and 109 will be described with reference to the image shown in FIG. The hexadecimal representation of the one-byte pattern is represented by () HEX. The current state of the prediction pattern table in the encoding process is as follows.

(F2) HEX = pattern [(E2) HEX] (FE) HEX = pattern [(DE) HEX] Note that m = n = 8, K = 1, and count [] = 0.

In step s108, step s107
, The predicted n-pixel pattern is decoded to the pixel position of interest, and is passed to the process of step s111. (F
2) HEX is decoded.

In step s109, after receiving the processing in step, the n pixels of the copy pattern are decoded to the pixel position of interest, and are passed to the processing in step s110. (EF) H
EX is decrypted.

Now, in order to handle a multi-valued image, information indicating that the image is multi-valued information, for example, a header, is used. Conversion into a continuous binary information sequence or, in decoding, a continuous preprocessing unit B converts a continuous binary information sequence into multivalued information to be decoded, and performs processing suitable for each post-processing. become.

Although the pre-processing unit A is not shown, if it is described with reference to FIG. 3, the image memory 1 and the arithmetic code decoding unit 4A
And the information of interest and the reference information are each composed of an information sequence composed of a plurality of multi-valued information and information indicating that the information is multi-valued information. Converted and stored in the image memory 1.
The information indicating the multi-valued information is sent to the arithmetic coding unit 4A, and is used for controlling the address setting of the image memory 1.

Although the pre-processing unit B is not shown, it will be described with reference to FIG. 9 if the image memory 1 and the arithmetic code decoding unit 4B
And the information of interest and the reference information are each composed of an information sequence composed of a plurality of multi-valued information and information indicating that the information is multi-valued information. Convert to information and output. In addition,
The information indicating that this is multi-valued information is output from the arithmetic code decoding unit 4B, and is used for control such as address setting of the image memory 1.

The embodiments and the specific examples described here may be each realized by a microcomputer.

[0170]

According to the present invention, in particular, since the information of interest is an information sequence composed of an information sequence composed of a plurality of information, the encoding process of the information sequence of interest is performed collectively. Since the image reconstruction for increasing the predictive accuracy is adaptively performed during the encoding process, the amount of processing per unit time is large and the encoding efficiency is improved. Therefore, while using an arithmetic code, the time required to output the code can be reduced, and the amount of output codes can be reduced.

Further, since the information of interest and the reference information are each an information sequence composed of an information sequence composed of a plurality of information, the decoding process of the information of interest is performed collectively, and similarly, Processing volume increases. Therefore, it is possible to reduce the time required to output the decoded image while using the arithmetic code.

Further, it is possible to efficiently handle a multi-valued image, such as an image, which emphasizes gradation.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram of arithmetic coding according to a first embodiment.

FIG. 2 is an example of an image according to the first embodiment.

FIG. 3 is an encoding block diagram according to the first embodiment.

FIG. 4 is a flowchart of an encoding process according to the first embodiment.

FIG. 5 is a flowchart of a matching symbol sequence encoding process according to the first embodiment.

FIG. 6 is a flowchart of a mismatch symbol sequence encoding process according to the first embodiment.

FIG. 7 is a flowchart illustrating a prediction rule update process according to the first embodiment;

FIG. 8 is a block diagram of an encoder showing a specific example according to the first embodiment.

FIG. 9 is a decoding block diagram according to the first embodiment.

FIG. 10 is a flowchart of a decoding process according to the first embodiment.

FIG. 11 is a flowchart of a match decoding process according to the first embodiment.

FIG. 12 is a flowchart illustrating a mismatch decoding process according to the first embodiment;

FIG. 13 is a block diagram of a decoder showing a specific example according to the first embodiment.

FIG. 14 is a configuration example of a copy code according to the first embodiment.

FIG. 15 is an encoding block diagram according to the first embodiment.

FIG. 16 is a flowchart of an encoding process according to the first embodiment.

FIG. 17 is a decoding block diagram according to the first embodiment.

FIG. 18 is a flowchart of a decoding process according to the first embodiment.

FIG. 19 is an example of an image according to the second embodiment.

FIG. 20 is an encoding block diagram according to a second embodiment.

FIG. 21 is a flowchart of an encoding process according to the second embodiment.

FIG. 22 is a block diagram of an encoder showing a specific example according to the second embodiment.

FIG. 23 is an encoding block diagram according to a second embodiment.

FIG. 24 is a flowchart of an encoding process according to the second embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Image memory 2 Buffer part 3A Encoding model part 3B Decoding model part 4A Arithmetic code encoding part 4B Arithmetic code decoding part 5 Code memory 8 Pattern update judgment part

Claims (34)

(57) [Claims] An information encoding / decoding method for predicting information of interest from reference information appearing before information of interest and encoding / decoding an arithmetic code, wherein each of the information of interest and reference information includes a plurality of pieces of information. It is composed of information sequences, and the pattern of the information sequence of interest predicted corresponding to the reference information sequence is compared with the pattern of the information sequence of interest to be predicted. If the respective patterns match, the copy corresponding to the match A code is generated and transmitted, and it is determined whether or not the symbol corresponding to the reference information sequence matches the transmitted copy code in the matching division section of the code, and if so, the reference information sequence is determined. And decoding a pattern of the information sequence of interest predicted corresponding to the information as a copy code. 2. An information encoding method for predicting information of interest from reference information appearing before information of interest and encoding arithmetic codes, wherein the information of interest and reference information are each composed of an information sequence composed of a plurality of pieces of information. Then, the pattern of the information sequence of interest predicted corresponding to the reference information sequence is compared with the pattern of the information sequence of interest to be predicted, and if each pattern matches, a copy code corresponding to the match is generated. A method for encoding information, characterized in that: 3. An information decoding method for predicting target information from reference information that appeared before the target information and decoding an arithmetic code, wherein the target information and the reference information are each composed of an information sequence including a plurality of pieces of information. Then, it is determined whether or not the symbol corresponding to the reference information sequence matches the code matching division section. If the symbols match, the pattern of the information sequence of interest predicted corresponding to the reference information sequence is determined. A method for decoding information characterized by decoding as a copy code. 4. An encoding / decoding apparatus for predicting information of interest from reference information appearing before information of interest and encoding and decoding arithmetic codes, comprising: an information memory storing information to be encoded ; An information buffer storing symbols of the attention information and the reference information; an encoding model unit for predicting the attention information sequence from the reference information sequence and determining whether or not the pattern matches; For example, an encoding device including a copy code encoding unit that encodes a predicted symbol as a target symbol, a code memory that stores the encoded copy code, an information memory that stores information to be encoded, determines the information buffer that stores symbol of interest and reference information, symbols corresponding to the reference information sequence is whether or not the matched the divided sections of the code And No. model unit, if match, the copy code decoding unit for decoding the pattern of interest information sequence that is predicted to correspond to the reference information sequence as a copy code, code for storing the code of interest An encoding / decoding device for information, comprising a decoding device including a memory . 5. A coding device information predicts interest information from the reference information that appeared previously focused information for coding of arithmetic codes, the information memory storing information to be encoded, interest information and the reference An information buffer that stores information symbols, an encoding model unit that predicts a target information sequence from a reference information sequence, and determines whether or not the pattern matches; An information encoding device, comprising: a copy code encoding unit that encodes a symbol as a symbol of interest; and a code memory that stores the encoded copy code. 6. An information decoding apparatus for predicting information of interest from reference information appearing before information of interest and decoding an arithmetic code, comprising: an information memory for storing information to be encoded; and information buffer that stores symbol information, the symbol corresponding to the reference information sequence is determining whether or not decoding model unit is matched the divided sections of the code, if match, the reference information sequence An information decoding apparatus, comprising: a copy code decoding unit that decodes a pattern of a target information sequence predicted correspondingly as a copy code; and a code memory that stores a target code . 7. An encoding / decoding method of information for predicting information of interest from reference information appearing before information of interest and performing encoding / decoding of an arithmetic code, wherein each of the information of interest and reference information includes a plurality of pieces of information. The prediction rule is sequentially updated from the already encoded information sequence, and the pattern of the target information sequence predicted corresponding to the reference information sequence and the pattern of the target information sequence to be predicted are Are generated, and an arithmetic code corresponding to the pattern mismatch is generated and transmitted, and whether the prediction of the information sequence of interest corresponding to the reference information sequence matches the transmitted arithmetic code at the time of encoding is performed. Is determined from the code, the prediction rule is sequentially updated from the already decoded information sequence, and if they match, the information system of interest predicted corresponding to the reference information sequence A coding and decoding method for information, characterized in that a pattern of a column is decoded, and if not coincident, a partial sequence of an arithmetic code is decoded as it is. 8. An information encoding method for predicting information of interest from reference information appearing before information of interest and encoding arithmetic codes, wherein the information of interest and reference information are each composed of an information sequence composed of a plurality of pieces of information. Then, comparing the pattern of the target information sequence predicted corresponding to the reference information sequence with the pattern of the target information sequence to be predicted, sequentially updates the prediction rule from the already coded information sequence, An information encoding method comprising generating an arithmetic code corresponding to a match / mismatch of each pattern. 9. An information decoding method for predicting target information from reference information that appeared before the target information and decoding an arithmetic code, wherein the target information and the reference information are each composed of an information sequence including a plurality of pieces of information. Then, it judges from the code whether or not the prediction for the information sequence of interest corresponding to the reference information sequence matches at the time of encoding, and sequentially updates the prediction rule from the already decoded information sequence. For example, an information decoding method characterized in that a pattern of a target information sequence predicted corresponding to a reference information sequence is decoded, and if they do not match, a partial code of an arithmetic code is decoded as it is. 10. An information encoding / decoding device for predicting information of interest from reference information appearing before information of interest and encoding / decoding arithmetic codes, comprising: an information memory for storing information to be encoded ; The information of interest and the reference information are each composed of an information sequence composed of a plurality of pieces of information. The information buffer storing the symbols of the information of interest and the reference information, and the information of interest is predicted from the reference information. An encoding device comprising: an encoding model unit for judging whether an arithmetic operation is performed; an arithmetic encoding unit for generating an arithmetic code corresponding to a pattern mismatch; and a code memory for storing the encoded arithmetic code. An information memory for storing information of interest, and information of interest and reference information, each of which is composed of an information sequence composed of a plurality of information, and symbols of the information of interest and reference information Decoding information buffer for storing, the prediction for the interest information sequence corresponding to the reference information sequence whether match at the time of encoding is determined from the code, and sequentially updates the prediction rule from information sequence has been decoded Decodes the pattern of the information sequence of interest predicted corresponding to the reference information sequence if it matches the model part, and decodes the partial code of the arithmetic code as it is if it does not match parts and, the coding and decoding apparatus of information comprising the decoding device comprising a code memory for storing code of interest. 11. The encoder of information to predict interest information from the reference information that appeared previously focused information for coding of arithmetic codes, the information memory storing information to be encoded, interest information and the reference Each of the information is composed of an information sequence composed of a plurality of pieces of information , an information buffer for storing the symbol of the information of interest and reference information, and the information of interest sequence is predicted from the reference information sequence, and whether or not the pattern matches is determined. A coding model unit for determining and sequentially updating a prediction rule from an already coded information sequence; an arithmetic code coding unit for generating an arithmetic code corresponding to pattern matching / mismatch; A coding device for information, comprising: a code memory for storing. 12. An information decoding apparatus for predicting information of interest from reference information appearing before information of interest and decoding an arithmetic code, comprising: an information memory for storing information to be encoded; The information is composed of an information sequence composed of a plurality of pieces of information, and an information buffer for storing the symbol of the target information and the reference information , and whether or not prediction for the target information sequence corresponding to the reference information sequence coincides with the encoding process Is determined from the code, and a decoding model unit that sequentially updates the prediction rule from the already decoded information sequence, and, if they match, the pattern of the target information sequence predicted corresponding to the reference information sequence decodes, must match, and arithmetic decoding section to directly decode the partial code of the arithmetic coding, further comprising a code memory for storing code of interest Decoding apparatus information to symptoms. 13. An encoding / decoding method of information for predicting information of interest from reference information appearing before information of interest and encoding / decoding an arithmetic code, wherein the information of interest and the reference information each comprise a plurality of pieces of information. The prediction rule is sequentially updated from the already encoded information sequence, and the pattern of the target information sequence predicted corresponding to the reference information sequence and the pattern of the target information sequence to be predicted are Are generated, and a copy code corresponding to the pattern mismatch is generated and transmitted. Whether or not the transmitted copy code matches the prediction of the target information sequence corresponding to the reference information sequence at the time of encoding Is determined from the code, and the prediction rule is sequentially updated from the already coded information sequence. If they match, the prediction that is predicted corresponding to the reference information sequence An information encoding / decoding method characterized in that a pattern of an information sequence is decoded, and if not coincident, a partial sequence of a copy code is decoded as it is. 14. An information encoding method for predicting information of interest from reference information appearing before information of interest and encoding arithmetic codes, wherein the information of interest and reference information are each composed of an information sequence composed of a plurality of pieces of information. Then, comparing the pattern of the target information sequence predicted corresponding to the reference information sequence with the pattern of the target information sequence to be predicted, sequentially updates the prediction rule from the already coded information sequence, A method for encoding information, characterized by generating a copy code corresponding to a match / mismatch of each pattern. 15. An information decoding method for predicting target information from reference information that appeared before the target information and decoding an arithmetic code, wherein the target information and the reference information each include an information sequence including a plurality of pieces of information. Then, it judges from the code whether or not the prediction for the information sequence of interest corresponding to the reference information sequence matches at the time of encoding, and sequentially updates the prediction rule from the already encoded information sequence. For example, an information decoding method characterized in that a pattern of a target information sequence predicted corresponding to a reference information sequence is decoded, and if they do not match, a partial code of a copy code is decoded as it is. 16. An information encoding / decoding apparatus for predicting information of interest from reference information appearing before information of interest and encoding / decoding arithmetic codes, comprising: an information memory for storing information to be encoded ; The information of interest and the reference information are each composed of an information sequence composed of a plurality of pieces of information, and the information buffer storing the symbols of the information of interest and the reference information , and the information information of interest are predicted from the reference information sequence. An encoding model unit for determining whether or not there is a pattern, a copy code encoding unit for generating a copy code corresponding to the pattern mismatch, and a code memory for storing the encoded copy code; and An information memory for storing information to be coded, and information of interest and reference information each comprising an information sequence composed of a plurality of pieces of information. Information buffer for storing the symbols of the broadcast, the prediction for focused information sequence corresponding to the reference information sequence is whether or not coincide with the time of encoding is determined determines from code already predicted rule from information sequence is decoded And a decoding model part for sequentially updating the pattern of the information sequence of interest predicted corresponding to the reference information sequence if they match, and if they do not match, the partial code of the copy code remains unchanged and copying code decoding unit for decoding, coding and decoding apparatus of information comprising the decoding device comprising a code memory for storing code of interest. In the encoding apparatus 17. predicts interest information from the reference information that appeared previously focused information for coding of arithmetic codes information, the information memory storing information to be encoded, interest information and the reference the information each constituted by an information sequence comprising a plurality of information, an information buffer for storing symbols of the interest and reference information, predicts interest information sequence from the reference information sequence, whether the pattern matches A coding model unit for determining and sequentially updating a prediction rule from an already encoded information sequence, and a copy code encoding unit for encoding a predicted symbol as a symbol of interest if the patterns match, An information encoding apparatus, comprising: a code memory for storing an encoded copy code. 18. An information decoding apparatus for predicting information of interest from reference information appearing before information of interest and decoding an arithmetic code, comprising: an information memory for storing information to be encoded; The information is composed of an information sequence composed of a plurality of pieces of information, and an information buffer for storing the symbol of the target information and the reference information , and whether or not prediction for the target information sequence corresponding to the reference information sequence coincides with the encoding process Is determined from the code, and a decoding model unit that sequentially updates the prediction rule from the already decoded information sequence, and, if they match, the pattern of the target information sequence predicted corresponding to the reference information sequence decodes, must match, including a copy code decoding unit for directly decoding the partial code of the copying code, and a code memory for storing code to be this Decoding apparatus information according to claim. 19. An encoding / decoding method for predicting information of interest from reference information appearing before information of interest and encoding / decoding arithmetic codes, wherein each of the information of interest and reference information comprises a plurality of pieces of information. It is composed of an information sequence and compares the pattern of the information sequence of interest predicted corresponding to the reference information sequence with the pattern of the information sequence of interest to be predicted. When the condition is satisfied, the pattern of the target information sequence is updated to the pattern predicted corresponding to the reference information sequence, and the pattern predicted for the reference information sequence and the pattern or update of the target information sequence before update are updated. When the pattern of the subsequent information sequence matches, an arithmetic code corresponding to the match is generated and transmitted, and the transmitted arithmetic code corresponds to the system corresponding to the reference information sequence. It is determined whether or not the bol matches the code matching division section. If the bol matches, the information is characterized by decoding a pattern of the target information sequence predicted corresponding to the reference information sequence. Encoding / decoding method. 20. An information encoding method for predicting information of interest from reference information appearing before information of interest and encoding arithmetic codes, wherein the information of interest and reference information are each composed of an information sequence composed of a plurality of pieces of information. Then, the pattern of the information sequence of interest predicted corresponding to the reference information sequence is compared with the pattern of the information sequence of interest to be predicted, and when the condition related to the pattern update set between the two is satisfied, The pattern of the information sequence of interest is updated to the pattern predicted corresponding to the reference information sequence, and the pattern predicted for the reference information sequence and the pattern of the information sequence of interest before update or the information of interest after update A method for encoding information, characterized in that when a sequence pattern matches, an arithmetic code corresponding to the match is generated. 21. An encoding / decoding apparatus for predicting information of interest from reference information appearing before information of interest and encoding and decoding arithmetic codes, comprising: an information memory storing information to be encoded ; An information buffer storing symbols of the attention information and the reference information; an encoding model unit for predicting the attention information sequence from the reference information sequence and determining whether or not the pattern matches; A pattern update unit that updates the pattern of the target information sequence to the predicted pattern when a condition related to the pattern update set between the predicted pattern and the pattern of the target information sequence is satisfied; If the predicted pattern matches the pattern of the target information sequence before update or the pattern of the target information sequence after update, the predicted thin Encoding device comprising an arithmetic coding unit that encodes an encoded arithmetic code as a symbol of interest, a code memory that stores the encoded arithmetic code, an information memory that stores information to be encoded, and information of interest and reference and information buffer that stores symbol information, the symbol corresponding to the reference information sequence is determining whether or not decoding model unit is matched the divided sections of the code, if match, the reference information sequence Coding and decoding of information, comprising: a decoding device including an arithmetic code decoding unit for decoding a pattern of a target information sequence correspondingly predicted , and a code memory for storing a target code. Device . In the encoding apparatus 22. predicts interest information from the reference information that appeared previously focused information for coding of arithmetic codes information, the information memory storing information to be encoded, interest information and the reference and information buffer that stores symbol information, predicts interest information sequence from the reference information sequence pattern the pattern and determining whether or not coding model unit are matched, are predicted to correspond to the reference information sequence A pattern update unit that updates the pattern of the information sequence of interest to the predicted pattern when the condition related to the pattern update set between the pattern of the information sequence of interest and the pattern is satisfied. If the current pattern matches the pattern of the target information sequence before update or the pattern of the target information sequence after update, the predicted symbol is added to the target system. And arithmetic coding encoder unit encoding the Bol encoding device information, characterized in that it comprises a code memory for storing the arithmetic code coded. 23. An encoding / decoding method for predicting information of interest from reference information appearing before information of interest and encoding / decoding arithmetic codes, wherein each of the information of interest and reference information comprises a plurality of pieces of information. It is composed of an information sequence and compares the pattern of the information sequence of interest predicted corresponding to the reference information sequence with the pattern of the information sequence of interest to be predicted. When the condition is satisfied, the pattern of the target information sequence is updated to the pattern predicted corresponding to the reference information sequence, and the pattern predicted for the reference information sequence and the pattern or update of the target information sequence before update are updated. When the pattern of the subsequent information sequence matches, a copy code corresponding to the match is generated and transmitted, and the transmitted copy code corresponds to the reference information sequence. It is determined whether or not the symbol matches the code matching division section, and if so, the pattern of the information sequence of interest predicted corresponding to the reference information sequence is decoded as a copy code. Encoding and decoding information. 24. An information coding method for predicting information of interest from reference information appearing before information of interest and coding arithmetic codes, wherein the information of interest and reference information are each composed of an information sequence composed of a plurality of pieces of information. Then, the pattern of the information sequence of interest predicted corresponding to the reference information sequence is compared with the pattern of the information sequence of interest to be predicted, and when the condition related to the pattern update set between the two is satisfied, The pattern of the information sequence of interest is updated to the pattern predicted corresponding to the reference information sequence, and the pattern predicted for the reference information sequence and the pattern of the information sequence of interest before update or the information of interest after update A method for encoding information, wherein when a pattern of a sequence matches, a copy code corresponding to the match is generated. 25. An encoding / decoding apparatus for predicting information of interest from reference information appearing before information of interest and encoding and decoding arithmetic codes, comprising: an information memory storing information to be encoded ; An information buffer storing symbols of the attention information and the reference information; an encoding model unit for predicting the attention information sequence from the reference information sequence and determining whether or not the pattern matches; A pattern update unit that updates the pattern of the target information sequence to the predicted pattern when a condition related to the pattern update set between the predicted pattern and the pattern of the target information sequence is satisfied; If the predicted pattern matches the pattern of the target information sequence before update or the pattern of the target information sequence after update, the predicted thin Coding apparatus that encodes a copy code as a symbol of interest, a coding memory that stores a coded copy code, an information memory that stores information to be coded, and information of interest and reference and information buffer that stores symbol information, the symbol corresponding to the reference information sequence is determining whether or not decoding model unit is matched the divided sections of the code, if match, the reference information sequence A copy code decoding unit for decoding a pattern of the information sequence of interest correspondingly predicted as a copy code, and a decoding device including a code memory for storing a target code; Encoding / decoding device . In the encoding apparatus according to claim 26 predicts interest information from the reference information that appeared previously focused information for coding of arithmetic codes information, the information memory storing information to be encoded, interest information and the reference An encoding model unit for predicting an information sequence of interest from an information buffer storing information symbols and a reference information sequence, and determining whether or not the pattern matches; and a pattern predicted corresponding to the reference information sequence. A pattern updating unit that updates the pattern of the target information sequence to the predicted pattern when a condition related to the pattern update set between the patterns of the target information sequence is satisfied; If the current pattern matches the pattern of the target information sequence before update or the pattern of the target information sequence after update, the predicted symbol is used as the target symbol. And copying code encoding unit encoding a Le encoding device information, characterized in that it comprises a code memory storing a copy code encoded. 27. An encoding / decoding method of information for predicting information of interest from reference information appearing before information of interest and performing encoding / decoding of an arithmetic code, wherein the information of interest and the reference information each include a plurality of pieces of information. The prediction rule is sequentially updated from the already encoded information sequence, and the pattern of the target information sequence predicted corresponding to the reference information sequence and the pattern of the target information sequence to be predicted are Are compared, and when the condition related to the pattern update set between the two is satisfied, the pattern of the information sequence of interest is updated to the pattern predicted corresponding to the reference information sequence, and the pattern corresponding to the reference information sequence is updated. Generate and send an arithmetic code corresponding to the mismatch between the predicted pattern and the pattern of the information sequence before update or the pattern of the information sequence after update, and send For the obtained arithmetic code, it is determined from the code whether or not the prediction for the information sequence of interest corresponding to the reference information sequence was consistent at the time of encoding, and the prediction rule is sequentially updated from the already decoded information sequence, If they match, the pattern of the information sequence of interest predicted corresponding to the reference information sequence is decoded. If they do not match, the partial sequence of the arithmetic code is decoded as it is. Decryption method. 28. A method for encoding arithmetic information by predicting target information from reference information that appeared before the target information and encoding the arithmetic code, wherein the target information and the reference information are each composed of an information sequence including a plurality of pieces of information. Then, comparing the pattern of the target information sequence predicted corresponding to the reference information sequence with the pattern of the target information sequence to be predicted, sequentially updates the prediction rule from the already coded information sequence, When the condition related to the pattern update set between the two is satisfied, the pattern of the target information sequence is updated to the pattern predicted corresponding to the reference information sequence, and the pattern is predicted corresponding to the reference information sequence. A code for information characterized by generating an arithmetic code corresponding to a match / mismatch between the pattern and the pattern of the target information sequence before update or the pattern of the target information sequence after update. Method of. 29. An information encoding / decoding device for predicting information of interest from reference information appearing before information of interest and encoding / decoding an arithmetic code, comprising: an information memory for storing information to be encoded ; The information of interest and the reference information are each composed of an information sequence composed of a plurality of pieces of information, and the information buffer storing the symbols of the information of interest and the reference information , and the information information of interest are predicted from the reference information sequence. An encoding model unit for determining whether or not there is a pattern of a target information sequence when a condition related to a pattern update set between a pattern predicted corresponding to the reference information sequence and a pattern of the target information sequence is satisfied; A pattern updating unit that updates the pattern to a predicted pattern, a pattern predicted corresponding to the reference information sequence, and a pattern of the target information sequence before the update Alternatively, an encoding device comprising: an arithmetic code encoding unit that generates an arithmetic code corresponding to the pattern mismatch of the updated information sequence of interest; and a code memory that stores the encoded arithmetic code. information memory for storing information, each of interest and reference information constituted by information sequence comprising a plurality of information, an information buffer for storing symbols of the interest and reference information, interest information corresponding to the reference information sequence A decoding model for judging from the code whether or not the prediction for the sequence matched at the time of encoding, and sequentially updating the prediction rule from the already decoded information sequence. Arithmetic code decoding that decodes the pattern of the information sequence of interest that is predicted corresponding to the information sequence, and decodes the partial code of the arithmetic code as it is if they do not match If, coding and decoding apparatus of information comprising the decoding device comprising a code memory for storing code of interest. 30. A coding device information predicts interest information from the reference information that appeared previously focused information for coding of arithmetic codes, the information memory storing information to be encoded, interest information and the reference the information each constituted by an information sequence comprising a plurality of information, an information buffer for storing symbols of the interest and reference information, predicts interest information sequence from the reference information sequence, whether the pattern matches An encoding model unit for determining and sequentially updating the prediction rule from an already encoded information sequence, and relating to a pattern update set between a pattern predicted corresponding to a reference information sequence and a pattern of a target information sequence. A pattern updating unit that updates the pattern of the target information sequence to the predicted pattern when the condition is satisfied; An arithmetic code encoding unit that generates an arithmetic code corresponding to a pattern mismatch between the pattern of the target information sequence before update or the pattern of the target information sequence after update, and a code memory that stores the encoded arithmetic code. An information encoding device, comprising: 31. An encoding / decoding method for predicting information of interest from reference information appearing before information of interest and encoding / decoding arithmetic codes, wherein each of the information of interest and reference information comprises a plurality of pieces of information. The prediction rule is sequentially updated from the already encoded information sequence, and the pattern of the target information sequence predicted corresponding to the reference information sequence and the pattern of the target information sequence to be predicted are Are compared, and when the condition related to the pattern update set between the two is satisfied, the pattern of the information sequence of interest is updated to the pattern predicted corresponding to the reference information sequence, and the pattern corresponding to the reference information sequence is updated. Generate and send a copy code corresponding to the mismatch between the predicted pattern and the pattern of the target information sequence before update or the pattern of the target information sequence after update, and send For the copied copy code, it is determined from the code whether or not the prediction for the information sequence of interest corresponding to the reference information sequence was matched at the time of encoding, and the prediction rule is sequentially updated from the already encoded information sequence, If they match, the pattern of the information sequence of interest predicted corresponding to the reference information sequence is decoded, and if they do not match, the partial sequence of the copy code is decoded as it is. Decryption method. 32. A method for encoding arithmetic information by predicting target information from reference information that appeared before the target information and encoding the arithmetic code, wherein the target information and the reference information are each composed of an information sequence composed of a plurality of pieces of information. Then, comparing the pattern of the target information sequence predicted corresponding to the reference information sequence with the pattern of the target information sequence to be predicted, sequentially updates the prediction rule from the already coded information sequence, When the condition related to the pattern update set between the two is satisfied, the pattern of the target information sequence is updated to the pattern predicted corresponding to the reference information sequence, and the pattern is predicted corresponding to the reference information sequence. Generating a copy code corresponding to a match between the pattern and the pattern of the target information sequence before update or the pattern of the target information sequence after update; Goka way. 33. An information encoding / decoding apparatus for predicting information of interest from reference information appearing before information of interest and encoding / decoding an arithmetic code, comprising: an information memory for storing information to be encoded ; The information of interest and the reference information are each composed of an information sequence composed of a plurality of pieces of information, and the information buffer storing the symbols of the information of interest and the reference information , and the information information of interest are predicted from the reference information sequence. An encoding model unit for determining whether or not there is a pattern of a target information sequence when a condition related to a pattern update set between a pattern predicted corresponding to the reference information sequence and a pattern of the target information sequence is satisfied; A pattern updating unit that updates the pattern to a predicted pattern, a pattern predicted corresponding to the reference information sequence, and a pattern of the target information sequence before the update Alternatively, an encoding device including a copy encoding unit that generates a copy code corresponding to the pattern mismatch of the updated information sequence of interest and a code memory that stores the encoded copy code; information memory for storing information, each of interest and reference information constituted by information sequence comprising a plurality of information, an information buffer for storing symbols of the interest and reference information, interest information corresponding to the reference information sequence A decoding model for judging from the code whether or not the prediction for the sequence matched at the time of encoding, and sequentially updating the prediction rule from the already decoded information sequence. Decodes the pattern of the information sequence of interest predicted corresponding to the information sequence, and if they do not match, decodes the partial code of the copy code as is. No. a decoder, encoding and decoding apparatus of information comprising the decoding device comprising a code memory for storing code of interest. In the encoding apparatus 34. predicts interest information from the reference information that appeared previously focused information for coding of arithmetic codes information, the information memory storing information to be encoded, interest information and the reference Each of the information is composed of an information sequence composed of a plurality of pieces of information , an information buffer for storing the symbol of the information of interest and reference information, and the information of interest sequence is predicted from the reference information sequence, and whether or not the pattern matches is determined. A coding model unit for determining and sequentially updating a prediction rule from an already encoded information sequence, and a pattern of a target information sequence being used as a reference information sequence when a condition relating to a pattern update set between the two is satisfied. Is updated to the pattern predicted corresponding to the reference information sequence and the pattern of the target information sequence before the update or after the update If the patterns of the information sequence of interest match, a copy code encoding unit that encodes the predicted symbol as a symbol of interest and a code memory that stores the encoded copy code are provided. Information encoding device.