JP3284926B2 - Voltage controlled oscillator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a voltage controlled oscillator, and more particularly to a voltage controlled oscillator designed with a gate array and a cell-based IC.

[0002]

2. Description of the Related Art The configuration of a conventional voltage controlled oscillator of a semiconductor device will be described with reference to the drawings. FIG. 8 is a diagram showing a circuit configuration of a conventional typical voltage-controlled oscillator.

Referring to FIG. 8, in a conventional voltage controlled oscillator, a control voltage signal 4-1 inputted from outside is provided.
As a result, the N-channel transistor is turned on, and the control voltage of the P-channel transistor is determined by the on-resistance of the N-channel transistor. The oscillation frequency is controlled by the number of stages in ()).

FIG. 9 is a diagram showing a configuration of a voltage controlled oscillator proposed in Japanese Patent Application Laid-Open No. 8-8651. In the voltage-controlled oscillation circuit shown in FIG. 9, when the control signal 4-1 input from the outside changes, the voltage control circuit 4-
The oscillation frequency is controlled by changing the on-resistance of the P-channel transistor PM1 in the first stage of the inverter circuit by the control signal output from 10 and changing the phase of the crystal oscillator 4-4.

This circuit has a compensation circuit 4-11 for stabilizing the oscillation frequency therein. This compensation circuit differentially outputs a reference voltage input and a bias voltage input generated by a reference resistor 4-3. The input is made to the amplifier 4-5, and the output is connected to the gate of the P-channel transistor PMn of the output feedback inverter INVn.

[0006] FIG.
FIG. 1 is a diagram showing a configuration of an oscillation circuit proposed in Japanese Unexamined Patent Application Publication No. 2000-209,004. The circuit shown in FIG. 10 has basically the same configuration as that of FIG.
The number of inverter stages is selected by the selector circuit 4-12 in order to provide a plurality of oscillation frequency ranges.

[0007]

In the above-described conventional voltage controlled oscillator circuit, the oscillation frequency range is single, and
In order to provide a plurality of frequency ranges, a transistor having a plurality of device bipolar transistors is required, which increases a layout area and has a problem in integration.

Furthermore, in this circuit configuration, power supply voltage fluctuation,
In addition, frequency fluctuation due to temperature fluctuation cannot be suppressed, and the characteristics as an oscillator are not good.

Further, in the voltage controlled oscillation circuit shown in FIG. 9, frequency fluctuation can be suppressed, but since a large number of crystal oscillators, resistors and capacitors are used, there is a problem in integration.

[0010] Furthermore, in the configuration shown in FIG. 10, all are composed of transistors, the layout area is small, and there are a plurality of frequency ranges. Cannot be suppressed sufficiently.

Accordingly, the present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device, particularly a voltage controlled oscillator designed with a gate array and a cell-based IC, having a small layout area. Another object of the present invention is to provide a voltage-controlled oscillation circuit having a plurality of frequency ranges and capable of suppressing oscillation frequency fluctuations with respect to power supply voltage and temperature fluctuations.

[0012]

In order to achieve the above object, a voltage controlled oscillation circuit according to the present invention is provided in a voltage controlled oscillator designed with a semiconductor device, particularly, a gate array and a cell-based IC. The circuit has a circuit for generating a plurality of bias voltages therein, and a selector circuit for selecting an arbitrary bias voltage. The arbitrary bias voltage is used as a reference voltage input, and a differential having a large common mode range together with an externally input control voltage. The circuit was configured to input to the amplifier and connect the output of the differential amplifier to the gates of P and N channel transistors in the next and subsequent stages.

[0013]

Embodiments of the present invention will be described. In a preferred embodiment, the voltage-controlled oscillator according to the present invention is supplied with a bias generating circuit (1-1 in FIG. 1) for generating a number of bias voltages and a plurality of bias voltages output from the bias generating circuit. Selector circuit (1-4 in FIG. 2) for selecting and outputting according to the selected signal, and a differential amplifier for inputting a bias voltage output from the selector circuit as a reference voltage input and differentially amplifying the bias voltage together with the input control voltage. (1-2 in FIG. 2)
And the output of the differential amplifier is connected between the first power supply and the second power supply by cascading odd-numbered stages of inverters and connecting the final stage and the first stage to form a ring oscillator. P-channel transistor and N connected to
It is characterized by being connected to the gate of a channel transistor. In the embodiment of the present invention, by selecting the reference voltage input by the selector circuit, a plurality of frequency ranges can be provided for the same control voltage input, and the oscillation frequency can be suppressed with respect to power supply voltage and temperature fluctuation.

[0014]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention;

FIGS. 1 and 2 show the configuration of a first embodiment of the voltage-controlled oscillator according to the present invention. 1 and 2 are merely separated for convenience of drawing.

In this embodiment, the case where the control voltage input supplied from the outside is equal to or lower than the selected reference voltage will be described.

The circuit configuration is roughly divided into four. That is, the bias voltage generation circuit 1-1 (see FIG. 1),
The differential amplifier 1-2 (see FIG. 2A), the inverter circuit 1-3 (see FIG. 2B), and the selector circuit 1-4
(See FIG. 2C).

A bias voltage generating circuit 1 shown in FIG.
-1, a plurality of bias voltages B1, B2, B3,
B4 is input to the selector circuit 1-4 shown in FIG. 2C, and the selector circuit 1-4 selectively outputs an arbitrary bias voltage as a reference voltage (RFV) 1-13.
Incidentally, referring to FIG. 1, the bias voltage generation circuit 1-1
The control signals A1 and A2 from the control circuit shown in FIG. 1 (b) are input to the gates of the P-channel transistor and the N-channel transistor, and ON / OFF is controlled. When the signal EN is at the High level, The bias voltage generation circuit 1-1 is activated. Also referring to FIG.
The selector circuit 1-4 includes transfer gates TG1 to TG4 which receive bias voltages B1 to B4 as inputs and are turned on / off by selection control signals SEL1 to SEL4.

Output (RFV) 1-13 of selector 1-4
Is a control voltage input (VIN) 1-5 supplied from the outside.
At the same time, the transistors 1-6 of the differential amplifier 1-2, 1
Input to each of the -7 gates. The differential amplifier 1
-2 are P-channel transistors PM1 to PM4 whose sources are commonly connected and P-channel transistor PM1
, A P-channel transistor PM5 connected between the common source and the power supply and acting as a constant current source, a control voltage input 1-5, and a reference voltage (RFV) 1-13 from the selector circuit 1-4 as gate inputs. N-channel transistors NM1 and NM2 forming an active load of the differential pair transistors PM1 and PM3, and a control voltage input 1
-5, reference voltage 1-from selector circuit 1-4
13 each having a gate input as a differential pair transistor P
It comprises N-channel transistors NM3 and NM4, which form active loads on M2 and PM4.

The differential amplifier 1-2 has its outputs 1-8, 1-
Since the differential amplifier 9 has a large amplitude and a large common mode range, it operates at any selected reference voltage.

Outputs 1-8, 1-9 of differential amplifier 1-2
Are input to the gates of a P-channel transistor 1-10 and an N-channel transistor 1-11 of an inverter circuit 1-3 (constituting a ring oscillator) to control the on-resistance of each transistor and change the oscillation frequency.

With this circuit configuration, the selector circuits 1-4
When another reference voltage is selected, a different oscillation frequency can be obtained even with the same external control voltage input 1-5, and it is possible to have a plurality of frequency ranges 1-12 (FIG. 3).
reference). FIG. 3 shows the characteristics of the oscillating frequency with respect to the control voltage 1-5 as reference voltages B1 to B4.
Is shown.

The output 1- of the differential amplifier (1-2)
8, 1-9 are P and N of the inverter circuit 1-3, respectively.
The transistors are connected to the gates of the channel transistors 1-10 and 1-11, and the on-resistance of each transistor changes in a direction to compensate for power supply voltage fluctuations and temperature fluctuations, thereby suppressing power supply voltage fluctuations and frequency fluctuations due to temperature fluctuations. Can be

FIGS. 4 to 6 show the configuration of a second embodiment of the voltage controlled oscillator according to the present invention. The case where the externally supplied control voltage input is equal to or higher than the selected reference voltage will be presented. Note that FIGS. 4 to 6 are merely separated for convenience of drawing.

In some embodiments, the outputs 2-8 and 2-9 of the differential amplifier 2-2 are connected to the gate of the N-channel transistor 2-11 and the gate of the P-channel transistor 2-10 of the inverter circuit 2-3, respectively. Connected.

With this circuit configuration, the on-resistance of each transistor changes in the direction to compensate for power supply voltage fluctuations and temperature fluctuations as in the first embodiment, so that frequency fluctuations due to power supply voltage fluctuations and temperature fluctuations can be suppressed.

FIGS. 6 and 7 show the configuration of a third embodiment of the voltage controlled oscillator according to the present invention. 6 and 7 are merely separated for convenience of drawing.

In this embodiment, the bias voltage generation circuit 3-1 and the inverter circuit 3-3 and the selector circuit 3
-4 is the same as in the first embodiment.

Referring to FIG. 7, in this embodiment, there is shown a circuit example in which the differential amplifier 3-2 has a two-stage configuration to increase the common mode range.

That is, in the first stage circuit 3-6, a wide common mode input is narrowed, and amplification is performed in the next stage differential amplifier 3-7 to generate an input signal to the inverter circuit 3-3.

The operation of this embodiment is basically the same as that of the first embodiment,
Same as 2.

In each of the above embodiments, as a circuit configuration example, a transistor that receives an external control voltage input of a differential amplifier is a P-type transistor.
Although the description has been made with the channel transistor, an N-channel transistor may be more effective depending on the value of the common mode range. The circuit configuration in this case can also be configured by simply changing the polarity from the above-described embodiment.

[0033]

As described above, according to the present invention, in a semiconductor device, in particular, in a voltage controlled oscillator designed with a gate array and a cell-based IC, a circuit for generating a plurality of bias voltages in an internal circuit of the oscillator And a selector circuit capable of selecting an arbitrary bias voltage, inputting the arbitrary bias voltage as a reference voltage input to a differential amplifier together with a control voltage input from the outside, and outputting an output of the differential amplifier to a subsequent stage. Is connected to the gates of the P and N channel transistors, the layout area is relatively small, a plurality of frequency ranges are provided, the power supply voltage,
There is an effect that the oscillation frequency can be suppressed with respect to temperature fluctuation.

[Brief description of the drawings]

FIG. 1 is a diagram showing a bias circuit in a voltage controlled oscillator according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating configurations of a differential amplifier circuit, a ring oscillator, and a selection circuit in the voltage-controlled oscillation circuit according to the first embodiment of the present invention.

FIG. 3 is a diagram showing characteristics of the voltage-controlled oscillation circuit according to the first example of the present invention.

FIG. 4 is a diagram showing a bias circuit in a voltage controlled oscillator according to a second embodiment of the present invention.

FIG. 5 is a diagram illustrating a configuration of a differential amplifier circuit, a ring oscillator, and a selection circuit in a voltage controlled oscillation circuit according to a second embodiment of the present invention.

FIG. 6 is a diagram illustrating a bias circuit in a voltage-controlled oscillation circuit according to a third embodiment of the present invention.

FIG. 7 is a diagram illustrating a configuration of a differential amplifier circuit, a ring oscillator, and a selection circuit in a voltage-controlled oscillation circuit according to a third embodiment of the present invention.

FIG. 8 is a diagram showing a circuit diagram of a conventional voltage controlled oscillator.

FIG. 9 is a circuit diagram of a conventional voltage-controlled oscillator (known example 1).
FIG.

FIG. 10 is a diagram showing a circuit diagram of a conventional voltage controlled oscillator (known example 2).

[Explanation of symbols]

1-1, 2-1 and 3-1 Bias voltage generating circuits 1-2, 2-2 and 3-2 Differential amplifier circuits 1-3, 2-3 and 3-3 Inverter circuits 1-4 and 2-4 3-4 Selector circuit 1-5, 2-5, 3-5 Control voltage input 1-6, 1-7, 2-6, 2-7, 3-6, 3-7 Differential amplifier circuit input 1 -8, 1-9, 2-8, 2-9, 3-8, 3-9 Output of differential amplifier circuit 1-10, 1-11, 2-10, 2-11, 3-10,
3-11 Inverter circuit input 1-12 Voltage-frequency characteristics 1-13, 2-13, 3-13 Selected reference voltage input 4-1 Control voltage input 4-2 Oscillator output 4-3 Resistance 4-4 Crystal Oscillator 4-5 Selector circuit

Claims (1)

(57) [Claims] 1. A bias generation circuit for generating a plurality of bias voltages, a selector circuit for selectively outputting a plurality of bias voltages output from the bias generation circuit in accordance with an input selection signal, and a bias output from the selector circuit input from the first input terminal voltage as a reference voltage input, an external
Type more input control voltage from the second input terminal,
The differential voltage between the first and second input terminals is differentially amplified to obtain a first,
A differential amplifier that outputs a differential output from the second output terminal and an odd-numbered stage inverter are cascaded, and a final-stage inverter
Connecting the input of the output and the first-stage inverter, each of the the high-potential power supply terminal of each inverter in the power path drain
And a P- channel transistor whose source is commonly connected to the first power supply , and a low power supply path of each inverter.
Drains are connected to the power supply terminals, respectively.
Bei an N-channel transistor having a source connected in common
Comprising a Ete comprising a ring oscillator, a first output terminal of said differential amplifier, each of said P-channel
The differential amplifier, commonly connected to the gate of a transistor,
A second output terminal of each of the N-channel transistors
A voltage-controlled oscillator , commonly connected to a gate .