JP3275304B2 - Inspection pattern and inspection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inspection pattern and an inspection method, and more particularly to an inspection pattern and an inspection method for detecting a defect of a circuit on each semiconductor chip when a plurality of semiconductor chips are formed on one wafer. It relates to a pattern and an inspection method.

[0002]

2. Description of the Related Art Conventionally, inspection of the inside of a contact hole after an etching process has been performed by observation from above using an optical microscope or an electron microscope. When an optical microscope is used, the state of the remaining inorganic glass film is determined from a change in color, and when an electron microscope is used, it is determined from a change in contrast. In such an inspection method, there is a problem that it becomes difficult to inspect the state of the remaining film in the contact hole as the diameter of the contact hole is reduced and the aspect ratio is increased with miniaturization of the element.

In order to solve the above problem, an inspection pattern for accurately and quantitatively inspecting the state of a residual film inside a contact hole after etching is disclosed in Japanese Patent Laid-Open No. 3-681.
No. 9 (first conventional example). In the inspection pattern described in this publication, an electron beam is irradiated to a region on a diffusion layer constituting a pn junction where an etching process has been performed, and an electron beam induced current induced at the pn junction is detected. Conductivity failure due to the remaining film state in the contact hole after the etching is determined.

[0004] In addition, an inspection method for determining conductivity failure in a contact hole using a secondary electron image is disclosed in ISS.
M'97 PROCEEDING pp99-101 (2nd
Of the related art). In this inspection method, an opening defect in a contact hole for conducting between wirings formed on a semiconductor substrate is detected.

[0005]

In recent years, due to the further integration of semiconductor integrated circuits, it has become impossible to secure a sufficient margin between each part. Increasingly, a contact hole for conducting with a wiring comes into contact with an insulating film. Under such a situation, the inspection pattern and the inspection method in the first and second conventional examples both inspect the contact hole itself. For this reason, the inspection pattern and the inspection method may be applicable to, for example, detection of a defect such that a contact hole for conducting between a silicon substrate and another wiring is short-circuited with a conductive pattern which is originally not conducting. Can not.

SUMMARY OF THE INVENTION In view of the above, the present invention provides an inspection method capable of easily detecting a defect such as a short-circuit between a contact hole that connects a semiconductor substrate and another wiring with a conductive pattern that is not originally conductive. It is an object to provide a pattern and an inspection method.

[0007]

In order to achieve the above object, an inspection pattern of the present invention is an inspection pattern formed on a semiconductor substrate, wherein the inspection pattern is a conductive pattern insulated from the semiconductor substrate. A first contact row which is provided corresponding to each conductive pattern, and is formed of a contact hole in which a conductor is buried in contact with the semiconductor substrate and in contact with each conductive pattern via an insulating film; and An inspection target pattern including a second contact row including a contact hole, which is provided corresponding to the conductive pattern and is electrically connected to each corresponding conductive pattern and has a conductor embedded therein, is insulated from the semiconductor substrate. A row of another conductive pattern, a conductor arranged corresponding to the other conductive pattern, electrically connected to the semiconductor substrate, and separated from the other conductive patterns; Fourth consisting third contact row, and the other is disposed corresponding to the conductive pattern corresponding contact holes respectively conducting to the conductor in each of the conductive pattern is embedded consisting because filled-in the contact hole
And a comparison target pattern comprising a contact row of

[0008] In the inspection pattern of the present invention, for example, the first and second patterns are applied while a predetermined voltage is applied to the semiconductor substrate.
Irradiating the contact row with the electron beam and then collecting the secondary electrons remaining in the first and second contact rows, based on the state of insulation between the contact hole and the conductive pattern in the first contact row. Can be determined. In this case, the brightness increases in the portion where the secondary electrons increase and the secondary electron image becomes white, and conversely, the brightness decreases in the portion where the secondary electrons decrease and the secondary electron image becomes black.
Further, a third contact row composed of a plurality of contact holes that are electrically connected to the semiconductor substrate, and a third contact row composed of a plurality of contact holes that are respectively electrically connected to corresponding conductive patterns.
And a fourth contact row disposed at a distance from the first and second contact rows, so that after the irradiation of the electron beam, the second and third contact rows are emitted together with the secondary electrons emitted from the third and fourth contact rows. A defect in the inspection pattern can be determined based on collecting secondary electrons emitted from the contact row.

[0009]

[0010] Preferably, the first to fourth contact rows are arranged in this order. In this case, an inspection pattern having a simpler configuration can be obtained.

Alternatively, two patterns of the first contact rows are arranged between two rows of the second contact rows to form the pattern to be inspected, and a space between the two fourth contact rows is formed. It is also a preferable embodiment that the third contact row is arranged in two rows to form the comparison target pattern. In this case, an inspection pattern having a simpler configuration can be obtained.

An inspection method according to the present invention is an inspection method using the inspection pattern, wherein the first, second, third and fourth contact rows are applied while a predetermined voltage is applied to the semiconductor substrate. Irradiating an electron beam on the basis of secondary electrons emitted from each of the contact rows, from the secondary electron image in which each of the contact rows of the pattern for inspection and the pattern for comparison have a contrast alternately, It is characterized in that an insulation state between a contact hole in the first contact row and the conductive pattern is determined.

In the inspection method of the present invention, the first, second, third and fourth contact rows are irradiated with an electron beam while a predetermined voltage is applied to the semiconductor substrate, and then the electron beam is emitted from each contact row. Based on the collection of the secondary electrons, the insulation state between the contact hole and the conductive pattern in the first contact row can be determined. In this case, the brightness increases in the portion where the secondary electrons increase and the secondary electron image becomes white, and conversely, the brightness decreases in the portion where the secondary electrons decrease and the secondary electron image becomes black.

[0014]

The present invention will be described in more detail with reference to the drawings. FIG. 1 is a plan view schematically showing an inspection pattern according to the first embodiment of the present invention. The inspection pattern in the present embodiment is formed, for example, with a large number of semiconductor chips on one wafer, and when a contact hole having a defect is detected as a result of the inspection described later, the same applies to the semiconductor chip. This is for determining that a defective contact hole is formed. in this case,
The wafer determined to have a defective contact hole is discarded.

The inspection pattern in this embodiment is
A plurality of polysilicon wiring layers (conductive patterns) 104 insulated from a single conductivity type silicon substrate 21 (FIG. 2) having no diffusion layer, and a silicon substrate 21 provided corresponding to the polysilicon wiring layers 104; And a first contact row composed of a plurality of contact holes 101 electrically connected to the polysilicon wiring layer 104 and insulated from the polysilicon wiring layer 104 via the sidewalls 24 (FIG. 2). A plurality of contact holes 102 respectively connected to the respective polysilicon wiring layers 104 to be formed.
Contact row. The inspection pattern further includes a third contact row including a plurality of contact holes 106 provided corresponding to the polysilicon wiring layer 105 and connected to the silicon substrate 21 and connected to the corresponding polysilicon wiring layers 105, respectively. Multiple contact holes 103
And a fourth contact row disposed separately from the third contact row.

As described above, the first to fourth contact rows are arranged in this order, and the pitch between the contact rows is all set to be the same. Although not shown, the left side of the contact hole 101 in FIG.
03, contact holes 101, 10
2, 106 and 103 are formed in the same positional relationship as in FIG.

FIG. 2 is a cross-sectional view of the test pattern of FIG. 1 along the line AA. Under the contact holes 102 on the silicon substrate 21, a polysilicon wiring layer 10
4 are formed respectively. Each polysilicon wiring layer 104 has
The left end in the figure is formed so as to contact the right end of the contact hole 101 via the sidewall 24, and the right end is formed in a positional relationship not to contact the contact hole 106.

As shown in FIG. 1, underneath each contact hole 103 on the silicon substrate 21, there is a polysilicon layer which is arranged in the same layer as the polysilicon wiring layer 104 shown in FIG. Silicon wiring layers 105 are respectively formed. Each polysilicon wiring layer 105 is designed so that both the left end and the right end in FIG. 1 do not overlap with the respective opening regions of the other adjacent contact holes 106 and 101. The contact hole 106 is designed in consideration of an alignment margin so that it can be opened without using a self-aligned contact having an element structure in which mutual mask alignment does not matter, but the contact hole 102 is formed in a self-aligned manner. . Contact holes 101 and 10
6 is formed simply to conduct to the silicon substrate 21, and the contact holes 102 and 103 are formed to conduct to the polysilicon wiring layers 104 and 105, respectively.

As described above, when a large number of semiconductor chips are formed on one wafer (silicon substrate 21), the intensity or potential of the secondary electrons is compared, and the polysilicon wiring layer 104 is formed.
An inspection pattern for detecting the state of insulation between the contact hole 101 and the contact hole 101 is formed. The inspection pattern has an inspection target pattern including the contact rows of the contact holes 101 and 102 in FIG. 1 and a comparison target pattern including the respective contact rows of the contact holes 106 and 103.

Here, the process of forming the inspection pattern will be described with reference to FIG. First, after a gate oxide film 22 is formed on a silicon substrate 21, a polysilicon wiring layer 104 is formed on the gate oxide film 22, and a silicon oxide film layer 23 is formed on the polysilicon wiring layer 104. Next, the silicon oxide film layer 23 and the polysilicon wiring layer 10 are formed by photolithography and dry etching.
4 are respectively etched to form patterns. Furthermore, CV
After growing the D nitride film, the silicon oxide film layer 23 and the polysilicon wiring layer 1 are subjected to anisotropic dry etching.
The sidewall 24 is formed on the side surface of the substrate 04.

Next, an interlayer oxide film 25 is formed on the silicon substrate 21 and the sidewalls 24, and photolithography and anisotropic dry etching are performed to form contact holes 101 and 102 as shown in FIG. ,
An inspection pattern is formed. Next, after conducting conductive polysilicon is grown in the contact holes 101 and 102, CMP (chemical mechanical polishing) is performed to form conductive polysilicons 26 and 27.

Further, by the same steps as described above, contact holes 106 and 103 are formed, and a polysilicon wiring layer 105 is formed so as not to be exposed in the surrounding contact holes 106 and 101 to form a pattern to be compared. .

The inspection is performed as follows using the inspection pattern having the above configuration. First, after a semiconductor chip and a test pattern are formed on the silicon substrate 21, a constant voltage is applied to the silicon substrate 21. In this state, the wafer including the inspection pattern is set in a predetermined state in an image comparison inspection apparatus (not shown). Next, the image comparison inspection apparatus is operated to irradiate the contact holes 101 and 102 as the inspection target patterns with an electron beam, and the electron holes are emitted into the contact holes 106 and 103 adjacent to the inspection target patterns as the comparison target patterns. Irradiate the beam. Further, a secondary electron image is obtained from each of the inspection target pattern and the comparison target pattern by a predetermined method.

When a substance is irradiated with an electron beam, secondary electrons are generated with respect to the electron beam. The energy of the secondary electrons changes depending on the potential of the irradiated substance. Secondary electrons have emission characteristics peculiar to a substance with respect to the energy amount of a primary energy ray such as an electron beam. When the secondary electrons increase, the brightness increases and the display image becomes white when the secondary electrons increase, and when the secondary electrons decrease, the brightness decreases and the display image turns black.

The inspection by the image comparison inspection apparatus is shifted in the direction of arrow A in FIG. 1, and secondary electrons emitted from the contact holes 101 and 102 and the contact holes 106 and 103 are continuously collected. At this time, the image comparison inspection apparatus includes a region having a certain area including the contact holes 101 and 102, and contact holes 106 and 103.
The secondary electron images corresponding to the area of a certain area including are repeatedly captured and compared. As a result, when a defective contact hole is detected, an image (differential image) corresponding to the defective contact hole is displayed on a monitor, thereby obtaining a pattern as shown in FIG. 5 described later.

FIGS. 3A and 3B are schematic diagrams for explaining the procedure at the time of the above-described inspection. FIG. 3A shows the inspection of the inspection target pattern by the image comparison inspection apparatus, and FIG. 3B shows the inspection target pattern and the comparative inspection pattern. Both are shown.

In FIG. 3A, the contact hole 10 in the inspection target pattern 401 of the inspection pattern 400 is shown.
1 and 102 are irradiated with an electron beam to collect a secondary electron image. Next, in FIG.
The contact holes 106 and 103 in 2 are irradiated with an electron beam to collect a secondary electron image. The value of a pixel in each secondary electron image obtained from both the inspection target pattern 401 and the comparative inspection pattern 402 is a function of the amount of secondary electrons at a position corresponding to the pixel. A difference image can be obtained by taking a value difference between corresponding pixels of each secondary electron image.

Normally, inspection is continuously performed by an image comparison inspection apparatus, and after the inspection is completed, when a contact hole in which a defect is detected is confirmed, a difference image due to secondary electrons is displayed on a monitor so as to be described later. The pattern (FIG. 5) is obtained, and the quality of the contact hole is determined. FIG. 4 is a schematic diagram illustrating an example of the contrast generated during the difference image. In this difference image, 2
A white portion is generated due to an increase in secondary electrons.

FIG. 5 is a schematic diagram showing a change in contrast of a difference image in this embodiment. FIG. 5A shows an example in which a secondary electron image having an alternate contrast is obtained.
2B shows an example in which the polysilicon wiring layer 104 is short-circuited to one of the contact holes 101, and FIG. 2C shows an example in which the contact hole 101 which is originally not charged is charged.

Each example will be described with reference to FIGS. For example, when there is no abnormal state, as shown in FIG. 5A, a secondary electron image in which the contact row alternately has a contrast is obtained. In this case, there is no portion having different contrast in the same contact row.

It is assumed that the polysilicon wiring layer 104 is exposed from the side wall 24 and conducts to the contact hole 101. In this case, in the contact hole 102 where charging is supposed to occur, the charge is transferred to the polysilicon wiring layer
Since the electron moves to the silicon substrate 21 via the substrate 04, the secondary electron emission efficiency changes. The secondary electron image in this case is shown in FIG.
(B), and the brightness of the corresponding area 301 decreases. Therefore, a difference occurs between the intensity of the secondary electrons in the region 302 and the intensity of the secondary electrons, so that the contact hole 102 corresponding to the region 301 can be detected as a defective portion.

If the opening state of the contact hole 101 is defective, the charge is originally released to the silicon substrate 21 and the uncharged contact is charged. Therefore, the secondary electron image is formed as shown in FIG. Is displayed. In this case, 2 of the region 303 corresponding to the contact hole 101 having the poor opening
Since the intensity of the next electron increases, the brightness increases and the image is displayed in white.

On the other hand, if there are defective openings in all the contact holes, the secondary electron images of all the contact holes have the same contrast with each other. Can be detected.

As described above, according to the present embodiment, the short-circuit between the polysilicon wiring layer 104 and the contact hole 101 and the defective opening of the contact hole can be easily reduced particularly when the contact hole is formed in a self-aligned manner. Can be detected.

Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 6 is a plan view schematically showing an inspection pattern according to this embodiment. In the figure,
Parts having the same functions as in FIG. 1 are denoted by the same reference numerals as in FIG.

The inspection pattern in this embodiment is
A plurality of polysilicon wiring layers 104 that are insulated from the silicon substrate 21 (FIG. 2), and are provided corresponding to the polysilicon wiring layers 104, are electrically connected to the silicon substrate 21, and are separated from the polysilicon wiring layers 104 to the side walls 24 (see FIG. 2) a first contact row composed of a plurality of contact holes 101 insulated from each other, and a second contact row composed of a plurality of contact holes 102 respectively connected to the corresponding polysilicon wiring layers 104. The inspection pattern further includes a plurality of contact holes 1 provided corresponding to the polysilicon wiring layer 105 and electrically connected to the silicon substrate 21.
06, and a fourth contact row composed of a plurality of contact holes 103 respectively connected to the corresponding polysilicon wiring layers 105 and separated from the third contact row. Have.

In this embodiment, two second contact rows are arranged before and after, and two first contact rows are arranged between the second contact rows. 210 is configured. Further, two fourth contact rows are arranged before and after the third contact row, and two third contact rows are arranged between the second contact rows to form a comparison target pattern (second pattern to be inspected) 220. And second target patterns 210 and 220 are alternately arranged.

An inspection is performed as follows using the inspection pattern having the above configuration. First, after a semiconductor chip and an inspection pattern are formed on a wafer, respectively, the silicon substrate 21 is formed.
Is applied to the wafer, and the wafer is set in the image comparison inspection apparatus. Next, an electron beam is applied to each of the two rows of contact holes 102 and 101 in the first pattern to be inspected 210.
The electron beams are applied to the two rows of contact holes 103 and 106 in FIG. Further, a secondary electron image is obtained from each of the inspection target pattern 210 and the comparison target pattern 220 by a predetermined method.

The inspection by the image comparison inspection apparatus is shifted in the direction of arrow A in FIG. 6, and a secondary electron image is continuously taken. At this time, the image comparison inspection apparatus includes the inspection target pattern 21.
Secondary electron images corresponding to 0 and the comparative inspection pattern 220 are repeatedly taken in and compared. As a result, when a defective contact hole is detected, a difference image corresponding to that portion is displayed on a monitor.

As described above, according to this embodiment, a non-contact inspection without using a prober or the like can be performed, and a defective contact hole can be detected when the arrangement is not equal. In addition, the inspection target pattern 210
The contact holes to be selected as the comparison test pattern 220 are not limited to four rows, but may be six rows, seven rows,
Alternatively, more rows can be selected.

In the first embodiment, the inspection is performed by treating the pattern to be inspected including the contact holes 101 and 102 and the pattern to be compared including the contact holes 106 and 103 as a set. Inspection target pattern 210 and inspection target pattern 220
Inspection was performed by treating both as a set, but the present invention is not limited to these. For example, in the first embodiment,
While the image comparison inspection apparatus is fixed to the one comparison target pattern, all the inspection target patterns can be inspected while sequentially switching the inspection target patterns.
Further, in the second embodiment, all the inspection target patterns 210 can be inspected while sequentially switching the inspection target patterns 210 while the image comparison inspection device is fixed to the comparative inspection pattern 220. In these cases, more efficient inspection can be performed.

Although the present invention has been described based on the preferred embodiment, the inspection pattern and the inspection method of the present invention are not limited only to the configuration of the above-described embodiment. Inspection patterns and inspection methods obtained by making various modifications and changes from the configuration of the example are also included in the scope of the present invention.

[0043]

As described above, according to the test pattern and the test method of the present invention, the contact hole for conducting between the semiconductor substrate and the other wiring is short-circuited between the conductive pattern which is originally not conducted. Such a defect can be easily detected.

[Brief description of the drawings]

FIG. 1 is a plan view schematically showing an inspection pattern according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the test pattern of FIG. 1 taken along line AA.

FIGS. 3A and 3B are schematic diagrams for explaining an inspection procedure using the inspection pattern of FIG. 1; FIG. 3A illustrates an inspection on an inspection target pattern, and FIG. 3B illustrates an inspection on an inspection target pattern and a comparison inspection pattern; Show.

FIG. 4 is a schematic diagram illustrating an example of contrast generated during a difference image.

FIGS. 5A and 5B are schematic diagrams showing how a contrast is generated in the first embodiment. FIG. 5A is an example in which a secondary electron image having an alternate contrast is obtained, and FIG. (C) shows an example in which the polysilicon wiring layer is electrically connected to the contact hole which is electrically connected to the contact hole, and FIG.

FIG. 6 is a plan view schematically showing an inspection pattern in a second embodiment.

[Explanation of symbols]

 21: silicon substrate 22: gate oxide film 23: silicon oxide film layer 24: sidewall 25: interlayer oxide film 26, 27: conductive polysilicon 101, 102, 103, 106: contact hole 104, 105: polysilicon wiring layer 210: inspection target pattern 220: comparative inspection pattern 301, 302, 303: area 400: inspection pattern 401: comparative inspection pattern 402: inspection pattern

──────────────────────────────────────────────────の Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/66 H01L 21/28 H01L 21/3065

Claims (4)

(57) [Claims] An inspection pattern formed on a semiconductor substrate, wherein the semiconductor substrate is provided in correspondence with a row of conductive patterns insulated from the semiconductor substrate , each of the conductive patterns. conduction to and through the respective conductive patterns and the insulating film on each contact
A contact hole in which a conductor is embedded
The contact row, and are disposed corresponding to the conductive patterns each corresponding conductive patterns on the respective conductive conductively body
An inspection target pattern including a second contact row including a buried contact hole and another conductive pattern insulated from the semiconductor substrate;
Row, the half provided in correspondence with the other conductive pattern.
Conductive to the conductive substrate and separated from the other conductive patterns
A third contact hole having a conductor embedded therein;
Corresponding to the contact row, and the other conductive pattern
Conductors are provided to be electrically connected to the corresponding conductive patterns, respectively.
Fourth contour comprising a contact hole in which is embedded
An inspection pattern comprising: a pattern to be compared, the pattern being a comparison target pattern. 2. The inspection pattern according to claim 1, wherein the first to fourth contact rows are arranged in this order. 3. The inspection target pattern is configured by arranging two first contact rows between two second contact rows, and between the two fourth contact rows. The inspection pattern according to claim 1, wherein the third contact row is arranged in two rows to form the comparison target pattern. 4. An inspection method using the inspection pattern according to claim 1, wherein the first and second semiconductor substrates are applied with a predetermined voltage. Irradiating the third and fourth contact rows with an electron beam, and the respective contact rows of the pattern for inspection and the pattern for comparison alternately contrast based on secondary electrons emitted from each of the contact rows. An inspection method comprising: determining an insulation state between a contact hole in the first contact row and the conductive pattern from a secondary electron image having the following.